WO2023115665A1 - 发光器件驱动电路及显示面板 - Google Patents

发光器件驱动电路及显示面板 Download PDF

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Publication number
WO2023115665A1
WO2023115665A1 PCT/CN2022/071160 CN2022071160W WO2023115665A1 WO 2023115665 A1 WO2023115665 A1 WO 2023115665A1 CN 2022071160 W CN2022071160 W CN 2022071160W WO 2023115665 A1 WO2023115665 A1 WO 2023115665A1
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Prior art keywords
transistor
node
electrically connected
control
compensation
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PCT/CN2022/071160
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English (en)
French (fr)
Inventor
尹翔
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深圳市华星光电半导体显示技术有限公司
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Priority to US17/627,781 priority Critical patent/US20240038162A1/en
Publication of WO2023115665A1 publication Critical patent/WO2023115665A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G09G3/342—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
    • G09G3/3426—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines the different display panel areas being distributed in two dimensions, e.g. matrix
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Definitions

  • the present application relates to the field of display technology, in particular to a light emitting device driving circuit and a display panel.
  • display devices are mainly divided into two types: passive driving and active driving.
  • the passive driving method has the advantage of low cost, but it is difficult to achieve high resolution due to the existence of crosstalk, and the corresponding transient current of the light emitting diode is too large, resulting in a short service life of the power supply and the display device.
  • the active drive is equipped with a thin film transistor for each pixel, and the existence of the capacitor avoids the problems of crosstalk and excessive transient current. Therefore, the existing display devices usually adopt the active drive method, thereby improving the display The life of the device is reduced, and the power consumption of the display device is reduced.
  • the display device when the display device adopts active driving, since the light-emitting diodes will be in a working state for a long time, the problem of shifting the threshold voltage of the driving transistor will occur.
  • a compensation circuit design is introduced. For example, companies such as Samsung usually use a 4T1C light-emitting drive circuit to achieve internal compensation of the threshold voltage.
  • these light-emitting driving circuits have many scanning signals, and the timing is complicated, so the effect is not good.
  • the purpose of the embodiments of the present application is to provide a light-emitting device driving circuit and a display panel, which can solve the technical problem that the existing light-emitting driving circuit cannot compensate the threshold voltage of the driving transistor, and improve the display stability of the display panel.
  • an embodiment of the present application provides a driving circuit for a light emitting device, including: a light emitting device, an anode of the light emitting device is electrically connected to a first power supply, and a cathode of the light emitting device is electrically connected to a first node; a driving transistor, the The gate of the driving transistor is electrically connected to the second node, the source of the driving transistor is electrically connected to the third node, and the drain of the driving transistor is electrically connected to the fourth node; the data signal writing module, the data The signal writing module accesses the data signal and the first scanning signal, and is electrically connected to the fourth node, and the data signal writing module is used to transmit the data signal to the The fourth node; a lighting control module, the lighting control module is connected to the first control signal and connected in series between the fourth node and the second power supply, the lighting control module is used to The first control signal controls the conduction or disconnection between the fourth node and the second power supply; a reset module, the
  • the data signal writing module includes a data signal writing transistor, the gate of the data signal writing transistor is connected to the first scan signal, and the data signal The source of the writing transistor is connected to the data signal, and the drain of the data signal writing transistor is electrically connected to the fourth node.
  • the light emission control module includes a control transistor, the gate of the control transistor is connected to the first control signal, and the drain of the control transistor is electrically connected to the The fourth node, and the source of the control transistor is electrically connected to the second power supply.
  • the drive transistor, the data signal writing transistor, the control transistor, the reset transistor, the first compensation transistor, and the second compensation transistor are same type of transistor.
  • the data signal write transistor and the second compensation transistor are transistors of different types, and the second control signal and the first scan signal are the same signal .
  • the reset transistor and the first compensation transistor are transistors of the same type; the control transistor and the reset transistor are transistors of different types, and the first control transistor The signal is the same signal as the second scanning signal.
  • the voltage provided by the first power supply is connected to the first node and the second compensation transistor through the reset transistor, the first compensation transistor, and the second compensation transistor. Two nodes are reset.
  • the embodiment of the present application also provides another light-emitting device driving circuit, including: a light-emitting device, a driving transistor, a data signal writing module, a light-emitting control module, a reset module, a compensation module, and a storage capacitor; the anode of the light-emitting device is connected to the first The power supply is electrically connected, the cathode of the light emitting device is electrically connected to the first node; the gate of the driving transistor is electrically connected to the second node, the source of the driving transistor is electrically connected to the third node, and the driving transistor The drain is electrically connected to the fourth node; the data signal writing module accesses the data signal and the first scan signal, and is electrically connected to the fourth node, and the data signal writing module is used to Under the control of a scanning signal, the data signal is sent to the fourth node; the lighting control module is connected to the first control signal, and is connected in series between the fourth node and the second power supply, and the The lighting control module is used
  • the data signal writing module includes a data signal writing transistor, the gate of the data signal writing transistor is connected to the first scan signal, and the data signal The source of the writing transistor is connected to the data signal, and the drain of the data signal writing transistor is electrically connected to the fourth node.
  • the light emission control module includes a control transistor, the gate of the control transistor is connected to the first control signal, and the drain of the control transistor is electrically connected to the The fourth node, and the source of the control transistor is electrically connected to the second power supply.
  • the reset module includes a reset transistor, the gate of the reset transistor is connected to the second scan signal, and the source of the reset transistor is electrically connected to the A first power supply, the drain of the reset transistor is electrically connected to the first node.
  • the compensation module includes a first compensation transistor and a second compensation transistor, the gate of the first compensation transistor is connected to the second scan signal, and the first The source of the compensation transistor is electrically connected to the second node, the drain of the first compensation transistor is electrically connected to the third node; the gate of the second compensation transistor is connected to the second control signal, the source of the second compensation transistor is electrically connected to the first node, and the drain of the second compensation transistor is electrically connected to the third node.
  • the drive transistor, the data signal writing transistor, the control transistor, the reset transistor, the first compensation transistor, and the second compensation transistor are same type of transistor.
  • the data signal write transistor and the second compensation transistor are transistors of different types, and the second control signal and the first scan signal are the same signal .
  • the reset transistor and the first compensation transistor are transistors of the same type; the control transistor and the reset transistor are transistors of different types, and the first control transistor The signal is the same signal as the second scanning signal.
  • the voltage provided by the first power supply is connected to the first node and the second compensation transistor through the reset transistor, the first compensation transistor, and the second compensation transistor. Two nodes are reset.
  • the embodiment of the present application also provides a display panel, which includes a plurality of pixel units arranged in an array, and each of the pixel units includes a light-emitting device driving circuit, and the light-emitting device driving circuit includes: a light-emitting device , the anode of the light emitting device is electrically connected to the first power supply, the cathode of the light emitting device is electrically connected to the first node; the driving transistor, the gate of the driving transistor is electrically connected to the second node, and the source of the driving transistor The electrode is electrically connected to the third node, and the drain of the driving transistor is electrically connected to the fourth node; the data signal writing module, the data signal writing module receives the data signal and the first scanning signal, and is electrically connected to the In the fourth node, the data signal writing module is used to transmit the data signal to the fourth node under the control of the first scanning signal; in the lighting control module, the lighting control module is connected to the first control signal, and connected in series
  • the drain of a compensation transistor is electrically connected to the third node; the gate of the second compensation transistor is connected to the second control signal, and the source of the second compensation transistor is electrically connected to the first node.
  • a node the drain of the second compensation transistor is electrically connected to the third node, and the compensation module is configured to control the second compensation transistor under the control of the second control signal and the second scan signal A node is reset, and the compensation module is further configured to compensate the threshold voltage of the drive transistor under the control of the second control signal and the second scan signal; and the storage capacitor, the storage capacitor The first end is electrically connected to the second node, and the second end of the storage capacitor is electrically connected to the second power supply.
  • the data signal writing module includes a data signal writing transistor, the gate of the data signal writing transistor is connected to the first scan signal, and the data signal The source of the writing transistor is connected to the data signal, and the drain of the data signal writing transistor is electrically connected to the fourth node.
  • the light emission control module includes a control transistor, the gate of the control transistor is connected to the first control signal, and the drain of the control transistor is electrically connected to the The fourth node, and the source of the control transistor is electrically connected to the second power supply.
  • the drive transistor, the data signal writing transistor, the control transistor, the reset transistor, the first compensation transistor, and the second compensation transistor are same type of transistor.
  • the light emitting device driving circuit and the display panel provided in the embodiment of the present application include a light emitting device, a driving transistor, a data signal writing module, a light emitting control module, a reset module, a compensation module and a storage capacitor.
  • the threshold voltage of the drive transistor can be compensated by the compensation module, and the first node can be reset by the reset module, thereby solving the technical problem that the existing light-emitting drive circuit cannot compensate the threshold voltage of the drive transistor, which is conducive to improving the display The stability of the panel display.
  • FIG. 1 is a schematic structural diagram of a driving circuit for a light emitting device provided in an embodiment of the present application
  • FIG. 2 is a schematic circuit diagram of a light emitting device driving circuit provided in an embodiment of the present application
  • FIG. 3 is one of the timing diagrams of the light emitting device driving circuit provided by the embodiment of the present application.
  • FIG. 4 is a schematic diagram of the pathway of the light-emitting device driving circuit provided in the embodiment of the present application in the reset phase under the driving sequence shown in FIG. 3;
  • FIG. 5 is a schematic diagram of the threshold voltage detection and data writing stages of the light emitting device driving circuit provided in the embodiment of the present application under the driving sequence shown in FIG. 3 ;
  • FIG. 6 is a schematic diagram of the path of the light-emitting device driving circuit provided in the embodiment of the present application in the light-emitting phase under the driving sequence shown in FIG. 3 ;
  • FIG. 7 is the second timing diagram of the light emitting device driving circuit provided by the embodiment of the present application.
  • FIG. 8 is the second timing diagram of the light emitting device driving circuit provided by the embodiment of the present application.
  • FIG. 9 is a schematic structural diagram of a backlight module provided by an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • the transistors used in all embodiments of this application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistors used here are symmetrical, their source and drain can be interchanged. of. In the embodiment of the present application, in order to distinguish the two poles of the transistor except the gate, one pole is called the source, and the other pole is called the drain. According to the form in the accompanying drawings, it is stipulated that the middle terminal of the switching transistor is the gate, the signal input terminal is the source terminal, and the output terminal is the drain terminal.
  • the transistors used in the embodiments of the present application are N-type transistors, wherein the N-type transistors are turned on when the gate is at a high potential, and are turned off when the gate is at a low potential.
  • the light emitting device D may be Mini-LED or Micro-LED.
  • FIG. 1 is a schematic structural diagram of a light emitting device driving circuit provided by an embodiment of the present application.
  • the light-emitting device driving circuit 10 provided by the embodiment of the present application includes a light-emitting device D, a driving transistor T1, a light-emitting control module 101, a compensation module 102, a data signal writing module 103, a reset module 104, and a storage capacitor Cst .
  • the light emitting device D may be a mini light emitting diode, a micro light emitting diode or an organic light emitting diode.
  • the anode of the light emitting device D is electrically connected to the first power supply, and the cathode of the light emitting device D is electrically connected to the first node.
  • the lighting control module 101 receives the first control signal EM1.
  • the compensation module 102 receives the second control signal EM2 and the second scan signal SCAN2.
  • the compensation module 102 is electrically connected to the first node A, the second node G and the third node B.
  • the gate of the driving transistor T1 is electrically connected to the second node G.
  • the source of the driving transistor T1 is electrically connected to the third node B.
  • the drain of the driving transistor T1 is electrically connected to the fourth node S.
  • the data signal writing module 103 receives the data signal DATA and the first scan signal SCAN1 , and is electrically connected to the fourth node S.
  • the reset module 104 receives the second scan signal SCAN2 and the first power signal VDD.
  • the reset module 104 is electrically connected to the first node A. As shown in FIG.
  • the first end of the storage capacitor C st is electrically connected to the second node G, and the second end of the storage capacitor C st is connected to the second power signal VSS.
  • the driving transistor T1 is used to control the current flowing through the driving circuit.
  • the light emission control module 101 is used for controlling the driving circuit to be turned on or off based on the first control signal EM1 .
  • the compensation module 102 is used to reset the first node A under the control of the second control signal EM2 and the second scan signal SCAN2, and is also used to reset the drive transistor T1 under the control of the second control signal EM2 and the second scan signal SCAN2
  • the threshold voltage Vth_T1 is compensated.
  • the data signal writing module 103 is used for sending the data signal DATA to the fourth node S under the control of the first scan signal SCAN1 .
  • the reset module 104 is used to reset the first node A under the control of the second scanning signal SCAN2.
  • the storage capacitor C st is the gate voltage holding capacitor of the driving transistor T1.
  • the light-emitting device driving circuit 10 provided in the embodiment of the present application can internally compensate the threshold voltage Vth_T1 of the driving transistor T1 through the compensation module 102, and can reset the first node A through the reset module 104, thereby avoiding the threshold voltage of the driving transistor T1.
  • Vth_T1 and the threshold voltage Vth_LED of the light-emitting device D affect the brightness of the light-emitting device D, thereby improving the accuracy and uniformity of the picture displayed on the display panel.
  • FIG. 2 is a schematic circuit diagram of a light emitting device driving circuit provided by an embodiment of the present application.
  • the lighting control module 101 includes a control transistor T3.
  • the gate of the control transistor T3 is connected to the first control signal EM1
  • the source of the control transistor T3 is electrically connected to the second power signal VSS
  • the drain of the control transistor T3 is electrically connected to the fourth node S.
  • the compensation module 102 includes a first compensation transistor T4 and a second compensation transistor T5.
  • the first compensation transistor T4 is connected to the second scan signal SCAN2 , the source of the first compensation transistor T4 is electrically connected to the source of the driving transistor T1 , and the drain of the first compensation transistor T4 is electrically connected to the second node G.
  • the gate of the second compensation transistor T5 is connected to the second control signal EM2, the source of the second compensation transistor T5 is electrically connected to the first node A, and the drain of the second compensation transistor T5 is electrically connected to the third node B .
  • the data signal writing module 103 includes a data signal writing transistor T2.
  • the gate of the data signal writing transistor T2 is connected to the first scan signal SCAN1 , the source of the data signal writing transistor T2 is connected to the data signal DATA, and the drain of the data signal writing transistor T2 is electrically connected to the fourth node S.
  • the reset module 104 includes a reset transistor T6.
  • the gate of the reset transistor T6 is connected to the second scan signal SCAN2 , the source of the reset transistor T6 is connected to the first power signal VDD, and the drain of the reset transistor T6 is electrically connected to the first node A.
  • the first end of the storage capacitor C st is electrically connected to the second node G, and the second end of the storage capacitor C st is connected to the second power signal VSS.
  • both the first power signal VDD and the second power signal VSS are used to output a preset voltage value.
  • the potential of the first power signal VDD is greater than the potential of the second power signal VSS.
  • the potential of the second power signal VSS may be the potential of the ground terminal.
  • the potential of the second power signal VSS can also be other.
  • the driving transistor T1, the data signal writing transistor T2, the control transistor T3, the first compensation transistor T4, the second compensation transistor T5, and the reset transistor T6 can be low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors or amorphous One or more of silicon thin film transistors.
  • the transistors in the light-emitting device driving circuit 10 provided in the embodiment of the present application are transistors of the same type, which can be all P-type transistors or N-type transistors, which is beneficial to avoid the difference between different types of transistors from affecting the light-emitting device driving circuit. 10 Impact.
  • FIG. 3 is one of the timing diagrams of the light emitting device driving circuit provided by the embodiment of the present application.
  • the combination of the first control signal EM1, the second control signal EM2, the data signal DATA, the first scanning signal SCAN1, and the second scanning signal SCAN2 successively corresponds to the reset phase t1, the threshold voltage detection and data writing phase t2, and the lighting phase t3;
  • the driving control sequence of the light emitting device driving circuit 10 provided by the embodiment of the present application includes a reset phase t1, a threshold voltage detection and data writing phase t2, and a light emitting phase t3.
  • the light emitting device D emits light in the light emitting phase t3.
  • the first scan signal SCAN1 is at low potential
  • the second scan signal SCAN2 is at high potential
  • the first control signal EM1 is at low potential
  • the second control signal EM2 is at high potential.
  • the first scan signal SCAN1 is at high potential
  • the second scan signal SCAN2 is at high potential
  • the first control signal EM1 is at low potential
  • the second control signal EM2 is at low potential.
  • the first scan signal SCAN1 is at low potential
  • the second scan signal SCAN2 is at low potential
  • the first control signal EM1 is at high potential
  • the second control signal EM2 is at high potential.
  • both the first power signal VDD and the second power signal VSS are DC voltage sources.
  • FIG. 4 is a schematic diagram of the pathway of the light emitting device driving circuit provided in the embodiment of the present application in the reset phase under the driving sequence shown in FIG. 3 .
  • the second scan signal SCAN2 is at a high potential
  • the first compensation transistor T4 and the reset transistor T6 are turned on under the control of the high potential of the second scan signal SCAN2 .
  • the second control signal EM2 is at a high potential
  • the second compensation transistor T5 is turned on under the control of the high potential of the second control signal EM2 .
  • the driving transistor T1 is turned on under the control of the high potential of the second node G.
  • FIG. 5 is a schematic diagram of the pathway of the threshold voltage detection and data writing stages of the light emitting device driving circuit provided by the embodiment of the present application under the driving sequence shown in FIG. 3 .
  • the first scanning signal SCAN1 is at a high potential
  • the data signal writing transistor T2 is turned on under the control of the high potential of the first scanning signal SCAN1, and transmits the data signal DATA to the fourth node S
  • the potential of the fourth node S becomes DATA_H, where DATA_H is the voltage when the data signal DATA is at a high potential.
  • the second scanning signal SCAN2 is at a high potential, and the first compensation transistor T4 and the reset transistor T6 are turned on under the control of the high potential of the second scanning signal SCAN2, so that the data signal writing transistor T2, the first compensation transistor T4 and the reset transistor T6 form a Diode structure, so that the potential of the second node G is Vdata+Vth_T1 from the voltage of the first power supply signal VDD, wherein Vth_T1 is the threshold voltage of the driving transistor T1.
  • the control transistor T3 is turned off.
  • the second control signal EM2 is low, so that the second compensation transistor T5 is turned off.
  • FIG. 6 is a schematic diagram of pathways of the light-emitting phase of the driving circuit of the light-emitting device provided in the embodiment of the present application under the driving sequence shown in FIG. 3 .
  • the first control signal EM1 is at a high potential, and the control transistor T3 is turned on under the control of the high potential of the first control signal EM1; the second control signal EM2 is at a high potential, and the second compensation transistor T5 is controlled by the second control signal EM2 Open under high potential control.
  • the voltage provided by the first power supply signal VDD resets the first node A and the second node G through the reset transistor T6 , the first compensation transistor T4 and the second compensation transistor T5 .
  • the potential of the first node A is VDD
  • the potential of the second node G is Vdata+Vth_T1
  • the potential of the fourth node S is VSS
  • VSS the voltage of the second power supply signal VSS
  • Vth_T1 the voltage of the driving transistor T1.
  • the threshold voltage of the transistor T1 Vdata is the voltage of the data signal DATA.
  • k is the mobility of the light-emitting driving circuit.
  • the I oled flowing through the light emitting device D is only related to Vdata, Vth_T1 and VSS. Therefore, the I oled of the light-emitting device D and the threshold voltage Vth_LED of the light-emitting device D flow through, thereby preventing the threshold voltage Vth_LED of the light-emitting device D from affecting the brightness of the light-emitting device D, thereby improving the accuracy and uniformity of the display panel image display.
  • FIG. 7 is the second timing diagram of the light emitting device driving circuit provided by the embodiment of the present application.
  • the data signal writing transistor T2 and the second compensation transistor T5 are different types of transistors, and the second control signal EM2 and the first scanning signal SCAN1 are the same signal.
  • FIG. 8 is the third timing diagram of the light emitting device driving circuit provided by the embodiment of the present application.
  • the reset transistor T6 and the first compensation transistor T4 are transistors of the same type; the control transistor T3 and the reset transistor T6 are transistors of different types, and the first control signal EM1 and the second The two scan signals SCAN2 are the same signal.
  • FIG. 9 is a schematic structural diagram of a backlight module provided by an embodiment of the present application.
  • the embodiment of the present application also provides a backlight module 100, which includes a data line 20, a first light emission control signal line 30, a second light emission control signal line 40, a first scanning line 50, a second scanning line 60 and the above-mentioned The light emitting device driving circuit 10.
  • the data line 20 is used to provide data signals.
  • the first light emission control signal line 30 is used for providing a first light emission control signal.
  • the second light emission control signal line 40 is used for providing a second light emission control signal.
  • the first scan line 50 is used to provide a first scan signal.
  • the second scan line 60 is used for providing a second scan signal.
  • the light emitting device driving circuit 10 is connected to the data line 20 , the first light emission control signal line 30 , the second light emission control signal line 40 , the first scan line 50 and the second scan line 60 .
  • the light emitting device D may be Mini-LED or Micro-LED.
  • the light emitting device driving circuit 10 reference may be made to the above description of the light emitting device driving circuit, and details are not repeated here.
  • FIG. 10 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • the embodiment of the present application also provides a display panel 200, including a plurality of pixel units 210 arranged in an array, and each pixel unit 210 includes the above-mentioned light-emitting device driving circuit 10, wherein the light-emitting device D can be a Mini- LED, Micro-LED.
  • the light-emitting device D can be a Mini- LED, Micro-LED.

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Abstract

一种发光器件驱动电路（10）及显示面板（200），包括发光器件（D）、驱动晶体管（T1）、数据信号写入模块（103）、发光控制模块（101）、复位模块（104）、补偿模块（102）以及存储电容（C s）。其中，通过补偿模块（102）可以对驱动晶体管（T1）的阈值电压进行补偿，通过复位模块（104）可以对第一节点（A）进行复位，可以解决现有的发光驱动电路无法补偿驱动晶体管的阈值电压的技术问题。

Description

发光器件驱动电路及显示面板 技术领域
本申请涉及显示技术领域，具体涉及一种发光器件驱动电路及显示面板。
 背景技术
目前，显示装置主要分为无源驱动以及有源驱动两种方式。其中，无源驱动方式优势在于成本低廉，但是因为交叉串扰的存在难以实现高分辨率，且对应的发光二极管瞬态电流过大造成电源以及显示装置使用寿命较短。而有源驱动对应每个像素配备一个薄膜晶体管，电容的存在使其避免了交叉串扰和瞬态电流过大的问题，因此，现有的显示装置通常采用有源驱动的方式，从而提高了显示装置的寿命，降低了显示装置的功耗。
其中，当显示装置采用有源驱动时，由于发光二极管会处于长时间工作的状态，因此会发生驱动晶体管阈值电压偏移的问题。为解决阈值电压偏移问题，引入了补偿电路设计。比如，三星等公司通常采用4T1C发光驱动电路来实现阈值电压的内部补偿。但是这些发光驱动电路的扫描信号较多，时序复杂，效果不佳。
因此，如何提出一种发光驱动电路，使其能够实现驱动晶体管的阈值电压的内部补偿是现有面板厂家需要努力攻克的难关。
 技术问题
本申请实施例的目的在于提供一种发光器件驱动电路及显示面板，能够解决现有的发光驱动电路无法补偿驱动晶体管的阈值电压的技术问题，提升显示面板显示的稳定性。
 技术解决方案
一方面，本申请实施例提供一种发光器件驱动电路，包括：发光器件，所述发光器件的阳极与第一电源电连接，所述发光器件的阴极与第一节点电连接；驱动晶体管，所述驱动晶体管的栅极与第二节点电连接，所述驱动晶体管的源极与第三节点电连接，所述驱动晶体管的漏极与第四节点电连接；数据信号写入模块，所述数据信号写入模块接入数据信号以及第一扫描信号，并电性连接于所述第四节点，所述数据信号写入模块用于在所述第一扫描信号的控制下输送所述数据信号至所述第四节点；发光控制模块，所述发光控制模块接入第一控制信号，并串接于所述第四节点与所述第二电源之间，所述发光控制模块用于基于所述第一控制信号控制所述第四节点与所述第二电源之间导通或者断开；复位模块，所述复位模块包括复位晶体管，所述复位晶体管的栅极接入所述第二扫描信号，所述复位晶体管的源极电性连接于所述第一电源，所述复位晶体管的漏极电性连接于所述第一节点，所述复位模块用于在所述第二扫描信号的控制下，对所述第一节点进行复位；补偿模块，所述补偿模块包括第一补偿晶体管和第二补偿晶体管，所述第一补偿晶体管的栅极接入所述第二扫描信号，所述第一补偿晶体管的源极电性连接于所述第二节点，所述第一补偿晶体管的漏极电性连接于所述第三节点；所述第二补偿晶体管的栅极接入所述第二控制信号，所述第二补偿晶体管的源极电性连接于所述第一节点，所述第二补偿晶体管的漏极电性连接于所述第三节点，所述补偿模块用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述第一节点进行复位，所述补偿模块还用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述驱动晶体管的阈值电压进行补偿；以及存储电容，所述存储电容的第一端与所述第二节点电连接，所述存储电容的第二端与第二电源电连接。
可选地，在本申请的一些实施例中，所述数据信号写入模块包括数据信号写入晶体管，所述数据信号写入晶体管的栅极接入所述第一扫描信号，所述数据信号写入晶体管的源极接入所述数据信号，所述数据信号写入晶体管的漏极电性连接于所述第四节点。
可选地，在本申请的一些实施例中，所述发光控制模块包括控制晶体管，所述控制晶体管的栅极接入所述第一控制信号，所述控制晶体管的漏极电性连接于所述第四节点，且所述控制晶体管的源极电性连接于所述第二电源。
可选地，在本申请的一些实施例中，所述驱动晶体管、所述数据信号写入晶体管、所述控制晶体管、所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管为同类型晶体管。
可选地，在本申请的一些实施例中，所述数据信号写入晶体管和所述第二补偿晶体管为不同类型的晶体管，且所述第二控制信号与所述第一扫描信号为同一信号。
可选地，在本申请的一些实施例中，所述复位晶体管与所述第一补偿晶体管为同类型的晶体管；所述控制晶体管与所述复位晶体管为不同类型的晶体管，所述第一控制信号与所述第二扫描信号为同一信号。
可选地，在本申请的一些实施例中，所述第一电源提供的电压通过所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管对所述第一节点以及所述第二节点进行复位。
本申请实施例还提供另一种发光器件驱动电路，包括：发光器件、驱动晶体管、数据信号写入模块、发光控制模块、复位模块、补偿模块以及存储电容；所述发光器件的阳极与第一电源电连接，所述发光器件的阴极与第一节点电连接；所述驱动晶体管的栅极与第二节点电连接，所述驱动晶体管的源极与第三节点电连接，所述驱动晶体管的漏极与第四节点电连接；所述数据信号写入模块接入数据信号以及第一扫描信号，并电性连接于所述第四节点，所述数据信号写入模块用于在所述第一扫描信号的控制下输送所述数据信号至所述第四节点；所述发光控制模块接入第一控制信号，并串接于所述第四节点与所述第二电源之间，所述发光控制模块用于基于所述第一控制信号控制所述第四节点与所述第二电源之间导通或者断开；所述复位模块接入第二扫描信号，并电性连接于所述第一电源以及所述第一节点，所述复位模块用于在所述第二扫描信号的控制下，对所述第一节点进行复位；所述补偿模块接入第二控制信号以及所述第二扫描信号，并电性连接于所述第一节点、所述第二节点以及所述第三节点，所述补偿模块用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述第一节点进行复位，所述补偿模块还用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述驱动晶体管的阈值电压进行补偿；以及所述存储电容的第一端与所述第二节点电连接，所述存储电容的第二端与第二电源电连接。
可选地，在本申请的一些实施例中，所述数据信号写入模块包括数据信号写入晶体管，所述数据信号写入晶体管的栅极接入所述第一扫描信号，所述数据信号写入晶体管的源极接入所述数据信号，所述数据信号写入晶体管的漏极电性连接于所述第四节点。
可选地，在本申请的一些实施例中，所述发光控制模块包括控制晶体管，所述控制晶体管的栅极接入所述第一控制信号，所述控制晶体管的漏极电性连接于所述第四节点，且所述控制晶体管的源极电性连接于所述第二电源。
可选地，在本申请的一些实施例中，所述复位模块包括复位晶体管，所述复位晶体管的栅极接入所述第二扫描信号，所述复位晶体管的源极电性连接于所述第一电源，所述复位晶体管的漏极电性连接于所述第一节点。
可选地，在本申请的一些实施例中，所述补偿模块包括第一补偿晶体管和第二补偿晶体管，所述第一补偿晶体管的栅极接入所述第二扫描信号，所述第一补偿晶体管的源极电性连接于所述第二节点，所述第一补偿晶体管的漏极电性连接于所述第三节点；所述第二补偿晶体管的栅极接入所述第二控制信号，所述第二补偿晶体管的源极电性连接于所述第一节点，所述第二补偿晶体管的漏极电性连接于所述第三节点。
可选地，在本申请的一些实施例中，所述驱动晶体管、所述数据信号写入晶体管、所述控制晶体管、所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管为同类型晶体管。
可选地，在本申请的一些实施例中，所述数据信号写入晶体管和所述第二补偿晶体管为不同类型的晶体管，且所述第二控制信号与所述第一扫描信号为同一信号。
可选地，在本申请的一些实施例中，所述复位晶体管与所述第一补偿晶体管为同类型的晶体管；所述控制晶体管与所述复位晶体管为不同类型的晶体管，所述第一控制信号与所述第二扫描信号为同一信号。
可选地，在本申请的一些实施例中，所述第一电源提供的电压通过所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管对所述第一节点以及所述第二节点进行复位。
另一方面，本申请实施例还提供一种显示面板，其包括多个呈阵列排布的像素单元，每一所述像素单元均包括发光器件驱动电路，所述发光器件驱动电路包括：发光器件，所述发光器件的阳极与第一电源电连接，所述发光器件的阴极与第一节点电连接；驱动晶体管，所述驱动晶体管的栅极与第二节点电连接，所述驱动晶体管的源极与第三节点电连接，所述驱动晶体管的漏极与第四节点电连接；数据信号写入模块，所述数据信号写入模块接入数据信号以及第一扫描信号，并电性连接于所述第四节点，所述数据信号写入模块用于在所述第一扫描信号的控制下输送所述数据信号至所述第四节点；发光控制模块，所述发光控制模块接入第一控制信号，并串接于所述第四节点与所述第二电源之间，所述发光控制模块用于基于所述第一控制信号控制所述第四节点与所述第二电源之间导通或者断开；复位模块，所述复位模块包括复位晶体管，所述复位晶体管的栅极接入所述第二扫描信号，所述复位晶体管的源极电性连接于所述第一电源，所述复位晶体管的漏极电性连接于所述第一节点，所述复位模块用于在所述第二扫描信号的控制下，对所述第一节点进行复位；补偿模块，所述补偿模块包括第一补偿晶体管和第二补偿晶体管，所述第一补偿晶体管的栅极接入所述第二扫描信号，所述第一补偿晶体管的源极电性连接于所述第二节点，所述第一补偿晶体管的漏极电性连接于所述第三节点；所述第二补偿晶体管的栅极接入所述第二控制信号，所述第二补偿晶体管的源极电性连接于所述第一节点，所述第二补偿晶体管的漏极电性连接于所述第三节点，所述补偿模块用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述第一节点进行复位，所述补偿模块还用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述驱动晶体管的阈值电压进行补偿；以及存储电容，所述存储电容的第一端与所述第二节点电连接，所述存储电容的第二端与第二电源电连接。
可选地，在本申请的一些实施例中，所述数据信号写入模块包括数据信号写入晶体管，所述数据信号写入晶体管的栅极接入所述第一扫描信号，所述数据信号写入晶体管的源极接入所述数据信号，所述数据信号写入晶体管的漏极电性连接于所述第四节点。
可选地，在本申请的一些实施例中，所述发光控制模块包括控制晶体管，所述控制晶体管的栅极接入所述第一控制信号，所述控制晶体管的漏极电性连接于所述第四节点，且所述控制晶体管的源极电性连接于所述第二电源。
可选地，在本申请的一些实施例中，所述驱动晶体管、所述数据信号写入晶体管、所述控制晶体管、所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管为同类型晶体管。
 有益效果
在本申请实施例提供的发光器件驱动电路及显示面板中，包括发光器件、驱动晶体管、数据信号写入模块、发光控制模块、复位模块、补偿模块以及存储电容。其中，通过补偿模块可以对驱动晶体管的阈值电压进行补偿，通过复位模块可以对第一节点进行复位，从而可以解决现有的发光驱动电路无法补偿驱动晶体管的阈值电压的技术问题，有利于提升显示面板显示的稳定性。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的发光器件驱动电路的结构示意图；
图2为本申请实施例提供的发光器件驱动电路的电路示意图；
图3为本申请实施例提供的发光器件驱动电路的时序图之一；
图4为本申请实施例提供的发光器件驱动电路在图3所示的驱动时序下的复位阶段的通路示意图；
图5为本申请实施例提供的发光器件驱动电路在图3所示的驱动时序下的阈值电压探测及数据写入阶段的通路示意图；
图6为本申请实施例提供的发光器件驱动电路在图3所示的驱动时序下的发光阶段的通路示意图；
图7为本申请实施例提供的发光器件驱动电路的时序图之二；
图8为本申请实施例提供的发光器件驱动电路的时序图之二；
图9为本申请实施例提供的背光模组的结构示意图；
图10为本申请实施例提供的显示面板的结构示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请所有实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件，由于这里采用的晶体管的源极、漏极是对称的，所以其源极、漏极是可以互换的。在本申请实施例中，为区分晶体管除栅极之外的两极，将其中一极称为源极，另一极称为漏极。按附图中的形态规定开关晶体管的中间端为栅极、信号输入端为源极、输出端为漏极。此外本申请实施例所采用的晶体管为N型晶体管，其中，N型晶体管为在栅极为高电位时导通，在栅极为低电位时截止。在本申请实施例中，发光器件D可以是Mini-LED、Micro-LED。
请参阅图1，图1为本申请实施例提供的发光器件驱动电路的结构示意图。如图1所示，本申请实施例提供的发光器件驱动电路10包括发光器件D、驱动晶体管T1、发光控制模块101、补偿模块102、数据信号写入模块103、复位模块104以及存储电容C st。需要说明的是，发光器件D可以为迷你发光二极管、微型发光二极管或有机发光二极管。
其中，发光器件D的阳极与第一电源电连接，发光器件D的阴极与第一节点电连接。发光控制模块101接入第一控制信号EM1。补偿模块102接入第二控制信号EM2以及第二扫描信号SCAN2。补偿模块102电性连接于第一节点A、第二节点G以及第三节点B。驱动晶体管T1的栅极电性连接于第二节点G。驱动晶体管T1的源极电性连接于第三节点B。驱动晶体管T1的漏极电性连接于第四节点S。数据信号写入模块103接入数据信号DATA以及第一扫描信号SCAN1，并电性连接于第四节点S。复位模块104接入第二扫描信号SCAN2以及第一电源信号VDD。复位模块104电性连接于第一节点A。存储电容C st的第一端电性连接于第二节点G，存储电容C st的第二端接入第二电源信号VSS。
具体的，驱动晶体管T1用于控制流经驱动电路的电流。发光控制模块101用于基于第一控制信号EM1控制驱动电路导通或截止。补偿模块102用于基于第二控制信号EM2以及第二扫描信号SCAN2的控制下对第一节点A进行复位，还用于基于第二控制信号EM2以及第二扫描信号SCAN2的控制下对驱动晶体管T1的阈值电压Vth_T1进行补偿。数据信号写入模块103用于在第一扫描信号SCAN1的控制下输送数据信号DATA至第四节点S。复位模块104用于在第二扫描信号SCAN2的控制下对第一节点A进行复位。存储电容C st为驱动晶体管T1的栅极电压保持电容。
本申请实施例提供的发光器件驱动电路10，通过补偿模块102可以对驱动晶体管T1的阈值电压Vth_T1进行内部补偿，通过复位模块104可以对第一节点A进行复位，从而避免驱动晶体管T1的阈值电压Vth_T1、发光器件D的阈值电压Vth_LED影响发光器件D的亮度，进而提高显示面板画面显示的准确性以及均匀性。
请参阅图2，图2为本申请实施例提供的发光器件驱动电路的电路示意图。如图2所示，发光控制模块101包括控制晶体管T3。控制晶体管T3的栅极接入第一控制信号EM1，控制晶体管T3的源极电性连接于第二电源信号VSS，且控制晶体管T3的漏极电性连接于第四节点S。补偿模块102包括第一补偿晶体管T4和第二补偿晶体管T5。第一补偿晶体管T4接入第二扫描信号SCAN2，第一补偿晶体管T4的源极电性连接于驱动晶体管T1的源极，第一补偿晶体管T4的漏极电性连接于第二节点G。第二补偿晶体管T5的栅极接入第二控制信号EM2，第二补偿晶体管T5的源极电性连接于第一节点A，且第二补偿晶体管T5的漏极电性连接于第三节点B。数据信号写入模块103包括数据信号写入晶体管T2。数据信号写入晶体管T2的栅极接入第一扫描信号SCAN1，数据信号写入晶体管T2的源极接入数据信号DATA，数据信号写入晶体管T2的漏极电性连接于第四节点S。复位模块104包括复位晶体管T6。复位晶体管T6的栅极接入第二扫描信号SCAN2，复位晶体管T6的源极接入第一电源信号VDD，复位晶体管T6的漏极电性连接于第一节点A。存储电容C st的第一端电性连接于第二节点G，存储电容C st的第二端接入第二电源信号VSS。
需要说明的是，第一电源信号VDD和第二电源信号VSS均用于输出一预设电压值。此外，在本申请实施例中，第一电源信号VDD的电位大于第二电源信号VSS的电位。具体的，第二电源信号VSS的电位可以为接地端的电位。当然，可以理解地，第二电源信号VSS的电位还可以为其它。
需要说明的是，驱动晶体管T1、数据信号写入晶体管T2、控制晶体管T3、第一补偿晶体管T4、第二补偿晶体管T5、复位晶体管T6可以为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种或者多种。进一步的，本申请实施例提供的发光器件驱动电路10中的晶体管为同类型晶体管，可以均为P型晶体管或N型晶体管，有利于避免不同类型的晶体管之间的差异性对发光器件驱动电路10造成的影响。
请参阅图3，图3为本申请实施例提供的发光器件驱动电路的时序图之一。第一控制信号EM1、第二控制信号EM2，数据信号DATA、第一扫描信号SCAN1、第二扫描信号SCAN2相组合先后对应于复位阶段t1、阈值电压探测及数据写入阶段t2、发光阶段t3；其中，也即，在一帧时间内，本申请实施例提供的发光器件驱动电路10的驱动控制时序包括复位阶段t1、阈值电压探测及数据写入阶段t2、发光阶段t3。
需要说明的是，发光器件D在发光阶段t3发光。
具体的，在复位阶段t1，第一扫描信号SCAN1为低电位，第二扫描信号SCAN2为高电位，第一控制信号EM1为低电位，第二控制信号EM2为高电位。
具体的，在阈值电压探测及数据写入阶段t2，第一扫描信号SCAN1为高电位，第二扫描信号SCAN2为高电位，第一控制信号EM1为低电位，第二控制信号EM2为低电位。
具体的，在发光阶段t3，第一扫描信号SCAN1为低电位，第二扫描信号SCAN2为低电位，第一控制信号EM1为高电位，第二控制信号EM2为高电位。
具体的，第一电源信号VDD和第二电源信号VSS均为直流电压源。
具体的，请参阅图3和图4，图4为本申请实施例提供的发光器件驱动电路在图3所示的驱动时序下的复位阶段的通路示意图。
在复位阶段t1，第二扫描信号SCAN2为高电位，第一补偿晶体管T4及复位晶体管T6在第二扫描信号SCAN2的高电位控制下打开。第二控制信号EM2为高电位，第二补偿晶体管T5在第二控制信号EM2的高电位控制下打开。从而实现对第一节点A和第二节点G的复位，使第一节点A的电压和第二节点G的电压复位到第一电源信号VDD的电压。
另外，当第二节点G的电压变为第一电源信号VDD的电压时，驱动晶体管T1在第二节点G的高电位控制下打开。
具体的，请参阅图3和图5，图5为本申请实施例提供的发光器件驱动电路在图3所示的驱动时序下的阈值电压探测及数据写入阶段的通路示意图。
在阈值电压探测以及数据写入阶段t2，第一扫描信号SCAN1为高电位，数据信号写入晶体管T2在第一扫描信号SCAN1的高电位控制下打开，将数据信号DATA输送至第四节点S，以使第四节点S的电位变为DATA_H，其中，DATA_H为数据信号DATA处于高电位时的电压。第二扫描信号SCAN2为高电位，第一补偿晶体管T4及复位晶体管T6在第二扫描信号SCAN2的高电位控制下打开，以使数据信号写入晶体管T2、第一补偿晶体管T4以及复位晶体管T6形成二极管结构，从而使第二节点G的电位由第一电源信号VDD的电压为Vdata+Vth_T1，其中，Vth_T1为驱动晶体管T1的阈值电压。
与此同时，在阈值电压探测以及数据写入阶段t2，由于第一控制信号EM1为低电位，使得控制晶体管T3关闭。第二控制信号EM2为低电位，使得第二补偿晶体管T5关闭。
具体的，请参阅图3和图6，图6为本申请实施例提供的发光器件驱动电路在图3所示的驱动时序下的发光阶段的通路示意图。
在发光阶段t3，第一控制信号EM1为高电位，控制晶体管T3在第一控制信号EM1的高电位控制下打开；第二控制信号EM2为高电位，第二补偿晶体管T5在第二控制信号EM2的高电位控制下打开。具体地，第一电源信号VDD提供的电压通过复位晶体管T6、第一补偿晶体管T4以及第二补偿晶体管T5对第一节点A以及第二节点G进行复位。
以使第一节点A的电位为VDD，第二节点G的电位维持Vdata+Vth_T1，第四节点S的电位为VSS，
此时，驱动晶体管T1的栅极与漏极的压差T1_Vgs的计算公式如下所示：T1_Vgs=V_G-V_S=Vdata+Vth_T1-VSS，其中，VSS为第二电源信号VSS的电压，Vth_T1为驱动晶体管T1的阈值电压，Vdata为数据信号DATA的电压。
与此同时，在发光阶段t3，由于第一扫描信号SCAN1为低电位，使得数据信号写入晶体管T2关闭，第二扫描信号SCAN2为低电位，使得第一补偿晶体管T4及复位晶体管T6关闭。
由上述可知，流过发光器件D的I oled的计算公式如下所示：
I oled=k*(Vdata+Vth_T1-VSS-Vth_T1) 2=k*(Vdata-VSS) 2。
其中，k为发光驱动电路的迁移率。由流过发光器件D的I oled的计算公式，流过发光器件D的I oled只与Vdata、Vth_T1以及VSS有关。因此，流过发光器件D的I oled与发光器件D的阈值电压Vth_LED，从而避免发光器件D的阈值电压Vth_LED影响发光器件D的亮度，进而提高显示面板画面显示的准确性以及均匀性。
请参阅图7，图7为本申请实施例提供的发光器件驱动电路的时序图之二。
作为本申请的一个具体实施方式，如图7所示，数据信号写入晶体管T2和第二补偿晶体管T5为不同类型的晶体管，且第二控制信号EM2与第一扫描信号SCAN1为同一信号。
请参阅图8，图8为本申请实施例提供的发光器件驱动电路的时序图之三。
作为本申请的一个具体实施方式，如图8所示，复位晶体管T6与第一补偿晶体管T4为同类型的晶体管；控制晶体管T3与复位晶体管T6为不同类型的晶体管，第一控制信号EM1与第二扫描信号SCAN2为同一信号。
请参阅图9，图9为本申请实施例提供的背光模组的结构示意图。本申请实施例还提供一种背光模组100，其包括数据线20、第一发光控制信号线30、第二发光控制信号线40、第一扫描线50、第二扫描线60以及以上所述的发光器件驱动电路10。其中，数据线20用于提供数据信号。第一发光控制信号线30用于提供第一发光控制信号。第二发光控制信号线40用于提供第二发光控制信号。第一扫描线50用于提供第一扫描信号。第二扫描线60用于提供第二扫描信号。发光器件驱动电路10与数据线20、第一发光控制信号线30、第二发光控制信号线40、第一扫描线50、第二扫描线60均连接。其中，发光器件D可以是Mini-LED、Micro-LED。发光器件驱动电路10具体可参照以上对该发光器件驱动电路的描述，在此不做赘述。
请参阅图10，图10为本申请实施例提供的显示面板的结构示意图。本申请实施例还提供一种显示面板200，包括多个呈阵列排布的像素单元210，每一像素单元210均包括以上所述的发光器件驱动电路10，其中，发光器件D可以是Mini-LED、Micro-LED。具体可参照以上对该发光器件驱动电路10的描述，在此不做赘述。
以上对本申请实施例所提供的一种发光器件驱动电路及显示面板进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种发光器件驱动电路，其包括：
    发光器件，所述发光器件的阳极与第一电源电连接，所述发光器件的阴极与第一节点电连接；
    驱动晶体管，所述驱动晶体管的栅极与第二节点电连接，所述驱动晶体管的源极与第三节点电连接，所述驱动晶体管的漏极与第四节点电连接；
    数据信号写入模块，所述数据信号写入模块接入数据信号以及第一扫描信号，并电性连接于所述第四节点，所述数据信号写入模块用于在所述第一扫描信号的控制下输送所述数据信号至所述第四节点；
    发光控制模块，所述发光控制模块接入第一控制信号，并串接于所述第四节点与所述第二电源之间，所述发光控制模块用于基于所述第一控制信号控制所述第四节点与所述第二电源之间导通或者断开；
    复位模块，所述复位模块包括复位晶体管，所述复位晶体管的栅极接入所述第二扫描信号，所述复位晶体管的源极电性连接于所述第一电源，所述复位晶体管的漏极电性连接于所述第一节点，所述复位模块用于在所述第二扫描信号的控制下，对所述第一节点进行复位；
    补偿模块，所述补偿模块包括第一补偿晶体管和第二补偿晶体管，所述第一补偿晶体管的栅极接入所述第二扫描信号，所述第一补偿晶体管的源极电性连接于所述第二节点，所述第一补偿晶体管的漏极电性连接于所述第三节点；所述第二补偿晶体管的栅极接入所述第二控制信号，所述第二补偿晶体管的源极电性连接于所述第一节点，所述第二补偿晶体管的漏极电性连接于所述第三节点，所述补偿模块用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述第一节点进行复位，所述补偿模块还用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述驱动晶体管的阈值电压进行补偿；以及
    存储电容，所述存储电容的第一端与所述第二节点电连接，所述存储电容的第二端与第二电源电连接。
  2. 根据权利要求1所述的发光器件驱动电路，其中，所述数据信号写入模块包括数据信号写入晶体管，所述数据信号写入晶体管的栅极接入所述第一扫描信号，所述数据信号写入晶体管的源极接入所述数据信号，所述数据信号写入晶体管的漏极电性连接于所述第四节点。
  3. 根据权利要求2所述的发光器件驱动电路，其中，所述发光控制模块包括控制晶体管，所述控制晶体管的栅极接入所述第一控制信号，所述控制晶体管的漏极电性连接于所述第四节点，且所述控制晶体管的源极电性连接于所述第二电源。
  4. 根据权利要求3所述的发光器件驱动电路，其中，所述驱动晶体管、所述数据信号写入晶体管、所述控制晶体管、所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管为同类型晶体管。
  5. 根据权利要求2所述的发光器件驱动电路，其中，所述数据信号写入晶体管和所述第二补偿晶体管为不同类型的晶体管，且所述第二控制信号与所述第一扫描信号为同一信号。
  6. 根据权利要求3所述的发光器件驱动电路，其中，所述复位晶体管与所述第一补偿晶体管为同类型的晶体管；所述控制晶体管与所述复位晶体管为不同类型的晶体管，所述第一控制信号与所述第二扫描信号为同一信号。
  7. 根据权利要求1所述的发光器件驱动电路，其中，所述第一电源提供的电压通过所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管对所述第一节点以及所述第二节点进行复位。
  8. 一种发光器件驱动电路，其包括：
    发光器件，所述发光器件的阳极与第一电源电连接，所述发光器件的阴极与第一节点电连接；
    驱动晶体管，所述驱动晶体管的栅极与第二节点电连接，所述驱动晶体管的源极与第三节点电连接，所述驱动晶体管的漏极与第四节点电连接；
    数据信号写入模块，所述数据信号写入模块接入数据信号以及第一扫描信号，并电性连接于所述第四节点，所述数据信号写入模块用于在所述第一扫描信号的控制下输送所述数据信号至所述第四节点；
    发光控制模块，所述发光控制模块接入第一控制信号，并串接于所述第四节点与所述第二电源之间，所述发光控制模块用于基于所述第一控制信号控制所述第四节点与所述第二电源之间导通或者断开；
    复位模块，所述复位模块接入第二扫描信号，并电性连接于所述第一电源以及所述第一节点，所述复位模块用于在所述第二扫描信号的控制下，对所述第一节点进行复位；
    补偿模块，所述补偿模块接入第二控制信号以及所述第二扫描信号，并电性连接于所述第一节点、所述第二节点以及所述第三节点，所述补偿模块用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述第一节点进行复位，所述补偿模块还用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述驱动晶体管的阈值电压进行补偿；以及
    存储电容，所述存储电容的第一端与所述第二节点电连接，所述存储电容的第二端与第二电源电连接。
  9. 根据权利要求8所述的发光器件驱动电路，其中，所述数据信号写入模块包括数据信号写入晶体管，所述数据信号写入晶体管的栅极接入所述第一扫描信号，所述数据信号写入晶体管的源极接入所述数据信号，所述数据信号写入晶体管的漏极电性连接于所述第四节点。
  10. 根据权利要求9所述的发光器件驱动电路，其中，所述发光控制模块包括控制晶体管，所述控制晶体管的栅极接入所述第一控制信号，所述控制晶体管的漏极电性连接于所述第四节点，且所述控制晶体管的源极电性连接于所述第二电源。
  11. 根据权利要求10所述的发光器件驱动电路，其中，所述复位模块包括复位晶体管，所述复位晶体管的栅极接入所述第二扫描信号，所述复位晶体管的源极电性连接于所述第一电源，所述复位晶体管的漏极电性连接于所述第一节点。
  12. 根据权利要求11所述的发光器件驱动电路，其中，所述补偿模块包括第一补偿晶体管和第二补偿晶体管，所述第一补偿晶体管的栅极接入所述第二扫描信号，所述第一补偿晶体管的源极电性连接于所述第二节点，所述第一补偿晶体管的漏极电性连接于所述第三节点；所述第二补偿晶体管的栅极接入所述第二控制信号，所述第二补偿晶体管的源极电性连接于所述第一节点，所述第二补偿晶体管的漏极电性连接于所述第三节点。
  13. 根据权利要求12所述的发光器件驱动电路，其中，所述驱动晶体管、所述数据信号写入晶体管、所述控制晶体管、所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管为同类型晶体管。
  14. 根据权利要求12所述的发光器件驱动电路，其中，所述数据信号写入晶体管和所述第二补偿晶体管为不同类型的晶体管，且所述第二控制信号与所述第一扫描信号为同一信号。
  15. 根据权利要求12所述的发光器件驱动电路，其中，所述复位晶体管与所述第一补偿晶体管为同类型的晶体管；所述控制晶体管与所述复位晶体管为不同类型的晶体管，所述第一控制信号与所述第二扫描信号为同一信号。
  16. 根据权利要求12所述的发光器件驱动电路，其中，所述第一电源提供的电压通过所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管对所述第一节点以及所述第二节点进行复位。
  17. 一种显示面板，其包括多个呈阵列排布的像素单元，每一所述像素单元均包括发光器件驱动电路，所述发光器件驱动电路包括：
    发光器件，所述发光器件的阳极与第一电源电连接，所述发光器件的阴极与第一节点电连接；
    驱动晶体管，所述驱动晶体管的栅极与第二节点电连接，所述驱动晶体管的源极与第三节点电连接，所述驱动晶体管的漏极与第四节点电连接；
    数据信号写入模块，所述数据信号写入模块接入数据信号以及第一扫描信号，并电性连接于所述第四节点，所述数据信号写入模块用于在所述第一扫描信号的控制下输送所述数据信号至所述第四节点；
    发光控制模块，所述发光控制模块接入第一控制信号，并串接于所述第四节点与所述第二电源之间，所述发光控制模块用于基于所述第一控制信号控制所述第四节点与所述第二电源之间导通或者断开；
    复位模块，所述复位模块包括复位晶体管，所述复位晶体管的栅极接入所述第二扫描信号，所述复位晶体管的源极电性连接于所述第一电源，所述复位晶体管的漏极电性连接于所述第一节点，所述复位模块用于在所述第二扫描信号的控制下，对所述第一节点进行复位；
    补偿模块，所述补偿模块包括第一补偿晶体管和第二补偿晶体管，所述第一补偿晶体管的栅极接入所述第二扫描信号，所述第一补偿晶体管的源极电性连接于所述第二节点，所述第一补偿晶体管的漏极电性连接于所述第三节点；所述第二补偿晶体管的栅极接入所述第二控制信号，所述第二补偿晶体管的源极电性连接于所述第一节点，所述第二补偿晶体管的漏极电性连接于所述第三节点，所述补偿模块用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述第一节点进行复位，所述补偿模块还用于在所述第二控制信号以及所述第二扫描信号的控制下，对所述驱动晶体管的阈值电压进行补偿；以及
    存储电容，所述存储电容的第一端与所述第二节点电连接，所述存储电容的第二端与第二电源电连接。
  18. 根据权利要求17所述的显示面板，其中，所述数据信号写入模块包括数据信号写入晶体管，所述数据信号写入晶体管的栅极接入所述第一扫描信号，所述数据信号写入晶体管的源极接入所述数据信号，所述数据信号写入晶体管的漏极电性连接于所述第四节点。
  19. 根据权利要求18所述的显示面板，其中，所述发光控制模块包括控制晶体管，所述控制晶体管的栅极接入所述第一控制信号，所述控制晶体管的漏极电性连接于所述第四节点，且所述控制晶体管的源极电性连接于所述第二电源。
  20. 根据权利要求19所述的显示面板，其中，所述驱动晶体管、所述数据信号写入晶体管、所述控制晶体管、所述复位晶体管、所述第一补偿晶体管以及所述第二补偿晶体管为同类型晶体管。
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