WO2023108862A1 - 一种用于可见光通信的芯片及其制备方法与应用 - Google Patents

一种用于可见光通信的芯片及其制备方法与应用 Download PDF

Info

Publication number
WO2023108862A1
WO2023108862A1 PCT/CN2022/073671 CN2022073671W WO2023108862A1 WO 2023108862 A1 WO2023108862 A1 WO 2023108862A1 CN 2022073671 W CN2022073671 W CN 2022073671W WO 2023108862 A1 WO2023108862 A1 WO 2023108862A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
gan
gan layer
chip
functional layer
Prior art date
Application number
PCT/CN2022/073671
Other languages
English (en)
French (fr)
Inventor
李国强
柴吉星
王文樑
陈亮
Original Assignee
华南理工大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华南理工大学 filed Critical 华南理工大学
Priority to US18/271,678 priority Critical patent/US20240332443A1/en
Publication of WO2023108862A1 publication Critical patent/WO2023108862A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/1013—Devices sensitive to infrared, visible or ultraviolet radiation devices sensitive to two or more wavelengths, e.g. multi-spectrum radiation detection devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L31/03046—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP
    • H01L31/03048—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP comprising a nitride compounds, e.g. InGaN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/11—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers, e.g. bipolar phototransistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
    • H01L31/1848—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P comprising nitride compounds, e.g. InGaN, InGaAlN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1852—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising a growth substrate not being an AIIIBV compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1856—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising nitride compounds, e.g. GaN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868—Passivation

Definitions

  • the invention belongs to the technical field of visible light communication, and in particular relates to a chip for visible light communication and a preparation method and application thereof.
  • VLC Visible-Light Communication
  • the photodetectors currently used in VLC research are mainly commercial Si-based detectors and research-type InGaN-based photodetectors.
  • Si material is a wide spectral response detector due to its small band gap (1.1eV).
  • 1.1eV small band gap
  • InGaN material Due to the adjustable bandgap (0.7-3.4eV), InGaN material can match the working wavelength of the light source, receive optical signals to the greatest extent, effectively reduce noise and system cost, and become the most potential candidate for visible light communication photodetectors.
  • the current research on InGaN-based photodetectors is also focused on single-wavelength PIN and MSM detectors, and high-performance InGaN-based photodetector monolithic integrated chips that respond to multiple bands are urgently needed. Therefore, it is of great significance to design a single chip of multi-band InGaN-based photodetector with reasonable structure and simple process for the realization of high-speed VLC system.
  • a chip for visible light communication Through the structural design of the chip for visible light communication, the dual-band detection of the high-bandwidth chip can be realized.
  • a preparation method of the chip for visible light communication is provided.
  • the technical solution adopted in the present invention is:
  • a chip for visible light communication comprising a substrate, a buffer layer, an intrinsic GaN layer, a first GaN layer, an i-In x Ga 1-x N functional layer, a second GaN layer, and an i-In y Ga 1-y N functional layer, the third GaN layer and the top electrode; wherein, 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1;
  • the side walls of the i-In x Ga 1-x N functional layer, the second GaN layer, the i-In y Ga 1-y N functional layer and the third GaN layer are all provided with SiO 2 isolation layers ;
  • a bottom electrode is provided on the top of the first GaN layer, and the SiO 2 isolation layer on the sidewall of the i- InxGa1 -xN functional layer is located between the bottom electrode and the i- InxGa1 -xN Between functional layers;
  • the first GaN layer is an n-GaN or p-GaN layer:
  • the first GaN layer is an n-GaN layer
  • the second GaN layer is a p-GaN layer
  • the third GaN layer is an n-GaN layer
  • the first GaN layer is a p-GaN layer
  • the second GaN layer is an n-GaN layer
  • the third GaN layer is a p-GaN layer.
  • the photodetector chip can be an n-i-p-i-n structure based on two p-i-n structures sharing p-type material or a p-i-n-i-p structure sharing n-type material.
  • said x>y said x>y.
  • the i-In x Ga 1-x N functional layer and the i-In y Ga 1-y N functional layer since the larger the In composition, the smaller the band gap, and x>y, the i- The band gap of the In y Ga 1-y N functional layer is larger than that of the i-In x Ga 1-x N functional layer.
  • the i-In y Ga 1-y N functional layer of the high band gap material is placed on the upper part, and the i-In x Ga 1-x N functional layer of the low band gap material is placed on the lower part. Because the absorption cut-off wavelength of the high-bandgap material is short, and the absorption cut-off wavelength of the low-bandgap material is long, such a combination can maximize the use of different wavelength bands.
  • the i-In x Ga 1-x N functional layer and the i-In y Ga 1-y N functional layer have a thickness of 30-200 nm.
  • the i-In x Ga 1-x N functional layer is selected from In x Ga 1-x N thin film, In x Ga 1-x N/GaN thin film or In x Ga 1-x N/InGaN thin film;
  • the i-In y Ga 1-y N functional layer is selected from In y Ga 1-y N thin film, In y Ga 1-y N/GaN thin film or In y Ga 1-y N/InGaN thin film .
  • the In x Ga 1-x N/GaN film is preferably an In x Ga 1-x N/GaN quantum well; the In x Ga 1-x N/InGaN film is preferably an In x Ga 1-x N /InGaN quantum well; the In y Ga 1-y N/GaN thin film is preferably In y Ga 1-y N/GaN quantum well; the In y Ga 1-y N/InGaN thin film is preferably In y Ga 1- y N/InGaN quantum wells.
  • the chip for visible light communication is obtained through monolithic integration.
  • photoelectric detection in different bands can be realized, as follows:
  • the working area of the device is the first GaN layer/i-In x Ga 1-x N functional layer/the second GaN layer.
  • the working area of the device is the second GaN layer/i-In y Ga 1-y N functional layer/third GaN layer.
  • the chip for visible light communication has a lateral structure, which makes the chip for visible light communication more integrated, and on this basis, LEDs and HEMTs (high electron mobility transistors) can also be monolithically integrated;
  • the duplex device can be prepared through the quantum well structure, and functions such as on-chip light transmission can be realized; in addition, under the condition of high-power transmission, the chip can more easily realize the preparation of the detector array.
  • the detector prepared by the chip used for visible light communication can also more easily realize the optical interconnection structure in the chip.
  • the technical solution adopted in the present invention is:
  • a method for preparing the chip for visible light communication comprising the following steps:
  • Growth buffer layer intrinsic GaN layer, first GaN layer, i-In x Ga 1-x N functional layer, second GaN layer, i-In y Ga 1-y N functional layer, third GaN layer;
  • a bottom electrode is arranged on the upper part of the first GaN layer, and the bottom electrode is spaced apart from the i- InxGa1 -xN functional layer in the lateral direction; a top electrode is arranged on the surface of the third GaN layer, Obtain the photodetector chip.
  • the substrate is at least one of a silicon substrate, a sapphire substrate or a silicon carbide substrate, and has a thickness of 300-450 ⁇ m.
  • the buffer layer is a stacked layer of an AlN buffer layer and an AlGaN buffer layer.
  • the thickness of the AlN buffer layer is 50-150 nm, and the thickness of the AlGaN buffer layer is 250-400 nm.
  • the thickness of the intrinsic GaN layer is 1-3 ⁇ m.
  • the method for sequentially growing on the substrate includes at least one of metal organic chemical vapor deposition (MOCVD), pulsed laser deposition (PLD), and molecular beam epitaxy (MBE).
  • MOCVD metal organic chemical vapor deposition
  • PLD pulsed laser deposition
  • MBE molecular beam epitaxy
  • the MOCVD method is used for growth, and the growth raw materials include: trimethylgallium (Ga(CH 3 ) 3 , TMGa), trimethylindium (In(CH 3 ) 3 , TMIn), Trimethylaluminum (Al(CH 3 ) 3 , TMAl).
  • the thickness of the grown first GaN layer is 1-3 ⁇ m
  • the thickness of the i-In x Ga 1-x N functional layer is 80-150 nm
  • the thickness of the second GaN layer is 100-150 nm
  • the thickness of the i-In y Ga 1-y N functional layer is 80-150 nm
  • the thickness of the third GaN layer is 300-500 nm.
  • the dual-band structure directly completes the epitaxial growth on the substrate without secondary growth process.
  • the process cost required for constructing the multi-band complex structure is reduced, and the process steps are simplified.
  • the monolithic integrated chip can solve the problem that the large parasitic capacitance of the ordinary hybrid integrated chip limits the bandwidth of the detector.
  • the dual-band device can meet the requirements of a dual-color LED-based visible light communication (VLC) system for a photodetector monolithic integrated chip that responds to different bands.
  • VLC visible light communication
  • Etching when etching the i-In x Ga 1-x N functional layer, the second GaN layer, the i-In y Ga 1-y N functional layer and one side of the third GaN layer, Etching reaches into the first GaN layer.
  • the etching includes at least one of spin-coating photoresist, exposure and development, or inductively coupled plasma dry etching.
  • the thickness of the SiO 2 isolation layer is 200-300 nm.
  • PECVD plasma enhanced chemical vapor deposition
  • the composition of the bottom electrode and the top electrode is the same, and the components are Ti/Al/Ni/Au in sequence;
  • the thicknesses of the bottom electrode and the top electrode are respectively 215-360 nm.
  • Depositing Ti/Al/Ni/Au electrodes on the photodetector chip can form an ohmic contact mechanism.
  • Ni/Au can prevent the interdiffusion of Ti, Al, and Au, and play the role of resisting oxidation of the contact layer.
  • the bottom and top electrodes are prepared using an electron beam evaporation system.
  • the step of annealing the bottom electrode and the top electrode is further included, and the annealing temperature is 700-900°C.
  • Another aspect of the present invention also relates to the application of the chip for visible light communication in a photodetector.
  • the dual-band structure directly completes the epitaxial growth on the substrate without secondary growth process. It reduces the process cost required to construct multi-band complex structures and simplifies the process steps;
  • the high bandgap material i-In y Ga 1-y N functional layer is placed on the upper part, and the low bandgap material i-In x Ga 1-x N functional layer is placed on the lower part. Because the absorption cut-off wavelength of the high-bandgap material is short, and the absorption cut-off wavelength of the low-bandgap material is long, such a combination can maximize the use of different wavelength bands.
  • FIG. 1 is a schematic diagram of the epitaxial structure of the chip for visible light communication in Embodiment 1.
  • FIG. 2 is a cross-sectional view of the device structure of the chip for visible light communication in Embodiment 1.
  • FIG. 2 is a cross-sectional view of the device structure of the chip for visible light communication in Embodiment 1.
  • FIG. 3 is a cross-sectional view of the device structure of the chip for visible light communication in Embodiment 2.
  • FIG. 3 is a cross-sectional view of the device structure of the chip for visible light communication in Embodiment 2.
  • FIG. 4 is a cross-sectional view of the device structure of the chip for visible light communication according to Embodiment 3.
  • FIG. 4 is a cross-sectional view of the device structure of the chip for visible light communication according to Embodiment 3.
  • FIG. 5 is a cross-sectional view of the device structure of the chip for visible light communication according to Embodiment 4.
  • FIG. 5 is a cross-sectional view of the device structure of the chip for visible light communication according to Embodiment 4.
  • FIG. 6 is a dual-band response curve of the chip for visible light communication in Embodiment 1.
  • FIG. 6 is a dual-band response curve of the chip for visible light communication in Embodiment 1.
  • FIG. 7 is a dual-band bandwidth curve of the chip for visible light communication in Embodiment 1.
  • FIG. 7 is a dual-band bandwidth curve of the chip for visible light communication in Embodiment 1.
  • orientation descriptions such as the orientation or positional relationship indicated by up, down, left, right, etc., are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention.
  • the invention and the simplified description do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and thus should not be construed as limiting the present invention.
  • This embodiment provides a chip epitaxial structure for visible light communication, as shown in Figure 1, including a substrate, a buffer layer, an intrinsic GaN layer, an n-GaN-1 layer, an i-In 0.4 Ga 0.6 N functional layer, p-GaN layer, i-In 0.15 Ga 0.75 N functional layer, n-GaN-2 layer.
  • the growth process is as follows:
  • the growth materials are trimethylgallium (Ga(CH 3 ) 3 , TMGa), trimethylindium (In(CH 3 ) 3 , TMIn), three Methyl aluminum (Al(CH 3 ) 3 , TMAl); sequentially grow 50nm thick AlN, 250nm AlGaN layer, 1 ⁇ m GaN layer, 1 ⁇ m n-GaN-1 layer, 80nm i-In 0.4 Ga 0.6 N Functional layer, 100nm p-GaN layer, 80nm i-In 0.15 Ga 0.75 N functional layer and 300nm n-GaN-2;
  • This embodiment also provides a structural plan view of a chip device for visible light communication, as shown in FIG. 2, which includes a substrate, a buffer layer, an intrinsic GaN layer, an n-GaN-1 layer, an -In 0.4 Ga 0.6 N functional layer, p-GaN layer, i-In 0.15 Ga 0.75 N functional layer, n-GaN-2 layer, SiO 2 isolation layer and electrodes, the specific preparation process is as follows:
  • SiO 2 passivation layer On the surface of the n-GaN-2 layer, spin-coat photoresist again, expose and develop, and then use PECVD to deposit SiO 2 for sidewall passivation.
  • the thickness of the SiO 2 passivation layer is 200nm;
  • the electrode components are Ti/Al/Ni/Au in sequence, and the thicknesses are 5 /90/60/60nm; and use a rapid annealing furnace to anneal the prepared electrode, the annealing temperature is 800°C, and the annealing time is 30s; the chip for visible light communication is obtained.
  • This embodiment provides a chip epitaxial structure for visible light communication, as shown in Figure 3, which includes a substrate, a buffer layer, an intrinsic GaN layer, an n-GaN-1 layer, an i-In 0.15 Ga 0.75 N functional layer, p-GaN layer, i-GaN functional layer, n-GaN-2 layer.
  • the growth process is as follows:
  • the MBE method is used to grow on a substrate with a thickness of 400 ⁇ m.
  • the raw materials for growth are high-purity indium (In, 99.99999%), high-purity gallium (Ga, 99.99999%), and high-purity aluminum (Al, 99.99999%); 100nm AlN, 300nm AlGaN layer, 2 ⁇ m GaN layer, 2 ⁇ m n-GaN-1 layer, 100nm i-In 0.15 Ga 0.75 N functional layer, 130nm p-GaN layer, 400nm i-GaN functional layer and 300nm n-GaN-2;
  • This embodiment also provides a plan view of a chip device structure for visible light communication, which includes a substrate, a buffer layer, an intrinsic GaN layer, an n-GaN-1 layer, and an i-In 0.15 Ga 0.75 N layer from bottom to top.
  • Functional layer, p-GaN layer, i-GaN functional layer, n-GaN-2 layer, SiO 2 isolation layer and electrodes the specific preparation process is as follows:
  • SiO 2 passivation layer On the surface of the n-GaN-2 layer, spin-coat photoresist, expose and develop again, and then use PECVD to deposit SiO 2 for sidewall passivation.
  • the thickness of the SiO 2 passivation layer is 230nm;
  • the n-GaN-2 layer spin-coat photoresist again, expose and develop, and then use an electron beam evaporation system to prepare metal electrodes.
  • the electrode components are Ti/Al/Ni/Au in sequence, and the thicknesses are 5 /120/80/80nm; and use a rapid annealing furnace to anneal the prepared electrode, the annealing temperature is 830°C, and the annealing time is 40s; the chip for visible light communication is obtained.
  • This embodiment provides a chip epitaxial structure for visible light communication, as shown in Figure 4, which includes substrate, buffer layer, intrinsic GaN layer, n-GaN-1 layer, i-In 0.15 Ga 0.75 N/GaN quantum well functional layer, p-GaN layer, i-GaN functional layer, n-GaN-2 layer.
  • the growth process is as follows:
  • the raw materials for growth are high-purity indium (In, 99.99999%), high-purity gallium (Ga, 99.99999%), and high-purity aluminum (Al, 99.99999%); 150nm AlN, 400nm AlGaN layer, 3 ⁇ m GaN layer, 3 ⁇ m n-GaN-1 layer, 150nm i-InN functional layer, 150nm p-GaN layer, 150nm i-In 0.15 Ga 0.75 N/GaN Quantum well functional layer and 500nm n-GaN-2;
  • This embodiment also provides a chip device structure plan view for visible light communication, which includes a substrate, a buffer layer, an intrinsic GaN layer, an n-GaN-1 layer, an i-InN functional layer, and a p -GaN layer, i-In 0.15 Ga 0.75 N/GaN quantum well functional layer, n-GaN-2 layer, SiO 2 isolation layer and electrodes, the specific preparation process is as follows:
  • SiO 2 passivation layer On the surface of the n-GaN-2 layer, spin-coat photoresist, expose and develop again, and then use PECVD to deposit SiO 2 for sidewall passivation.
  • the thickness of the SiO 2 passivation layer is 250nm;
  • Electrode components are prepared in turn as Ti/Al/Ni/Au metal electrodes, and the thicknesses are respectively 10/150/100/100 nm; and use a rapid annealing furnace to anneal the prepared electrode, the annealing temperature is 850°C, and the annealing time is 50s; the chip for visible light communication is obtained.
  • This embodiment provides a chip epitaxial structure for visible light communication, as shown in Figure 5, which includes a substrate, a buffer layer, an intrinsic GaN layer, a p-GaN-1 layer, an i-In 0.4 Ga 0.6 N functional layer, n-GaN layer, i-In 0.15 Ga 0.75 N, p-GaN-2 layer.
  • the growth process is as follows:
  • the growth raw materials are trimethylgallium (Ga(CH3)3, TMGa), trimethylindium (In(CH3)3, TMIn), trimethylindium (In(CH3)3, TMIn), trimethyl Aluminum (Al(CH3)3, TMAl); AlN with thickness of 50nm, AlGaN layer of 250nm, GaN layer of 1 ⁇ m, p-GaN-1 layer of 1 ⁇ m, i-In 0.4 Ga 0.6 N functional layer of 80nm, 100nm n-GaN layer, 80nm i-In 0.15 Ga 0.75 N functional layer and 300nm p-GaN-2;
  • This embodiment also provides a structural plan view of a chip device for visible light communication, as shown in FIG. 3 , which includes a substrate, a buffer layer, an intrinsic GaN layer, a p-GaN-1 layer, an -In0.4Ga0.6N functional layer, n-GaN layer, i-In0.15Ga0.75N functional layer, p-GaN-2 layer, SiO 2 isolation layer and electrodes, the specific preparation process is as follows:
  • SiO 2 passivation layer On the surface of the p-GaN-2 layer, spin-coat photoresist again, expose and develop, and then use PECVD to deposit SiO 2 for sidewall passivation.
  • the thickness of the SiO 2 passivation layer is 200nm;
  • Electrode components are Ti/Al/Ni/Au in sequence, and the thicknesses are 5 /90/60/60nm; and use a rapid annealing furnace to anneal the prepared electrode, the annealing temperature is 800°C, and the annealing time is 30s; the chip for visible light communication is obtained.
  • FIG. 6 is a dual-band response curve of the chip for visible light communication in Embodiment 1.
  • the working region of the device is n-GaN-2/i-In 0.15 Ga 0.75 N/p-GaN, and the device responsivity is 0.98A/W.
  • FIG. 7 is a dual-band bandwidth curve of the chip for visible light communication in Embodiment 1.
  • the working area of the device is n-GaN-2/i-In 0.15 Ga 0.75 N/p-GaN, and the -3dB bandwidth of the device is 220MHz.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Light Receiving Elements (AREA)

Abstract

本发明公开了一种用于可见光通信的芯片及其制备方法与应用。所述用于可见光通信的芯片，包括依次层叠设置的衬底、缓冲层、本征GaN层、第一GaN层、i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层、第三GaN层和顶电极；其中，0≤x＜1，0≤y≤1；所述i-InxGa1-xN功能层、所述第二GaN层、所述i-InyGa1-yN功能层和所述第三GaN层的侧壁均设SiO2隔离层；在所述第一GaN层的上部设底电极，所述i-InxGa1-xN功能层侧壁的SiO2隔离层位于所述底电极与所述i-InxGa1-xN功能层之间。通过对用于可见光通信的芯片的结构设计以及一次生长，能够实现高带宽芯片的双波段探测。

Description

一种用于可见光通信的芯片及其制备方法与应用 技术领域
本发明属于可见光通信技术领域，具体涉及一种用于可见光通信的芯片及其制备方法与应用。
背景技术
可见光通信(Visible-Light Communication，VLC)由于频谱宽广、数据传输保密性高、对人体无电磁辐射等优势，被认为是新一代移动通信的重要组成部分之一。同时，现代通信场景对通信的容量和速率的需求巨大，因此基于多色LED的VLC系统被提出解决这个问题。但是这同样对光电探测器提出了要求，尤其提出对多波段响应探测器单片集成的需求。
目前用于VLC研究的光电探测器主要为商用型的Si基探测器和研究型的InGaN基光电探测器。其中，Si材料由于带隙较小(1.1eV)，是一种宽光谱响应探测器。在可见光通信系统中使用时需要加入滤光片才能探测到相应的LED光源，这不仅造成了光信号的损失，还导致可见光通信系统成本的增加。
InGaN材料由于带隙可调(0.7～3.4eV)，可以和光源工作波长匹配，能最大程度的接收光信号，有效降低噪声和减少系统成本，成为可见光通信光电探测器最具潜力的候选者。但是目前InGaN基光电探测器的研究也集中在单一波长的PIN型和MSM型探测器上，对多波段响应的高性能InGaN基光电探测器单片集成芯片亟待研究。因此设计一种结构合理、工艺简单的多波段InGaN基光电探测器单一芯片，对于实现高速VLC系统的实现意义重大。
发明内容
本发明所要解决的第一个技术问题是：
提供一种用于可见光通信的芯片。通过对用于可见光通信的芯片的结构设计，能够实现高带宽芯片的双波段探测。
本发明所要解决的第二个技术问题是：
提供一种所述用于可见光通信的芯片的制备方法。
本发明所要解决的第三个技术问题是：
所述用于可见光通信的芯片的应用。
为了解决所述第一个技术问题，本发明采用的技术方案为：
一种用于可见光通信的芯片，包括依次层叠设置的衬底、缓冲层、本征GaN层、第一GaN层、i-In xGa 1-xN功能层、第二GaN层、i-In yGa 1-yN功能层、第三GaN层和顶电极；其中，0≤x＜1，0≤y≤1；
所述i-In xGa 1-xN功能层、所述第二GaN层、所述i-In yGa 1-yN功能层和所述第三GaN层的侧壁均设SiO 2隔离层；
在所述第一GaN层的上部设底电极，所述i-In xGa 1-xN功能层侧壁的SiO 2隔离层位于所述底电极与所述i-In xGa 1-xN功能层之间；
所述第一GaN层为n-GaN或p-GaN层：
当第一GaN层为n-GaN层时，所述第二GaN层为p-GaN层，所述第三GaN层为n-GaN层；
当第一GaN层为p-GaN层时，所述第二GaN层为n-GaN层，所述第三GaN层为p-GaN层。
根据需要，所述光电探测器芯片可以为基于两个p-i-n结构的共用p型材料的n-i-p-i-n结构或共用n型材料的p-i-n-i-p结构。
根据本发明的一种实施方式，所述x>y。
在所述i-In xGa 1-xN功能层和i-In yGa 1-yN功能层中，由于In组份越大，带隙越小，而x>y，因此所述i-In yGa 1-yN功能层的带隙大于所述i-In xGa 1-xN功能层。
根据本发明的一种实施方式，将高带隙材料i-In yGa 1-yN功能层置于上部，将低带隙材料i-In xGa 1-xN功能层置于下部。因为高带隙材料吸收截止波长短，低带隙材料吸收截止波长长，这样的组合能够最大程度利用不同波段。
根据本发明的一种实施方式，所述i-In xGa 1-xN功能层和i-In yGa 1-yN功能层的厚度为30～200nm。
根据本发明的一种实施方式，所述i-In xGa 1-xN功能层选自In xGa 1-xN薄膜、In xGa 1-xN/GaN薄膜或者In xGa 1-xN/InGaN薄膜；所述i-In yGa 1-yN功能层选自 In yGa 1-yN薄膜、In yGa 1-yN/GaN薄膜或者In yGa 1-yN/InGaN薄膜。
优选的，所述In xGa 1-xN/GaN薄膜优选为In xGa 1-xN/GaN量子阱；所述In xGa 1-xN/InGaN薄膜优选为In xGa 1-xN/InGaN量子阱；所述In yGa 1-yN/GaN薄膜优选为In yGa 1-yN/GaN量子阱；所述In yGa 1-yN/InGaN薄膜优选为In yGa 1-yN/InGaN量子阱。
根据本发明的一种实施方式，所述用于可见光通信的芯片通过单片集成获得。
通过在所述光电探测器芯片上负载不同方向的电压，就可以实现不同波段的光电探测，具体如下：
在正向偏置电压1.5V条件下，器件的工作区域为第一GaN层/i-In xGa 1-xN功能层/第二GaN层。在反向偏置电压-1.3V条件下，器件的工作区域为第二GaN层/i-In yGa 1-yN功能层/第三GaN层。
所述用于可见光通信的芯片为横向结构，这使得所述用于可见光通信的芯片的可集成度更高，在此基础上还可以单片集成LED，HEMT(高电子迁移率晶体管)；还能够通过量子阱结构制备双工器件，实现片上光传导等功能；另外，在大功率传输条件下，所述芯片更容易实现探测器阵列的制备。
所述用于可见光通信的芯片制备的探测器，还能更容易实现片内光互联结构。
为了解决所述第二个技术问题，本发明采用的技术方案为：
一种制备所述用于可见光通信的芯片的方法，包括以下步骤：
在衬底上依次生长缓冲层、本征GaN层、第一GaN层、i-In xGa 1-xN功能层、第二GaN层、i-In yGa 1-yN功能层、第三GaN层；
刻蚀i-In xGa 1-xN功能层、第二GaN层、i-In yGa 1-yN功能层和第三GaN层一侧；
在被刻蚀区域沉积SiO 2隔离层；
在所述第一GaN层上部设底电极，所述底电极在横向方向上与所述i-In xGa 1-xN功能层彼此间隔开；在所述第三GaN层表面设顶电极，得到所述光 电探测器芯片。
根据本发明的一种实施方式，所述衬底为硅衬底、蓝宝石衬底或碳化硅衬底中的至少一种，厚度为300～450μm。
根据本发明的一种实施方式，所述缓冲层为AlN缓冲层与AlGaN缓冲层的叠加层。
根据本发明的一种实施方式，所述AlN缓冲层厚度为50～150nm、AlGaN缓冲层厚度为250～400nm。
根据本发明的一种实施方式，所述本征GaN层厚度为1～3μm。
根据本发明的一种实施方式，所述在衬底上依次生长的方法包括金属有机化合物化学气相沉淀(MOCVD)、脉冲激光沉积(PLD)、分子束外延(MBE)方法中的至少一种。
根据本发明的一种实施方式，所述采用MOCVD法生长，生长原材料包括：三甲基镓(Ga(CH 3) 3，TMGa)、三甲基铟(In(CH 3) 3，TMIn)、三甲基铝(Al(CH 3) 3，TMAl)。
根据本发明的一种实施方式，所述生长的第一GaN层厚度为1～3μm、i-In xGa 1-xN功能层厚度为80～150nm、第二GaN层厚度为100～150nm、i-In yGa 1-yN功能层为80～150nm、第三GaN层厚度为300～500nm。
双波段结构在衬底上直接完成外延生长，无二次生长工艺。降低了因构造多波段复杂结构所需要的工艺成本，简化了工艺步骤。此外，单片集成芯片能够解决普通混合集成芯片带来的寄生电容大限制探测器带宽的问题。双波段器件能够满足双色LED基可见光通信技术(VLC)系统对不同波段响应的光电探测器单片集成芯片的需求。
根据本发明的一种实施方式，在刻蚀i-In xGa 1-xN功能层、第二GaN层、i-In yGa 1-yN功能层和第三GaN层一侧的时候，刻蚀到达第一GaN层内。
根据本发明的一种实施方式，所述刻蚀包括旋涂光刻胶、曝光显影或电感耦合等离子体干法刻蚀中的至少一种。
根据本发明的一种实施方式，所述SiO 2隔离层厚度为200～300nm。
根据本发明的一种实施方式，使用等离子增强化学气相淀积(PECVD)沉积SiO 2进行侧壁钝化，以制备所述SiO 2隔离层，等离子功率为30～50W，沉积温度为90～110℃。
根据本发明的一种实施方式，所述底电极与顶电极构成相同，组分依次为Ti/Al/Ni/Au；
所述底电极与顶电极厚度分别为215～360nm。
在所述光电探测器芯片上淀积Ti/Al/Ni/Au电极能够形成欧姆接触的机制。Ni/Au作为Ti/Al的覆盖层，能够阻止Ti、Al、Au的相互扩散，并且起到抗接触层氧化的作用。
根据本发明的一种实施方式，使用电子束蒸发系统制备底电极和顶电极。
根据本发明的一种实施方式，还包括对所述底电极与顶电极退火的步骤，退火温度为700～900℃。
本发明的另一个方面，还涉及所述一种用于可见光通信的芯片在光电探测器中的应用。
所述技术方案中的一个技术方案至少具有如下优点或有益效果之一：
1.双波段结构在衬底上直接完成外延生长，无二次生长工艺。降低了因构造多波段复杂结构所需要的工艺成本，简化了工艺步骤；
2.通过在所述光电探测器芯片上负载不同方向的电压，就可以实现不同波段的光电探测；
3.所述用于可见光通信的芯片中，将高带隙材料i-In yGa 1-yN功能层置于上部，将低带隙材料i-In xGa 1-xN功能层置于下部。因为高带隙材料吸收截止波长短，低带隙材料吸收截止波长长，这样的组合能够最大程度利用不同波段。
附图说明
构成本发明的一部分的说明书附图用来提供对本发明的进一步理解，本发明的示意性实施例及其说明用于解释本发明，并不构成对本发明的不当限定。
图1为实施例1的所述用于可见光通信的芯片的外延结构示意图。
图2为实施例1的所述用于可见光通信的芯片的器件结构剖面图。
图3为实施例2的所述用于可见光通信的芯片的器件结构剖面图。
图4为实施例3的所述用于可见光通信的芯片的器件结构剖面图。
图5为实施例4的所述用于可见光通信的芯片的器件结构剖面图。
图6为实施例1的所述的用于可见光通信的芯片的双波段响应曲线。
图7为实施例1的所述的用于可见光通信的芯片的双波段带宽曲线。
具体实施方式
下面详细描述本发明的实施例，所述实施例的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
下面通过参考附图描述的实施例是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。
在本发明的描述中，如果有描述到第一、第二、第三等只是用于区分技术特征为目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量或者隐含指明所指示的技术特征的先后关系。
在本发明的描述中，需要理解的是，涉及到方位描述，例如上、下、左、右等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。
本发明的描述中，需要说明的是，除非另有明确的限定，设置、安装、连接等词语应做广义理解，所属技术领域技术人员可以结合技术方案的具体内容合理确定词语在本发明中的具体含义。
实施例1
i-In xGa 1-xN功能层中x＝0.4，带隙宽度1.97eV；
i-In yGa 1-yN功能层中y＝0.15，带隙宽度2.81eV；
本实施例提供了一种用于可见光通信的芯片外延结构，如图1所示，自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In 0.4Ga 0.6N功能层、p-GaN层、i-In 0.15Ga 0.75N功能层、n-GaN-2层。生长过程如下：
(1)在厚度为300μm基底上采用MOCVD法生长，生长原材料为生长原材料三甲基镓(Ga(CH 3) 3，TMGa)、三甲基铟(In(CH 3) 3，TMIn)、三甲基铝(Al(CH 3) 3，TMAl)；依次生长厚度为50nm的AlN、250nm的AlGaN层、1μm的GaN层、1μm的n-GaN-1层、80nm的i-In 0.4Ga 0.6N功能层、100nm的p-GaN层、80nm的i-In 0.15Ga 0.75N功能层以及300nm的n-GaN-2；
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图，如图2所示，自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In 0.4Ga 0.6N功能层、p-GaN层、i-In 0.15Ga 0.75N功能层、n-GaN-2层、SiO 2隔离层和电极，具体制备流程如下：
(1)在n-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达n-GaN-1层；
(2)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用PECVD沉积SiO 2进行侧壁钝化，SiO 2钝化层的厚度为200nm；
(3)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用电子束蒸发系统进行金属电极制备，电极组分依次为Ti/Al/Ni/Au，厚度分别为5/90/60/60nm；并使用快速退火炉对所制备的电极进行退火，退火温度为800℃、退火时间30s；得到所述的用于可见光通信的芯片。
实施例2
i-In xGa 1-xN功能层中x＝0.15，带隙宽度2.81eV；
i-In yGa 1-yN功能层中y＝0，带隙宽度3.4eV；
本实施例提供了一种用于可见光通信的芯片外延结构，如图3所示，自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In 0.15Ga 0.75N功能层、p-GaN层、i-GaN功能层、n-GaN-2层。生长过程如下：
(1)在厚度为400μm基底上采用MBE法生长，生长原材料为高纯铟(In，99.99999％)、高纯镓(Ga，99.99999％)、高纯铝(Al，99.99999％)；依次生长厚度为100nm的AlN、300nm的AlGaN层、2μm的GaN层、2μm的n-GaN-1层、100nm的i-In 0.15Ga 0.75N功能层、130nm的p-GaN层、400nm的i-GaN功 能层以及300nm的n-GaN-2；
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图，自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In 0.15Ga 0.75N功能层、p-GaN层、i-GaN功能层、n-GaN-2层、SiO 2隔离层和电极，具体制备流程如下：
(1)在n-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达n-GaN-1层；
(2)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用PECVD沉积SiO 2进行侧壁钝化，SiO 2钝化层的厚度为230nm；
(3)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用电子束蒸发系统进行金属电极制备，电极组分依次为Ti/Al/Ni/Au，厚度分别为5/120/80/80nm；并使用快速退火炉对所制备的电极进行退火，退火温度为830℃、退火时间40s；得到所述的用于可见光通信的芯片。
实施例3
i-In xGa 1-xN功能层中x＝0.15，带隙宽度2.81eV；
i-In yGa 1-yN功能层中y＝0，带隙宽度3.4eV；
本实施例提供了一种用于可见光通信的芯片外延结构，如图4所示，下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In 0.15Ga 0.75N/GaN量子阱功能层、p-GaN层、i-GaN功能层、n-GaN-2层。生长过程如下：
(1)在厚度为450μm基底上采用PLD法生长，生长原材料为高纯铟(In，99.99999％)、高纯镓(Ga，99.99999％)、高纯铝(Al，99.99999％)；依次生长厚度为150nm的AlN、400nm的AlGaN层、3μm的GaN层、3μm的n-GaN-1层、150nm的i-InN功能层、150nm的p-GaN层、150nm的i-In 0.15Ga 0.75N/GaN量子阱功能层以及500nm的n-GaN-2；
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图，自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-InN功能层、p-GaN层、i-In 0.15Ga 0.75N/GaN量子阱功能层、n-GaN-2层、SiO 2隔离层和电极，具体制备流程如下：
(1)在n-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达n-GaN-1层内10nm；
(2)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用PECVD沉积SiO 2进行侧壁钝化，SiO 2钝化层的厚度为250nm；
(3)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用电子束蒸发系统进行电极制备，电极组分依次为Ti/Al/Ni/Au金属电极制备，厚度分别为10/150/100/100nm；并使用快速退火炉对所制备的电极进行退火，退火温度为850℃、退火时间50s；得到所述的用于可见光通信的芯片。
实施例4
i-In xGa 1-xN功能层中x＝0.4，带隙宽度1.97eV；
i-In yGa 1-yN功能层中y＝0.15，带隙2.81eV；
本实施例提供了一种用于可见光通信的芯片外延结构，如图5所示，自下至上依次包括衬底、缓冲层、本征GaN层、p-GaN-1层、i-In 0.4Ga 0.6N功能层、n-GaN层、i-In 0.15Ga 0.75N、p-GaN-2层。生长过程如下：
(1)在厚度为300μm基底上采用MOCVD法生长，生长原材料为生长原材料三甲基镓(Ga(CH3)3，TMGa)、三甲基铟(In(CH3)3，TMIn)、三甲基铝(Al(CH3)3，TMAl)；依次生长厚度为50nm的AlN、250nm的AlGaN层、1μm的GaN层、1μm的p-GaN-1层、80nm的i-In 0.4Ga 0.6N功能层、100nm的n-GaN层、80nm的i-In 0.15Ga 0.75N功能层以及300nm的p-GaN-2；
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图，如图3所述，自下至上依次包括衬底、缓冲层、本征GaN层、p-GaN-1层、i-In0.4Ga0.6N功能层、n-GaN层、i-In0.15Ga0.75N功能层、p-GaN-2层、SiO 2隔离层和电极，具体制备流程如下：
(1)在p-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达p-GaN-1层；
(2)在p-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用PECVD沉积SiO 2进行侧壁钝化，SiO 2钝化层的厚度为200nm；
(3)在p-GaN-2层表面再次进行旋涂光刻胶、曝光显影，再使用电子束蒸发系统进行金属电极制备，电极组分依次为Ti/Al/Ni/Au，厚度分别为5/90/60/60nm；并使用快速退火炉对所制备的电极进行退火，退火温度为800℃、退火时间30s；得到所述的用于可见光通信的芯片。
性能测试：
图6为实施例1的所述的用于可见光通信的芯片的双波段响应曲线。其中，在正向偏置电压1.5V条件下，器件的工作区域为n-GaN-1/i-In 0.4Ga 0.6N/p-GaN，器件响应度为0.81A/W。
在反向偏置电压-1.3V条件下，器件的工作区域为n-GaN-2/i-In 0.15Ga 0.75N/p-GaN，器件响应度为0.98A/W。
图7为实施例1的所述的用于可见光通信的芯片的双波段带宽曲线。其中，在正向偏置电压1.5V条件下，器件的工作区域为n-GaN-1/i-In 0.4Ga 0.6N/p-GaN，器件-3dB带宽为210MHz。
在反向偏置电压-1.3V条件下，器件的工作区域为n-GaN-2/i-In 0.15Ga 0.75N/p-GaN，器件-3dB带宽为220MHz。
以上仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书内容所作的等同变换，或直接或间接运用在相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

  1. 一种用于可见光通信的芯片，其特征在于：
    包括依次层叠设置的衬底、缓冲层、本征GaN层、第一GaN层、i-In xGa 1-xN功能层、第二GaN层、i-In yGa 1-yN功能层、第三GaN层和顶电极；其中，0≤x＜1，0≤y≤1；
    所述i-In xGa 1-xN功能层、所述第二GaN层、所述i-In yGa 1-yN功能层和所述第三GaN层的侧壁均设SiO 2隔离层；
    在所述第一GaN层的上部设底电极，所述i-In xGa 1-xN功能层侧壁的SiO 2隔离层位于所述底电极与所述i-In xGa 1-xN功能层之间；
    所述第一GaN层为n-GaN或p-GaN层：
    当第一GaN层为n-GaN层时，所述第二GaN层为p-GaN层，所述第三GaN层为n-GaN层；
    当第一GaN层为p-GaN层时，所述第二GaN层为n-GaN层，所述第三GaN层为p-GaN层。
  2. 根据权利要求1所述的一种用于可见光通信的芯片，其特征在于：所述x>y。
  3. 根据权利要求1所述的一种用于可见光通信的芯片，其特征在于：所述i-In xGa 1-xN功能层和i-In yGa 1-yN功能层的厚度为30～200nm。
  4. 根据权利要求3所述的一种用于可见光通信的芯片，其特征在于：所述i-In xGa 1-xN功能层选自In xGa 1-xN薄膜、In xGa 1-xN/GaN薄膜或者In xGa 1-xN/InGaN薄膜；所述i-In yGa 1-yN功能层选自In yGa 1-yN薄膜、In yGa 1-yN/GaN薄膜或者In yGa 1-yN/InGaN薄膜。
  5. 一种制备如权利要求1至4任一项所述的一种用于可见光通信的芯片的方法，其特征在于：包括以下步骤：
    在衬底上依次生长缓冲层、本征GaN层、第一GaN层、i-In xGa 1-xN功能层、第二GaN层、i-In yGa 1-yN功能层、第三GaN层；
    刻蚀i-In xGa 1-xN功能层、第二GaN层、i-In yGa 1-yN功能层和第三GaN层远 的一侧；
    在被刻蚀区域沉积SiO 2隔离层；
    在所述第一GaN层上部设底电极，所述底电极在横向方向上与所述i-In xGa 1-xN功能层彼此间隔开；在所述第三GaN层表面设顶电极，得到所述光电探测器芯片。
  6. 根据权利要求5所述的方法，其特征在于：所述刻蚀包括旋涂光刻胶、曝光显影或电感耦合等离子体干法刻蚀中的至少一种。
  7. 根据权利要求5所述的方法，其特征在于：所述SiO 2隔离层厚度为200～300nm。
  8. 根据权利要求5所述的方法，其特征在于：所述底电极与顶电极构成相同，组分依次为Ti/Al/Ni/Au；
    所述底电极与顶电极厚度分别为215～360nm。
  9. 根据权利要求8所述的方法，其特征在于：还包括对所述底电极与顶电极退火的步骤，退火温度为700～900℃。
  10. 如权利要求1至4任一项所述的一种用于可见光通信的芯片在光电探测器中的应用。
PCT/CN2022/073671 2021-12-14 2022-01-25 一种用于可见光通信的芯片及其制备方法与应用 WO2023108862A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US18/271,678 US20240332443A1 (en) 2021-12-14 2022-01-25 Chip for visible light communication and preparation method and application thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202111523681.6A CN114373813A (zh) 2021-12-14 2021-12-14 一种用于可见光通信的芯片及其制备方法与应用
CN202111523681.6 2021-12-14

Publications (1)

Publication Number Publication Date
WO2023108862A1 true WO2023108862A1 (zh) 2023-06-22

Family

ID=81139778

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/073671 WO2023108862A1 (zh) 2021-12-14 2022-01-25 一种用于可见光通信的芯片及其制备方法与应用

Country Status (3)

Country Link
US (1) US20240332443A1 (zh)
CN (1) CN114373813A (zh)
WO (1) WO2023108862A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115084310A (zh) * 2022-05-24 2022-09-20 华南理工大学 一种用于光通信的led及其制备方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130193308A1 (en) * 2011-12-21 2013-08-01 Arizona State Multiband Photodetector Utilizing Unipolar and Bipolar Devices
US20140339580A1 (en) * 2013-05-16 2014-11-20 U.S.A. As Represented By The Administrator Of The National Aeronautics And Space Administration Integrated Multi-Color Light Emitting Device Made With Hybrid Crystal Structure
CN105405915A (zh) * 2015-12-04 2016-03-16 华南理工大学 一种InGaN基蓝光探测器及其制备方法
CN105742399A (zh) * 2016-02-22 2016-07-06 中山大学 一种三族氮化物基双异质结光电晶体管
US20190207054A1 (en) * 2016-10-24 2019-07-04 South China University Of Technology Vertical structure nonpolar led chip on lithium gallate substrate and preparation method therefor
CN110459627A (zh) * 2019-07-15 2019-11-15 东南大学 一种紫外-可见双波段光电探测器
CN111403505A (zh) * 2020-03-09 2020-07-10 中山大学 一种双极型可见光探测器及其制备方法
CN212011003U (zh) * 2019-07-30 2020-11-24 华南理工大学 一种Si衬底InGaN可见光探测器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516408A (en) * 1978-07-21 1980-02-05 Nec Corp Detector for multiple light communication
CN101894831B (zh) * 2009-05-20 2012-08-22 中国科学院半导体研究所 紫外-红外双波段探测器及其制作方法
CN103646986B (zh) * 2013-12-26 2016-08-17 中国科学院半导体研究所 一种AlGaN基双色日盲紫外探测器及制作方法
CN105742377B (zh) * 2016-02-22 2018-01-05 中山大学 一种具有带通滤波功能的可见光通信用光电探测器
CN108807588B (zh) * 2018-06-15 2020-12-01 杭州国翌科技有限公司 单片式n-i-p-i-n型宽光谱光电探测器
CN108831879B (zh) * 2018-06-15 2020-01-07 杭州国翌科技有限公司 混合集成型双谱段多光谱短波红外探测器

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130193308A1 (en) * 2011-12-21 2013-08-01 Arizona State Multiband Photodetector Utilizing Unipolar and Bipolar Devices
US20140339580A1 (en) * 2013-05-16 2014-11-20 U.S.A. As Represented By The Administrator Of The National Aeronautics And Space Administration Integrated Multi-Color Light Emitting Device Made With Hybrid Crystal Structure
CN105405915A (zh) * 2015-12-04 2016-03-16 华南理工大学 一种InGaN基蓝光探测器及其制备方法
CN105742399A (zh) * 2016-02-22 2016-07-06 中山大学 一种三族氮化物基双异质结光电晶体管
US20190207054A1 (en) * 2016-10-24 2019-07-04 South China University Of Technology Vertical structure nonpolar led chip on lithium gallate substrate and preparation method therefor
CN110459627A (zh) * 2019-07-15 2019-11-15 东南大学 一种紫外-可见双波段光电探测器
CN212011003U (zh) * 2019-07-30 2020-11-24 华南理工大学 一种Si衬底InGaN可见光探测器
CN111403505A (zh) * 2020-03-09 2020-07-10 中山大学 一种双极型可见光探测器及其制备方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
LI, BIN ET AL.: "InGaN Visible Light Photodiode", JOURNAL OF THE OPEN UNIVERSITY OF GUANGDONG, vol. 27, no. 129, 30 September 2018 (2018-09-30), XP009547101 *
WANG, YONGJIN ET AL.: "Monolithic Photonic Integration Light Source, Waveguide and Photodiode for Full-duplex Visible Light Communication", JOURNAL OF NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS (NATURAL SCIENCE EDITION), vol. 37, no. 3, 30 June 2017 (2017-06-30), XP009547104 *

Also Published As

Publication number Publication date
US20240332443A1 (en) 2024-10-03
CN114373813A (zh) 2022-04-19

Similar Documents

Publication Publication Date Title
US10964829B2 (en) InGaN-based resonant cavity enhanced detector chip based on porous DBR
KR102209263B1 (ko) 반도체 광디바이스의 제조 방법 및 반도체 광디바이스
KR101537330B1 (ko) 질화물 반도체 발광 소자 제조 방법
TW200402896A (en) Semiconductor light-emitting device
KR101515100B1 (ko) 발광 다이오드 및 그 제조 방법
CN107946417A (zh) 一种全色微型led阵列垂直外延制备方法
JP6219506B2 (ja) ナノワイヤデバイスの活性領域の平坦化および規定のための絶縁層
EP3428957B1 (en) Method for producing semiconductor device
JP4564234B2 (ja) 半導体発光素子
WO2023108862A1 (zh) 一种用于可见光通信的芯片及其制备方法与应用
KR101199187B1 (ko) 발광 다이오드 및 그 제조방법
CN112259652A (zh) 一种降低侧壁缺陷复合的Micro-LED芯片结构及制备方法
US20130207147A1 (en) Uv light emitting diode and method of manufacturing the same
CN110676272A (zh) 一种半导体紫外光电探测器
CN107393983B (zh) 含极化调控层的氮化物量子阱红外探测器及其制备方法
KR101845611B1 (ko) 발광창 전극 구조가 구비된 고효율 발광다이오드 제작 방법
WO2023108863A1 (zh) 一种光电探测器芯片及其制备方法与应用
CN110729384B (zh) 基于红外及红色可见光应用的半导体发光结构及制作方法
US20040238912A1 (en) GaN-based heterostructure photodiode
US10374127B2 (en) Electronic devices with nanorings, and methods of manufacture thereof
CN221150051U (zh) 发光二极管
US12107188B2 (en) Semiconductor device
CN116779700A (zh) 双工通信器件、集成芯片及其制备方法
CN213304155U (zh) 一种降低侧壁缺陷复合的Micro-LED芯片结构
CN113948535A (zh) 一种紫外led和探测器同质集成芯片及其制备方法

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 18271678

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 22905636

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE