CN114373813A - 一种用于可见光通信的芯片及其制备方法与应用 - Google Patents
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Abstract
本发明公开了一种用于可见光通信的芯片及其制备方法与应用。所述用于可见光通信的芯片,包括依次层叠设置的衬底、缓冲层、本征GaN层、第一GaN层、i‑InxGa1‑xN功能层、第二GaN层、i‑InyGa1‑yN功能层、第三GaN层和顶电极;其中,0≤x<1,0≤y≤1;所述i‑InxGa1‑xN功能层、所述第二GaN层、所述i‑InyGa1‑yN功能层和所述第三GaN层的侧壁均设SiO2隔离层;在所述第一GaN层的上部设底电极,所述i‑InxGa1‑xN功能层侧壁的SiO2隔离层位于所述底电极与所述i‑InxGa1‑xN功能层之间。通过对用于可见光通信的芯片的结构设计以及一次生长,能够实现高带宽芯片的双波段探测。
Description
技术领域
本发明属于可见光通信技术领域,具体涉及一种用于可见光通信的芯片及其制备方法与应用。
背景技术
可见光通信(Visible-Light Communication,VLC)由于频谱宽广、数据传输保密性高、对人体无电磁辐射等优势,被认为是新一代移动通信的重要组成部分之一。同时,现代通信场景对通信的容量和速率的需求巨大,因此基于多色LED的VLC系统被提出解决这个问题。但是这同样对光电探测器提出了要求,尤其提出对多波段响应探测器单片集成的需求。
目前用于VLC研究的光电探测器主要为商用型的Si基探测器和研究型的InGaN基光电探测器。其中,Si材料由于带隙较小(1.1eV),是一种宽光谱响应探测器。在可见光通信系统中使用时需要加入滤光片才能探测到相应的LED光源,这不仅造成了光信号的损失,还导致可见光通信系统成本的增加。
InGaN材料由于带隙可调(0.7~3.4eV),可以和光源工作波长匹配,能最大程度的接收光信号,有效降低噪声和减少系统成本,成为可见光通信光电探测器最具潜力的候选者。但是目前InGaN基光电探测器的研究也集中在单一波长的PIN型和MSM型探测器上,对多波段响应的高性能InGaN基光电探测器单片集成芯片亟待研究。因此设计一种结构合理、工艺简单的多波段InGaN基光电探测器单一芯片,对于实现高速VLC系统的实现意义重大。
发明内容
本发明所要解决的第一个技术问题是:
提供一种用于可见光通信的芯片。通过对用于可见光通信的芯片的结构设计,能够实现高带宽芯片的双波段探测。
本发明所要解决的第二个技术问题是:
提供一种所述用于可见光通信的芯片的制备方法。
本发明所要解决的第三个技术问题是:
所述用于可见光通信的芯片的应用。
为了解决所述第一个技术问题,本发明采用的技术方案为:
一种用于可见光通信的芯片,包括依次层叠设置的衬底、缓冲层、本征GaN层、第一GaN层、i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层、第三GaN层和顶电极;其中,0≤x<1,0≤y≤1;
所述i-InxGa1-xN功能层、所述第二GaN层、所述i-InyGa1-yN功能层和所述第三GaN层的侧壁均设SiO2隔离层;
在所述第一GaN层的上部设底电极,所述i-InxGa1-xN功能层侧壁的SiO2隔离层位于所述底电极与所述i-InxGa1-xN功能层之间;
所述第一GaN层为n-GaN或p-GaN层:
当第一GaN层为n-GaN层时,所述第二GaN层为p-GaN层,所述第三GaN层为n-GaN层;
当第一GaN层为p-GaN层时,所述第二GaN层为n-GaN层,所述第三GaN层为p-GaN层。
根据需要,所述光电探测器芯片可以为基于两个p-i-n结构的共用p型材料的n-i-p-i-n结构或共用n型材料的p-i-n-i-p结构。
根据本发明的一种实施方式,所述x>y。
在所述i-InxGa1-xN功能层和i-InyGa1-yN功能层中,由于In组份越大,带隙越小,而x>y,因此所述i-InyGa1-yN功能层的带隙大于所述i-InxGa1-xN功能层。
根据本发明的一种实施方式,将高带隙材料i-InyGa1-yN功能层置于上部,将低带隙材料i-InxGa1-xN功能层置于下部。因为高带隙材料吸收截止波长短,低带隙材料吸收截止波长长,这样的组合能够最大程度利用不同波段。
根据本发明的一种实施方式,所述i-InxGa1-xN功能层和i-InyGa1-yN功能层的厚度为30~200nm。
根据本发明的一种实施方式,所述i-InxGa1-xN功能层选自InxGa1-xN薄膜、InxGa1- xN/GaN薄膜或者InxGa1-xN/InGaN薄膜;所述i-InyGa1-yN功能层选自InyGa1-yN薄膜、InyGa1-yN/GaN薄膜或者InyGa1-yN/InGaN薄膜。
优选的,所述InxGa1-xN/GaN薄膜优选为InxGa1-xN/GaN量子阱;所述InxGa1-xN/InGaN薄膜优选为InxGa1-xN/InGaN量子阱;所述InyGa1-yN/GaN薄膜优选为InyGa1-yN/GaN量子阱;所述InyGa1-yN/InGaN薄膜优选为InyGa1-yN/InGaN量子阱。
根据本发明的一种实施方式,所述用于可见光通信的芯片通过单片集成获得。
通过在所述光电探测器芯片上负载不同方向的电压,就可以实现不同波段的光电探测,具体如下:
在正向偏置电压1.5V条件下,器件的工作区域为第一GaN层/i-InxGa1-xN功能层/第二GaN层。在反向偏置电压-1.3V条件下,器件的工作区域为第二GaN层/i-InyGa1-yN功能层/第三GaN层。
所述用于可见光通信的芯片为横向结构,这使得所述用于可见光通信的芯片的可集成度更高,在此基础上还可以单片集成LED,HEMT(高电子迁移率晶体管);还能够通过量子阱结构制备双工器件,实现片上光传导等功能;另外,在大功率传输条件下,所述芯片更容易实现探测器阵列的制备。
所述用于可见光通信的芯片制备的探测器,还能更容易实现片内光互联结构。
为了解决所述第二个技术问题,本发明采用的技术方案为:
一种制备所述用于可见光通信的芯片的方法,包括以下步骤:
在衬底上依次生长缓冲层、本征GaN层、第一GaN层、i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层、第三GaN层;
刻蚀i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层和第三GaN层一侧;
在被刻蚀区域沉积SiO2隔离层;
在所述第一GaN层上部设底电极,所述底电极在横向方向上与所述i-InxGa1-xN功能层彼此间隔开;在所述第三GaN层表面设顶电极,得到所述光电探测器芯片。
根据本发明的一种实施方式,所述衬底为硅衬底、蓝宝石衬底或碳化硅衬底中的至少一种,厚度为300~450μm。
根据本发明的一种实施方式,所述缓冲层为AlN缓冲层与AlGaN缓冲层的叠加层。
根据本发明的一种实施方式,所述AlN缓冲层厚度为50~150nm、AlGaN缓冲层厚度为250~400nm。
根据本发明的一种实施方式,所述本征GaN层厚度为1~3μm。
根据本发明的一种实施方式,所述在衬底上依次生长的方法包括金属有机化合物化学气相沉淀(MOCVD)、脉冲激光沉积(PLD)、分子束外延(MBE)方法中的至少一种。
根据本发明的一种实施方式,所述采用MOCVD法生长,生长原材料包括:三甲基镓(Ga(CH3)3,TMGa)、三甲基铟(In(CH3)3,TMIn)、三甲基铝(Al(CH3)3,TMAl)。
根据本发明的一种实施方式,所述生长的第一GaN层厚度为1~3μm、i-InxGa1-xN功能层厚度为80~150nm、第二GaN层厚度为100~150nm、i-InyGa1-yN功能层为80~150nm、第三GaN层厚度为300~500nm。
双波段结构在衬底上直接完成外延生长,无二次生长工艺。降低了因构造多波段复杂结构所需要的工艺成本,简化了工艺步骤。此外,单片集成芯片能够解决普通混合集成芯片带来的寄生电容大限制探测器带宽的问题。双波段器件能够满足双色LED基可见光通信技术(VLC)系统对不同波段响应的光电探测器单片集成芯片的需求。
根据本发明的一种实施方式,在刻蚀i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层和第三GaN层一侧的时候,刻蚀到达第一GaN层内。
根据本发明的一种实施方式,所述刻蚀包括旋涂光刻胶、曝光显影或电感耦合等离子体干法刻蚀中的至少一种。
根据本发明的一种实施方式,所述SiO2隔离层厚度为200~300nm。
根据本发明的一种实施方式,使用等离子增强化学气相淀积(PECVD)沉积SiO2进行侧壁钝化,以制备所述SiO2隔离层,等离子功率为30~50W,沉积温度为90~110℃。
根据本发明的一种实施方式,所述底电极与顶电极构成相同,组分依次为Ti/Al/Ni/Au;
所述底电极与顶电极厚度分别为215~360nm。
在所述光电探测器芯片上淀积Ti/Al/Ni/Au电极能够形成欧姆接触的机制。Ni/Au作为Ti/Al的覆盖层,能够阻止Ti、Al、Au的相互扩散,并且起到抗接触层氧化的作用。
根据本发明的一种实施方式,使用电子束蒸发系统制备底电极和顶电极。
根据本发明的一种实施方式,还包括对所述底电极与顶电极退火的步骤,退火温度为700~900℃。
本发明的另一个方面,还涉及所述一种用于可见光通信的芯片在光电探测器中的应用。
所述技术方案中的一个技术方案至少具有如下优点或有益效果之一:
1.双波段结构在衬底上直接完成外延生长,无二次生长工艺。降低了因构造多波段复杂结构所需要的工艺成本,简化了工艺步骤;
2.通过在所述光电探测器芯片上负载不同方向的电压,就可以实现不同波段的光电探测;
3.所述用于可见光通信的芯片中,将高带隙材料i-InyGa1-yN功能层置于上部,将低带隙材料i-InxGa1-xN功能层置于下部。因为高带隙材料吸收截止波长短,低带隙材料吸收截止波长长,这样的组合能够最大程度利用不同波段。
附图说明
构成本发明的一部分的说明书附图用来提供对本发明的进一步理解,本发明的示意性实施例及其说明用于解释本发明,并不构成对本发明的不当限定。
图1为实施例1的所述用于可见光通信的芯片的外延结构示意图。
图2为实施例1的所述用于可见光通信的芯片的器件结构剖面图。
图3为实施例2的所述用于可见光通信的芯片的器件结构剖面图。
图4为实施例3的所述用于可见光通信的芯片的器件结构剖面图。
图5为实施例4的所述用于可见光通信的芯片的器件结构剖面图。
图6为实施例1的所述的用于可见光通信的芯片的双波段响应曲线。
图7为实施例1的所述的用于可见光通信的芯片的双波段带宽曲线。
具体实施方式
下面详细描述本发明的实施例,所述实施例的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。
下面通过参考附图描述的实施例是示例性的,仅用于解释本发明,而不能理解为对本发明的限制。
在本发明的描述中,如果有描述到第一、第二、第三等只是用于区分技术特征为目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量或者隐含指明所指示的技术特征的先后关系。
在本发明的描述中,需要理解的是,涉及到方位描述,例如上、下、左、右等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
本发明的描述中,需要说明的是,除非另有明确的限定,设置、安装、连接等词语应做广义理解,所属技术领域技术人员可以结合技术方案的具体内容合理确定词语在本发明中的具体含义。
实施例1
i-InxGa1-xN功能层中x=0.4,带隙宽度1.97eV;
i-InyGa1-yN功能层中y=0.15,带隙宽度2.81eV;
本实施例提供了一种用于可见光通信的芯片外延结构,如图1所示,自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In0.4Ga0.6N功能层、p-GaN层、i-In0.15Ga0.75N功能层、n-GaN-2层。生长过程如下:
(1)在厚度为300μm基底上采用MOCVD法生长,生长原材料为生长原材料三甲基镓(Ga(CH3)3,TMGa)、三甲基铟(In(CH3)3,TMIn)、三甲基铝(Al(CH3)3,TMAl);依次生长厚度为50nm的AlN、250nm的AlGaN层、1μm的GaN层、1μm的n-GaN-1层、80nm的i-In0.4Ga0.6N功能层、100nm的p-GaN层、80nm的i-In0.15Ga0.75N功能层以及300nm的n-GaN-2;
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图,如图2所示,自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In0.4Ga0.6N功能层、p-GaN层、i-In0.15Ga0.75N功能层、n-GaN-2层、SiO2隔离层和电极,具体制备流程如下:
(1)在n-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达n-GaN-1层;
(2)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用PECVD沉积SiO2进行侧壁钝化,SiO2钝化层的厚度为200nm;
(3)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用电子束蒸发系统进行金属电极制备,电极组分依次为Ti/Al/Ni/Au,厚度分别为5/90/60/60nm;并使用快速退火炉对所制备的电极进行退火,退火温度为800℃、退火时间30s;得到所述的用于可见光通信的芯片。
实施例2
i-InxGa1-xN功能层中x=0.15,带隙宽度2.81eV;
i-InyGa1-yN功能层中y=0,带隙宽度3.4eV;
本实施例提供了一种用于可见光通信的芯片外延结构,如图3所示,自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In0.15Ga0.75N功能层、p-GaN层、i-GaN功能层、n-GaN-2层。生长过程如下:
(1)在厚度为400μm基底上采用MBE法生长,生长原材料为高纯铟(In,99.99999%)、高纯镓(Ga,99.99999%)、高纯铝(Al,99.99999%);依次生长厚度为100nm的AlN、300nm的AlGaN层、2μm的GaN层、2μm的n-GaN-1层、100nm的i-In0.15Ga0.75N功能层、130nm的p-GaN层、400nm的i-GaN功能层以及300nm的n-GaN-2;
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图,自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In0.15Ga0.75N功能层、p-GaN层、i-GaN功能层、n-GaN-2层、SiO2隔离层和电极,具体制备流程如下:
(1)在n-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达n-GaN-1层;
(2)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用PECVD沉积SiO2进行侧壁钝化,SiO2钝化层的厚度为230nm;
(3)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用电子束蒸发系统进行金属电极制备,电极组分依次为Ti/Al/Ni/Au,厚度分别为5/120/80/80nm;并使用快速退火炉对所制备的电极进行退火,退火温度为830℃、退火时间40s;得到所述的用于可见光通信的芯片。
实施例3
i-InxGa1-xN功能层中x=0.15,带隙宽度2.81eV;
i-InyGa1-yN功能层中y=0,带隙宽度3.4eV;
本实施例提供了一种用于可见光通信的芯片外延结构,如图4所示,下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-In0.15Ga0.75N/GaN量子阱功能层、p-GaN层、i-GaN功能层、n-GaN-2层。生长过程如下:
(1)在厚度为450μm基底上采用PLD法生长,生长原材料为高纯铟(In,99.99999%)、高纯镓(Ga,99.99999%)、高纯铝(Al,99.99999%);依次生长厚度为150nm的AlN、400nm的AlGaN层、3μm的GaN层、3μm的n-GaN-1层、150nm的i-InN功能层、150nm的p-GaN层、150nm的i-In0.15Ga0.75N/GaN量子阱功能层以及500nm的n-GaN-2;
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图,自下至上依次包括衬底、缓冲层、本征GaN层、n-GaN-1层、i-InN功能层、p-GaN层、i-In0.15Ga0.75N/GaN量子阱功能层、n-GaN-2层、SiO2隔离层和电极,具体制备流程如下:
(1)在n-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达n-GaN-1层内10nm;
(2)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用PECVD沉积SiO2进行侧壁钝化,SiO2钝化层的厚度为250nm;
(3)在n-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用电子束蒸发系统进行电极制备,电极组分依次为Ti/Al/Ni/Au金属电极制备,厚度分别为10/150/100/100nm;并使用快速退火炉对所制备的电极进行退火,退火温度为850℃、退火时间50s;得到所述的用于可见光通信的芯片。
实施例4
i-InxGa1-xN功能层中x=0.4,带隙宽度1.97eV;
i-InyGa1-yN功能层中y=0.15,带隙2.81eV;
本实施例提供了一种用于可见光通信的芯片外延结构,如图5所示,自下至上依次包括衬底、缓冲层、本征GaN层、p-GaN-1层、i-In0.4Ga0.6N功能层、n-GaN层、i-In0.15Ga0.75N、p-GaN-2层。生长过程如下:
(1)在厚度为300μm基底上采用MOCVD法生长,生长原材料为生长原材料三甲基镓(Ga(CH3)3,TMGa)、三甲基铟(In(CH3)3,TMIn)、三甲基铝(Al(CH3)3,TMAl);依次生长厚度为50nm的AlN、250nm的AlGaN层、1μm的GaN层、1μm的p-GaN-1层、80nm的i-In0.4Ga0.6N功能层、100nm的n-GaN层、80nm的i-In0.15Ga0.75N功能层以及300nm的p-GaN-2;
本实施例还提供了一种用于可见光通信的芯片器件结构刨面图,如图3所述,自下至上依次包括衬底、缓冲层、本征GaN层、p-GaN-1层、i-In0.4Ga0.6N功能层、n-GaN层、i-In0.15Ga0.75N功能层、p-GaN-2层、SiO2隔离层和电极,具体制备流程如下:
(1)在p-GaN-2层表面进行旋涂光刻胶、曝光显影、电感耦合等离子体(ICP)干法刻蚀到达p-GaN-1层;
(2)在p-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用PECVD沉积SiO2进行侧壁钝化,SiO2钝化层的厚度为200nm;
(3)在p-GaN-2层表面再次进行旋涂光刻胶、曝光显影,再使用电子束蒸发系统进行金属电极制备,电极组分依次为Ti/Al/Ni/Au,厚度分别为5/90/60/60nm;并使用快速退火炉对所制备的电极进行退火,退火温度为800℃、退火时间30s;得到所述的用于可见光通信的芯片。
性能测试:
图6为实施例1的所述的用于可见光通信的芯片的双波段响应曲线。其中,在正向偏置电压1.5V条件下,器件的工作区域为n-GaN-1/i-In0.4Ga0.6N/p-GaN,器件响应度为0.81A/W。
在反向偏置电压-1.3V条件下,器件的工作区域为n-GaN-2/i-In0.15Ga0.75N/p-GaN,器件响应度为0.98A/W。
图7为实施例1的所述的用于可见光通信的芯片的双波段带宽曲线。其中,在正向偏置电压1.5V条件下,器件的工作区域为n-GaN-1/i-In0.4Ga0.6N/p-GaN,器件-3dB带宽为210MHz。
在反向偏置电压-1.3V条件下,器件的工作区域为n-GaN-2/i-In0.15Ga0.75N/p-GaN,器件-3dB带宽为220MHz。
以上仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书内容所作的等同变换,或直接或间接运用在相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (10)
1.一种用于可见光通信的芯片,其特征在于:
包括依次层叠设置的衬底、缓冲层、本征GaN层、第一GaN层、i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层、第三GaN层和顶电极;其中,0≤x<1,0≤y≤1;
所述i-InxGa1-xN功能层、所述第二GaN层、所述i-InyGa1-yN功能层和所述第三GaN层的侧壁均设SiO2隔离层;
在所述第一GaN层的上部设底电极,所述i-InxGa1-xN功能层侧壁的SiO2隔离层位于所述底电极与所述i-InxGa1-xN功能层之间;
所述第一GaN层为n-GaN或p-GaN层:
当第一GaN层为n-GaN层时,所述第二GaN层为p-GaN层,所述第三GaN层为n-GaN层;
当第一GaN层为p-GaN层时,所述第二GaN层为n-GaN层,所述第三GaN层为p-GaN层。
2.根据权利要求1所述的一种用于可见光通信的芯片,其特征在于:所述x>y。
3.根据权利要求1所述的一种用于可见光通信的芯片,其特征在于:所述i-InxGa1-xN功能层和i-InyGa1-yN功能层的厚度为30~200nm。
4.根据权利要求3所述的一种用于可见光通信的芯片,其特征在于:所述i-InxGa1-xN功能层选自InxGa1-xN薄膜、InxGa1-xN/GaN薄膜或者InxGa1-xN/InGaN薄膜;所述i-InyGa1-yN功能层选自InyGa1-yN薄膜、InyGa1-yN/GaN薄膜或者InyGa1-yN/InGaN薄膜。
5.一种制备如权利要求1至4任一项所述的一种用于可见光通信的芯片的方法,其特征在于:包括以下步骤:
在衬底上依次生长缓冲层、本征GaN层、第一GaN层、i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层、第三GaN层;
刻蚀i-InxGa1-xN功能层、第二GaN层、i-InyGa1-yN功能层和第三GaN层远的一侧;
在被刻蚀区域沉积SiO2隔离层;
在所述第一GaN层上部设底电极,所述底电极在横向方向上与所述i-InxGa1-xN功能层彼此间隔开;在所述第三GaN层表面设顶电极,得到所述光电探测器芯片。
6.根据权利要求5所述的方法,其特征在于:所述刻蚀包括旋涂光刻胶、曝光显影或电感耦合等离子体干法刻蚀中的至少一种。
7.根据权利要求5所述的方法,其特征在于:所述SiO2隔离层厚度为200~300nm。
8.根据权利要求5所述的方法,其特征在于:所述底电极与顶电极构成相同,组分依次为Ti/Al/Ni/Au;
所述底电极与顶电极厚度分别为215~360nm。
9.根据权利要求8所述的方法,其特征在于:还包括对所述底电极与顶电极退火的步骤,退火温度为700~900℃。
10.如权利要求1至4任一项所述的一种用于可见光通信的芯片在光电探测器中的应用。
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