WO2023098751A1

WO2023098751A1 - Chip heat dissipation structure and electronic device

Info

Publication number: WO2023098751A1
Application number: PCT/CN2022/135576
Authority: WO
Inventors: 胡院林
Original assignee: Oppo广东移动通信有限公司
Priority date: 2021-12-03
Filing date: 2022-11-30
Publication date: 2023-06-08
Also published as: CN114158183A

Abstract

The present application relates to a chip heat dissipation structure and an electronic device. The chip heat dissipation structure comprises a heat sink, a circuit board, a chip, and a heat conduction assembly; the heat sink comprises a heat dissipation plate, the circuit board is arranged in parallel with and spaced from the heat dissipation plate, the chip is attached to the surface of the circuit board facing the heat dissipation plate, and the heat conduction assembly is located between the chip and the heat dissipation plate, wherein the heat conduction assembly comprises a first interface layer, a heat sink plate, and a second interface layer stacked in sequence, the first interface layer is located between the heat sink plate and the chip, and the second interface layer is located between the heat sink plate and the heat dissipation plate. The electronic device comprises the chip heat dissipation structure. The present application can reduce the thermal resistance of the heat conduction assembly, thereby improving the heat dissipation effect of the chip, and absorbing the tolerance between the chip and the heat dissipation plate to reduce the influence of the tolerance on heat dissipation.

Description

Chip cooling structure and electronic equipment

【Technical field】

The present application relates to the technical field of electronic equipment, in particular to chip heat dissipation structures and electronic equipment.

【Background technique】

With the advent of the 5G communication era, the power consumption density of electronic devices such as routers has increased rapidly, leading to severe over-temperature risks for the operating temperature of related electronic devices. In order to quickly transfer the heat on the chip on the circuit board to the heat sink, the chip is usually attached directly to the heat sink. Due to the existence of a large gap between the chip and the heat sink due to the existence of tolerances, the interface material is usually used to directly fill the gap at present, but the thermal conductivity of the interface material is usually small, which makes it difficult for the heat on the chip to be effectively conducted and there is a risk of overheating .

【Content of invention】

The present application provides a chip heat dissipation structure and electronic equipment, which can solve the problem that the high-order harmonics generated when the chip is in operation will be transmitted to the outside through the heat sink.

The present application provides a chip heat dissipation structure and electronic equipment capable of improving heat dissipation efficiency.

The application provides a chip heat dissipation structure, including:

a radiator, said radiator comprising a radiator plate;

A circuit board, the circuit board is arranged in parallel with the heat dissipation plate at intervals;

a chip, the chip is attached to the surface of the circuit board facing the heat dissipation plate; and

A heat conduction component, the heat conduction component is located between the chip and the heat dissipation plate; wherein the heat conduction component includes a first interface layer, a heat sink plate and a second interface layer stacked in sequence, and the first interface layer is located Between the heat sink plate and the chip, the second boundary layer is located between the heat sink plate and the heat dissipation plate.

【Description of drawings】

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

FIG. 1 is a schematic perspective view of an electronic device provided by an embodiment of the present application;

Fig. 2 is a schematic cross-sectional view of the electronic device shown in Fig. 1 along the A-A direction;

FIG. 3 is a perspective schematic diagram of the heat dissipation structure of the chip in the electronic device shown in FIG. 2;

FIG. 4 is a schematic cross-sectional view of the chip heat dissipation structure shown in FIG. 3 along the B-B direction;

FIG. 5 is an exploded schematic diagram of the chip heat dissipation structure shown in FIG. 3;

6 is a schematic cross-sectional view of another embodiment of the chip heat dissipation structure shown in FIG. 3;

FIG. 7 is a schematic cross-sectional view of a deformation of the chip heat dissipation structure shown in FIG. 6;

8 is a schematic cross-sectional view of another embodiment of the chip heat dissipation structure shown in FIG. 3;

Fig. 9 is a three-dimensional schematic diagram of the cooperation of the heat sink, the heat conduction component and the chip in the chip heat dissipation structure shown in Fig. 5;

Fig. 10 is a schematic cross-sectional view of the cooperation between the heat conduction component and the chip shown in Fig. 9 along the C-C direction;

Fig. 11 is a schematic cross-sectional view of a deformation of the heat conduction component and the chip shown in Fig. 10;

FIG. 12 is a schematic cross-sectional view of another modification of the cooperation between the heat conduction component and the chip shown in FIG. 10 .

【Detailed ways】

The present application provides a chip heat dissipation structure, including a heat sink, a circuit board, a chip and a heat conduction component; the heat sink includes a heat dissipation plate, the circuit board is arranged in parallel with the heat dissipation plate, The surface of the circuit board facing the heat dissipation plate, the heat conduction component is located between the chip and the heat dissipation plate; wherein the heat conduction component includes a first interface layer, a heat sink plate and a second interface layer stacked in sequence, The first interface layer is located between the heat sink plate and the chip, and the second interface layer is located between the heat sink plate and the heat dissipation plate. The electronic device includes the chip heat dissipation structure.

In some embodiments, the heat conduction assembly further includes at least one guide piece, one end of each guide piece is fixed on the heat sink plate; at least one guide hole is provided on the heat sink plate, and the at least one guide piece The guide holes are in one-to-one correspondence with the at least one guide piece, and the end of each guide piece away from the heat dissipation plate is passed through the corresponding guide hole, so that the heat sink plate can move along the guide piece. reciprocating movement.

In some embodiments, the heat conduction assembly further includes a stopper, and the stopper is fixed to the end of the guide member away from the heat dissipation plate, and is used to limit the movement of the heat sink plate along the guide member. distance.

In some embodiments, the second boundary layer is elastic.

In some embodiments, the heat conduction assembly further includes at least one elastic member; one end of each elastic member is fixedly connected to the heat dissipation plate, and the other end is fixedly connected to the heat sink plate.

In some embodiments, the projection of the chip on the heat sink is located within the range of the heat sink.

In some embodiments, the heat sink includes a heat dissipation plate and a side edge extending from the edge of the heat dissipation plate, and the circuit board arranges one side surface of the chip against the side edge away from the heat dissipation plate. One side surface of the board, so that the circuit board and the radiator form a shielding space; the chip is accommodated in the shielding space.

In some embodiments, the chip heat dissipation structure includes two heat sinks, and the two heat sinks are arranged symmetrically with respect to the circuit board and respectively enclose a first shielding space and a second shielding space with the circuit board.

In some embodiments, the heat sink further includes a plurality of heat dissipation fins, and the plurality of heat dissipation fins are fixed on the surface of the heat dissipation plate away from the circuit board.

In some embodiments, the heat sink is made of one or more of aluminum, aluminum alloy, copper, copper alloy, and graphite with high thermal conductivity.

In some embodiments, the circuit board includes a first surface and a second surface opposite to each other; the heat sink includes a first heat sink and a second heat sink, and the first heat sink is against the first heat sink. surface and encloses a first shielding space with the first surface, the second radiator leans against the second surface and encloses a second shielding space with the second surface; the chip includes a first chip and a second Chips, the first chip is located on the first surface and accommodated in the first shielding space, and the second chip is located on the second surface and accommodated in the second shielding space.

In some embodiments, the first heat sink and the second heat sink are arranged symmetrically with respect to the circuit board.

The present application also provides an electronic device, including a chip heat dissipation structure, the chip heat dissipation structure includes a heat sink, a circuit board, a chip, and a heat conduction component; the heat sink includes a heat dissipation plate, and the circuit board is spaced parallel to the heat dissipation plate The chip is attached to the surface of the circuit board facing the heat dissipation plate, and the heat conduction component is located between the chip and the heat dissipation plate; wherein the heat conduction component includes first interface layers stacked in sequence , a heat sink plate and a second boundary layer, the first boundary layer is located between the heat sink plate and the chip, and the second boundary layer is located between the heat sink plate and the heat dissipation plate. The electronic device includes the chip heat dissipation structure.

In some embodiments, the second boundary layer is elastic.

The application will be described in further detail below in conjunction with the accompanying drawings and embodiments. In particular, the following examples are only used to illustrate the present application, but not to limit the scope of the present application. Likewise, the following embodiments are only some of the embodiments of the present application but not all of them, and all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present application.

Reference herein to an "embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The occurrences of this phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is understood explicitly and implicitly by those skilled in the art that the embodiments described herein can be combined with other embodiments.

Please refer to FIG. 1 . FIG. 1 is a schematic perspective view of an electronic device provided by an embodiment of the present application. This application provides an electronic device 1000 . Specifically, the electronic device 1000 may be any one of various types of computer system devices that are mobile or portable and perform wireless communication (only one form is shown as an example in FIG. 1 ). Specifically, the electronic device 1000 can be a mobile phone or smart phone (for example, an iPhone TM, an Android TM based phone), a portable game device (for example Nintendo DS TM, PlayStation Portable TM, Gameboy Advance TM, iPhone TM), a laptop Computers, PDAs, portable Internet devices, music players and data storage devices, other handheld devices, and such as headphones, etc., the electronic device 1000 can also be used for other wearable devices that need to be charged (for example, such as electronic bracelets, electronic Head-mounted devices (HMDs) such as necklaces, electronic devices, or smart watches).

The electronic device 1000 can also be any one of a plurality of electronic devices, including but not limited to Customer Premise Equipment (CPE), routers, cellular phones, smart phones, other wireless communication devices, personal digital Assistants, Audio Players, Other Media Players, Music Recorders, Video Recorders, Other Media Recorders, Radios, Medical Equipment, Vehicle Transportation Instruments, Calculators, Programmable Remote Controls, Pagers, Laptop Computers, Desktop Computers, Printers , netbook computers, personal digital assistants (PDAs), portable multimedia players (PMPs), Moving Picture Experts Group (MPEG-1 or MPEG-2) audio layer 3 (MP3) players, portable medical devices, and digital cameras and combinations thereof and other equipment.

In some cases, the electronic device 1000 may perform various functions (eg, play music, display videos, store pictures, and receive and send phone calls). Electronic device 1000 may be a device such as a cellular phone, media player, other handheld device, wrist watch device, pendant device, earpiece device, or other compact portable device, if desired.

Please refer to FIG. 2 together. FIG. 2 is a schematic cross-sectional view of the electronic device shown in FIG. 1 along the direction A-A. The electronic device 1000 may include a chip cooling structure 100 and a casing 200 , the casing 200 accommodates the chip cooling structure 100 and is fixedly connected to the chip cooling structure 100 , so that the chip cooling structure 100 and the casing 200 are stably connected.

In order to prevent the integrated circuit signal inside the chip of 5G CPE, 5G router, edge computing and other products from interfering with the antenna, resulting in product data traffic (cellular, WIFI) failing to meet the design requirements, it is necessary to shield the signal of the chip. However, for electronic devices that integrate communication and computing, they consume a lot of power and dissipate heat, and the requirement for chip shielding increases the difficulty of chip heat dissipation, which poses a great challenge to the design of chip heat dissipation solutions.

In the related art, in order to shield the signal of the chip, a heat sink is usually used to wrap the entire circuit board on which the chip is fixed, so that the heat sink can not only play a role of shielding, but also serve the purpose of cooling the chip. However, due to the existence of tolerances between the chip on the circuit board and the heat sink, a large gap needs to be provided. The source of the tolerance generally comes from three aspects: first, the chip size tolerance, including the structural size tolerance of the chip itself, the height tolerance after reflow soldering, and the thermal expansion tolerance; second, the radiator tolerance, including the radiator processing tolerance, installation The deformation tolerance caused by stress, etc.; third, the deformation tolerance of the PCB single board under the installation stress. The above tolerances result in a often large gap between the chip and the heat sink, which is currently usually filled directly with an interface material. However, limited by the cost and the physical properties of the base material of the interface material, the thermal conductivity of the interface material is generally small, and the common thermal conductivity is 3-8W/m.K. In addition, the size of the gap determines the thickness of the interface material. The larger the gap, the thicker the interface material, and the higher the thermal resistance between the chip and the heat sink, so that the heat of the chip cannot be efficiently transferred to the heat sink, and the chip has the risk of overheating. Especially for bare-chip packaged chips, the silicon crystal area is usually small, and the thicker interface material severely limits the heat diffusion in the silicon crystal.

Please refer to FIGS. 3 to 5. FIG. 3 is a perspective view of the heat dissipation structure of the chip in the electronic device shown in FIG. 2. FIG. 4 is a schematic cross-sectional view of the heat dissipation structure of the chip shown in FIG. Exploded schematic diagram of the chip cooling structure shown. In this embodiment, the chip heat dissipation structure 100 may include a heat sink 10 , a circuit board 20 , a chip 30 and a heat conduction component 40 . Wherein, the heat sink 10 includes a heat dissipation plate 11, the circuit board 20 is arranged opposite to the heat dissipation plate 11 at intervals, and the chip 30 is attached to the surface of the circuit board 20 facing the heat dissipation plate 11, that is, the chip 30 is located between the circuit board 20 and the heat dissipation plate 11 . The heat conduction component 40 is located between the chip 30 and the heat sink 11 , and is used for conducting the heat generated by the chip 30 to the heat sink 11 of the heat sink 10 .

Wherein, the heat conduction component 40 may include a first interface layer 41, a heat sink plate 42, and a second interface layer 43 that are sequentially stacked, wherein the thermal conductivity of the heat sink plate 42 is much greater than that of the first interface layer 41 and the second interface layer 443. Thermal Conductivity. The surface of the first boundary layer 41 facing away from the heat sink 42 is bonded to the chip 30 , that is, the first boundary layer 41 is located between the heat sink 42 and the chip 30 , so that the heat sink 42 can fully contact the chip 30 . The surface of the second boundary layer 43 away from the heat sink plate 42 is attached to the heat sink plate 11, that is, the second boundary layer 43 is located between the heat sink plate 42 and the heat sink plate 11, so that the heat sink plate 42 can be connected to the heat sink plate 11. Sufficient contact enables the chip 30 to transfer the generated heat to the heat sink 10 through the heat sink, thereby ensuring the heat dissipation performance of the chip 30 .

Please continue to refer to FIG. 3 to FIG. 5 , in one embodiment, the chip heat dissipation structure 100 may include a heat sink 10 , and the chip 30 is disposed on one side surface of the circuit board 20 . Specifically, the heat sink 10 may include a heat dissipation plate 11 and a side edge 12 extending from an edge of the heat dissipation plate 11 , and the heat dissipation plate 11 and the side edge 12 may enclose a shielding cavity 110 . The side surface of the circuit board 20 where the chip 30 is arranged abuts against the side surface of the side edge 12 away from the heat dissipation plate 11, that is, the chip 30 is accommodated in the shielding cavity 110, and the circuit board 20 is covered by the shielding cavity 110, so that the circuit board 20 A shielding space 101 is enclosed with the radiator 10 .

In other words, the heat sink 10 and the circuit board 20 can form a shielded space 101, and the chip 30 is accommodated in the shielded space 101 and conducts with the corresponding heat sink 11 through the heat conducting component 40, so that the chip 30 can transfer heat to the heat sink 10. The cooling plate 11 prevents the chip 30 from overheating. On the one hand, the shielding space 101 can shield the signal on the chip 30 .

Please refer to FIG. 6 . FIG. 6 is a schematic cross-sectional view of another embodiment of the chip heat dissipation structure shown in FIG. 3 . Further, in yet another embodiment, the chip heat dissipation structure 100 may include two heat sinks 10 (such as a first heat sink 10 a and a second heat sink 10 b ). The circuit board 20 can include a first surface 21 and a second surface 22 oppositely arranged, and the number of chips 30 is at least one, and at least one chip 30 can be located on the first surface 21 at the same time, or at least one chip 30 can be located on the second surface at the same time. Part of the number of chips 30 in the surface 22 , or at least one chip 30 may be located on the first surface 21 , and another part of the number of chips 30 may be located in the second surface 22 , which is not specifically limited here.

It should be noted that the terms "first", "second", and "third" in this application are only used for descriptive purposes, and should not be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. quantity. Thus, features defined as "first", "second", and "third" may explicitly or implicitly include at least one of these features. In the description of the present application, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

Wherein, the circuit board 20 is located between the first radiator 10a and the second radiator 10b. Specifically, the side edge of the first radiator 10a abuts against the first surface 21 and can form a first shielding space 101a with the first surface 21; the second radiator 10b abuts against the second surface 22 and can be connected with the second The surface 22 encloses the second shielding space 101b. The first chip 31 can be arranged on the first surface 21, and the first chip 31 can be accommodated in the first shielding space 101a; the second chip 32 can be arranged on the second surface 22, and the second chip 32 can be accommodated in the second shielding space 101b. With such arrangement, on the one hand, the chips 30 on either side of the circuit board 20 can be located within the scope of the shielding space 101, thereby shielding the signals of the chips 30; 11 , the rapid cooling of the chip 30 is realized.

Please continue to refer to FIG. 6, optionally, the first radiator 10a and the second radiator 10b can be arranged symmetrically with respect to the circuit board 20, that is, the two radiators 10 are arranged symmetrically with respect to the circuit board 20 and are surrounded by the circuit board 20 respectively. The first shielding space 101 a and the second shielding space 101 b are arranged in such a way that the chip 30 can be completely located in the shielding space 101 , preventing the signal of the chip 30 from passing through the circuit board 20 and affecting the signal of the antenna.

Please refer to FIG. 7 . FIG. 7 is a schematic cross-sectional view of a modification of the chip heat dissipation structure shown in FIG. 6 . In other embodiments, the first heat sink 10 a and the second heat sink 10 b can be arranged in a dislocation, and each heat sink 10 corresponds to a chip 30 , so that the heat sink 10 can not only shield the signal of the chip 30 , but also save space.

Please refer to FIG. 8 . FIG. 8 is a schematic cross-sectional view of another embodiment of the chip heat dissipation structure shown in FIG. 3 . In yet another embodiment, the heat sink 10 may include a heat sink 11, the circuit board 20 is arranged parallel to the heat sink 11 at intervals, the chip 30 is attached to the surface of the circuit board 20 facing the heat sink 11, and the heat conduction component 40 is located between the heat sink 11 and the heat sink 11. Between the chips 30 , it is used to transfer the heat generated by the chips 30 to the cooling plate, so as to speed up the cooling efficiency of the chips 30 .

Optionally, the heat sink 10 also includes a plurality of heat dissipation fins 13, and the plurality of heat dissipation fins 13 are fixed on the surface of the heat dissipation plate 11 away from the circuit board 20, so as to increase the heat dissipation area of the heat sink 10 and improve the heat dissipation of the heat sink 10. efficiency.

Wherein, the radiator 10 is made of high thermal conductivity material to improve the thermal conductivity of the radiator 10 . The material of the heat sink 10 can be one or more of aluminum and aluminum alloy, copper and copper alloy, and graphite with high thermal conductivity, which is not specifically limited here.

Please refer to FIG. 4 and FIG. 5, the first interface layer 41 is used to connect the chip 30 and the heat sink plate 42, so that the chip 30 can fully contact the heat sink plate 42, thereby reducing the contact thermal resistance between the chip 30 and the heat sink . It can be understood that the thickness of the first interfacial layer 41 is usually very thin (less than 0.2 mm), so as to avoid excessive thickness of the first interfacial layer 41 and excessive thermal resistance. Specifically, the first boundary layer 41 may be one or more of thinner materials such as thermally conductive silicone grease, thermally conductive gel, and graphene film.

The heat sink plate 42 has a good temperature equalization effect, and its temperature does not change with the temperature transferred to its body. For example, the heat sink plate 42 may be one of vapor chamber chamber (VC), diamond, diamond copper, pure copper, and high thermal conductivity graphite, which is not specifically limited here.

The second boundary layer 43 is used to connect the heat sink plate 42 and the heat dissipation plate 11. The second boundary layer 43 can absorb tolerances, such as the height tolerance of the chip 30, the size tolerance of the chip 30, the deformation tolerance of the PCB, the size tolerance of the radiator 10, etc., In order to make the heat sink plate 42 fully contact with the heat sink plate 11 , the heat of the heat sink plate 42 can be effectively transferred to the heat sink 10 .

Please refer to Fig. 5, Fig. 9 and Fig. 10 together. Fig. 9 is a three-dimensional schematic diagram of the cooperation of the heat sink, the heat conduction component and the chip in the chip heat dissipation structure shown in Fig. 5, and Fig. 10 is the cooperation of the heat conduction component and the chip shown in Fig. 9 Schematic cross-section along the C-C direction. In one embodiment, the heat conduction assembly 40 further includes at least one guide member 44 such as a guide post, and a first end of each guide post is fixed on the heat dissipation plate 11 . At least one guide hole 420 is opened on the heat sink plate 42, and the at least one guide hole 420 corresponds to at least one guide piece 44 one by one. The heat sink plate 42 reciprocates along the guide member 44 to ensure that the thickness of the first interfacial layer 41 is relatively thin and reduce the thermal resistance of the first interfacial layer 41 .

Optionally, in order to enable the second interface layer 43 to absorb the tolerance and make the heat sink plate 42 fully contact with the heat dissipation plate 11 and squeeze the material of the first interface layer 41, the material of the second interface layer 43 is an elastic material, such as silicone , one or more of carbon fibers, which are not specifically limited here.

Please refer to FIG. 11 . FIG. 11 is a schematic cross-sectional view of a modification of the cooperation of the heat conduction component and the chip shown in FIG. 10 . Further, the heat conduction assembly 40 may further include a limiting member 45 , which is fixed to an end of the guiding member 44 away from the heat dissipation plate 11 , for limiting the distance that the heat sink plate 42 moves along the guiding member 44 . Specifically, due to the elasticity of the second interface layer 43 , the heat sink plate 42 moves away from the heat dissipation plate 11 under the action of the elastic deformation of the second interface layer 43 , and presses the first interface layer 41 . However, if the elastic deformation of the second boundary layer 43 is too large, the heat sink plate 42 is likely to be detached from the guide post, which affects the reliability of heat conduction of the guide assembly. The setting of the limiting member 45 can limit the floating height of the heat sink plate 42 along the guide member 44 on the one hand, and prevent the heat sink plate 42 from detaching from the guide member 44 on the other hand.

Optionally, the limiting member 45 can be formed integrally with the guiding member 44 , and the end of the guiding member 44 away from the limiting member 45 passes through the corresponding guiding hole 420 and is fixedly connected with the heat dissipation plate 11 . Alternatively, the limiting member 45 is detachably connected (threaded) to the guiding member 44 , and the guiding hole 420 of the heat sink plate 42 is sleeved on the corresponding guiding member 44 , and the limiting member 45 is fixed on the guiding member 44 .

Please also refer to FIG. 12 . FIG. 12 is a schematic cross-sectional view of another modification of the cooperation between the heat conduction component and the chip shown in FIG. 10 . In another embodiment, the heat conduction assembly 40 further includes at least one elastic member 46 (such as a spring), one end of each elastic member 46 is fixedly connected to the heat dissipation plate 11 , and the other end is fixedly connected to the heat sink plate 42 . Such setting can make the heat sink plate 42 effectively squeeze the first boundary layer 41, and make the thickness of the first boundary layer 41 thin enough to reduce the thermal resistance of the first boundary layer 41, and improve the heat sink plate 42 and the chip. Thermal efficiency between 30. Understandably, the elastic member 46 is in a compressed state, and the elastic member 46 can adjust the elastic coefficient of the elastic member 46 according to the stress level that the chip 30 can withstand, so as to avoid the chip 30 from overpressure.

Optionally, due to the existence of the elastic member 46, the second interface layer 43 does not need to consider the compression rebound effect, so the material of the second interface layer 43 can not only be an elastic material, such as one or more of silicone and carbon fiber , can also be a non-elastic material, such as thermally conductive graphite sheet, thermally conductive gel, etc., which are not specifically limited here.

In this embodiment, the chip 30 may be located within the range of the first boundary layer 41 , and the first boundary layer 41 is located within the range of the heat sink plate 42 , so that the chip 30 is fully in contact with the heat sink plate 42 . In other words, the projection of the chip 30 on the heat sink plate 42 is located within the range of the heat sink plate 42. On the one hand, the contact area between the chip 30 and the heat sink plate 42 can be ensured, and the reliability of heat conduction between the chip 30 and the heat conduction plate can be ensured. On the other hand, the contact area between the heat sink plate 42 and the heat sink plate 11 is much larger than the contact area between the heat sink plate 42 and the chip 30, so that the heat of the chip 30 can be quickly transferred to the heat sink plate 11 through the heat sink plate 42, improving the thermal conductivity of the assembly. 40 thermal efficiency. In this embodiment, the chip 30 can completely overlap with the first boundary layer 41 .

Optionally, the chip heat dissipation structure 100 may further include a heat dissipation fan (not shown in the figure), and the heat dissipation fan is spaced apart from the heat sink 10 . The cooling fan can send air to the radiator 10 to speed up the air flow on the surface of the cooling fins 13 and the cooling plate 11 , and further improve the cooling efficiency of the radiator 10 .

The chip heat dissipation structure 100 provided in the embodiment of the present application is arranged by stacking the first boundary layer 41, the heat sink plate 42 and the second boundary layer 43 in the heat conduction component 40 in sequence, wherein the first boundary layer 41 is located between the heat sink plate 42 and the second boundary layer 43. Between the chips 30, the second boundary layer 43 is located between the heat sink plate 42 and the heat dissipation plate 11, which can not only reduce the thermal resistance of the heat conduction component 40, thereby improve the heat dissipation effect of the chip 30, but also absorb the heat dissipation effect of the chip 30 and the heat dissipation plate 11. The tolerance between them reduces the influence of the tolerance on heat dissipation.

The above descriptions are only part of the embodiments of the application, and are not intended to limit the scope of protection of the application. All equivalent devices or equivalent process transformations made by using the contents of the specification and drawings of the application, or directly or indirectly used in other related All technical fields are equally included in the patent protection scope of the present application.

Claims

A chip heat dissipation structure, characterized in that it comprises:

a radiator, said radiator comprising a radiator plate;

A circuit board, the circuit board is arranged in parallel with the heat dissipation plate at intervals;

a chip, the chip is attached to the surface of the circuit board facing the heat dissipation plate; and

A heat conduction component, the heat conduction component is located between the chip and the heat dissipation plate; wherein the heat conduction component includes a first interface layer, a heat sink plate and a second interface layer stacked in sequence, and the first interface layer is located Between the heat sink plate and the chip, the second boundary layer is located between the heat sink plate and the heat dissipation plate.
The chip heat dissipation structure according to claim 1, wherein the heat conduction assembly further comprises at least one guide piece, one end of each guide piece is fixed on the heat dissipation plate; At least one guide hole, the at least one guide hole is in one-to-one correspondence with the at least one guide piece, and the end of each guide piece away from the heat dissipation plate is passed through the corresponding guide hole, so that the The heat sink plate reciprocates along the guide member.
The chip heat dissipation structure according to claim 2, characterized in that, the heat conduction component further includes a limiting member, and the limiting member is fixed to the end of the guide member away from the heat dissipation plate for limiting the heat dissipation. The distance the sinker moves along the guide.
The chip heat dissipation structure according to claim 3, wherein the second boundary layer is elastic.
The chip heat dissipation structure according to claim 1, wherein the heat conduction assembly further comprises at least one elastic member; one end of each elastic member is fixedly connected to the heat dissipation plate, and the other end is connected to the heat sink plate Fixed connection.
The chip heat dissipation structure according to any one of claims 2-5, characterized in that, the projection of the chip on the heat sink plate is located within the range of the heat sink plate.
The chip heat dissipation structure according to claim 6, characterized in that, the heat sink comprises a heat dissipation plate and a side edge extending from the edge of the heat dissipation plate, and the circuit board is provided with one side surface of the chip against The side edge is away from the side surface of the heat dissipation plate, so that the circuit board and the heat sink form a shielding space; the chip is accommodated in the shielding space.
The chip heat dissipation structure according to claim 7, characterized in that, the chip heat dissipation structure comprises two heat sinks, and the two heat sinks are arranged symmetrically with respect to the circuit board and respectively surround the circuit board with a first The shielded space and the second shielded space.
The chip heat dissipation structure according to claim 1, wherein the heat sink further comprises a plurality of heat dissipation fins, and the plurality of heat dissipation fins are fixed on the surface of the heat dissipation plate away from the circuit board.
The chip heat dissipation structure according to claim 1, wherein the heat sink is made of one or more of aluminum, aluminum alloy, copper, copper alloy, and graphite with high thermal conductivity.
The chip heat dissipation structure according to claim 1, wherein the circuit board comprises a first surface and a second surface opposite to each other; the heat sink comprises a first heat sink and a second heat sink, and the first The radiator abuts against the first surface and encloses a first shielding space with the first surface, and the second radiator abuts against the second surface and encloses a second shielding space with the second surface; The chip includes a first chip and a second chip, the first chip is located on the first surface and accommodated in the first shielding space, and the second chip is located on the second surface and accommodated in the first shielding space Two shielded space.
The chip heat dissipation structure according to claim 11, wherein the first heat sink and the second heat sink are arranged symmetrically with respect to the circuit board.
An electronic device, characterized in that it includes a chip heat dissipation structure, and the chip heat dissipation structure includes:

a radiator, said radiator comprising a radiator plate;

A circuit board, the circuit board is arranged in parallel with the heat dissipation plate at intervals;

a chip, the chip is attached to the surface of the circuit board facing the heat dissipation plate; and

A heat conduction component, the heat conduction component is located between the chip and the heat dissipation plate; wherein the heat conduction component includes a first interface layer, a heat sink plate and a second interface layer stacked in sequence, and the first interface layer is located Between the heat sink plate and the chip, the second boundary layer is located between the heat sink plate and the heat dissipation plate.
The electronic device according to claim 13, wherein the heat conduction assembly further comprises at least one guide piece, one end of each guide piece is fixed on the heat sink plate; A guide hole, the at least one guide hole corresponds to the at least one guide piece one by one, and the end of each guide piece away from the heat dissipation plate is passed through the corresponding guide hole, so that the The heat sink plate reciprocates along the guide.
The electronic device according to claim 14, wherein the heat conduction component further comprises a limiting member, and the limiting member is fixed to an end of the guiding member away from the heat sink, and is used to limit the heat sink The distance the board moves along the guide.
The electronic device according to claim 15, wherein the second boundary layer is elastic.
The electronic device according to claim 13, wherein the heat conduction assembly further comprises at least one elastic member; one end of each elastic member is fixedly connected to the heat dissipation plate, and the other end is fixed to the heat sink plate connect.
The electronic device according to any one of claims 14-17, wherein a projection of the chip on the heat sink is located within a range of the heat sink.
The electronic device according to claim 18, wherein the heat sink includes a heat dissipation plate and a side edge extending from the edge of the heat dissipation plate, and the circuit board is provided with one side surface of the chip against The side edge is away from one side surface of the heat dissipation plate, so that the circuit board and the heat sink form a shielding space; the chip is accommodated in the shielding space.
The electronic device according to claim 19, wherein the chip heat dissipation structure includes two heat sinks, and the two heat sinks are arranged symmetrically with respect to the circuit board and respectively surround the circuit board with a first shield space and the second shielded space.