WO2023093211A1

WO2023093211A1 - Chip heat dissipation structure and electronic device

Info

Publication number: WO2023093211A1
Application number: PCT/CN2022/117640
Authority: WO
Inventors: 胡院林
Original assignee: Oppo广东移动通信有限公司
Priority date: 2021-11-26
Filing date: 2022-09-07
Publication date: 2023-06-01
Also published as: CN217116715U

Abstract

The present application relates to a chip heat dissipation structure and an electronic device. The chip heat dissipation structure comprises a circuit board, a heat dissipation member, a heat conduction assembly, and a chip. The circuit board comprises a mainboard, a first bonding pad and a second bonding pad; the first bonding pad and the second bonding pad are respectively located on the surfaces of the two opposite sides of the mainboard, and the mainboard is provided with heat via holes communicated with the first bonding pad and the second bonding pad. The heat conduction assembly comprises a heat conduction sheet and an interface layer which are stacked, and the surface of the heat conduction sheet deviating from the interface layer is connected to the second bonding pad. The heat dissipation member comprises a heat dissipation plate, the heat dissipation plate and the mainboard are arranged in parallel at an interval, and the heat dissipation plate is attached to the surface of the interface layer deviating from the heat conduction sheet. The chip is fixed on the first bonding pad, and is used for transferring heat generated by the chip to the heat dissipation plate through the first bonding pad, the heat via holes, the second bonding pad, the heat conduction sheet and the interface layer in sequence. By means of the mode, direct contact between the chip and the heat dissipation plate can be avoided, and shielding processing can be conveniently performed on the chip.

Description

Chip cooling structure and electronic equipment

【Technical field】

The present application relates to the technical field of electronic equipment, in particular to a chip heat dissipation structure and electronic equipment.

【Background technique】

With the advent of the 5G communication era, the power consumption density of electronic devices such as routers has increased rapidly, leading to severe over-temperature risks for the operating temperature of related electronic devices. In order to quickly transfer the heat on the chip on the circuit board to the heat sink, usually the chip is directly attached to the heat sink. However, the high-order harmonics generated when the chip is working will be conducted to the outside through the heat sink, thereby causing strong interference to the antenna.

【Content of invention】

The present application provides a chip heat dissipation structure and electronic equipment, which can solve the problem that the high-order harmonics generated when the chip is in operation will be transmitted to the outside through the heat sink.

The application provides a chip heat dissipation structure, including:

A circuit board, the circuit board includes a main board, a first pad and a second pad, the first pad and the second pad are respectively located on opposite sides of the main board, and the main board is provided with There are thermal vias connecting the first pad and the second pad;

A heat sink, the heat sink includes a heat sink, the heat sink is arranged parallel to the main board at intervals, and the second pad is located between the heat sink and the main board;

A heat conduction component, the heat conduction component includes a heat conduction sheet and an interface layer arranged in layers, the surface of the heat conduction sheet facing away from the interface layer is connected to the second pad, and the surface of the interface layer away from the heat conduction sheet is connected to the second pad. bonding of the above heat sink; and

chip, the chip is fixed on the first bonding pad, and is used to sequentially pass the heat generated by the chip through the first bonding pad, the thermal via, the second bonding pad, and the heat conducting sheet and the interface layer are transferred to the heat dissipation plate.

【Description of drawings】

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, other drawings can also be obtained based on these drawings without creative effort.

FIG. 1 is a schematic perspective view of an electronic device provided by an embodiment of the present application;

Fig. 2 is a schematic cross-sectional view of the electronic device shown in Fig. 1 along the direction A-A;

3 is a schematic cross-sectional view of a chip heat dissipation structure in an electronic device in the related art;

Fig. 4 is a partially enlarged view of area B shown in Fig. 3;

FIG. 5 is a perspective schematic diagram of the heat dissipation structure of the chip in the electronic device shown in FIG. 2;

6 is a schematic cross-sectional view of the chip heat dissipation structure shown in FIG. 5 along the direction C-C;

Fig. 7 is a partial enlarged view of area D shown in Fig. 6;

FIG. 8 is a schematic diagram of a modified interface of the chip heat dissipation structure shown in FIG. 5;

Fig. 9 is a partially enlarged view of area E shown in Fig. 6;

FIG. 10 is a schematic diagram of another deformation interface of the chip heat dissipation structure shown in FIG. 5;

Fig. 11 is a partially enlarged view of the region F shown in Fig. 10;

FIG. 12 is a schematic diagram of another deformation interface of the chip heat dissipation structure shown in FIG. 5;

Fig. 13 is a partially enlarged view of area G shown in Fig. 10;

Fig. 14 is a schematic perspective view of another embodiment of the heat dissipation structure of the chip in the electronic device shown in Fig. 2;

15 is a schematic cross-sectional view of the chip heat dissipation structure shown in FIG. 14 along the direction H-H;

FIG. 16 is a partially enlarged view of area I shown in FIG. 15 .

【Detailed ways】

An embodiment of the present application provides a chip heat dissipation structure, including a circuit board, a heat sink, a heat-conducting component, and a chip. The circuit board includes a main board, a first pad, and a second pad. On the opposite sides of the surface, the main board is provided with thermal vias connecting the first pad and the second pad; the heat conduction component includes a stacked thermally conductive sheet and an interface layer, and the surface of the thermally conductive sheet facing away from the interface layer is connected to the second pad. connection; the heat sink includes a heat sink, the heat sink is arranged parallel to the main board at intervals, and the heat sink and the surface of the interface layer away from the heat conduction sheet are bonded; the chip is fixed on the first pad, and the heat generated by the chip is sequentially passed through the first pad. The welding pad, the thermal via, the second welding pad, the heat conducting sheet and the interface layer are transferred to the heat dissipation plate.

In some embodiments, the chip heat dissipation structure includes a first shielding case, the first shielding case includes a first cover plate and a first side edge extending from the edge of the first cover plate, the first side Along the end away from the first cover plate, abut against the surface of the main board on which the first pad is disposed and enclose a first shielding space with the main board, and the chip is accommodated in the first shielding space.

In some embodiments, the first cover plate is spaced apart from the chip, and the first side edge is spaced from an edge of the chip.

In some embodiments, the chip heat dissipation structure further includes a second shielding case, the second shielding case includes a second cover plate and a second side edge extending from the edge of the second cover plate, the second The end of the side edge away from the second cover plate abuts against the surface of the main board on which the second pad is set and encloses a second shielding space with the main board; the chip on the second cover plate The projection is located within the range of the second cover plate; the interface layer includes a first interface layer and a second interface layer stacked, and the second cover plate is sandwiched between the first interface layer and the second interface layer between the boundaries.

In some embodiments, an end of the second side edge facing away from the second cover plate is aligned with an end of the first side edge facing away from the first cover plate.

In some embodiments, the chip heat dissipation structure includes a second shielding case, the second shielding case includes a second cover plate and a second side edge extending from the edge of the second cover plate, the second side The surface of the second pad is set against the main board along the end away from the second cover and forms a second shielding space with the main board; the projection of the chip on the second cover Located within the range of the second cover plate; the interface layer includes a first interface layer and a second interface layer stacked, and the second cover plate is sandwiched between the first interface layer and the second interface layer between layers.

In some embodiments, the material of the heat conducting sheet is one or more of aluminum, aluminum alloy, copper, aluminum alloy, graphite, and graphene.

In some embodiments, the thermal conductivity of the thermal conductive sheet is greater than that of the interface layer.

In some embodiments, the heat dissipation element further includes a plurality of heat dissipation fins fixed on the heat dissipation plate, and the heat dissipation fins are fixed on a surface of the heat dissipation plate away from the circuit board.

In some embodiments, the thermal via is a columnar hole, and the inner surface of the thermal via is provided with a metal layer.

In some embodiments, the motherboard further includes a thermally conductive filler, and the thermally conductive filler is accommodated in the thermal via.

The embodiment of the present application also provides an electronic device, including the chip heat dissipation structure. The heat dissipation structure of the chip includes a circuit board, a heat sink, a heat-conducting component and a chip. The circuit board includes a main board, a first pad and a second pad, and the first pad and the second pad are respectively located on opposite sides of the main board. There are thermal vias connecting the first pad and the second pad; the heat conduction component includes a thermally conductive sheet and an interface layer arranged in layers, and the surface of the thermally conductive sheet facing away from the interface layer is connected to the second pad; the heat sink includes a heat sink, The heat dissipation plate is arranged parallel to the main board at intervals, and the heat dissipation plate and the interface layer are bonded to the surface away from the heat conduction sheet; the chip is fixed on the first pad, which is used to sequentially pass the heat generated by the chip through the first pad, the thermal via, and the second pad. The second pad, heat conduction sheet and interface layer are transferred to the heat sink

The application will be described in further detail below in conjunction with the accompanying drawings and embodiments. In particular, the following examples are only used to illustrate the present application, but not to limit the scope of the present application. Likewise, the following embodiments are only some of the embodiments of the present application but not all of them, and all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present application.

Reference herein to an "embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The occurrences of this phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is understood explicitly and implicitly by those skilled in the art that the embodiments described herein can be combined with other embodiments.

Please refer to FIG. 1 . FIG. 1 is a schematic perspective view of an electronic device provided by an embodiment of the present application. This application provides an electronic device 1000 . Specifically, the electronic device 1000 may be any one of various types of computer system devices that are mobile or portable and perform wireless communication (only one form is shown as an example in FIG. 1 ). Specifically, the electronic device 1000 can be a mobile phone or smart phone (for example, an iPhone TM, an Android TM based phone), a portable game device (for example Nintendo DS TM, PlayStation Portable TM, Gameboy Advance TM, iPhone TM), a laptop Computers, PDAs, portable Internet devices, music players and data storage devices, other handheld devices, and such as headphones, etc., the electronic device 1000 can also be used for other wearable devices that need to be charged (for example, such as electronic bracelets, electronic Head-mounted devices (HMDs) such as necklaces, electronic devices, or smart watches).

The electronic device 1000 can also be any one of a plurality of electronic devices, including but not limited to Customer Premise Equipment (CPE), routers, cellular phones, smart phones, other wireless communication devices, personal digital Assistants, Audio Players, Other Media Players, Music Recorders, Video Recorders, Other Media Recorders, Radios, Medical Equipment, Vehicle Transportation Instruments, Calculators, Programmable Remote Controls, Pagers, Laptop Computers, Desktop Computers, Printers , netbook computers, personal digital assistants (PDAs), portable multimedia players (PMPs), Moving Picture Experts Group (MPEG-1 or MPEG-2) audio layer 3 (MP3) players, portable medical devices, and digital cameras and combinations thereof and other equipment.

In some cases, the electronic device 1000 may perform various functions (eg, play music, display videos, store pictures, and receive and send phone calls). Electronic device 1000 may be a device such as a cellular phone, media player, other handheld device, wrist watch device, pendant device, earpiece device, or other compact portable device, if desired.

Please refer to FIG. 2 together. FIG. 2 is a schematic cross-sectional view of the electronic device shown in FIG. 1 along the direction A-A. The electronic device 1000 may include a chip cooling structure 100 and a casing 200 , the casing 200 accommodates the chip cooling structure 100 and is connected to the chip cooling structure 100 , so that the chip cooling structure 100 and the casing 200 are stably connected.

In order to prevent the integrated circuit signal inside the chip of 5G CPE, 5G router, edge computing and other products from interfering with the antenna, resulting in product data traffic (cellular, WIFI) failing to meet the design requirements, it is necessary to shield the signal of the chip. However, for electronic equipment that integrates communication and computing, it consumes a lot of power and dissipates heat, and the requirement for chip shielding increases the difficulty of chip heat dissipation, which poses a great challenge to the design of chip heat dissipation solutions.

Please refer to FIG. 3 and FIG. 4 , FIG. 3 is a schematic cross-sectional view of a heat dissipation structure of a chip in an electronic device in the related art, and FIG. 4 is a partially enlarged view of area B shown in FIG. 3 . In the related art, the chip 603 heat dissipation structure 600 generally includes a circuit board 601 , a heat dissipation element 602 , a chip 603 , an interface layer 604 and a shield 605 . Wherein, the heat dissipation element 602 includes a heat dissipation plate 6021 , and the heat dissipation plate 6021 is arranged in parallel with the circuit board 601 at intervals. The chip 603 is fixed on the circuit board 601 and located between the circuit board 601 and the cooling plate 6021 . The interface layer 604 is located between the chip 603 and the heat dissipation plate 6021, wherein the interface layer 604 includes a first interface layer 6041 and a second interface layer 6042 stacked, the first interface layer 6041 is attached to the chip 603, and the second interface layer 6042 It is attached to the heat sink 6021 to eliminate the gap tolerance between the chip 603 and the heat sink 6021 and transfer the heat generated by the chip 603 . The shielding case 605 includes a shielding plate 6051 and a shielding edge 6052 extending from the edge of the shielding plate 6051. The shielding plate 6051 is located between the chip 603 and the heat sink 6021 and sandwiched between the first boundary layer 6041 and the second boundary layer 6042. The end of the shielding edge 6052 away from the shielding plate 6051 abuts against the circuit board 601 and surrounds the circuit board 601 to form a shielding space 6050 for shielding the higher harmonics generated by the chip 603 during operation.

The heat generated by the chip 603 is exchanged with the heat dissipation plate 6021 through the first boundary layer 6041 , the shielding plate 6051 , the second boundary layer 6042 and the cooling plate 6021 in sequence. However, the shielding case 605 is restricted by the height of other components on the circuit board 601 , and its height is usually greater than 1.5 mm, which makes the first boundary layer 6041 between the chip 603 and the shielding plate 6051 thicker. And the thermal conductivity of common interface layer 604 materials is generally low (usually 3-8W/K.m), and the higher the thermal conductivity, the greater the material cost, so that the thermal resistance of the first interface layer 6041 is usually larger, affecting the chip 603 cooling efficiency. In addition, the higher harmonics generated when the chip 603 is working can also be transmitted to the heat sink through the first boundary layer 6041 , the shielding plate 6051 , and the second boundary layer 6042 , affecting the shielding effect of the shielding case 605 .

Please refer to FIGS. 5 to 7. FIG. 5 is a perspective view of the heat dissipation structure of the chip in the electronic device shown in FIG. 2. FIG. 6 is a schematic cross-sectional view of the heat dissipation structure of the chip shown in FIG. 5 along the direction C-C. A partial enlargement of the region D shown. The embodiment of the present application provides a chip heat dissipation structure 100 , which may include a circuit board 10 , a heat dissipation element 20 , a heat conducting component 30 and a chip 40 .

Wherein, the gap between the circuit board 10 and the heat sink 20 is arranged, the heat conduction component 30 is located between the circuit board 10 and the heat sink 20 to make the circuit board 10 and the heat sink 20 fully contact and perform heat exchange, and the chip 40 is located on the circuit board 10 away from the heat dissipation On one side of the component 20, the heat generated by the chip 40 can be transferred to the heat sink through the circuit board 10 and the heat conducting component 30, so as to realize the heat dissipation of the chip 40. In other words, the chip 40, the circuit board 10, the heat conducting component 30, and the heat sink 20 are sequentially stacked. Since the chip 40 is arranged on the side of the circuit board 10 away from the heat sink 21, direct contact between the chip 40 and the heat sink 21 is avoided, thereby preventing the chip 40 from being in direct contact with the heat sink 21. The higher harmonics generated by the work are transmitted to the outside through the heat sink 20 .

Specifically, the circuit board 10 includes a main board 11, a first pad 12 and a second pad 13, wherein the first pad 12 and the second pad 13 are respectively located on opposite sides of the main board 11, and the main board 11 is provided with The thermal via 110 communicating with the first pad 12 and the second pad 13 is used to enable heat exchange between the first pad 12 and the second pad 13 . The heat sink 20 includes a heat sink 21, the heat sink 21 is arranged parallel to the main board 11 at intervals, and the second pad 13 is located between the heat sink 21 and the main board 11, that is, the second pad 13 is arranged on the side of the main board 11 facing the heat sink 21 side. The heat conduction assembly 30 includes a heat conduction sheet 31 and an interface layer 32 arranged in layers. The surface of the heat conduction sheet 31 away from the interface layer 32 is connected to the second pad 13, and the surface of the interface layer 32 away from the heat conduction sheet 31 is bonded to the heat dissipation plate 21 for The heat of the second pad 13 is transferred to the heat sink 21 . The chip 40 is fixed on the first pad 12, and the heat generated by the chip 40 is transmitted to the heat dissipation plate 21 through the first pad 12, the thermal via 110, the second pad 13, the heat conducting sheet 31 and the interface layer 32 in sequence, realizing Cooling of chip 40 . Through the above method, on the one hand, the direct contact of the chip 40 with the heat sink 20 can be avoided, and the high-order harmonics generated when the chip 40 is working can be prevented from being transmitted to the outside through the heat sink 20; deal with.

It should be noted that the terms "first", "second", and "third" in this application are only used for descriptive purposes, and should not be understood as indicating or implying relative importance or implicitly indicating the indicated technical features. quantity. Thus, features defined as "first", "second", and "third" may explicitly or implicitly include at least one of these features. In the description of the present application, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

Specifically, the motherboard 11 may include a first surface 111 and a second surface 112 disposed opposite to each other, and the second surface 112 faces the heat sink 21 . Wherein, the first pad 12 is located on the first surface 111 , and the second pad 13 is located on the second surface 112 . The thermal via 110 runs through the first surface 111 and the second surface 112 of the motherboard 11 , and is used for communicating the first pad 12 with the second pad 13 . Wherein, the thermal via 110 may be in the form of a ring-shaped columnar hole, and the inner surface is plated with a metal layer such as copper, so that the thermal via 110 has good thermal conductivity. The thermal via 110 can be plugged, such as filled with resin, metal and other materials, on the one hand to improve the thermal conductivity of the thermal via 110, and on the other hand to prevent tin flow and swelling during the soldering process. In other embodiments, the thermal vias 110 can also be processed without plugs, that is, the thermal vias 110 are filled with air, which can reduce the processing steps of the circuit board. However, when the thermal via 110 is treated as a non-plugged hole, it needs to be painted with ink according to the actual situation, so as to avoid total tin flow and swelling during the soldering process.

Optionally, the heat dissipation element 20 also includes a plurality of heat dissipation fins 22, and the plurality of heat dissipation fins 22 are fixed on the surface of the heat dissipation plate 21 away from the circuit board 10, so as to increase the heat dissipation area of the heat dissipation element 20 and improve the heat dissipation of the heat dissipation element 20. efficiency.

Wherein, the heat dissipation plate 21 and the heat dissipation fins 22 of the heat dissipation element 20 are made of high thermal conductivity materials to improve the heat conduction performance of the heat dissipation element 20 . The material of the heat sink 20 can be one or more of aluminum and aluminum alloy, copper and copper alloy, and graphite with high thermal conductivity, which is not specifically limited here. In other words, the heat sink 20 may be a metal heat sink 20 , a graphite heat sink 20 , a high thermal conductivity polymer heat sink 20 and the like.

The heat conduction component 30 includes a heat conduction sheet 31 and an interface layer 32 arranged in layers. The surface of the heat conduction sheet 31 facing away from the interface layer 32 is connected to the second pad 13 for realizing heat conduction between the heat conduction sheet 31 and the second pad 13 . Wherein, the thermal conductivity of the heat conduction sheet 31 is greater than the thermal conductivity of the interface layer 32 . The surface of the interface layer 32 facing away from the heat conducting sheet 31 is bonded to the heat dissipation plate 21 for achieving heat conduction between the interface layer 32 and the heat dissipation plate 21 . That is, the heat conduction component 30 is located between the second pad 13 and the heat dissipation plate 21 , and is used to conduct heat between the second pad 13 and the heat dissipation plate 21 .

It can be understood that the heat conduction component 30 is located between the second pad 13 and the heat dissipation plate 21, on the one hand, it is used to eliminate the tolerance between the second pad 13 and the heat dissipation plate 21, on the other hand, it is used for the second pad 13 and the heat dissipation plate 21. Heat transfer between the pad 13 and the heat sink 21 . The heat conduction component 30 in this embodiment is stacked with the heat conduction sheet 31 and the interface layer 32, which can not only eliminate the tolerance between the second pad 13 and the heat dissipation plate 21, but also greatly reduce the thickness of the interface layer 32, so that heat conduction The thermal resistance of the component 30 is reduced, thereby improving the heat transfer efficiency between the second pad 13 and the heat sink 21 .

Specifically, the connection between the heat conduction sheet 31 and the second pad 13 can be done by soldering, or can be connected and fixed by adhesive bonding, which is not specifically limited here. The heat conduction sheet 31 can have better temperature equalization effect, and its temperature does not change with the change of the temperature transmitted to its body. For example, the heat conduction sheet 31 can be one of vapor chamber chamber (VC), diamond, diamond copper, pure copper, and high thermal conductivity graphite, which is not specifically limited here.

The interface layer 32 is located between the heat conduction sheet 31 and the heat dissipation plate 21 , and is used to make the heat conduction sheet 31 fully contact with the heat dissipation plate 21 , thereby reducing the basic thermal resistance between the heat conduction sheet 31 and the heat dissipation plate 21 . It can be understood that the thickness of the interface layer 32 is usually very thin (less than 0.2 mm), which is used to avoid excessive thickness of the interface layer 32 and excessive thermal resistance. Specifically, the interface layer 32 may be one or more of thinner materials such as thermally conductive silicone grease, thermally conductive gel, and graphene film.

Please refer to FIG. 8 and FIG. 9 , FIG. 8 is a schematic interface diagram of a modification of the chip heat dissipation structure shown in FIG. 5 , and FIG. 9 is a partial enlarged view of area E shown in FIG. 6 . The chip heat dissipation structure 100 may further include a first shielding case 50 . The first shielding case 50 may include a first cover plate 51 and a first side edge 52 extending from the edge of the first cover plate 51. The surface of a pad 12, that is, the first shielding cover 50 is covered on the first surface 111 and forms a first shielding space 501 with the first surface 111, wherein the first shielding space 501 accommodates the chip 40 for shielding The higher harmonics generated when the chip 40 works.

Further, the first cover plate 51 is spaced from the chip 40, and the edge gap between the first side edge 52 and the chip 40 is set, so that the first shielding cover 50 does not contact the chip 40, and reduces the high-order harmonics generated by the chip 40 The possibility of leakage through the first shielding cover 50 .

Please refer to FIG. 10 and FIG. 11 , FIG. 10 is a schematic interface diagram of another modification of the chip heat dissipation structure shown in FIG. 5 , and FIG. 11 is a partially enlarged view of area F shown in FIG. 10 . Optionally, the chip heat dissipation structure 100 may further include a second shielding case 60 . The second shielding case 60 may include a second cover plate 61 and a second side edge extending from the edge of the second cover plate 61, and the end of the second side edge away from the second cover plate 61 is placed against the circuit board 10 to form a second The surface of the pad 13 , that is, the second shielding case 60 is covered on the second surface 112 and is surrounded by the second surface 112 to form a second shielding space 601 . Wherein, the projection of the chip 40 on the second cover plate 61 is located within the range of the second chip 40 .

Optionally, the interface layer 32 may include a first interface layer 321 and a second interface layer 322 arranged in layers, wherein the surface of the first interface layer 321 away from the second interface layer 322 is bonded and fixed to the heat dissipation plate 21, and the second interface layer The surface of 322 away from the first boundary layer 321 is attached to and fixed to the heat conducting sheet 31 . The second cover plate 61 is located between the first interface layer 321 and the second interface layer 322 , that is, the second cover plate 61 is sandwiched between the interface layers 32 . Wherein the first boundary layer 321 is located between the second cover plate 61 and the heat dissipation plate 21, for making the second cover plate 61 fully contact with the heat dissipation plate 21; the second boundary layer is located between the second cover plate 61 and the heat conduction sheet 31 , used to make the second cover plate 61 fully contact with the heat conduction sheet, and then make the heat conduction sheet 31 fully contact with the heat dissipation plate 21 .

Further, the end of the second side edge away from the second cover plate 61 is aligned with the end of the first side edge 52 away from the first cover plate 51 , so that the first shielding space 501 and the second shielding space 601 are disposed correspondingly. Among them, the first shielding space 501 accommodates the chip 40, which is used to shield the high-order harmonics generated when the chip 40 works; The higher harmonics passing through the self-heating via 110 further improve the shielding performance of the chip 40 .

In other embodiments, the projection of the second cover plate 61 on the first cover plate 51 may be within the range of the first cover plate 51, or the projection of the second cover plate 61 on the first cover plate 51 may completely cover the first cover plate 51. A cover plate 51 is not specifically limited here.

Wherein, the second cover plate 61 is located between the first boundary layer 321 and the second boundary layer 322, and the first boundary layer 321 is located between the heat dissipation plate 21 and the second cover plate 61, for making the heat dissipation plate 21 and the second The cover plate 61 is in sufficient contact to improve the heat conduction efficiency between the heat dissipation plate 21 and the second cover plate 61 . The second boundary layer 322 is located between the second cover plate 61 and the heat conduction sheet 31 , and is used to fully contact the second cover plate 61 with the heat conduction sheet 31 to improve the heat conduction efficiency between the heat conduction sheet 31 and the second cover plate 61 .

Please refer to FIG. 12 and FIG. 13 , FIG. 12 is a schematic interface diagram of another modification of the chip heat dissipation structure shown in FIG. 5 , and FIG. 13 is a partially enlarged view of region G shown in FIG. 10 . The chip heat dissipation structure 100 may not only include the circuit board 10 , the heat dissipation element 20 , the heat conduction component 30 and the chip 40 , but may also include the second shielding case 60 . The second shielding case 60 may include a second cover plate 61 and a second side edge extending from the edge of the second cover plate 61, and the end of the second side edge away from the second cover plate 61 is placed against the circuit board 10 to form a second The surface of the pad 13 , that is, the second shielding case 60 is covered on the second surface 112 and is surrounded by the second surface 112 to form a second shielding space 601 . Wherein, the projection of the chip 40 on the second cover plate 61 is located within the range of the second chip 40 .

Please refer to FIG. 14 to FIG. 16. FIG. 14 is a perspective view of another embodiment of the chip heat dissipation structure in the electronic device shown in FIG. 2. FIG. 15 is a schematic cross-sectional view of the chip heat dissipation structure shown in FIG. 14 along the direction H-H. is a partially enlarged view of the region I shown in FIG. 14 . In the chip heat dissipation structure 100 provided in the embodiment of the present application, by arranging the chip 40 on the side of the circuit board 10 away from the heat dissipation plate 21, it is possible to avoid direct contact between the chip 40 and the heat dissipation plate 21, and avoid high-order harmonics generated when the chip 40 is working. The wave is conducted to the outside through the heat sink 20 , and on the other hand, the chip 40 is provided separately, which is convenient for shielding the chip 40 . In addition, the heat conduction sheet 31 and the interface layer 32 of the heat conduction component 30 are stacked, which can eliminate the tolerance between the second pad 13 and the heat dissipation plate 21, and greatly reduce the thickness of the interface layer 32, so that the thermal conductivity of the heat conduction component 30 The resistance value decreases, thereby improving the heat transfer efficiency between the second pad 13 and the heat dissipation plate 21 .

The embodiment of the present application also provides a chip heat dissipation structure 300, which may include a circuit board 10, a heat sink 20, a heat conduction component 30, at least one chip 40 and an interface material 70, and at least one chip 40 may include a first chip 41 and a second chip 42.

Specifically, the circuit board 10 includes a main board 11, a first pad 12 and a second pad 13, wherein the first pad 12 and the second pad 13 are respectively located on opposite sides of the main board 11, and the main board 11 is provided with The thermal via 110 connecting the first pad 12 and the second pad 13 is used to enable heat exchange between the first pad 12 and the second pad 13 . The heat sink 20 includes a heat sink 21 , the heat sink 21 is arranged parallel to the main board 11 at intervals, and the second welding pad 13 is located between the heat sink 21 and the main board 11 . The heat conduction assembly 30 includes a heat conduction sheet 31 and an interface layer 32 arranged in layers. The surface of the heat conduction sheet 31 away from the interface layer 32 is connected to the second pad 13, and the surface of the interface layer 32 away from the heat conduction sheet 31 is bonded to the heat dissipation plate 21 for The heat of the second pad 13 is transferred to the heat sink 21 .

Further, the main board 11 may include a first surface 111 and a second surface 112 opposite to each other, and the second surface 112 faces the circuit board 10 . Wherein, the first pad 12 is located on the first surface 111 , and the second pad 13 is located on the second surface 112 . The thermal via 110 runs through the first surface 111 and the second surface 112 of the motherboard 11 , and is used for communicating the first pad 12 with the second pad 13 .

The first chip 41 is fixed on the first pad 12, and the heat generated by the first chip 41 is transmitted to the heat dissipation plate through the first pad 12, the thermal via 110, the second pad 13, the heat conducting sheet 31 and the interface layer 32 in sequence. 21, the cooling of the first chip 41 is realized. Through the above method, on the one hand, the first chip 41 can be prevented from directly contacting the heat sink 20, and the high-order harmonics generated when the first chip 41 is working can be prevented from being transmitted to the outside through the heat sink 20; It is convenient to perform shielding treatment on the first chip 41 .

The second chip 42 is arranged on the second surface 112 and away from the second pad 13, and the interface material 70 is located between the second chip 42 and the heat dissipation plate 21, which is used to eliminate the interference between the second chip 42 and the heat dissipation plate 21 on the one hand. On the other hand, the second chip 42 can fully contact the heat dissipation plate 21 to improve the heat conduction efficiency between the second chip 42 and the heat dissipation plate 21 . The second chip 42 is disposed on the side of the circuit board 10 facing the heat dissipation plate 21 , so that the first chip 41 and the second chip 42 are independent from each other and do not interfere with each other, so as to meet heat dissipation requirements of various chips 40 .

In the chip heat dissipation structure 300 provided in the embodiment of the present application, by arranging the first chip 41 on the side of the circuit board 10 away from the heat dissipation plate 21, it is possible to avoid direct contact between the first chip 41 and the heat dissipation plate 21, and to prevent the first chip 41 from working. The high-order harmonics generated at the time are conducted to the outside through the heat sink 20, and on the other hand, the first chip 41 is provided separately, which is convenient for shielding the first chip 41. The heat conduction sheet 31 and the interface layer 32 of the heat conduction assembly 30 are arranged in layers, which can not only eliminate the tolerance between the second pad 13 and the heat dissipation plate 21, but also greatly reduce the thickness of the interface layer 32, so that the thermal resistance of the heat conduction assembly 30 The heat transfer efficiency between the second pad 13 and the heat sink 21 is further improved. In addition, the second chip 42 is disposed on the side of the circuit board 10 facing the heat dissipation plate 21 , so that the first chip 41 and the second chip 42 are independent from each other and do not interfere with each other, so as to meet heat dissipation requirements of various chips 40 .

The above descriptions are only part of the embodiments of the application, and are not intended to limit the scope of protection of the application. All equivalent devices or equivalent process transformations made by using the contents of the specification and drawings of the application, or directly or indirectly used in other related All technical fields are equally included in the patent protection scope of the present application.

Claims

A chip heat dissipation structure, characterized in that it comprises:

A circuit board, the circuit board includes a main board, a first pad and a second pad, the first pad and the second pad are respectively located on opposite sides of the main board, and the main board is provided with There are thermal vias connecting the first pad and the second pad;

a heat conduction component, the heat conduction component includes a heat conduction sheet and an interface layer arranged in layers, and the surface of the heat conduction sheet away from the interface layer is connected to the second pad;

A heat sink, the heat sink includes a heat sink, the heat sink is arranged parallel to the main board at intervals, and the heat sink is bonded to the surface of the interface layer away from the heat conduction sheet; and

chip, the chip is fixed on the first bonding pad, and is used to sequentially pass the heat generated by the chip through the first bonding pad, the thermal via, the second bonding pad, and the heat conducting sheet and the interface layer are transferred to the heat dissipation plate.
The chip heat dissipation structure according to claim 1, wherein the chip heat dissipation structure comprises a first shield, and the first shield comprises a first cover plate and a first cover plate extending from the edge of the first cover plate. One side edge, the end of the first side edge away from the first cover plate abuts against the surface of the main board on which the first pad is arranged and forms a first shielding space with the main board, and the chip accommodates in the first shielded space.
The chip heat dissipation structure according to claim 2, wherein the first cover plate is arranged at a distance from the chip, and the first side edge is arranged in a gap with the edge of the chip.
The chip heat dissipation structure according to any one of claims 2-3, characterized in that, the chip heat dissipation structure further comprises a second shield, the second shield comprises a second cover plate and The second side edge formed by extending the edge of the board, the end of the second side edge away from the second cover plate abuts against the surface of the main board on which the second pad is arranged and forms a second shield with the main board Space; the projection of the chip on the second cover plate is located within the range of the second cover plate; the interface layer includes a first interface layer and a second interface layer stacked, and the second cover plate Interposed between the first boundary layer and the second boundary layer.
The chip heat dissipation structure according to claim 4, wherein an end of the second side edge away from the second cover plate is aligned with an end of the first side edge away from the first cover plate.
The chip heat dissipation structure according to claim 1, characterized in that the chip heat dissipation structure comprises a second shielding case, and the second shielding case comprises a second cover plate and a second cover plate extending from the edge of the second cover plate. Two side edges, the end of the second side edge away from the second cover plate abuts against the surface of the main board on which the second pad is set and encloses a second shielding space with the main board; the chip is in the The projection on the second cover plate is located within the range of the second cover plate; the interface layer includes a first interface layer and a second interface layer stacked, and the second cover plate is interposed between the first interface layer and the second interface layer. Between the first boundary layer and the second boundary layer.
The chip heat dissipation structure according to claim 1, wherein the material of the heat conducting sheet is one or more of aluminum, aluminum alloy, copper, aluminum alloy, graphite, and graphene.
The chip heat dissipation structure according to claim 1, wherein the thermal conductivity of the heat conducting sheet is greater than that of the interface layer.
The chip heat dissipation structure according to claim 1, wherein the heat dissipation member further comprises a plurality of heat dissipation fins fixed on the heat dissipation plate, and the heat dissipation fins are fixed on the heat dissipation plate away from the circuit surface of the board.
The chip heat dissipation structure according to claim 1, wherein the thermal via is a columnar hole, and a metal layer is provided on an inner surface of the thermal via.
The chip heat dissipation structure according to claim 10, wherein the main board further comprises a thermally conductive filler, and the thermally conductive filler is accommodated in the thermal via hole.
An electronic device, characterized in that it includes the chip heat dissipation structure, and the chip heat dissipation structure includes:

A circuit board, the circuit board includes a main board, a first pad and a second pad, the first pad and the second pad are respectively located on opposite sides of the main board, and the main board is provided with There are thermal vias connecting the first pad and the second pad;

a heat conduction component, the heat conduction component includes a heat conduction sheet and an interface layer arranged in layers, and the surface of the heat conduction sheet away from the interface layer is connected to the second pad;

A heat sink, the heat sink includes a heat sink, the heat sink is arranged parallel to the main board at intervals, and the heat sink is bonded to the surface of the interface layer away from the heat conduction sheet; and

chip, the chip is fixed on the first bonding pad, and is used to sequentially pass the heat generated by the chip through the first bonding pad, the thermal via, the second bonding pad, and the heat conducting sheet and the interface layer are transferred to the heat dissipation plate.
The chip heat dissipation structure according to claim 12, characterized in that the chip heat dissipation structure comprises a first shielding case, and the first shielding case comprises a first cover plate and a first cover plate extending from the edge of the first cover plate. One side edge, the end of the first side edge away from the first cover plate abuts against the surface of the main board on which the first pad is arranged and forms a first shielding space with the main board, and the chip accommodates in the first shielded space.
The chip heat dissipation structure according to claim 13, wherein the first cover plate is spaced from the chip, and the first side edge is spaced from an edge of the chip.
The chip heat dissipation structure according to any one of claims 13-14, characterized in that, the chip heat dissipation structure further comprises a second shield, and the second shield comprises a second cover plate and a second cover from the second cover. The second side edge formed by extending the edge of the board, the end of the second side edge away from the second cover plate abuts against the surface of the main board on which the second pad is arranged and forms a second shield with the main board Space; the projection of the chip on the second cover plate is located within the range of the second cover plate; the interface layer includes a first interface layer and a second interface layer stacked, and the second cover plate Interposed between the first boundary layer and the second boundary layer.
The chip heat dissipation structure according to claim 15, wherein an end of the second side edge away from the second cover plate is aligned with an end of the first side edge away from the first cover plate.
The chip heat dissipation structure according to claim 12, characterized in that the chip heat dissipation structure comprises a second shielding case, and the second shielding case comprises a second cover plate and a second cover plate extending from the edge of the second cover plate. Two side edges, the end of the second side edge away from the second cover plate abuts against the surface of the main board on which the second pad is set and encloses a second shielding space with the main board; the chip is in the The projection on the second cover plate is located within the range of the second cover plate; the interface layer includes a first interface layer and a second interface layer stacked, and the second cover plate is interposed between the first interface layer and the second interface layer. Between the first boundary layer and the second boundary layer.
The chip heat dissipation structure according to claim 12, characterized in that, the thermal conductivity of the heat conducting sheet is greater than that of the interface layer.
The chip heat dissipation structure according to claim 12, wherein the heat dissipation member further comprises a plurality of heat dissipation fins fixed on the heat dissipation plate, and the heat dissipation fins are fixed on the heat dissipation plate away from the circuit surface of the board.
The chip heat dissipation structure according to claim 12, wherein the thermal via is a columnar hole, and a metal layer is provided on an inner surface of the thermal via.