CN212648227U - Packaging heat dissipation cover and chip packaging structure - Google Patents

Packaging heat dissipation cover and chip packaging structure Download PDF

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Publication number
CN212648227U
CN212648227U CN202021050347.4U CN202021050347U CN212648227U CN 212648227 U CN212648227 U CN 212648227U CN 202021050347 U CN202021050347 U CN 202021050347U CN 212648227 U CN212648227 U CN 212648227U
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heat
conducting medium
interface
chip
heat dissipation
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华菲
金英镇
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Ningbo Shijie Electronic Co ltd
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Ningbo Shijie Electronic Co ltd
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Abstract

The utility model provides a packaging heat dissipation cover and a chip packaging structure, relating to the technical field of chip packaging structures, comprising a heat dissipation cover body and a first interface heat-conducting medium; because the bottom of heat dissipation lid is provided with the depressed part, the top surface and the side of first interface heat-conducting medium all with the depressed part butt, and first interface heat-conducting medium supports on the chip, the packaging structure of chip is simple. In addition, through the size of the reserved gap between the control chip and the heat dissipation cover body, the liquid first interface heat-conducting medium can be packaged between the chip and the concave part, the heat-conducting medium is prevented from flowing out from the chip and the concave part, the problem of overflow when the heat-conducting medium is in a liquid state is effectively solved, interface cavities generated by flowing out of the heat-conducting medium are reduced, and the best heat dissipation effect of the chip is guaranteed.

Description

Packaging heat dissipation cover and chip packaging structure
Technical Field
The utility model belongs to the technical field of the chip packaging structure technique and specifically relates to a encapsulation cooling lid and chip packaging structure are related to.
Background
The chip split charging is to use a specific packaging structure to seal and store the chip and connect the electric signal with an external system, so that the chip is fixed, sealed and protected, the packaging structure is also used as a medium for heat dissipation of the chip, and the packaging structure has important influence on the performance of the processor integrated circuit.
The existing packaging structure can limit the wide application of liquid metal and low-temperature metal in a primary interface heat-conducting medium.
The information gleaned from this background section is only intended to enhance an understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information constitutes prior art that is known to a person skilled in the art.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a encapsulation heat dissipation lid and chip package structure to solve the comparatively complicated heat dissipation technical problem of current chip package structure.
In order to solve the technical problem, the utility model provides a technical scheme lies in:
the utility model provides a packaging heat dissipation cover for chip packaging, which comprises a heat dissipation cover body and a first interface heat-conducting medium;
the inner wall of the heat dissipation cover body is provided with a concave portion, the first interface heat-conducting medium is supported on the chip, and the top surface and the side surface of the first interface heat-conducting medium are abutted to the concave portion.
Furthermore, the top end of the first interface heat-conducting medium is arranged in the recessed portion, and the bottom end of the first interface heat-conducting medium extends out of the recessed portion.
Further, the first interface heat-conducting medium is accommodated in the concave portion.
Further, in the above-mentioned case,
a reserved gap is arranged between the chip and the heat dissipation cover body, and the size of the reserved gap is configured to enable the surface tension of the first interface heat-conducting medium to be smaller than the sum of the capillary force and the interface wetting force between the first interface heat-conducting medium and the reserved gap.
Furthermore, a radiator is arranged at the top of the radiating cover body and used for increasing the radiating area of the radiating cover body.
Further, the heat sink includes a plurality of fins;
the radiating fins are arranged at the top of the radiating cover body at intervals, and the radiating fins are integrally connected with the radiating cover body.
Furthermore, the radiator also comprises a radiating plate;
the heat dissipation plate is connected with the heat dissipation cover through a second interface heat-conducting medium, and the heat dissipation fins are arranged on the heat dissipation plate at intervals.
Further, the heat sink includes a plurality of heat-dissipating studs;
the heat dissipation cover body is provided with a plurality of heat dissipation columns, the heat dissipation columns are arranged at the top of the heat dissipation cover body at intervals, and the heat dissipation columns are integrally connected with the heat dissipation cover body.
Further, the top surface of the depressed part is a plane, and the cross section of the depressed part is set to be rectangular.
Furthermore, a first plating layer and a second plating layer are sequentially arranged on the top wall of the depressed part from top to bottom;
the first coating is arranged as a protective limiting layer, and the protective limiting layer is used for limiting chemical reaction between the first interface heat-conducting medium and the heat-radiating cover body;
the second plating layer is set as a wetting layer, and the wetting layer is used for increasing the wetting force of the first interface heat-conducting medium and the heat dissipation cover body.
Furthermore, a plurality of grooves are formed in the top surface of the concave portion.
The utility model provides a chip packaging structure, which comprises a fixed substrate and a packaging heat dissipation cover;
the heat dissipation cover body is arranged on the fixed substrate, and a space for packaging the chip is formed between the heat dissipation cover body and the fixed substrate in an enclosing manner;
the chip is connected with the substrate through a first conductor, and the substrate is connected with an external component through a second conductor.
Further, the first conductor and the second conductor each include a ball solder.
Technical scheme more than combining, the utility model discloses the beneficial effect who reaches lies in:
the utility model provides a packaging heat dissipation cover for chip packaging, which comprises a heat dissipation cover body and a first interface heat-conducting medium; the bottom of heat dissipation lid is provided with the depressed part, and first interface heat-conducting medium supports on the chip, and the top surface and the side of first interface heat-conducting medium all with the depressed part butt.
Because the bottom of heat dissipation lid is provided with the depressed part, the top surface and the side of first interface heat-conducting medium all with the depressed part butt, and first interface heat-conducting medium supports on the chip, the horizontal degree of freedom of first interface heat-conducting medium is injectd by the side of depressed part, the vertical degree of freedom of first interface heat-conducting medium is injectd by the top surface and the chip of depressed part, first interface heat-conducting medium no longer need sealed glue to encapsulate, has simplified packaging structure.
In addition, through the size of the reserved gap between the control chip and the heat dissipation cover body, the liquid first interface heat-conducting medium can be packaged between the chip and the concave part, the first interface heat-conducting medium is prevented from flowing out from the position between the chip and the concave part, the overflow problem when the first interface heat-conducting medium is in the liquid state is effectively solved, interface holes generated by the flowing-out of the first interface heat-conducting medium are reduced, and the optimal heat dissipation effect of the chip is guaranteed.
Drawings
For a clear explanation of the embodiments of the present invention or the technical solutions in the prior art, the drawings needed in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a cross-sectional view of a package heat dissipation cover according to an embodiment of the present invention;
fig. 2 is a cross-sectional view of a heat sink included in a heat dissipation cover of an embodiment of the present invention;
fig. 3 is a schematic view of a partial structure in a package heat dissipation cover according to an embodiment of the present invention;
fig. 4 is a cross-sectional view of a package heat sink cover according to another embodiment of the present invention;
fig. 5 is a cross-sectional view of a package heat sink cover according to another embodiment of the present invention;
fig. 6 is a cross-sectional view of a package heat dissipation cover according to another embodiment of the present invention.
Icon: 100-a heat dissipation cover body; 200-a heat conducting medium; 300-a recess; 400-chip; 410-reserving a gap; 500-a heat sink; 510-a heat sink; 520-a heat sink; 530-a second interface heat transfer medium; 600-fixing the substrate; 610-a first electrical conductor; 620-second electrical conductor.
Detailed Description
The technical solution of the present invention will be described in detail and fully with reference to the accompanying drawings, and obviously, the described embodiments are some, but not all embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that, as the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. appear, the indicated orientation or positional relationship thereof is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, but does not indicate or imply that the indicated device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" as appearing herein are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may for example be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 1, the present embodiment provides a package structure for chip packaging, which includes a heat dissipation cover 100 and a first interface heat-conducting medium 200; the inner wall of the heat dissipation cover 100 is provided with a recess 300, the heat-conducting medium 200 is supported on the chip 400, and the top surface and the side surface of the first interface heat-conducting medium 200 are both abutted to the recess 300.
The heat dissipation cover of the present embodiment is preferably suitable for high power chip package, generally refers to an integrated circuit chip with a power of 65 w or more, but as the chip density increases, the heat density of a chip with a low watt may be high in individual places, and heat dissipation is required, and this patent technology is also required.
Specifically, the projection of the heat-dissipating cover body 100 in the horizontal plane may be set to be a rectangular, square or other polygonal structure, the heat-dissipating cover body 100 includes a top plate and side plates on the periphery, the top plate and the side plates are integrally connected, and the heat-dissipating cover body 100 may be made of other high-thermal-conductivity materials such as copper, aluminum alloy and aluminum nitride. The recess 300 may be provided to include grooves having various shapes, and the projection in the horizontal plane may be provided in a rectangular, square or other polygonal structure, preferably a chip-like shape. The first interface heat-conducting medium 200 and the chip 400 are both disposed in the heat-dissipating cover 100, and the chip 400 is located below the heat-conducting medium 200, the first interface heat-conducting medium 200 can be integrally accommodated in the recessed portion 300 or the bottom end of the heat-conducting medium 200 extends out of the recessed portion 300, the top surface and the side surface of the first interface heat-conducting medium 200 are attached to the recessed portion 300, the bottom surface of the first interface heat-conducting medium 200 is attached to the chip 400, and the chip 400 supports the heat-conducting medium 200. The heat transfer medium 200 may be provided as any one of a gallium-based gold liquid metal alloy, an indium-based heat transfer sheet, and a tin-based heat transfer sheet.
In the package heat dissipation cover provided in this embodiment, since the bottom of the heat dissipation cover body 100 is provided with the recessed portion 300, the top surface and the side surface of the first interface heat transfer medium 200 are both abutted to the recessed portion 300, and the first interface heat transfer medium 200 is supported on the chip 400, the horizontal degree of freedom of the first interface heat transfer medium 200 is defined by the side surface of the recessed portion 300, and the vertical degree of freedom of the first interface heat transfer medium 200 is defined by the top surface of the recessed portion 300 and the chip 400.
Based on the above embodiments, further, the top end of the heat conducting medium 200 in the heat dissipation cover of the package provided in this embodiment is disposed in the recessed portion 300, and the bottom end of the first interface heat conducting medium 200 extends out of the recessed portion 300.
Specifically, as shown in fig. 1, the first interface heat-conducting medium 200 is divided into an upper portion and a lower portion along the height direction thereof, the first interface heat-conducting medium 200 of the upper portion is accommodated in the recessed portion 300, and the portion of the first interface heat-conducting medium 200 accommodated in the recessed portion 300 is attached to the top surface and the side surface of the recessed portion 300; the first interface heat-conducting medium 200 of the lower portion extends out of the recess 300 and is attached to the top surface of the chip 400.
Further, as another embodiment of the present embodiment, as shown in fig. 5, the first interface heat-conducting medium 200 is accommodated in the recess 300.
Specifically, the height of the recess 300 is greater than the height of the first interface heat-conducting medium 200, the first interface heat-conducting medium 200 is completely accommodated in the recess 300, and the top of the chip 400 extends into the recess 300 and is attached to the top surface of the first interface heat-conducting medium 200.
The encapsulation heat dissipation cover provided by the embodiment is arranged in the recessed portion 300 through the top end of the first interface heat-conducting medium 200, the bottom end of the first interface heat-conducting medium 200 extends out of the recessed portion 300 to be abutted against the chip 400, or the top end of the chip 400 extends into the recessed portion 300 to be abutted against the first interface heat-conducting medium 200, two arrangement structures of the first interface heat-conducting medium 200 are simple, and reliable fixation of the first interface heat-conducting medium 200 is realized through interface wetting force and capillary force of the liquid metal and the heat-conducting cover groove surface and the chip.
On the basis of the foregoing embodiments, further, the first interface heat-conducting medium 200 in the package heat-dissipating cover provided in this embodiment includes liquid metal and low-temperature metal; the liquid metal comprises a gallium-based alloy, and the low-temperature metal comprises an indium-based alloy and a tin-based alloy; a reserved gap 410 is disposed between the chip 400 and the heat dissipation cover 100, and the reserved gap 410 is configured to have a size such that the surface tension of the first interface heat-conducting medium 200 itself is smaller than the sum of the capillary force and the interface wetting force between the first interface heat-conducting medium 200 and the reserved gap 410.
Specifically, the gallium-based alloy is in a liquid state at room temperature; the low-temperature metal comprises indium-based alloy and tin-based alloy, wherein the indium-based alloy and the tin-based alloy are solid at room temperature, but are liquid when the chip works or reflows in the process of manufacturing; the reserved gap 410 in fig. 1 is the height difference between the top surface of the chip 400 and the inner wall of the top of the heat-dissipating cover body 100, the reserved gap 410 in fig. 5 is the length difference between the length of the chip 400 and the length of the recess 300, and the reserved gap 410 in fig. 6 is also the height difference between the top surface of the chip 400 and the inner wall of the top of the heat-dissipating cover body 100; the top surface and the side surface of the first interface heat-conducting medium 200 are both attached to the recessed portion 300, the contact area between the first interface heat-conducting medium 200 and the recessed portion 300 is large, and the size of the reserved gap 410 is set within a reasonable range according to theoretical calculation.
Liquid metals include, but are not limited to, gallium-based alloys, which exist in a liquid state at room temperature; low temperature metals include, but are not limited to, indium-based alloys and tin-based alloys, which are liquid after being heated to some extent. When the first interface heat-conducting medium 200 is in a liquid state, a certain surface tension exists, a capillary force exists between the first interface heat-conducting medium 200 and the reserved gap 410, an interface wetting force exists between the first interface heat-conducting medium 200 and the chip 400, and the reserved gap 410 is sized such that the surface tension of the first interface heat-conducting medium 200 is greater than the capillary force between the liquid metal and the reserved gap 410 and is smaller than the sum of the capillary force and the interface wetting force; the liquid first interface heat-conducting medium 200 can be encapsulated between the chip 400 and the recess 300 without additional sealant or other encapsulation structures, so that the first interface heat-conducting medium 200 is prevented from flowing out from between the chip 400 and the recess 300.
The smaller the thickness of the reserved gap 410 relative to the heat-conducting medium 200, the better, and the overflow problem when the first interface heat-conducting medium 200 is in a liquid state can be effectively solved. The thickness of the first interfacial thermal transfer medium 200 is typically between 20 microns and 500 microns.
As an optional implementation manner of this embodiment, the first interface heat-conducting medium 200 is an indium sheet, a top surface of the indium sheet is attached to the top surface of the recess 300, and a bottom surface of the indium sheet is attached to the top surface of the chip 400.
As an alternative embodiment of this embodiment, the first interface heat transfer medium 200 is provided as a heat sink made of a liquid metal alloy; liquid metal alloys include pure low temperature metals, binary alloys, ternary alloys, quaternary alloys, and small amounts of dopants of various elements, commonly used alloy systems, such as Sn-Ga-In and Sn-Bi-In alloy systems.
In order to improve the heat dissipation capability of the chip, heat conductive materials with relatively high heat conductivity coefficient, such as indium-based solder pads and gallium-based liquid metal, are disposed in the package structure of the chip, and heat generated by the chip is conducted to the heat dissipation cover body 100 in the package structure through the first interface heat conductive medium 200, and is finally dissipated through the outer surface of the heat dissipation cover body 100.
The current indium-based solder pad thermal conductive material in the heat dissipation cap of chip package is only applicable to the package structures of pga (pin Grid array) and lga (land Grid array), but not to the package structure of bga (ball Grid array). Because the indium-based soldering lug heat conduction material is in a solid state at room temperature and is in a liquid state in the process of packaging and making reflux, the heat conduction material has overflow tendency, so that holes appear at the interface connection position, and the chip packaging loses the heat conduction capability. Similarly, for example, gallium-based liquid metal is in a liquid state at room temperature and during the packaging process, and the heat conducting material of the existing packaging heat dissipation cover is difficult to protect from overflowing, so that the heat conducting cover is difficult to be applied to the first interface heat conducting medium 200 of the packaging.
This patent can make the indium-based soldering lug as the first interface heat-conducting medium 200 to be applied to the BGA package structure, and also makes it possible for the gallium-based solder to become the first interface heat-conducting medium 200.
Further, as shown in fig. 2 and 3, a heat sink 500 is disposed on the top of the heat-dissipating cover 100, and the heat sink 500 is used for increasing the heat-dissipating area of the heat-dissipating cover 100.
Specifically, the heat sink 500 is fixedly disposed on the top of the heat sink cover 100, and the heat sink 500 may be disposed in a sheet, strip, needle or column heat sink structure to increase the contact area between the heat sink cover 100 and the air.
Further, the heat sink 500 includes a plurality of fins 510; the plurality of heat dissipation fins 510 are disposed at intervals on the top of the heat dissipation cover 100, and the plurality of heat dissipation fins 510 are integrally connected with the heat dissipation cover 100.
Specifically, the heat-radiating cover body 100 is generally made of copper, copper alloy, aluminum or aluminum alloy, a plurality of heat-radiating fins 510 are sequentially and uniformly arranged at intervals on the top surface of the heat-radiating cover body 100, and the heat-radiating fins 510 are preferably arranged as heat-radiating metal sheets, such as aluminum and aluminum alloy sheets, copper and copper alloy sheets; the plurality of heat radiating fins 510 and the heat radiating cover body 100 may be integrally formed by a metal stamping or casting process; the heat generated by the chip 400 is conducted to the heat dissipation cover 100 through the first interface heat-conducting medium 200, part of the heat is dissipated through the outer surface of the heat dissipation cover 100, and part of the heat is conducted to the heat dissipation plate 510 and is finally dissipated through the heat dissipation plate 510.
Further, as shown in fig. 4, the heat sink 500 further includes a heat dissipation plate 520; the heat sink 520 is connected to the heat sink cover 100 through a second interface heat conducting medium 530, and a plurality of heat sinks 510 are disposed on the heat sink 520 at intervals.
Specifically, the material of the heat dissipation plate 520 is the same as that of the heat dissipation plate 510, and the plurality of heat dissipation plates 510 are uniformly arranged on the top surface of the heat dissipation plate 520 at intervals, and preferably, the plurality of heat dissipation plates 510 are integrally connected with the heat dissipation plate 520; the second interface heat-conducting medium 530 is located between the heat-dissipating cover 100 and the heat-dissipating plate 520, and the second interface heat-conducting medium may be polymer or metal solder, such as indium-based solder, gallium-based solder or tin-based solder.
Further, the heat sink 500 includes a plurality of heat-dissipating studs; the heat dissipation posts are disposed at the top of the heat dissipation cover 100 at intervals, and are integrally connected to the heat dissipation cover 100.
Specifically, the heat dissipation posts are preferably set as heat dissipation pins with a smaller diameter, a plurality of heat dissipation posts are uniformly arranged on the top surface of the heat dissipation cover body 100 at intervals, and the plurality of heat dissipation posts are integrally formed with the heat dissipation cover body 100 or are integrally connected with the heat dissipation cover body 100 by welding.
The encapsulation heat dissipation cover that this embodiment provided, through setting up first interface heat-conducting medium 200 into liquid metal or low temperature metal, on the one hand for other macromolecular material's coefficient of heat conductivity is higher, can guarantee the conductivity to the heat, on the other hand liquid first interface heat-conducting medium 200 cooperatees with depressed part 300 and chip 400, the effect through surface tension has realized the encapsulation to first interface heat-conducting medium 200, it flows out from between chip 400 and the depressed part 300 to have avoided liquid first interface heat-conducting medium 200, solve the problem of overflowing when first interface heat-conducting medium 200 is liquid effectively, reduced because the interface cavity that first interface heat-conducting medium 200 flowed out and produced, the best radiating effect of chip has been guaranteed. The plurality of radiating fins are matched with the radiating cover body 100, so that the contact area between the radiating cover body 100 and the air is increased by the plurality of radiating fins, and the radiating capacity of the radiating cover body 100 is improved.
On the basis of the above embodiments, further, as shown in fig. 1 to fig. 5, the top surface of the recess 300 in the heat dissipation cover of the package provided in this embodiment is a plane, and the cross section of the recess 300 is set to be rectangular.
Specifically, the cross section of the recessed portion 300 is rectangular, and the shape of the recessed portion 300 can be rectangular, square or other polygonal bodies, preferably, the recessed portion 300 is a rectangular groove, and the cross section of the recessed portion 300 is also rectangular; the shape of the first interface heat-conducting medium 200 is matched with the shape of the recess 300, as shown in fig. 1, a step surface is disposed on the top of the first interface heat-conducting medium 200, and the step surface is disposed in the recess 300, or as shown in fig. 5, the first interface heat-conducting medium 200 is a cuboid as a whole.
Further, a first plating layer and a second plating layer are sequentially arranged on the top wall of the recessed portion 300 from top to bottom; the first plating layer is set as a protective limiting layer for limiting a chemical reaction between the first interface heat-conducting medium 200 and the heat-dissipating cover 100; the second plating layer is configured as a wetting layer for increasing the wetting force of the first interface heat transfer medium 200 and the heat dissipation cover 100.
Specifically, the protective limiting layer is made of nickel or nickel alloy, and the wetting layer is made of gold alloy, silver alloy, tin alloy, or the like.
Further, as shown in fig. 6, a plurality of grooves are provided on the top surface of the recess 300.
Specifically, based on cuboid shape's depressed part 300, there is a plurality of recesses that are provided with on the top surface of depressed part 300, and the cross section of recess can set up to semi-circle, triangle-shaped or arc, and is preferred, and the cross section of recess sets up to semi-circle, and a plurality of recess intervals evenly set up, and the corresponding halfcylinders that form a plurality of indents on the top surface of depressed part 300, and the top correspondence of first interface heat-conducting medium 200 stretches into in a plurality of recesses.
In the package heat dissipation cover provided by this embodiment, when the recessed portion 300 is a rectangular parallelepiped groove, the first interface heat-conducting medium 200 is respectively attached to the top surface and the side surface of the rectangular parallelepiped groove, and the contact area between the first interface heat-conducting medium 200 and the recessed portion 300 is large, which is beneficial to improving the surface tension between the first interface heat-conducting medium 200 and the heat dissipation cover body 100; the top surface of the recess 300 is provided with a plurality of grooves, so that the contact area between the first interface heat-conducting medium 200 and the heat-dissipating cover 100 is further increased, and the heat-conducting effect is increased.
On the basis of the foregoing embodiments, further, the chip package structure provided in this embodiment includes a fixed substrate 600 and a package heat dissipation cover; the heat dissipation cover body is arranged on the fixed substrate 600, and a space for packaging the chip is defined between the heat dissipation cover body and the fixed substrate 600; the chip is connected to the fixed board 600 through the first conductor 610, and the fixed board 600 is connected to an external component through the second conductor 620.
The first conductor 610 and the second conductor 620 each comprise a ball solder.
Specifically, the fixed substrate 600 may be configured as a circuit board of various specifications, the heat dissipation cover may be bonded to the fixed substrate 600, and a closed space is defined between the heat dissipation cover and the fixed substrate 600; a first conductor 610 is arranged between the chip and the fixed substrate 600, a plurality of ball solders are preferably arranged between the first conductor 610 and the second conductor 620, the ball solders bond the pins of the chip to the fixed substrate 600, and the plurality of second conductors 620 are correspondingly connected with the plurality of pins of the chip, so that the chip is connected with other components of the chip packaging structure through the second conductors 620.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention.

Claims (13)

1. A package heat spreading cover for a chip package, comprising: a heat dissipation cover body (100) and a first interface heat conduction medium (200);
the inner wall of the heat dissipation cover body (100) is provided with a concave portion (300), the first interface heat-conducting medium (200) is supported on the chip (400), and the top surface and the side surface of the first interface heat-conducting medium (200) are abutted to the concave portion (300).
2. The package heat sink cap according to claim 1, wherein a top end of the first interface heat-conducting medium (200) is disposed in the recess (300), and a bottom end of the first interface heat-conducting medium (200) protrudes out of the recess (300).
3. The package heat sink cap according to claim 1, wherein the first interface heat transfer medium (200) is received in the recess (300).
4. The packaged heat sink cap according to any one of claims 1-3, wherein a pre-gap (410) is disposed between the chip (400) and the heat sink cap body (100), and the pre-gap (410) is sized such that the surface tension of the first interface heat-conducting medium (200) itself is smaller than the sum of the capillary force and the interface wetting force between the first interface heat-conducting medium (200) and the pre-gap (410).
5. The packaged heat sink cap according to claim 4, wherein a heat sink (500) is disposed on the top of the heat sink cap body (100), and the heat sink (500) is used to increase the heat dissipation area of the heat sink cap body (100).
6. The package heat sink cover according to claim 5, wherein the heat sink (500) comprises a plurality of fins (510);
the plurality of radiating fins (510) are arranged at the top of the radiating cover body (100) at intervals, and the plurality of radiating fins (510) are integrally connected with the radiating cover body (100).
7. The encapsulating heat spreading cover according to claim 6, wherein the heat spreader (500) further comprises a heat spreading plate (520);
the heat dissipation plate (520) is connected with the heat dissipation cover body (100) through a second interface heat conducting medium (530), and the plurality of heat dissipation fins (510) are arranged on the heat dissipation plate (520) at intervals.
8. The packaged heat sink cap of claim 5, wherein the heat spreader (500) comprises a plurality of heat-dissipating studs;
the heat dissipation columns are arranged at the top of the heat dissipation cover body (100) at intervals and are integrally connected with the heat dissipation cover body (100).
9. The heat sink packaging cover according to claim 4, wherein the top surface of the recess (300) is a plane, and the cross-section of the recess (300) is rectangular.
10. The heat-dissipating cap of claim 9, wherein a first plating layer and a second plating layer are sequentially disposed on the top wall of the recess (300) from top to bottom;
the first plating layer is arranged as a protective limiting layer which is used for limiting chemical reaction between the first interface heat-conducting medium (200) and the heat-radiating cover body (100);
the second plating layer is arranged as a wetting layer for increasing the wetting force of the first interface heat-conducting medium (200) and the heat-dissipating cover body (100).
11. The heat sink packaging cover of claim 9, wherein the top surface of the depression is provided with a plurality of grooves.
12. A chip package structure comprising a mounting substrate (600) and a package heat sink cover according to any of claims 1-11;
the heat dissipation cover body (100) is arranged on the fixed substrate (600), and a space for packaging the chip (400) is formed between the heat dissipation cover body (100) and the fixed substrate (600);
the chip (400) is connected with the fixed substrate (600) through a first conductor (610), and the fixed substrate (600) is connected with an external component through a second conductor (620).
13. The chip package structure of claim 12, wherein the first electrical conductor (610) and the second electrical conductor (620) each comprise a ball solder.
CN202021050347.4U 2020-06-09 2020-06-09 Packaging heat dissipation cover and chip packaging structure Active CN212648227U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114158183A (en) * 2021-12-03 2022-03-08 Oppo广东移动通信有限公司 Chip heat radiation structure and electronic equipment
CN115666109A (en) * 2022-11-28 2023-01-31 荣耀终端有限公司 Heat-conducting film, preparation method, electronic component, circuit board assembly and electronic equipment
CN115881649A (en) * 2023-02-22 2023-03-31 广东气派科技有限公司 Packaging structure and method for improving plastic packaging thermal stress of high-power GaN chip
US11984381B2 (en) 2021-05-13 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package structure and method for forming the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11984381B2 (en) 2021-05-13 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package structure and method for forming the same
CN114158183A (en) * 2021-12-03 2022-03-08 Oppo广东移动通信有限公司 Chip heat radiation structure and electronic equipment
CN115666109A (en) * 2022-11-28 2023-01-31 荣耀终端有限公司 Heat-conducting film, preparation method, electronic component, circuit board assembly and electronic equipment
CN115881649A (en) * 2023-02-22 2023-03-31 广东气派科技有限公司 Packaging structure and method for improving plastic packaging thermal stress of high-power GaN chip

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