CN212587487U - Solid state hard drives and circuit board - Google Patents

Solid state hard drives and circuit board Download PDF

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Publication number
CN212587487U
CN212587487U CN202021731631.8U CN202021731631U CN212587487U CN 212587487 U CN212587487 U CN 212587487U CN 202021731631 U CN202021731631 U CN 202021731631U CN 212587487 U CN212587487 U CN 212587487U
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China
Prior art keywords
substrate
solid state
thermal deformation
state disk
main body
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Active
Application number
CN202021731631.8U
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Chinese (zh)
Inventor
王桂桂
黄崇城
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Shenzhen Dawei Chuangxin Microelectronics Technology Co ltd
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Shenzhen Xinhuiqun Microelectronic Technology Co ltd
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Priority to CN202021731631.8U priority Critical patent/CN212587487U/en
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Publication of CN212587487U publication Critical patent/CN212587487U/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The utility model discloses a solid state hard drives and circuit board. The solid state disk comprises: a substrate; the control chip is attached to the substrate and electrically connected with the substrate; the memory chips are sequentially stacked and mounted on the substrate, and the adjacent memory chips and the memory chips are electrically connected with the substrate through bonding wires; the packaging body wraps the substrate, the control chip and the storage chips; the thermal deformation heat dissipation part can generate thermal deformation when being heated, and the thermal deformation heat dissipation part is arranged on the packaging body and is respectively positioned on two sides of the plurality of storage chips with the substrate. The utility model discloses be favorable to the memory chip to dispel the heat fast to can eliminate or reduce the deformation of whole device.

Description

Solid state hard drives and circuit board
Technical Field
The utility model relates to a storage chip encapsulates the field, especially relates to a Solid State Disk (Solid State Disk or Solid State Drive, SSD for short) and circuit board.
Background
The trend of solid state disk stack package is thin package thickness, small volume, high integration level and large capacity, and for ultra-thin chip package, the reliability and high integration level of multi-chip stack become a great trend of package, which is a challenge of technicians in the industry.
For solid state disk packaging, the control chip and the memory chip are usually packaged together. Currently, as device dimensions decrease, the increase in device integration density of a single chip and the increase in clock frequency lead to a rapid increase in power consumption of the chip. The sharply increased power consumption causes the temperature of the chip to rise, which not only degrades the performance of the device and the circuit, but also affects the reliability of the device and the circuit. Today's high performance chip production has reached 100 watts per square centimeter. Future chips may generate higher heat, and it is expected that if an effective heat dissipation means is not adopted, the performance of the device and the circuit is seriously adversely affected by the over-temperature of the chip. In addition, the current packaging mode for fixing the hard disk is not favorable for eliminating or weakening the deformation caused by heating.
Disclosure of Invention
In view of this, the utility model provides a solid state hard drives and circuit board to solve current solid state hard drives heat dissipation not good and be heated and produce the problem of deformation.
The utility model provides a pair of solid state hard drives, include:
a substrate;
the control chip is attached to the substrate and electrically connected with the substrate;
the memory chips are sequentially stacked and mounted on the substrate, and the adjacent memory chips and the substrate are electrically connected through bonding wires;
the packaging body coats the substrate, the control chip and the plurality of storage chips;
the thermal deformation heat dissipation part can generate thermal deformation when being heated, and the thermal deformation heat dissipation part is arranged on the packaging body and is respectively positioned on two sides of the plurality of storage chips with the substrate.
Optionally, the control chip and the memory chip are respectively attached to two opposite sides of the substrate, the package body includes a first package body and a second package body, the first package body wraps the substrate and the memory chip, the second package body wraps the substrate and the control chip, and the thermal deformation heat dissipation member is disposed on the first package body.
Optionally, the control chip and the memory chip are mounted on the same side of the substrate.
Optionally, the thermal deformation heat dissipation member includes a main body portion and a connecting portion, the main body portion and the memory chip are connected respectively to the two ends of the connecting portion, and the main body portion generates thermal deformation when being heated.
Optionally, the main body is a plate, and an orthogonal projection of the connecting portion falls within the orthogonal projection of the main body.
Optionally, the solid state hard disk further comprises a heat conducting material, the main body portion is provided with a retaining wall, the retaining wall extends towards the upper surface of the storage chip, the lower end of the retaining wall abuts against the upper surface of the storage chip, and the heat conducting material is limited between the storage chip and the inner side face of the main body portion.
Optionally, the main body portion and the connecting portion of the thermal deformation heat sink are of an integrally molded structure.
Optionally, the thermally deformable heat sink is a metal stamped structural member.
Optionally, the upper surface of the thermally deformable heat sink is exposed to the package body.
The utility model provides a pair of circuit board, including Printed circuit board (Printed circuit board, PCB) and install the above-mentioned arbitrary solid state hard drives on PCB.
The utility model discloses set up the thermal deformation radiating piece in storage chip top, the heat that storage chip produced conducts to the external world via the thermal deformation radiating piece, thereby be favorable to storage chip to dispel the heat fast, in addition, the thermal deformation radiating piece has stress correction effect to the thermal deformation of packaging body, when storage chip produces the heat, storage chip and base plate produce stress because of thermal expansion coefficient mismatches, the thermal deformation radiating piece also produces stress because of thermal deformation simultaneously, the thermal deformation radiating piece at top sets up from top to bottom with the base plate of bottom, make stress offset or partially offset, be favorable to eliminating or reducing the deformation of whole device.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a solid state disk according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a solid-state hard disk according to another embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments, and not all of them. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention. The following embodiments and their technical features may be combined with each other without conflict.
It should be understood that in the description of the embodiments of the present invention, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate the orientation or positional relationship indicated based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the technical solutions of the embodiments and simplifying the description, but do not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
Fig. 1 is a schematic structural diagram of a solid state disk according to an embodiment of the present invention. Referring to fig. 1, a solid state disk 10 of the present embodiment includes a substrate 11, a control chip 12, a plurality of memory chips 13, a package 14, and a heat sink 15.
The substrate 11 includes a substrate body 111, electrode contact pins 112, and a substrate circuit (not shown), wherein the electrode contact pins 112 are electrically connected to the substrate circuit. In a specific implementation manner, the substrate body 111 may be opened with a hole filled with a conductive material and serving as the electrode contact pin 112, and the substrate circuit may be disposed on a surface of the substrate body 111.
The control chip 12 may be mounted on the upper surface of the substrate main body 111 through a first adhesive layer (not shown) and electrically connected to the electrode contact pins 112, specifically, the control chip 12 is provided with bonding wires, and two ends of each bonding wire are respectively connected to the control chip 12 and the electrode contact pins 112, so as to electrically connect the control chip 12 and the electrode contact pins 112, and thus electrically connect the control chip 12 and the substrate 11.
The memory chips 13 are sequentially stacked and mounted on the substrate 11, two adjacent memory chips 13 are electrically connected through the bonding wires 131, and each memory chip 13 is also electrically connected to the substrate 11 through the bonding wires 131.
The control chip 12 and the memory chips 13 may be mounted on the same side of the substrate 11, and specifically, as shown in fig. 1, the solid state disk 10 further includes a supporting member 17, the supporting member 17 has an inverted U-shaped cross section and is disposed on the upper surface of the substrate 11. The lower portion of the supporting member 17 is provided with an accommodating space, the plurality of memory chips 13 are disposed on the upper surface of the supporting member 17, and the control chip 12 is located in the accommodating space of the supporting member 17 and attached to the upper surface of the substrate 11.
The package 14 covers the substrate 11, the control chip 12, and the memory chips 13.
The thermal deformation heat sink 15 is thermally deformed when being heated, and is disposed on the package 14 and located on two sides of the memory chips 13 with the substrate 11, respectively, and the thermal deformation heat sink 15 may be fixed on the upper surfaces of the memory chips 13 through a second adhesive layer (not shown).
Based on this, by arranging the thermal deformation heat sink 15 above the memory chip 13, the heat generated by the memory chip 13 can be quickly conducted to the outside of the package 14 through the thermal deformation heat sink 15, and finally conducted to the air, thereby facilitating the quick heat dissipation of the memory chip 13.
In addition, the substrate main body 111 may also be exposed out of the package body 14, specifically, the package body 14 only covers the upper surface of the substrate main body 111 and exposes the bottom surface thereof, and herein, the heat generated by the control chip 12 can be quickly conducted to the outside of the package body 14 through the substrate main body 111 and finally conducted to the air, thereby further facilitating the quick heat dissipation of the control chip 12.
In this embodiment, the position of the heat-deformed heat sink 15 may be chosen, for example, the heat-deformed heat sink 15 is completely covered in the package 14, or may be embedded in the top surface of the package 14, that is, the upper surface of the heat-deformed heat sink 15 is exposed out of the package 14, specifically, the upper surface of the heat-deformed heat sink 15 may be flush with the upper surface of the package 14, or the upper surface of the heat-deformed heat sink 15 may be higher than the upper surface of the package 14.
In the package of the solid state disk 10, the thermal deformation heat sink 15 and the substrate body 111 may be made of the same material, for example, pure metal or alloy, and may be copper or copper alloy. For the red copper material, the expansion coefficients of the substrate body 111 and the thermal deformation heat sink 15 can be ensured to be consistent, and when the two are close in size, the two can generate equivalent deformation.
With reference to fig. 1, the heat sink 15 may include a main body 151 and a connecting portion 152, wherein two ends of the connecting portion 152 are respectively connected to the main body 151 and the memory chip 13.
The body 151 is thermally deformed when heated. The main body 151 may have the same shape as the memory chip 13, and is a plate, and the orthogonal projection of the connecting portion 152 falls within the orthogonal projection of the main body 151, that is, the lateral dimension of the main body 151 is larger than the lateral dimension of the connecting portion 152. Based on this, the accommodation space has between the medial surface of main part 151 and a plurality of memory chip 13's the upper surface, the embodiment of the utility model provides a can pack heat conduction material 16 in this accommodation space, the heat that memory chip 13 produced can be conducted for thermal deformation heat sink 15 through heat conduction material 16.
Further, on the inner side of the main body 151 facing the memory chip 13, a retaining wall 153 may be disposed, the retaining wall 153 is disposed along the periphery of the main body 151, and the gold wires 131 are located outside the retaining wall 153. In the packaging of the memory chip 13, the lower end of the retaining wall 153 abuts against the upper surface of the memory chip 13, and the heat conductive material 16 is limited between the memory chip 13 and the inner side surface of the main body 151, and herein, the retaining wall 153 can prevent the heat conductive material 16 from being exposed, thereby avoiding pollution.
In other embodiments, the lower portion of the memory chip 13 may be provided with a conductive pin, which is electrically connected to the electrode contact pin 112 on the substrate 11, and at this time, the upper surface of the memory chip 13 may not be provided with a bump for soldering the bonding wire 131, so that the retaining wall 153 may abut against the outer side of the memory chip 13, and the heat conductive material 16 may also be limited between the memory chip 13 and the inner side surface of the main body 151. Further, to ensure the spacing effect, the height of the retaining wall 153 may be greater than the height of the heat conductive material 16.
Whether the connecting portion 152 is thermally deformed when heated is not limited in the embodiments of the present invention. For example, the main body 151 and the connecting portion 152 may be integrally formed, that is, the same material, and in this case, the connecting portion 152 is also thermally deformed when heated.
Further, the thermal deformation heat dissipation member 15 may be a metal stamping structure member, and on the basis of achieving the foregoing effects, the thermal deformation heat dissipation member 15 may not only conduct heat rapidly, but also block interference of external electromagnetic waves to the plurality of memory chips 13.
In the embodiment of the present invention, the control chip 12 can be a silicon chip, which is connected to the substrate main body 111 of the bottom through silver paste (i.e. the first adhesive layer), so as to realize the ground heat dissipation.
The package body 14 may be made of an epoxy plastic material.
Currently, electronic products are evolving towards smaller size, lighter weight, faster speed, higher frequency, lower cost, and higher reliability, and chip devices are widely applied to high-speed or microwave design of electronic products by virtue of thinner thickness, leadless design, excellent heat dissipation performance, and very low impedance and self-inductance. Formally based on the miniaturization and ultrathin design trend of chips, the whole device of the solid state disk is thin in structure, a packaging body is thin, and deformation is easy to generate. Moreover, the pad with heat conduction and dissipation functions is used as a part of the lead frame structure, which is also the reason that the whole device has excellent heat dissipation performance, but when the lead frame structure based on the pad is used for SMT (Surface mount Technology) welding or long-term working, the lead frame structure based on the pad is affected by environmental temperature or power change to generate dynamic thermal deformation, so that the solder joint in the whole device is subjected to a large tensile stress, the service life of the solder joint is seriously degraded, and the application of highly reliable products, including communication products, is affected. In this regard, the solid state disk 10 according to the embodiment of the present invention can solve this problem.
Referring to fig. 1, when the memory chip 13 generates heat, the memory chip 13 and the substrate body 111 generate stress due to the mismatch of thermal expansion coefficients, and the thermal deformation heat sink 15 also generates stress due to thermal deformation, and the thermal deformation heat sink 15 at the top and the substrate body 111 at the bottom are disposed above and below each other to offset or partially offset the stress, i.e., the thermal deformation heat sink 15 has a stress correction effect on the thermal deformation of the package 14 when being heated, which is beneficial to eliminating or reducing the deformation of the entire device.
By adopting the structural design for stress correction, the device can be prevented from being heated to deform in the SMT assembly process or long-term work, welding spots are protected, and the service life of the device is prolonged. Moreover, the optimization of the structure does not occupy the layout area on the board and does not increase the SMT flow.
In the package of the memory chip 13, the material of the thermal deformation heat sink 15 may be selected from a variety of materials, the material of the thermal deformation heat sink 15 may also be different from the material of the substrate body 111, and the thermal deformation matching with the substrate body 111 is achieved by adjusting the size of the thermal deformation heat sink 15.
The thickness of the heat-deformable heat sink 15 may be greater than or equal to 0.1mm, and its size is less than or equal to the size of the top of the entire device. Specifically, the size and thickness of the thermal deformation heat sink 15 need to be calculated comprehensively according to the structural strength and the thermal expansion coefficient of the thermal deformation heat sink 15 and the thermal expansion coefficient, the thickness and the structural strength of the substrate body 111, so as to ensure that the strength of the thermal deformation heat sink 15 can correct the stress generated by the thermal deformation of the bottom substrate body 111.
The embodiment of the utility model provides a can select the parameter that suitable calculation mode designed each item index of thermal deformation radiating element 15. In an actual application scenario, the size of the thermal deformation heat sink 15 is generally determined by engineering tests, and the thickness and the size are selected to take account of cost and effect. It should be understood that the size of the heat-deforming heat sink 15 does not necessarily need to be identical to the substrate body 111, and that the stress relief effect is obtained as long as the heat-deforming heat sink 15 is present.
Fig. 2 is a schematic structural diagram of a solid-state hard disk according to another embodiment of the present invention. For the same structural elements, the different embodiments of the present invention are identified with the same reference numerals. Referring to fig. 2, the heat dissipation device 15 may be designed to be suitable for a structure in which the control chip 12 and the memory chips 13 are respectively mounted on two opposite sides of the substrate 11.
Specifically, the solid state disk 20 is not provided with the support 17, and the plurality of memory chips 13 are directly disposed on the upper surface of the substrate 11. The package of the solid state disk 20 includes two parts, one of which is a first package 141, the other is a second package 142, the first package 141 encapsulates the upper surface of the substrate 11 and the plurality of memory chips 13, the second package 142 encapsulates the lower surface of the substrate 11 and the control chip 12, and the thermal deformation heat sink 15 is disposed on the first package 141.
The materials and the preparation methods of the first package body 141 and the second package body 142 may be the same, or different and suitable preparation methods may be selected according to the respective materials.
The solid state disk 20 employs the same structure of the heat-deformable heat sink 15 as the previous embodiment shown in fig. 1, and therefore has the same advantages as the previous embodiment, and will not be described herein again.
The utility model also provides a circuit board. The circuit board comprises a printed circuit board and a plurality of solid state disks installed on the printed circuit board. The embodiment of the present invention provides an arrangement and installation method of these solid state disks on a printed circuit board. The electrode contact pins of the solid state disk are electrically connected with the conductive pins on the printed circuit board.
Since the circuit board has the solid state disk 10 and/or the solid state disk 20, the same advantages as described above can be produced, and are not described herein again.
It should be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element, and that elements, features, or elements having the same designation in different embodiments may or may not have the same meaning as that of the other elements, and that the particular meaning will be determined by its interpretation in the particular embodiment or by its context in further embodiments.
In addition, although the terms "first, second, third, etc. are used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, depending on the context, without departing from the scope herein. The term "if" can be interpreted as "at … …" or "when … …" or "in response to a determination". Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context indicates otherwise. The terms "or" and/or "are to be construed as inclusive or meaning any one or any combination. Thus, "A, B or C" or "A, B and/or C" means "any of the following: a; b; c; a and B; a and C; b and C; A. b and C ". An exception to this definition will occur only when a combination of elements, functions, steps or operations are inherently mutually exclusive in some way.
Although the invention has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. The present invention includes all such modifications and variations, and is supported by the technical solutions of the foregoing embodiments. That is, the above description is only a part of the embodiments of the present invention, and not intended to limit the scope of the present invention, and all equivalent structural changes made by using the contents of the present specification and the accompanying drawings, such as the combination of technical features between the embodiments, or the direct or indirect application to other related technical fields, are also included in the scope of the present invention.

Claims (10)

1. A solid state disk, comprising:
a substrate;
the control chip is attached to the substrate and electrically connected with the substrate;
the memory chips are sequentially stacked and mounted on the substrate, and the adjacent memory chips and the substrate are electrically connected through bonding wires;
the packaging body coats the substrate, the control chip and the plurality of storage chips;
the thermal deformation heat dissipation part can generate thermal deformation when being heated, and the thermal deformation heat dissipation part is arranged on the packaging body and is respectively positioned on two sides of the plurality of storage chips with the substrate.
2. The solid state disk of claim 1, wherein the control chip and the memory chips are respectively attached to two opposite sides of the substrate, the package comprises a first package body and a second package body, the first package body wraps the substrate and the memory chips, the second package body wraps the substrate and the control chip, and the thermal deformation heat dissipation member is disposed on the first package body.
3. The solid state disk of claim 1, wherein the control chip and the memory chip are mounted on the same side of the substrate.
4. The solid state disk of claim 1, wherein the thermal deformation heat sink comprises a main body portion and a connecting portion, two ends of the connecting portion are respectively connected to the main body portion and the memory chip, and the main body portion is thermally deformed when being heated.
5. The solid state disk of claim 4, wherein the main body portion is a plate body, and an orthogonal projection of the connecting portion falls within the orthogonal projection of the main body portion.
6. The solid state disk of claim 4, further comprising a heat conducting material, wherein the main body is provided with a retaining wall, the retaining wall extends towards the upper surface of the memory chip, the lower end of the retaining wall abuts against the upper surface of the memory chip, and the heat conducting material is limited between the memory chip and the inner side surface of the main body.
7. The solid state disk of claim 4, wherein the body portion and the connecting portion of the thermally deformable heat sink are of an integrally molded construction.
8. The solid state disk of claim 1, wherein the thermally deformable heat sink is a metal stamped structural member.
9. The solid state disk of claim 1, wherein an upper surface of the thermally deformable heat sink is exposed to the package.
10. A circuit board comprising a printed circuit board PCB and a solid state drive as claimed in any one of claims 1 to 9 mounted on said PCB.
CN202021731631.8U 2020-08-14 2020-08-14 Solid state hard drives and circuit board Active CN212587487U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202021731631.8U CN212587487U (en) 2020-08-14 2020-08-14 Solid state hard drives and circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202021731631.8U CN212587487U (en) 2020-08-14 2020-08-14 Solid state hard drives and circuit board

Publications (1)

Publication Number Publication Date
CN212587487U true CN212587487U (en) 2021-02-23

Family

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CN202021731631.8U Active CN212587487U (en) 2020-08-14 2020-08-14 Solid state hard drives and circuit board

Country Status (1)

Country Link
CN (1) CN212587487U (en)

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