WO2022231095A1 - 표시 장치 - Google Patents

표시 장치 Download PDF

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Publication number
WO2022231095A1
WO2022231095A1 PCT/KR2022/001067 KR2022001067W WO2022231095A1 WO 2022231095 A1 WO2022231095 A1 WO 2022231095A1 KR 2022001067 W KR2022001067 W KR 2022001067W WO 2022231095 A1 WO2022231095 A1 WO 2022231095A1
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WO
WIPO (PCT)
Prior art keywords
light emitting
sub
light
pixel area
emitting devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2022/001067
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English (en)
French (fr)
Korean (ko)
Inventor
최진우
양병춘
김민우
박성국
전형일
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Samsung Display Co Ltd
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Samsung Display Co Ltd
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Filing date
Publication date
Application filed by Samsung Display Co Ltd filed Critical Samsung Display Co Ltd
Priority to JP2023563044A priority Critical patent/JP2024516374A/ja
Priority to EP22795929.3A priority patent/EP4333067A4/en
Publication of WO2022231095A1 publication Critical patent/WO2022231095A1/ko
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
    • H10H29/14—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
    • H10H29/142—Two-dimensional arrangements, e.g. asymmetric LED layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/851—Wavelength conversion means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/851—Wavelength conversion means
    • H10H20/8514—Wavelength conversion means characterised by their shape, e.g. plate or foil
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/855—Optical field-shaping means, e.g. lenses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0137—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/018—Bonding of wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0361—Manufacture or treatment of packages of wavelength conversion means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0363—Manufacture or treatment of packages of optical field-shaping means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/851—Wavelength conversion means
    • H10H29/8511—Wavelength conversion means characterised by their material, e.g. binder
    • H10H29/8512—Wavelength conversion materials
    • H10H29/8513—Wavelength conversion materials having two or more wavelength conversion materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/851—Wavelength conversion means
    • H10H29/8514—Wavelength conversion means characterised by their shape, e.g. plate or foil
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/851—Wavelength conversion means
    • H10H29/8515—Wavelength conversion means not being in contact with the bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/855—Optical field-shaping means, e.g. lenses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/80—Constructional details
    • H10H29/85—Packages
    • H10H29/857—Interconnections

Definitions

  • the present disclosure generally relates to a display device.
  • One or more aspects of the present disclosure relate to a display device having improved arrangement efficiency of light emitting devices by increasing a ratio of light emitting devices capable of normal operation, and a method of manufacturing the same.
  • One or more aspects of the present disclosure relate to a display device having improved process predictability, and a method of manufacturing the same.
  • a plurality of light emitting elements disposed on a substrate and arranged in a matrix form according to a first arrangement direction and a second arrangement direction intersecting the first arrangement direction; and a first sub-pixel region and a second sub-pixel region overlapping at least a portion of the plurality of light emitting devices, spaced apart from each other in a first direction, and extending in a second direction intersecting the first direction, respectively; Including, the second direction and the second arrangement direction may be non-parallel to each other.
  • a light blocking layer disposed on the substrate and defining the first sub-pixel area and the second sub-pixel area; may further include.
  • light of a first color may be emitted from the first sub-pixel area, and light of a second color may be emitted from the second sub-pixel area.
  • the second direction and the second arrangement direction may form an angle having an acute angle.
  • the angle between the angles may be 5 degrees to 40 degrees.
  • the first sub-pixel area includes one side parallel to the first direction and having a first length
  • the plurality of light emitting devices are adjacent to each other in the second arrangement direction and have a first arrangement distance
  • the first light emitting device and the second light emitting device are spaced apart by the same, and the first length and the first arrangement distance may satisfy the following equation.
  • the first arrangement distance may be the shortest distance between the first light emitting device and the second light emitting device.
  • the display device may further include: a third sub-pixel region spaced apart from the first sub-pixel region and the second sub-pixel region in the first direction; wherein the first sub-pixel area is disposed on one side of the second sub-pixel area, the third sub-pixel area is disposed on the other side of the second sub-pixel area, and a first light emitting device, wherein one end and the other end of the third sub-pixel area are spaced apart from each other by a second length, the plurality of light emitting devices are adjacent to each other in the second arrangement direction and are spaced apart from each other by a first arrangement distance; A second light emitting device may be included, and the second length and the first arrangement distance may satisfy the following equation.
  • the first sub-pixel area and the second sub-pixel area are spaced apart from each other by a distance (eg, a predetermined distance), and each of the plurality of light emitting devices has one bottom length ( For example, with a predetermined base distance), one or more of the separation distance and the base length may satisfy the following equation.
  • the bottom surface of the plurality of light emitting devices may have a circular shape, and the length of the bottom surface may be a diameter of the circle.
  • bottom surfaces of the plurality of light emitting devices may have a rectangular shape, and the bottom surface length may be a rectangular diagonal length.
  • a light control unit disposed on the plurality of light emitting devices, configured to change the wavelength of light emitted from the light emitting device; and a third sub-pixel region spaced apart from each other in the first direction and extending in the second direction from the first sub-pixel region and the second sub-pixel region; and a first wavelength conversion pattern overlapping the first sub-pixel area; a second wavelength conversion pattern overlapping the second sub-pixel area; and a light transmission pattern overlapping the third sub-pixel area.
  • At least a first portion of the plurality of light emitting devices overlaps the first sub-pixel area, and a second portion of the plurality of light emitting devices overlaps the second sub-pixel area, and the plurality of light emitting devices overlap with the second sub-pixel area.
  • a third portion of the light emitting device may overlap the third sub-pixel area, and the plurality of light emitting devices may emit light of the same color.
  • the number of the plurality of light emitting devices per unit area on the substrate may be uniform.
  • the method may include providing a laminated substrate; forming a first semiconductor layer, an active layer, and a second semiconductor layer on the laminate substrate; providing a plurality of light emitting devices by etching the first semiconductor layer, the active layer, and the second semiconductor layer; separating the laminated substrate from the plurality of light emitting devices, and bonding the plurality of light emitting devices on a donor film; and disposing the plurality of light emitting devices disposed on the donor film on a substrate; and disposing a light blocking layer defining a first sub-pixel area and a second sub-pixel area on the plurality of light emitting devices; Including, wherein the step of providing the plurality of light emitting elements comprises the step of patterning the plurality of light emitting elements in a matrix form according to a first arrangement direction and a second arrangement direction intersecting the first arrangement direction,
  • the disposing of the light blocking layer may include forming the light blocking layer such that the first sub-pixel area and the second sub-pixel area are
  • deforming the donor film to increase the separation distance between the plurality of light emitting devices may further include.
  • the plurality of light emitting devices before the step of deforming the donor film is performed, are spaced apart from each other at an undeformed interval, and in the step of deforming the donor film, the plurality of light emitting devices are spaced apart from each other As the distance increases, the plurality of light emitting devices adjacent in the first arrangement direction may be spaced apart by a first arrangement distance, and the plurality of light emitting devices adjacent in the second arrangement direction may be spaced apart by a second arrangement distance.
  • the extendable range may be a length multiple within a limit that is non-destructive when the donor film is expanded in one direction.
  • the extendable range of the donor film may satisfy the following formula.
  • the second direction and the first arrangement direction may form an angle having an acute angle.
  • the method further includes forming a first wavelength conversion pattern, a second wavelength conversion pattern, and a light transmission pattern disposed on the same layer as the light blocking layer, wherein the disposing of the light blocking layer includes: forming the light blocking layer to define a third sub-pixel region spaced apart from the first sub-pixel region and the second sub-pixel region in the first direction and extending in the second direction;
  • the plurality of light emitting devices emit light of a third color
  • the first wavelength conversion pattern converts the light of the third color into light of the first color
  • the second wavelength conversion pattern converts the light of the third color is changed to light of the second color
  • the light transmission pattern transmits light of the third color
  • the plurality of light emitting devices includes a first sub-pixel region overlapping the first sub-pixel region and the first wavelength conversion pattern. 1 light emitting device, second light emitting devices overlapping the second sub-pixel region and the second wavelength conversion pattern, and third light emitting devices overlapping the third sub-pixel region and the light transmitting pattern have.
  • aspects according to one or more embodiments of the present disclosure relate to a display device in which arrangement efficiency of light emitting devices is improved by increasing a ratio of light emitting devices capable of normal operation, and a method of manufacturing the same.
  • aspects according to one or more embodiments of the present disclosure relate to a display device having improved process predictability, and a method of manufacturing the same.
  • FIG. 1 is a perspective view schematically illustrating a display device according to at least one exemplary embodiment.
  • FIG. 2 is a plan view schematically illustrating a display device according to at least one exemplary embodiment.
  • FIG 3 is a cross-sectional view illustrating a display device according to at least one exemplary embodiment.
  • FIG. 4 is a diagram illustrating a pixel circuit included in a pixel according to one or more exemplary embodiments.
  • FIG. 5 is a cross-sectional view schematically illustrating a pixel according to one or more exemplary embodiments.
  • FIG. 6 to 8 are enlarged views of EA1 of FIG. 2 .
  • FIGS. 9 and 10 are plan views schematically illustrating a positional relationship between light emitting elements included in a display device according to at least one exemplary embodiment.
  • 11 to 15 and 17 are cross-sectional views for each process step (or operation) of a method of manufacturing a display device according to at least one exemplary embodiment.
  • 16 and 18 are plan views for each process step (or operation) of a method of manufacturing a display device according to at least one exemplary embodiment.
  • 19 to 22 are diagrams illustrating examples to which a display device according to one or more exemplary embodiments is applied.
  • spatially relative terms such as “below”, “below”, “upper”, “upper”, and “above” may be used for convenience of description for describing one component. It will be understood that spatially relative terms are intended to include other orientations of the device in use or operation in addition to the orientation shown in the figures. For example, when the device is turned over in the drawings, a component that is depicted as disposed below another component or feature may be disposed on top of the other component or feature. Accordingly, the term “ ⁇ lower” may include both the upper and lower directions. The device may be oriented in other orientations (rotated 90 degrees or in other orientations), and spatially relative descriptors used herein should be interpreted appropriately.
  • first, second, etc. may be used to describe various components, but the components should not be construed as being limited by these terms. These terms are only used to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may also be referred to as a first component, without departing from the scope of the present disclosure.
  • the present disclosure relates to a display device.
  • a display device according to one or more exemplary embodiments will be described with reference to FIGS. 1 to 22 .
  • 1 is a perspective view schematically illustrating a display device according to at least one exemplary embodiment.
  • 2 is a plan view schematically illustrating a display device according to at least one exemplary embodiment.
  • a display device DD may be configured to emit light.
  • the display device DD may include a substrate SUB and a pixel PXL disposed on the substrate SUB. According to one or more embodiments, the display device DD may further include a driving circuit unit (eg, a scan driver and a data driver) for driving the pixel PXL, wires, and pads.
  • a driving circuit unit eg, a scan driver and a data driver
  • the pixel PXL may include a first sub-pixel SPXL1 , a second sub-pixel SPXL2 , and a third sub-pixel SPXL3 .
  • the display device DD may include a display area DA and a non-display area NDA.
  • the non-display area NDA may refer to an area outside the display area DA.
  • the non-display area NDA may be positioned around at least a portion of the display area DA. (Or you can wrap it around.)
  • the substrate SUB may constitute a base member of the display device DD.
  • the substrate SUB may be a rigid substrate or a flexible substrate or film, but is not limited to a specific example.
  • the display area DA may refer to an area in which the pixel PXL is disposed.
  • the non-display area NDA may refer to an area in which the pixel PXL is not disposed.
  • a driving circuit unit, wires, and pads connected to the pixel PXL of the display area DA may be disposed in the non-display area NDA.
  • the pixels PXL may be arranged according to a stripe or PENTILETM (PENTILETM is a Korean registered patent of Samsung Display) array structure (eg, RGBG array structure), etc.
  • PENTILETM is a Korean registered patent of Samsung Display
  • RGBG array structure eg, RGBG array structure
  • a pixel PXL including a plurality of sub-pixels may be disposed in the display area DA.
  • the first sub-pixel SPXL1 emitting the light of the first color, the second sub-pixel SPXL2 emitting the light of the second color, and the light of the third color are emitted and a third sub-pixel SPXL3 may be arranged, and at least one of the first to third sub-pixels SPXL1, SPXL2, and SPXL3 is one pixel unit or pixel capable of emitting light of various appropriate colors.
  • PXL may be constructed (or formed).
  • each of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 may be a sub-pixel emitting light of one color (eg, a predetermined color).
  • the first sub-pixel SPXL1 may be a red pixel emitting red (eg, first color) light
  • the second sub-pixel SPXL2 may be green (eg, second color) light.
  • the third sub-pixel SPXL3 may be a blue pixel emitting blue (eg, a third color) light.
  • the color, type, and/or number of the sub-pixels SPXL constituting (or forming) each of the pixel units are not limited to specific examples.
  • the pixel PXL includes the first to third sub-pixels SPXL1, SPXL2, and SPXL3
  • the sub-pixel SPXL as defined herein may be any one of the first to third sub-pixels SPXL1, SPXL2, and SPXL3.
  • FIG 3 is a cross-sectional view illustrating a display device according to at least one exemplary embodiment.
  • the display device DD may include a substrate SUB, a pixel circuit unit PCL, a display element unit DPL, and a light controller LCP.
  • the substrate SUB, the pixel circuit unit PCL, the display element unit DPL, and the light control unit LCP may control the display direction (eg, the third direction DR3 ) of the display device DD.
  • the display direction may refer to a thickness direction of the substrate SUB.
  • the substrate SUB may constitute a base surface of the display device DD. Individual components of the display device DD may be disposed on the substrate SUB.
  • the pixel circuit unit PCL may be disposed on the substrate SUB.
  • the pixel circuit unit PCL may include a pixel circuit (refer to 'PXC' of FIG. 4 ) configured to drive the pixel PXL.
  • the display element part DPL may be disposed on the pixel circuit part PCL.
  • the display element unit DPL may emit light based on an electrical signal provided from the pixel circuit unit PCL.
  • the display element unit DPL may include a light emitting element (refer to 'LD' in FIG. 4 ) capable of emitting light.
  • the light emitted from the display element part DPL may pass through the light controller LCP and be provided to the outside (eg, an external area of the display device DD).
  • the light control unit LCP may be disposed on the display element unit DPL.
  • the light controller LCP may be disposed on the light emitting devices LD.
  • the light controller LCP may change the wavelength of light provided from the display element unit DPL (or the light emitting elements LD).
  • the light control unit LCP may include a color conversion unit CCL configured to change a wavelength of light and a color filter unit CFL configured to transmit light having a specific wavelength as shown in FIG. 5 . have.
  • FIG. 4 is a diagram illustrating a pixel circuit included in a pixel according to one or more exemplary embodiments.
  • FIG. 4 illustrates an electrical connection relationship between components included in a sub-pixel SPXL applied to a display device DD (eg, an active display device) according to one or more exemplary embodiments.
  • DD eg, an active display device
  • FIG. 4 shows the types of components included in the sub-pixel SPXL, the types of components included in the sub-pixel SPXL are not limited thereto.
  • the sub-pixel SPXL may include a light emitting device LD and a pixel circuit PXC.
  • the light emitting device LD may be connected between the first power line VDD and the second power line VSS.
  • One end (eg, a P-type semiconductor) of the light emitting device LD is connected to the first power line VDD via the first electrode ELT1 and the pixel circuit PXC, and the other end of the light emitting device LD
  • An end (eg, an N-type semiconductor) may be connected to the second power line VSS via the second electrode ELT2 .
  • the light emitting device LD when a driving current is supplied through the pixel circuit PXC, the light emitting device LD may emit light having a luminance corresponding to the driving current.
  • the light emitting devices LD may be connected to each other through various suitable connection structures between the first power line VDD and the second power line VSS.
  • the light emitting devices LD may be connected only in parallel to each other or only in series with each other.
  • the light emitting devices LDs may be connected in a series/parallel mixed structure.
  • a plurality of first light emitting elements may be electrically connected to each other in series, and a plurality of second light emitting elements may be electrically connected to each other in parallel.
  • the first power line VDD and the second power line VSS may have different potentials so that the light emitting devices LD may emit light.
  • the first power line VDD and the second power line VSS may have a potential difference sufficient to allow light to be emitted during the light emission period of the sub-pixel SPXL.
  • the first power line VDD may be set to a higher potential than the second power line VSS.
  • the pixel circuit PXC may connect between the first power line VDD and the light emitting device LD.
  • the pixel circuit PXC may include a first transistor T1 , a second transistor T2 , a third transistor T3 , and a storage capacitor Cst.
  • one electrode of the first transistor T1 may be connected to the first power line VDD, and the other electrode may be connected to one electrode (eg, an anode electrode) of the light emitting device LD. .
  • the gate electrode of the first transistor T1 may be connected to the first node N1 .
  • the first transistor T1 may control a current flowing through the light emitting device LD in response to a voltage applied through the first node N1 .
  • one electrode of the second transistor T2 may be connected to the data line DL, and the other electrode may be connected to the first node N1 .
  • the gate electrode of the second transistor T2 may be connected to the scan line SL.
  • the second transistor T2 is turned on when the scan signal is supplied from the scan line SL, and in this case, the data signal provided from the data line DL may be transferred to the first node N1 .
  • one electrode of the third transistor T3 may be connected to the sensing line SENL, and the other electrode may be connected to the second node N2 .
  • a gate electrode of the third transistor T3 may be connected to the sensing signal line SEL.
  • the reference voltage is a method for setting or initializing the voltage of the electrode of the first transistor T1 connected to the light emitting device LD (eg, the source electrode of the first transistor T1) to a constant value. can play a role.
  • the reference voltage may be set to be less than or equal to the voltage of the second power line VSS.
  • the third transistor T3 when the third transistor T3 is turned on in response to a sensing signal provided from the sensing signal line SEL, the third transistor T3 may transfer the sensing current to the sensing line SENL.
  • the sensing current may be used to calculate the mobility of the first transistor T1 and the amount of change in the threshold voltage.
  • the storage capacitor Cst may be connected between the first node N1 (or the gate electrode of the first transistor T1 ) and the second node N2 (or the other electrode of the first transistor T1 ). .
  • the storage capacitor Cst may store information about a difference between the voltage of the first node N1 and the voltage of the second node N2 .
  • the structure of the pixel circuit PXC is not limited to the structure illustrated in FIG. 4 , and various suitable structures may be implemented.
  • the first to third transistors T1 to T3 in FIG. 4 are illustrated based on an N-type transistor, the present invention is not limited thereto, and the first to third transistors T1 to T3 are P-type transistors according to an embodiment. can be configured.
  • FIG. 5 is a cross-sectional view schematically illustrating a pixel according to one or more exemplary embodiments.
  • a first sub-pixel SPXL1 a first sub-pixel SPXL1 , a second sub-pixel SPXL2 , and a third sub-pixel SPXL3 are illustrated.
  • the first transistor T1 among the components included in the pixel circuit PXC described with reference to FIG. 4 will be described as a reference.
  • the first transistor T1 is provided in each of the first sub-pixel SPXL1 , the second sub-pixel SPXL2 , and the third sub-pixel SPXL3 is illustrated in FIG. 5 .
  • the pixel circuit unit PCL may be disposed on the substrate SUB.
  • the pixel circuit part PCL includes a buffer layer BFL, a first transistor T1, a gate insulating layer GI, a first interlayer insulating layer ILD1, a second interlayer insulating layer ILD2, a bridge pattern BRP, and a contact part (BRP). CNT), and a passivation layer (PSV).
  • individual components of the pixel circuit unit PCL may be defined in each of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 .
  • the buffer layer BFL may be disposed on the substrate SUB.
  • the buffer layer BFL may prevent or substantially prevent impurities from diffusing from the outside.
  • the buffer layer BFL may include at least one of a metal oxide such as silicon nitride (SiN X ), silicon oxide (SiO X ), silicon oxynitride (SiO X NY ), and aluminum oxide (AlO X ).
  • the first transistor T1 may be a thin film transistor. According to one or more embodiments, the first transistor T1 may be a driving transistor.
  • the first transistor T1 may be connected (eg, electrically connected) to the light emitting device LD.
  • the first transistor T1 of the first sub-pixel SPXL1 may be connected (eg, electrically connected) to the light emitting device LD disposed in the first sub-pixel area SPXA1 .
  • the first transistor T1 of the second sub-pixel SPXL2 may be connected (eg, electrically connected) to the light emitting device LD disposed in the second sub-pixel area SPXA2 .
  • the first transistor T1 of the third sub-pixel SPXL3 may be connected (eg, electrically connected) to the light emitting device LD disposed in the third sub-pixel area SPXA3 .
  • the first transistor T1 may include an active layer ACT, a first transistor electrode TE1 , a second transistor electrode TE2 , and a gate electrode GE.
  • the active layer ACT may refer to a semiconductor layer.
  • the active layer ACT may be disposed on the buffer layer BFL.
  • the active layer ACT may include at least one of polysilicon, amorphous silicon, and an oxide semiconductor.
  • the active layer ACT may include a first contact region in contact with the first transistor electrode TE1 and a second contact region in contact with the second transistor electrode TE2 .
  • the first contact region and the second contact region may be semiconductor patterns doped with impurities.
  • a region between the first contact region and the second contact region may be a channel region.
  • the channel region may be an intrinsic semiconductor pattern that is not doped with impurities.
  • the gate electrode GE may be disposed on the gate insulating layer GI.
  • the position of the gate electrode GE may correspond to the position of the channel region of the active layer ACT.
  • the gate electrode GE may be disposed on the channel region of the active layer ACT with the gate insulating layer GI interposed therebetween.
  • the gate insulating layer GI may be disposed on the active layer ACT.
  • the gate insulating layer GI may include an inorganic material.
  • the gate insulating layer GI may include at least one of silicon nitride (SiN X ), silicon oxide (SiO X ), silicon oxynitride (SiO X NY ), and aluminum oxide (AlO X ).
  • the gate insulating layer GI may include an organic material.
  • the first interlayer insulating layer ILD1 may be disposed on the gate electrode GE. Like the gate insulating layer GI, the first interlayer insulating layer ILD1 may include at least one of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and aluminum oxide (AlO x ). may include
  • the first transistor electrode TE1 and the second transistor electrode TE2 may be disposed on the first interlayer insulating layer ILD1 .
  • the first transistor electrode TE1 passes through the gate insulating layer GI and the first interlayer insulating layer ILD1 to make contact with the first contact region of the active layer ACT, and the second transistor electrode TE2 passes through the gate insulating layer GI ) and the first interlayer insulating layer ILD1 may be in contact with the second contact region of the active layer ACT.
  • the first transistor electrode TE1 may be a source electrode
  • the second transistor electrode TE2 may be a drain electrode, but is not limited thereto.
  • the second interlayer insulating layer ILD2 may be disposed on the first transistor electrode TE1 and the second transistor electrode TE2 .
  • the second interlayer insulating layer ILD2 may include an inorganic material.
  • the inorganic material of the second interlayer insulating layer ILD2 may include at least one of materials of the first interlayer insulating layer ILD1 and the gate insulating layer GI.
  • silicon nitride (SiN x ) silicon It may include at least one of oxide (SiO x ), silicon oxynitride (SiO x N y ), and aluminum oxide (AlO x ).
  • the present disclosure is not limited to the above-described examples.
  • the second interlayer insulating layer ILD2 may include an organic material.
  • the bridge pattern BRP may be disposed on the second interlayer insulating layer ILD2 .
  • the bridge pattern BRP may be connected to the first transistor electrode TE1 through a contact hole penetrating the second interlayer insulating layer ILD2 .
  • the passivation layer PSV may be disposed on the second interlayer insulating layer ILD2 .
  • the passivation layer PSV may cover the bridge pattern BRP.
  • the passivation layer PSV may be provided in a form including an organic insulating layer, an inorganic insulating layer, or the organic insulating layer disposed on the inorganic insulating layer, but is not limited thereto.
  • a contact portion CNT connected to one region of the bridge pattern BRP may be formed in the passivation layer PSV.
  • the display element part DPL may be disposed on the pixel circuit part PCL.
  • the display element part DPL may include a first electrode ELT1 , a connection electrode COL, an insulating layer INS, a light emitting element LD, and a second electrode ELT2 .
  • individual components of the display element unit DPL may be defined in each of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 .
  • the first electrode ELT1 may be disposed on the passivation layer PSV.
  • the first electrode ELT1 may be disposed under the light emitting device LD.
  • the first electrode ELT1 may be connected to the bridge pattern BRP through the contact portion CNT.
  • the first electrode ELT1 may be connected to (or electrically connected to) the light emitting device LD. According to an example, the first electrode ELT1 may provide an electrical signal provided from the first transistor T1 to the light emitting device LD. The first electrode ELT1 may apply an anode signal to the light emitting device LD.
  • the first electrode ELT1 may include a conductive material.
  • the first electrode ELT1 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), It may include a metal such as iridium (Ir), chromium (Cr), titanium (Ti), or alloys thereof.
  • a metal such as iridium (Ir), chromium (Cr), titanium (Ti), or alloys thereof.
  • Ir iridium
  • Cr chromium
  • Ti titanium
  • connection electrode COL may be disposed on the first electrode ELT1 .
  • one surface of the connection electrode COL may be connected to the light emitting device LD, and the other surface of the connection electrode COL may be connected to the first electrode ELT1 .
  • connection electrode COL may include a conductive material to connect (or electrically connect) the first electrode ELT1 and the light emitting device LD.
  • the connection electrode COL may be connected to (or electrically connected to) the second semiconductor layer 13 of the light emitting device LD.
  • the connection electrode COL may include a conductive material having a reflective property in order to reflect light emitted from the light emitting device LD, thereby improving the luminous efficiency of the pixel PXL. can do.
  • connection electrode COL may be a bonding metal that is bonded to (or coupled to) the light emitting device LD.
  • the connection electrode COL may be bonded or combined with the light emitting device LD.
  • the light emitting device LD may be included in each of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 .
  • the light emitting element LD is configured to emit light.
  • the light emitting device LD may include a first semiconductor layer 11 and a second semiconductor layer 13 , and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13 . have.
  • the light emitting device LD may include a first semiconductor layer 11 and an active layer 12 stacked (eg, sequentially stacked) along the length direction. ), and a second semiconductor layer 13 .
  • the light emitting device LD may be provided in a columnar shape extending in one direction.
  • the light emitting device LD may have a first end EP1 and a second end EP2 .
  • One of the first semiconductor layer 11 and the second semiconductor layer 13 may be adjacent to the first end EP1 of the light emitting device LD.
  • the other one of the first semiconductor layer 11 and the second semiconductor layer 13 may be adjacent to the second end EP2 of the light emitting device LD.
  • the light emitting device LD may be a light emitting device manufactured in a pillar shape through an etching method or the like.
  • the columnar shape encompasses a rod-like shape or a bar-like shape that is long in the longitudinal direction (ie, an aspect ratio greater than 1), such as a circular column or a polygonal column, etc.
  • the shape of the cross section is not particularly limited.
  • the length of the light emitting device LD may be greater than a diameter thereof or a width of a cross-section).
  • the light emitting device LD may have a size as small as a nanometer scale to a micrometer scale.
  • each of the light emitting devices LD may have a diameter (or width) and/or a length ranging from nanoscale to microscale.
  • the size of the light emitting device LD is not limited thereto.
  • the first semiconductor layer 11 may be a semiconductor layer of the first conductivity type.
  • the first semiconductor layer 11 may include an N-type semiconductor layer.
  • the first semiconductor layer 11 includes a semiconductor material of any one of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and is an N-type semiconductor doped with a first conductivity type dopant such as Si, Ge, Sn, etc. layers may be included.
  • the material constituting the first semiconductor layer 11 is not limited thereto.
  • the active layer 12 is disposed on the first semiconductor layer 11 and may have a single-quantum well structure or a multi-quantum well structure.
  • the active layer 12 includes a barrier layer, a strain reinforcing layer, and a well layer as one unit. can be repeatedly stacked.
  • the strain-reinforced layer has a smaller lattice constant than the barrier layer, so that the structure against the strain applied to the well layer, for example, the compressive strain, may be further strengthened.
  • the structure of the active layer 12 is not limited to the above-described embodiment.
  • the active layer 12 may emit light having a wavelength between 400 nm and 900 nm.
  • the active layer 12 may include a material such as AlGaN or InAlGaN, but is not limited to the above-described example.
  • the second semiconductor layer 13 is disposed on the active layer 12 , and may include a semiconductor layer of a different type from that of the first semiconductor layer 11 .
  • the second semiconductor layer 13 may include a P-type semiconductor layer.
  • the second semiconductor layer 13 includes at least one semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a P-type semiconductor layer doped with a second conductivity type dopant such as Mg. can
  • the material constituting the second semiconductor layer 13 is not limited thereto, and various other suitable materials may be used to form the second semiconductor layer 13 .
  • the light emitting device LD When a voltage equal to or greater than the threshold voltage is applied to both ends of the light emitting device LD, the light emitting device LD emits light while electron-hole pairs are combined in the active layer 12 .
  • the light emitting device LD can be used as a light source of various light emitting devices including pixels of a display device.
  • the light emitting device LD may further include an insulating layer INF provided on a surface thereof.
  • the insulating layer INF may be formed of a single layer or a double layer, but is not limited thereto, and may include a plurality of layers.
  • the insulating layer INF may include a first insulating layer including a first material and a second insulating layer including a second material different from the first material.
  • the insulating layer INF may expose both ends of the light emitting device LD having different polarities.
  • the insulating layer INF may expose one end of each of the first and second semiconductor layers 11 and 13 positioned at the first and second ends EP1 and EP2 of the light emitting device LD.
  • the insulating layer INF may include an inorganic material.
  • the insulating layer INF may include at least one of silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (AlO x ), and titanium oxide (TiO x ). It may be composed (or formed) of a single layer or multiple layers including an insulating material, but is not limited thereto.
  • the insulating layer INF may secure electrical stability of the light emitting device LD.
  • an undesired short circuit occurs between the light emitting devices LD (eg, between adjacent light emitting devices LD). can be prevented from doing
  • the light emitting device LD may further include an additional configuration other than the aforementioned configuration.
  • the light emitting device LD may include one or more phosphor layers, active layers, semiconductor layers and/or one or more phosphor layers disposed on one end side of the first semiconductor layer 11 , the active layer 12 and/or the second semiconductor layer 13 .
  • An electrode layer may be additionally included.
  • a contact electrode layer may be further disposed on the first and second ends EP1 and EP2 of the light emitting device LD, respectively.
  • the insulating layer INS may be disposed on the passivation layer PSV.
  • the insulating layer INS may cover at least a portion of the first electrode ELT1 and/or the connection electrode COL.
  • the insulating layer INS may be provided between the connection electrode COL and the light emitting devices LD bonding (or bonding) to each other.
  • the insulating layer INS may be disposed between the light emitting devices LD to cover an outer surface of the light emitting devices LD.
  • the insulating layer INS may include any one of the materials exemplarily listed with reference to the insulating layer INF, but is not limited thereto.
  • the second electrode ELT2 may be disposed on the insulating layer INS.
  • the second electrode ELT2 may be disposed on the light emitting device LD.
  • the second electrode ELT2 may be connected (eg, electrically connected) to the light emitting device LD.
  • the second electrode ELT2 may be connected (eg, electrically connected) to the first semiconductor layer 11 .
  • the second electrode ELT2 may apply a cathode signal to the light emitting device LD.
  • the second electrode ELT2 may provide an electrical signal supplied from the second power line VSS to the light emitting device LD.
  • the second electrode ELT2 may include a conductive material.
  • the second electrode ELT2 may include a transparent conductive material.
  • the second electrode ELT2 includes indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium gallium zinc oxide (IGZO). , a conductive oxide such as indium tin zinc oxide (ITZO), or a conductive polymer such as poly(3,4-ethylenedioxythiophene) (PEDOT).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ZnO zinc oxide
  • IGZO indium gallium zinc oxide
  • a conductive oxide such as indium tin zinc oxide (ITZO)
  • PEDOT poly(3,4-ethylenedioxythiophene)
  • the light control unit LCP may be disposed on the display element unit DPL.
  • the light control unit LCP may change the wavelength of the light provided from the display element unit DPL.
  • the light control unit LCP may include a color conversion unit CCL and a color filter unit CFL.
  • the light emitting devices LD disposed in each of the first sub-pixel SPXL1 , the second sub-pixel SPXL2 , and the third sub-pixel SPXL3 may emit light of the same color.
  • the first sub-pixel SPXL1 , the second sub-pixel SPXL2 , and the third sub-pixel SPXL3 may include light emitting devices LD that emit light of a third color (eg, blue light).
  • the light controller LCP is disposed on the first sub-pixel SPXL1 , the second sub-pixel SPXL2 , and the third sub-pixel SPXL3 to display a full-color image.
  • the present invention is not limited thereto, and the first sub-pixel SPXL1 , the second sub-pixel SPXL2 , and the third sub-pixel SPXL3 may include light emitting devices LD that emit light of different colors.
  • the color conversion unit CCL may include a first passivation layer PSS1 , a wavelength conversion pattern WCP, a light transmission pattern LTP, a light blocking layer LBL, and a second passivation layer PSS2 .
  • the wavelength conversion pattern WCP may include a first wavelength conversion pattern WCP1 and a second wavelength conversion pattern WCP2 .
  • the first passivation layer PSS1 may be disposed between the display element part DPL and the light blocking layer LBL or the wavelength conversion pattern WCP and/or between the display element part DPL and the wavelength conversion pattern WCP. have.
  • the first passivation layer PSS1 may seal (or cover) the wavelength conversion pattern WCP.
  • the first passivation layer PSS1 may include any one of the materials exemplarily enumerated with reference to the insulating layer INF, but is not limited thereto.
  • an adhesive layer may be interposed between the first passivation layer PSS1 and the second electrode ELT2 .
  • the adhesive layer may couple the first passivation layer PSS1 and the second electrode ELT2 to each other.
  • the adhesive layer may include any suitable adhesive material, and is not limited to specific examples.
  • the first wavelength conversion pattern WCP1 may be disposed to overlap the emission area EMA (eg, the first sub-pixel area SPXA1 ) of the first sub-pixel SPXL1 .
  • the first wavelength conversion pattern WCP1 may be disposed in a space defined by the light blocking layer LBL and may overlap the first sub-pixel area SPXA1 in a plan view.
  • the light blocking layer LBL includes a plurality of walls
  • the first wavelength conversion pattern WCP1 is a space between the plurality of walls disposed in an area corresponding to the first sub-pixel SPXL1.
  • the second wavelength conversion pattern WCP2 may be disposed to overlap the emission area EMA (eg, the second sub-pixel area SPXA2 ) of the second sub-pixel SPXL2 .
  • the second wavelength conversion pattern WCP2 may be disposed in a space defined by the light blocking layer LBL and may overlap the second sub-pixel area SPXA2 in a plan view.
  • the light blocking layer LBL includes a plurality of walls
  • the second wavelength conversion pattern WCP2 is a space between the plurality of walls disposed in an area corresponding to the second sub-pixel SPXL2 .
  • the light transmission pattern LTP may be disposed to overlap the emission area EMA of the third sub-pixel SPXL3 (eg, the third sub-pixel area SPXA3 ).
  • the light transmission pattern LTP may be disposed in a space defined by the light blocking layer LBL and may overlap the third sub-pixel area SPXA3 when viewed in a plan view.
  • the light blocking layer LBL includes a plurality of walls, and the light transmission pattern LTP is provided in a space between the plurality of walls disposed in an area corresponding to the third sub-pixel SPXL3 can be
  • the first wavelength conversion pattern WCP1 may include first color conversion particles that convert light of a third color emitted from the light emitting device LD into light of the first color.
  • the first wavelength conversion pattern WCP1 is a blue light emitting device that emits blue light. It may include a first quantum dot that converts light into red light.
  • the first wavelength conversion pattern WCP1 may include a plurality of first quantum dots dispersed in a matrix material (eg, a predetermined matrix material) such as a base resin.
  • the first quantum dot may absorb blue light and shift a wavelength according to an energy transition to emit red light.
  • the first wavelength conversion pattern WCP1 may include a first quantum dot corresponding to the color of the first sub-pixel SPXL1 .
  • the second wavelength conversion pattern WCP2 may include second color conversion particles that convert light of a third color emitted from the light emitting device LD into light of a second color.
  • the second wavelength conversion pattern WCP2 is a blue light emitting device that emits blue light. It may include a second quantum dot that converts light into green light.
  • the second wavelength conversion pattern WCP2 may include a plurality of second quantum dots dispersed in one matrix material (eg, a predetermined matrix material) such as a base resin.
  • the second quantum dot may absorb blue light and shift a wavelength according to an energy transition to emit green light.
  • the second wavelength conversion pattern WCP2 may include a second quantum dot corresponding to the color of the second sub-pixel SPXL2 .
  • first quantum dot and the second quantum dot are in the form of spherical, pyramidal, multi-arm, or cubic nanoparticles, nanotubes, nanowires, nanofibers, nanoplatelet particles, etc. may have, but is not necessarily limited thereto, and the shapes of the first quantum dot and the second quantum dot may be variously changed in an appropriate manner.
  • absorption coefficients of the first quantum dot and the second quantum dot may be increased by making the blue light having a relatively short wavelength in the visible light region incident on the first quantum dot and the second quantum dot, respectively. . Accordingly, the efficiency of light emitted from the first sub-pixel SPXL1 and the second sub-pixel SPXL2 may be increased, and excellent color reproducibility may be secured.
  • by configuring the pixel units of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 using light emitting devices LD (eg, blue light emitting devices) of the same color manufacturing efficiency of the display device is increased. can increase
  • the light transmission pattern LTP may be provided to efficiently use the light of the third color emitted from the light emitting device LD.
  • the light transmission pattern LTP efficiently transmits light emitted from the light emitting device LD. It may include at least one kind of light scattering particles for use as
  • the light transmission pattern LTP may include a plurality of light scattering particles dispersed in one matrix material (eg, a predetermined matrix material) such as a base resin.
  • the light transmission pattern LTP may include light scattering particles such as silica, but the material of the light scattering particles is not limited thereto.
  • the light scattering particles do not have to be disposed only in the third sub-pixel area SPXA3 in which the third sub-pixel SPXL3 is formed.
  • the light scattering particles may be selectively included in the first and/or second wavelength conversion patterns WCP1 and WCP2.
  • the light blocking layer LBL may be disposed on the display device portion DPL.
  • the light blocking layer LBL may be disposed on the substrate SUB.
  • the light blocking layer LBL may be disposed between the first passivation layer PSS1 and the second passivation layer PSS2 .
  • the light blocking layer LBL may be disposed to surround the first wavelength conversion pattern WCP1 , the second wavelength conversion pattern WCP2 , and the light transmission pattern LTP at the boundary between the sub-pixels SPXL.
  • the light blocking layer LBL may define the emission area EMA and the non-emission area NEA of the sub-pixel SPXL.
  • the light blocking layer LBL may define first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 .
  • the light blocking layer LBL may not overlap the light emitting area EMA when viewed in a plan view.
  • the light blocking layer LBL may overlap the non-emission area NEA when viewed in a plan view.
  • the area in which the light blocking layer LBL is not disposed may be defined as the emission area EMA of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 .
  • the emission area EMA of the first sub-pixel SPXL1 is the first sub-pixel area SPXA1
  • the emission area EMA of the second sub-pixel SPXL2 is the second sub-pixel area SPXA2
  • the third The emission area EMA of the sub-pixel SPXL3 may be the third sub-pixel area SPXA3 .
  • the light blocking layer LBL is formed of an organic material including at least one of graphite, carbon black, black pigment, or black dye, or It may be formed of a metal material including chromium (Cr), but is not limited to the above-described material as long as it is a material capable of blocking and absorbing light.
  • the second passivation layer PSS2 may be disposed between the color filter unit CFL and the light blocking layer LBL and/or between the color filter unit CFL and the wavelength conversion pattern WCP.
  • the second passivation layer PSS2 may seal (or cover) the first wavelength conversion pattern WCP1 , the second wavelength conversion pattern WCP2 , and the light transmission pattern LTP.
  • the second passivation layer PSS2 may include any one of the materials exemplarily enumerated with reference to the insulating layer INF, but is not limited thereto.
  • the color filter unit CFL may be disposed on the color conversion unit CCL.
  • the color filter unit CFL may include a color filter CF and a planarization layer PLA.
  • the color filter CF may include a first color filter CF1 , a second color filter CF2 , and a third color filter CF3 .
  • the color filter CF may be disposed on the second passivation layer PSS2 .
  • the color filter CF may overlap the emission area EMA of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 when viewed in a plan view.
  • the first color filter CF1 is disposed in the first sub-pixel area SPXA1
  • the second color filter CF2 is disposed in the second sub-pixel area SPXA2
  • the third color filter CF3 is disposed in the second sub-pixel area SPXA2 .
  • the first color filter CF1 may transmit light of a first color and may not transmit light of a second color and/or light of a third color.
  • the first color filter CF1 may include a colorant related to the first color.
  • the second color filter CF2 may transmit the light of the second color, but may not transmit the light of the first color and the light of the third color.
  • the second color filter CF2 may include a colorant related to the second color.
  • the third color filter CF3 may transmit light of a third color, but may not transmit light of the first color and light of the second color.
  • the third color filter CF3 may include a colorant related to the third color.
  • the planarization layer PLA may be disposed on the color filter CF.
  • the planarization layer PLA may cover the color filter CF.
  • the planarization layer PLA may offset a step difference caused by the color filter CF. That is, the planarization layer PLA may cover the step difference of the color filter CF and may have a planarized upper surface or a substantially planarized upper surface.
  • the planarization layer PLA may include an organic insulating material.
  • the present disclosure is not limited thereto, and the planarization layer PLA may include inorganic materials exemplarily listed with reference to the insulating layer INF.
  • the structures of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 are not limited to those described above with reference to FIG. 5 , and various suitable structures may be used to provide the display device DD according to one or more exemplary embodiments. may be appropriately or suitably selected.
  • the display device DD may further include a low refractive index layer to improve light efficiency.
  • FIG. 6 shows the color conversion unit CCL defining the area of the sub-pixels SPXL in EA1 as the center.
  • 7 and 8 show the arrangement of the light emitting devices LD included in the sub-pixels SPXL of EA1.
  • positions of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 are positioned in the light blocking layer LBL. can be defined by
  • the area in which the light blocking layer LBL is not disposed may be the emission area EMA in which the light emitted from the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 is provided to the outside.
  • the area in which the light blocking layer LBL is disposed may be a non-emission area NEA in which light emitted from the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 is not substantially provided to the outside.
  • the light blocking layer LBL may include a first opening OP1 , a second opening OP2 , and a third opening OP3 .
  • the first opening OP1 , the second opening OP2 , and the third opening OP3 may be regions in which the light blocking layer LBL is not disposed.
  • the position of the first opening OP1 corresponds to the first sub-pixel area SPXA1
  • the position of the second opening OP2 corresponds to the second sub-pixel area SPXA2
  • the third opening The position of OP3 may correspond to the third sub-pixel area SPXA3 .
  • At least a portion of the light blocking layer LBL is provided in a form that is disposed around (or surrounds) an area to be provided as the first sub-pixel SPXL1 (eg, the first sub-pixel area SPXA1).
  • One opening OP1 may be formed.
  • a first sub-pixel area SPXA1 may be defined in the first opening OP1 .
  • the first sub-pixel area SPXA1 is an area in which the first sub-pixel SPXL1 is disposed, and may refer to the emission area EMA of the first sub-pixel SPXL1 .
  • the wavelength conversion pattern WCP including the first wavelength conversion material may be disposed at a position corresponding to the first opening OP1 . Accordingly, the light emitted from the light emitting device LD included in the first sub-pixel SPXL1 may be provided as light having the first color and output to the outside.
  • At least a portion of the light blocking layer LBL is provided in a form that is disposed (eg, surrounds) an area to be provided as the second sub-pixel SPXL2 (eg, the second sub-pixel area SPXA2).
  • the second opening OP2 may be formed.
  • a second sub-pixel area SPXA2 may be defined in the second opening OP2 .
  • the second sub-pixel area SPXA2 is an area in which the second sub-pixel SPXL2 is disposed, and may refer to the emission area EMA of the second sub-pixel SPXL2 .
  • the wavelength conversion pattern WCP including the second wavelength conversion material may be disposed at a position corresponding to the second opening OP2 . Accordingly, the light emitted from the light emitting device LD included in the second sub-pixel SPXL2 may be provided as light having the second color and output to the outside.
  • the third sub-pixel SPXL3 (eg, the third sub-pixel area SPXA3).
  • the third opening OP3 may be formed.
  • a third sub-pixel area SPXA3 may be defined in the third opening OP3 .
  • the third sub-pixel area SPXA3 is an area in which the third sub-pixel SPXL3 is disposed, and may refer to the emission area EMA of the third sub-pixel SPXL3 .
  • a separate wavelength conversion material may not be disposed at a position corresponding to the third opening OP3 . Accordingly, the light emitted from the light emitting device LD included in the third sub-pixel SPXL3 may be provided as light having the third color and output to the outside.
  • the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 may be spaced apart from each other in the first direction DR1 .
  • the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 may be spaced apart from each other in the first direction DR1 .
  • the first sub-pixel area SPXA1 may be disposed on one side of the second sub-pixel area SPXA2
  • the third sub-pixel area SPXA3 may be disposed on the other side of the second sub-pixel area SPXA2 .
  • the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 may extend in the second direction DR2 .
  • the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 may be spaced apart from each other in the second direction DR2 .
  • first direction DR1 and the second direction DR2 may cross each other.
  • the first direction DR1 and the second direction DR2 may be non-parallel to each other.
  • the first direction DR1 and the second direction DR2 may be orthogonal to each other.
  • 7 and 8 show a structure in which light emitting devices LDs are arranged.
  • 7 is a diagram illustrating an arrangement structure of a light emitting device LD according to the first embodiment.
  • 8 is a diagram illustrating an arrangement structure of a light emitting device LD according to a second exemplary embodiment.
  • the light emitting devices LDs may be arranged in a matrix form.
  • the light emitting devices LD may be arranged according to a matrix shape defined in a row direction extending in the first arrangement direction ADR1 and a column direction extending in the second arrangement direction ADR2 (or along ).
  • the matrix may be defined in a matrix form defined in a column direction extending in the first arrangement direction ADR1 and a row direction extending in the second arrangement direction ADR2 (or along ).
  • first arrangement direction ADR1 and the second arrangement direction ADR2 may cross each other.
  • the first arrangement direction ADR1 and the second arrangement direction ADR2 may be non-parallel to each other.
  • the first arrangement direction ADR1 and the second arrangement direction ADR2 may be orthogonal to each other.
  • the light emitting devices LD may be arranged at positions corresponding to each row and column in the matrix form.
  • the ijth light emitting device LDij may refer to the light emitting device LD arranged in the i-row and j-column in the matrix form.
  • one light emitting device LD may be disposed in a first column of a first row
  • another light emitting device LD may be disposed in a tenth column of a tenth row.
  • the light emitting device LD may have a rectangular shape (or a square shape) when viewed in a plan view.
  • the light emitting device LD may be provided in a rectangular shape (or a square shape) when viewed in a plan view.
  • the light emitting device LD may have a circular shape when viewed in a plan view.
  • the light emitting device LD when it is provided in the form of a column having a circular bottom, it may be provided in a circular shape when viewed in a plan view.
  • the shape of the light emitting device LD is not limited to the above-described example, and according to one or more embodiments, a light emitting device LD having a well-known appropriate bottom shape may be provided.
  • the number of light emitting devices LD per unit area on the substrate SUB may be uniform.
  • the number of light emitting devices LDs disposed in the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 per unit area may be substantially uniform.
  • the light emitting devices LD may include a first plurality of light emitting devices disposed in the first sub pixel area SPXA1 , a second plurality of light emitting devices disposed in the second sub pixel area SPXA2 , and a third sub pixel area SPXA2 .
  • a third plurality of light emitting devices disposed in the pixel area SPXA3 may be included.
  • the number of each of the first plurality of light emitting devices, the second plurality of light emitting devices, and the third plurality of light emitting devices may be substantially the same as each other, or may be less than or equal to one difference (eg, a predetermined difference). .
  • the light emitting devices LD may be generally arranged side by side in the first arrangement direction ADR1 .
  • the light emitting devices LD may be generally arranged side by side in the second arrangement direction ADR2 . That is, regardless of the shape of the light emitting device LD, the matrix arrangement form may be clearly defined according to the arrangement position of the light emitting device LD.
  • At least a portion of the light emitting devices LD arranged in a matrix form may be disposed in the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 .
  • the light emitting device LD is not disposed in the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3 or intermittently disposed in the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3. it may not be
  • the number of light emitting devices LD not disposed in the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 may be minimized or reduced. This will be described later with reference to FIGS. 9 and 10 .
  • FIG. 9 and 10 are plan views schematically illustrating a positional relationship between light emitting elements included in a display device according to at least one exemplary embodiment.
  • FIG. 10 is an enlarged view of EA2 of FIG. 9 .
  • the first sub-pixel SPXL1 and the second sub-pixel SPXL2 are mainly illustrated for convenience of description.
  • the technical features of the first sub-pixel SPXL1 and the second sub-pixel SPXL2 described in FIGS. 9 and 10 may be defined and applied to the sub-pixels SPXL.
  • the light emitting devices LD may include a first light emitting device LD1 , a second light emitting device LD2 , and a third light emitting device LD3 .
  • the first light emitting device LD1 and the second light emitting device LD2 may be disposed in the first sub-pixel area SPXA1 . Accordingly, the light emitted from the first light emitting device LD1 and the second light emitting device LD2 may be included in the light emitted from the first sub-pixel SPXL1 .
  • the third light emitting device LD3 may be disposed in the second sub-pixel area SPXA2 . Accordingly, the light emitted from the third light emitting device LD3 may be included in the light emitted from the second sub-pixel SPXL2 .
  • the first light emitting device LD1 may be adjacent to the second light emitting device LD2 in the first arrangement direction ADR1 .
  • the first light emitting device LD1 and the second light emitting device LD2 may be spaced apart from each other by a first arrangement distance 120 .
  • the first arrangement distance 120 may refer to the shortest distance between the first light emitting device LD1 and the second light emitting device LD2 .
  • the first light emitting device LD1 may be adjacent to the third light emitting device LD3 in the second arrangement direction ADR2 .
  • the first light emitting device LD1 and the third light emitting device LD3 may be spaced apart from each other by a second arrangement distance 140 .
  • the second arrangement distance 140 may refer to the shortest distance between the first light emitting device LD1 and the third light emitting device LD3 .
  • the first arrangement distance 120 and the second arrangement distance 140 may be equal to each other. Accordingly, the light emitting devices LD described above with reference to FIGS. 7 and 8 may be provided such that the distances spaced apart from the light emitting devices LD adjacent to each other are equal to each other. However, according to one or more embodiments, the first arrangement distance 120 and the second arrangement distance 140 may be provided to be different from each other.
  • the extending direction of the first sub-pixel SPXL1 and the second sub-pixel SPXL2 and the first arrangement direction ADR1 may cross each other.
  • the extending direction of the first sub-pixel SPXL1 and the second sub-pixel SPXL2 and the first arrangement direction ADR1 may be non-parallel to each other.
  • the sub-pixels SPXL may be spaced apart from each other in the first direction DR1 and may extend in the second direction DR2 , and accordingly, the first arrangement direction ADR1 and the second The directions DR2 may intersect.
  • the first arrangement direction ADR1 and the second direction DR2 may be non-parallel to each other.
  • the extension line 210 parallel to the direction in which the first sub-pixel SPXL1 extends and the first arrangement direction ADR1 may form an angle ⁇ between each other.
  • the extension line 210 may be parallel to the second direction DR2 .
  • the second direction DR2 may form an angle ⁇ between the first arrangement direction ADR1 and an acute angle.
  • the angle between the angles ⁇ may not be 0 degrees, 45 degrees, and 90 degrees. According to an example, the angle between the angles ⁇ may be 5 degrees to 40 degrees. Alternatively, the angle ⁇ may be 10 degrees to 35 degrees.
  • the light emitting element LD that is not arranged in the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3 is formed so that the angle between the angles ⁇ is avoided at values of 0 degrees, 45 degrees, and 90 degrees. may be reduced, and thus arrangement efficiency of the light emitting device LD may be improved.
  • the separation distance between the light emitting elements LD has a numerical relationship (eg, the first length 220 ).
  • a predetermined numerical relationship may be satisfied.
  • the first length 220 may refer to a length of one side of the sub-pixel SPXL parallel to the first direction DR1 .
  • the first length 220 may refer to a length of one side of the first sub-pixel SPXL1 parallel to the first direction DR1 .
  • the separation distance between the light emitting devices LD and the first length 220 may satisfy Equation 1 below.
  • y denotes the first length 220
  • y denotes a separation distance between the light emitting devices LDs. Accordingly, y may refer to the first arrangement distance 120 and/or the second arrangement distance 140 .
  • the distance y between the light emitting devices LD and the length x 2 of one side in the first direction DR1 of the pixel PXL may satisfy Equation 2 below. have.
  • the second length 230 may refer to a length of the pixel PXL in the first direction DR1 .
  • the second length 230 may extend in the first direction ( DR1 ).
  • DR1 one end 232 of the first sub-pixel SPXL1 (or the first sub-pixel area SPXA1) and the third sub-pixel SPXL3 (or the third sub-pixel area SPXA3) ) may refer to a separation distance between the other ends 234 .
  • the other end 234 may face each other at the outer end of the pixel PXL.
  • n is the number of sub-pixels SPXL arranged along the first direction DR1.
  • n may be 3.
  • the length of one side of one sub-pixel SPXL is defined based on the length of one side of the pixel PXL composed of the sub-pixels SPXL and the number of the sub-pixels SPXL, so that the light emitting device ( A relationship between the distance between the LDs and the length of the pixel PXL may be derived.
  • the convenience of designing the arrangement of the light emitting devices LD may be increased during the process.
  • the separation distance 240 between the first sub-pixel SPXL1 and the second sub-pixel SPXL2 and the length characteristic of the light emitting device LD have a numerical relationship (eg, a predetermined numerical relationship) can be satisfied.
  • the separation distance 240 between the first sub-pixel SPXL1 and the second sub-pixel SPXL2 in the first direction DR1 may be determined by the length characteristic of the single light emitting device LD.
  • the light emitting device LD may have one bottom surface length (eg, a predetermined bottom surface length) 100 when viewed in a plan view.
  • the length 100 of the bottom surface of the light emitting device LD may be a length determined according to the shape of the bottom surface of the light emitting device LD.
  • the base length 100 may refer to a length of a diagonal of a square (or rectangular).
  • the bottom surface length 100 may refer to the diameter of the circle.
  • the bottom surface length 100 may refer to the major radius of the ellipse.
  • the distance between the bottom surface length 100 of the light emitting device LD and the sub-pixels SPXL may satisfy Equation 3 below.
  • z may be an interval between the sub-pixels SPXL.
  • w may be the length 100 of the bottom surface of the light emitting device LD.
  • a distance between the sub-pixels SPXL is defined according to a characteristic length of the light emitting device LD, so that a short defect may be prevented or substantially prevented.
  • the relationship between the distance between the light emitting devices LD and the length of the sub-pixels SPXL is defined by an equation (eg, a predetermined equation), so that the convenience of process design is improved.
  • the display device DD having improved electrical reliability by preventing or substantially preventing short-circuit defects may be provided.
  • 11 to 15 and 17 are cross-sectional views for each process step (or act) of a method of manufacturing the display device DD.
  • 16 and 18 are plan views for each process step (or operation) of a method of manufacturing the display device DD.
  • the laminate substrate 1 is prepared (or provided), and the first semiconductor layer 11 , the active layer 12 , and the second semiconductor layer 13 are formed on the laminate substrate 1 .
  • the laminated substrate 1 may be a base plate for laminating a target material.
  • the multilayer substrate 1 may be a wafer for epitaxial growth of a material (eg, a predetermined material).
  • the multilayer substrate 1 may be any one of a sapphire substrate, a GaAs substrate, a Ga substrate, and an InP substrate, but is not limited thereto.
  • the material is used as the material of the laminate substrate 1 . can be selected.
  • the first semiconductor layer 11 , the active layer 12 , and the second semiconductor layer 13 are formed by a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy method.
  • MOCVD metal organic chemical vapor deposition
  • MBE Molecular Beam Epitaxy
  • VPE Vapor Phase Epitaxy
  • LPE Liquid Phase Epitaxy
  • each of the first semiconductor layer 11 , the active layer 12 , and the second semiconductor layer 13 may be removed to provide light emitting devices LDs separately separated from each other. .
  • an etching process may be performed on the first semiconductor layer 11 , the active layer 12 , and the second semiconductor layer 13 .
  • the first semiconductor layer 11 , the active layer 12 , and the second semiconductor layer 13 are stacked (eg, sequentially stacked) in a structure.
  • patterning at a nano-scale or micro-scale interval may be performed.
  • the etching process may be performed in a direction from the second semiconductor layer 13 toward the first semiconductor layer 11 .
  • the etching process may include Reactive Ion Etching (RIE), Reactive Ion Beam Etching (RIBE), and Inductively Coupled Plasma Reactive Ion Etching (ICP-RIE). ), but is not limited to a specific example.
  • RIE Reactive Ion Etching
  • RIBE Reactive Ion Beam Etching
  • ICP-RIE Inductively Coupled Plasma Reactive Ion Etching
  • provided light emitting devices LD may be patterned in a matrix form defined by the first arrangement direction ADR1 and the second arrangement direction ADR2 .
  • the laminate substrate 1 may be separated from the light emitting devices LD, and the light emitting devices LDs may be coupled (or disposed, or connected) on a donor film 16 .
  • the laminate substrate 1 may be physically separated from the first semiconductor layer 11 .
  • the multilayer substrate 1 and the first semiconductor layer 11 may be separated by a laser lift-off (LLO) method.
  • LLO laser lift-off
  • the present disclosure is not limited thereto, and according to one or more exemplary embodiments, the multilayer substrate 1 and the first semiconductor layer 11 may be separated by a chemical lift-off (CLO) method.
  • this step may also be removed. Accordingly, this step (or operation) may be performed to provide a plurality of light emitting device (LD) arrays patterned at one interval (eg, a predetermined interval) on the donor film 16 .
  • LD light emitting device
  • the donor film 16 may be formed on the light emitting device LD before a subsequent process (eg, a process of disposing the light emitting device LD on the substrate SUB and the pixel circuit unit PCL) is performed. ) may be configured to provide a location (eg, a predetermined location).
  • the donor film 16 may be referred to as a donor wafer or donor substrate.
  • the donor film 16 may be an isotropically stretchable film.
  • the donor film 16 may include a polymer composition (eg, a polyvinyl chloride (PVC)-based material), but is not limited to a specific example.
  • PVC polyvinyl chloride
  • the light emitting devices LD patterned in this step (or operation) are configured in a row direction extending in the first arrangement direction ADR1 and a column direction extending along the second arrangement direction ADR2 . It can be arranged in the form of a matrix.
  • the donor film 16 may be deformed.
  • the planar (or planar view) area of the donor film 16 may be increased.
  • the donor film 16 may extend in one direction.
  • the donor film 16 may extend in the areal direction.
  • the light emitting devices LD adjacent to each other on the donor film 16 may be spaced apart from each other by an undeformed interval 112 .
  • the light emitting devices LD are arranged in a matrix form on the donor film 16 , and the light emitting devices LD adjacent to each other may be spaced apart from each other by an unmodified interval (or unmodified interval) 112 .
  • the undeformed interval 112 may refer to the shortest distance between the light emitting devices LD adjacent to each other on a plane (or when viewed on a plane).
  • the light emitting devices LD adjacent to each other in the first arrangement direction ADR1 or the second arrangement direction ADR2 may be spaced apart from each other by an undeformed interval 112 .
  • the donor film 16 in this step (or operation), may be uniformly expanded radially. In this step (or operation), the length (or area) of the donor film 16 is determined, so that the separation distance between the light emitting devices LD may be increased. According to one example, the donor film 16 may be physically extended (or expanded), but any suitable method may be applied, and the present invention is not limited to a specific example.
  • the light emitting devices LD adjacent to each other in the first arrangement direction ADR1 may be spaced apart by the first arrangement distance 120 , and the second arrangement direction ADR2 ), the light emitting devices LD adjacent to each other may be spaced apart by a second arrangement distance 140 .
  • the desired physical properties of the donor film 16 may be determined by a numerical relationship between the unstrained spacing 112 , the first alignment distance 120 , and/or the second alignment distance 140 . have.
  • the extendable range in the longitudinal direction of the donor film 16 may be determined by a numerical relationship between the undeformed interval 112 , the first arrangement distance 120 , and/or the second arrangement distance 140 . .
  • the expandable range of the donor film 16 may refer to a multiple within a limit that does not break even when the donor film 16 is expanded on a plane (or when viewed on a plane). That is, extending the donor film 16 to the expandable range may be non-destructive.
  • the length of the donor film 16 may be extended up to 2 times in one direction (eg, the first arrangement direction ADR1), When the length of the film 16 is extended to two times or less, a separate breakage may not occur.
  • the unstrained spacing (or unmodified spacing) 112 , the first alignment distance 120 , and/or the second alignment distance 140 , and the expandable range of the donor film 16 are Equation 4 below may be satisfied.
  • y is a distance between the light emitting devices LD as described above, and may refer to the first arrangement distance 120 and/or the second arrangement distance 140 .
  • A may represent the expandable range of the donor film 16 .
  • v is the distance between the light emitting devices LD before deformation of the donor film 16 is separately performed, and may be the undeformed gap 112 .
  • the separation distance of the light emitting devices LD may be provided to satisfy Equation 1 (and/or Equation 2) described above. That is, the separation distance between the light emitting devices LD may be determined according to Equation 1 (and/or Equation 2), and in this step to fit (or appropriately) Equation 1 (and/or Equation 2). A distance between the light emitting devices LD may be appropriately adjusted. In this case, in order to adjust the separation distance between the light emitting devices LD, a physical property suitable for the donor film 16 may be calculated based on Equation (4). Accordingly, the predictability of a process may be improved according to one or more embodiments.
  • the light emitting device LD may be disposed on the substrate SUB and the pixel circuit unit PCL using the disposition member 17 .
  • the light emitting device LD may be coupled to the connection electrode COL.
  • the arrangement member 17 combines the array of light emitting devices LD provided on the donor film 16 on one surface to connect the light emitting devices LD to the substrate SUB and the pixel circuit part PCL. It may be configured to form or transfer onto an image.
  • the disposition member 17 may simultaneously pick-up the individual light emitting devices LD and place them on the substrate SUB and the pixel circuit unit PCL.
  • the pick-up process of the disposition member 17 may be an elastomeric stamping method, an electromagnetic method, or a method using an adhesive member, but is not limited to a specific example.
  • the light emitting device LD and the disposition member 17 are coupled such that the first semiconductor layer 11 faces the disposition member 17 , and the second semiconductor layer 13 is connected to the connection electrode
  • Light emitting devices LD may be arranged to face COL.
  • the first arrangement direction ADR1 and the second arrangement direction ADR2 follow the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 .
  • the light emitting devices LD may be disposed to be shifted from the positions to be formed. Specifically, the positions of the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 to be subsequently formed by adjusting the inclination angle of the donor film 16 , the first arrangement direction ADR1 and the second The relationship between the positions of the arrangement direction ADR2 can be adjusted.
  • the first direction DR1 is a direction in which the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 are spaced apart from each other, and the second direction DR2 intersects the first direction DR1 .
  • the direction may be defined as a direction in which the first to third sub-pixel areas SPXA1 , SPXA2 , and SPXA3 extend.
  • the pose of the donor film 16 with respect to the substrate SUB and the pixel circuit unit PCL may be adjusted.
  • the first arrangement direction ADR1 may intersect (or non-parallel) with the second direction DR2 .
  • an insulating layer INS may be disposed on the connection electrode COL to fill the spaces between the light emitting devices LD.
  • the second electrode ELT connected (eg, electrically connected) to the light emitting element LD may be patterned, and then the light controller LCP may be disposed on the display element unit DPL.
  • the first sub-pixel SPXL1 among the sub-pixels SPXL described above with reference to FIG. 5 is shown as a reference.
  • the color conversion unit CCL may be disposed on the display element unit DPL.
  • the light-blocking layer LBL is formed on the display element part DPL to form the light-emitting area EMA of the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 , for example, the first sub-pixel area to the first sub-pixel area to the first sub-pixel area.
  • Three sub-pixel areas SPXA1, SPXA2, and SPXA3 may be defined.
  • the light blocking layer LBL may be disposed to form the first to third openings OP1 , OP2 , and OP3 .
  • an etching process may be performed on positions corresponding to the first to third openings OP1 , OP2 , and OP3 .
  • the first to third sub-pixels SPXL1, SPXL2, and SPXL3 that are subsequently provided by adjusting the separation distance between the first to third openings OP1, OP2, and OP3 of the light blocking layer LBL The separation distance 240 in the first direction DR1 may be controlled.
  • the separation distance 240 between the first to third sub-pixels SPXL1 , SPXL2 , and SPXL3 may be provided to satisfy Equation 3 .
  • the extension direction (eg, the second direction DR2 ) of the SPXL2 and SPXL3 may be provided to have an angle ⁇ between the ranges (eg, a predetermined range).
  • FIGS. 19 to 21 are diagrams illustrating examples to which a display device according to one or more exemplary embodiments is applied.
  • the display device DD may be applied to a smart phone, a laptop computer, a tablet PC, and/or a TV, and may be applied to various other embodiments.
  • the display device DD may be applied to smart glasses 1100 including a frame 1104 and a lens unit 1102 .
  • the smart glasses 1100 are wearable electronic devices that can be worn on a user's face, and may have a structure in which a part of the frame 1104 is folded or unfolded.
  • the smart glasses 1100 may be a wearable device for augmented reality (AR).
  • AR augmented reality
  • the frame 1104 may include a housing 1104b supporting the lens unit 1102 and a leg unit 1104a for wearing by a user.
  • the leg portion 1104a is connected to the housing 1104b by a hinge so that it can be folded or unfolded.
  • the frame 1104 may include a battery, a touch pad, a microphone, and/or a camera.
  • a projector for outputting light, a processor for controlling an optical signal, etc. may be built in the frame 1104 .
  • the lens unit 1102 may be an optical member that transmits light or reflects light.
  • the lens unit 1102 may include glass, a transparent synthetic resin, or the like.
  • the lens unit 1102 reflects the image by the optical signal transmitted from the projector of the frame 1104 by the rear surface of the lens unit 1102 (for example, the surface facing the user's eyes), and the image from the user's eyes can make it recognizable.
  • the user may recognize information such as time and date displayed on the lens unit 1102 .
  • the lens unit 1102 is a kind of display device, and the display device DD according to the above-described exemplary embodiment may be applied to the lens unit 1102 .
  • the display device DD may be applied to a smart watch 1200 including a display unit 1220 and a strap unit 1240 .
  • the smart watch 1200 is a wearable electronic device and may have a structure in which the strap unit 1240 is mounted on a user's wrist.
  • the display device DD according to one or more exemplary embodiments may be applied to the display unit 1220 , and image data including time information may be provided to the user.
  • a display device DD may be applied to an automotive display 1300 .
  • the automotive display 1300 may refer to an electronic device that is provided inside and outside the vehicle to provide image data.
  • the display device DD includes an infotainment panel 1310, an infotainment panel, a cluster 1320, a co-driver display 1330, a head-up display ( 1340, a head-up display), a side mirror display 1350, and/or a rear-seat display may be applied to at least one.
  • the display device DD may be applied to a head mounted display (HMD) including a head mounted band 1402 and a display storage case 1404 .
  • a head mounted display is a wearable electronic device that can be worn on a user's head.
  • the head mounting band 1402 may be connected to the display storage case 1404 to secure the display storage case 1404 in a desired position.
  • the head mounting band 1402 is shown to be able to surround the upper surface and both sides of the user's head, but the present disclosure is not limited thereto.
  • the head mounting band 1402 is for fixing the head mounted display to the user's head, and may be formed in the form of a spectacle frame or a helmet.
  • the display storage case 1404 accommodates the display device DD and may include at least one lens. At least one lens is a part that provides an image to a user.
  • the display device DD according to one or more exemplary embodiments may be applied to a left eye lens and a right eye lens implemented in the display storage case 1404 .
  • An application field of the display device DD according to one or more embodiments is not limited to the above-described example, and may be applied to various fields according to one or more embodiments.

Landscapes

  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Led Device Packages (AREA)
PCT/KR2022/001067 2021-04-30 2022-01-20 표시 장치 Ceased WO2022231095A1 (ko)

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KR20240103143A (ko) * 2022-12-26 2024-07-04 삼성디스플레이 주식회사 표시 장치
FR3151696B1 (fr) * 2023-07-28 2025-10-03 Thales Sa Dispositif d’affichage électronique de type écran à pixels émissifs, pour poste de pilotage d’aéronef
TWI845403B (zh) * 2023-08-25 2024-06-11 友達光電股份有限公司 顯示裝置及其製造方法
FR3154530B1 (fr) 2023-10-23 2025-12-12 Thales Sa Dispositif d’affichage électronique avec anticrénelage
KR20260024393A (ko) * 2024-08-08 2026-02-23 삼성디스플레이 주식회사 차량용 표시 장치, 이의 구동 방법, 및 전자 장치

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