WO2022217626A1 - 像素驱动电路及其驱动方法、显示面板 - Google Patents

像素驱动电路及其驱动方法、显示面板 Download PDF

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Publication number
WO2022217626A1
WO2022217626A1 PCT/CN2021/088270 CN2021088270W WO2022217626A1 WO 2022217626 A1 WO2022217626 A1 WO 2022217626A1 CN 2021088270 W CN2021088270 W CN 2021088270W WO 2022217626 A1 WO2022217626 A1 WO 2022217626A1
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WIPO (PCT)
Prior art keywords
transistor
light
gate
emitting
initialization
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Application number
PCT/CN2021/088270
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English (en)
French (fr)
Inventor
王选芸
戴超
Original Assignee
武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US17/434,768 priority Critical patent/US12002423B2/en
Publication of WO2022217626A1 publication Critical patent/WO2022217626A1/zh
Priority to US18/656,414 priority patent/US20240290268A1/en

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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
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    • G09G2300/0809—Several active elements per pixel in active matrix panels
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    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
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    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
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    • G09G2310/0202—Addressing of scan or signal lines
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    • G09G2330/021—Power management, e.g. power saving

Definitions

  • the present application relates to the field of display technology, and in particular, to a pixel driving circuit and a driving method thereof, and a display panel.
  • the change of the gate potential of the driving transistor in the pixel driving circuit may easily lead to unstable light-emitting of the light-emitting device.
  • a flicker phenomenon occurs when the display panel is displayed in a low-frequency driving manner, which affects the display quality of the display panel.
  • Embodiments of the present application provide a pixel driving circuit and a driving method thereof, and a display panel, which can improve the problem of flickering easily occurring when the display panel is displayed in a low-frequency driving manner.
  • An embodiment of the present application provides a pixel driving circuit, where the pixel driving circuit includes a light-emitting device, a driving transistor, a data transistor, a switching transistor, and a light-emitting control transistor.
  • the driving transistor is connected in series with the light-emitting device;
  • the data transistor is connected between the driving transistor and the data voltage terminal;
  • the switching transistor is connected between the gate of the driving transistor and the initialization voltage terminal, and is connected between the gate of the driving transistor and one of the source or the drain of the driving transistor, the active layer of the switching transistor includes an oxide semiconductor;
  • the light emission control transistor and the driving transistor The transistors are connected in series, and the gate of the switching transistor and the gate of the light-emitting control transistor are both connected to the light-emitting control signal line.
  • Embodiments of the present application further provide a driving method for a pixel driving circuit, for driving any of the above pixel driving circuits, the driving method includes: using the switch transistor to load an initial signal loaded by the initialization voltage terminal to the gate of the drive transistor; use the data transistor and the switch transistor to load the data signal loaded from the data voltage terminal to the gate of the drive transistor; use the light-emitting control transistor to make The driving transistor drives the light emitting device to emit light.
  • Embodiments of the present application also provide a display panel, including: a plurality of pixel driving circuits, a plurality of light emitting devices, a multi-level gate driving circuit, and a plurality of light emitting signal control circuits.
  • Each of the pixel drive circuits includes a drive transistor and a switch transistor whose active layer includes an oxide semiconductor; each of the pixel drive circuits is used for driving the corresponding light-emitting device to emit light; the multi-level gate drive circuits are used for Provide multi-level scanning signals, and the multi-level gate driving circuits are connected to a plurality of the pixel driving circuits through a plurality of scanning signal lines; a plurality of the light-emitting signal control circuits are used to provide a plurality of light-emitting control signals, and a plurality of the The light-emitting signal control circuit is connected to a plurality of the pixel driving circuits through a plurality of light-emitting control signal lines.
  • the switching transistor is used for resetting the gate voltage of the driving transistor according to the corresponding light-emitting control signal and compensating for the threshold voltage of the driving transistor with a data signal.
  • Embodiments of the present application further provide a display device, which includes any of the above-mentioned pixel driving circuits and any of the above-mentioned display panels.
  • the pixel driving circuit includes: a light-emitting device, a driving transistor, a data transistor, a switching transistor, and a light-emitting control transistor.
  • the driving transistor is connected in series with the light-emitting device; the data transistor is connected between the driving transistor and the data voltage terminal; the switching transistor is connected between the gate of the driving transistor and the initialization voltage terminal, and is connected Between the gate of the driving transistor and one of the source or the drain of the driving transistor, the active layer of the switching transistor includes an oxide semiconductor; the light emission control transistor and the driving transistor The transistors are connected in series, and the gate of the switching transistor and the gate of the light-emitting control transistor are both connected to the light-emitting control signal line.
  • the low leakage current characteristic of the switching transistor can improve the problem of uneven light emission of the light-emitting device caused by the unstable gate voltage of the driving transistor, which is beneficial to improve the problem of flickering when the display panel is displayed in a low-frequency driving mode. , to improve the display quality of the display panel.
  • FIG. 1A to FIG. 1D are schematic circuit diagrams of a pixel driving circuit provided by an embodiment of the present application.
  • FIG. 2 is a working timing diagram of a pixel driving circuit provided by an embodiment of the present application.
  • 3A to 3C are schematic diagrams of the operation of the pixel driving circuit shown in FIG. 1A;
  • 3D to 3F are schematic diagrams of the operation of the pixel driving circuit shown in FIG. 1B ;
  • FIG. 4 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • 5A to 5D are schematic diagrams of circuit structures of a pixel driving circuit provided by an embodiment of the present application.
  • FIG. 1A to FIG. 1D are schematic diagrams of circuit structures of a pixel driving circuit provided by an embodiment of the present application
  • FIG. 2 is a working timing diagram of the pixel driving circuit provided by an embodiment of the present application.
  • the present application provides a pixel driving circuit, the pixel driving circuit includes: a light-emitting device D1, a driving transistor T1, a switching transistor T2, a light-emitting control transistor and a data transistor T4.
  • the light-emitting device D1 includes an organic light-emitting diode, a sub-millimeter light-emitting diode or a micro light-emitting diode.
  • the driving transistor T1 is connected between the first voltage terminal ELVDD and the light-emitting device D1, and the driving transistor T1 is used for driving the light-emitting device D1 to emit light.
  • the switching transistor T2 is connected between the gate of the driving transistor T1 and the initialization voltage terminal VI, and between the gate of the driving transistor T1 and the source or drain of the driving transistor T1. in between.
  • the switching transistor T2 is used for transmitting the initialization signal Vi or the data signal Vdata with the function of compensating the threshold voltage to the gate of the driving transistor T1 according to the first lighting control signal Em1, and initializing the gate of the driving transistor T1 voltage or compensate the threshold voltage of the drive transistor T1.
  • the active layer of the switching transistor T2 includes an oxide semiconductor, so as to maintain the stability of the gate voltage of the driving transistor T1 by utilizing the low leakage current characteristic of the switching transistor T2, so that the driving transistor T1 is driving
  • the light-emitting device D1 will not cause uneven light emission due to the unstable gate voltage of the driving transistor T1, so the flickering phenomenon can be improved, which is beneficial to reduce power consumption and improve the Luminescence stability of light-emitting device D1.
  • the oxide semiconductor includes a metal oxide semiconductor.
  • the metal oxide semiconductor includes indium gallium zinc oxide, zinc oxide, tin oxide, indium oxide and the like.
  • the data transistor T4 is connected between the driving transistor T1 and the data voltage terminal DA, and the data transistor T4 is used for scanning the data according to the second scan signal Scan(n) loaded by the second scan signal line S(n).
  • the data signal Vdata is transmitted to the gate of the driving transistor T1 through the switching transistor T2.
  • the gate of the data transistor T4 is connected to the second scan signal line S(n), and either the source or the drain of the data transistor T4 is connected to the data voltage terminal DA, so The other of the source or the drain of the data transistor T4 is connected to one of the source or the drain of the drive transistor T1.
  • the light-emitting control transistor is connected in series with the driving transistor T1, and the gate of the switching transistor T2 and the gate of the light-emitting control transistor are both connected to the light-emitting control signal line EM, so as to reduce the number of control signal lines and reduce the difficulty of control , which is beneficial to save wiring space.
  • the light-emitting control signal line EM connected to the gate of the switching transistor T2 is loaded with the first light-emitting control signal Em1
  • the light-emitting control signal line EM connected with the gate of the light-emitting control transistor is loaded with the first light-emitting control signal Em1.
  • the timings of the first lighting control signal Em1 and the second lighting control signal Em2 may be the same or different. Further, the timings of the first lighting control signal Em1 and the second lighting control signal Em2 are different, and the second lighting control signal Em2 includes a period for implementing the black insertion technique.
  • the light-emitting control transistor includes a first light-emitting control transistor T5 and a second light-emitting control transistor T6, the first light-emitting control transistor T5 is connected in series between the driving transistor T1 and the first voltage terminal ELVDD, and the first light-emitting control transistor T5 is connected in series between the driving transistor T1 and the first voltage terminal ELVDD.
  • Two light-emitting control transistors T6 are connected in series between the driving transistor T1 and the second voltage terminal ELVSS, the gate of the first light-emitting control transistor T5 and the gate of the second light-emitting control transistor T6 are both connected to the light-emitting control signal Line EM connection.
  • one of the source or the drain of the first light-emitting control transistor T5 is connected to the first voltage terminal ELVDD, and the source or the drain of the first light-emitting control transistor T5 is connected to the first voltage terminal ELVDD.
  • the other one is connected to one of the source or the drain of the drive transistor T1.
  • One of the source or the drain of the second light-emitting control transistor T6 is connected to the other of the source or the drain of the driving transistor T1, and the second light-emitting control transistor T6 is The other of the source electrode or the drain electrode is connected to the anode of the light emitting device D1.
  • the first lighting control transistor T5, the second lighting control transistor T6 and the switching transistor T2 are all It is connected to the same light-emitting control signal line EM, so as to use the first light-emitting control transistor T5, the second light-emitting control transistor T6 and the switch transistor T2 to control the light-emitting state of the light-emitting device D1 and control the light-emitting state of the light-emitting device D1 respectively.
  • the gate voltage of the driving transistor T1 is initialized and the threshold voltage is compensated.
  • the first light-emitting control transistor T5 the second light-emitting control transistor T6 and the switching transistor T2
  • the transistor T6 is of a different type from the switching transistor T2.
  • the switching transistor T2 is an N-type transistor
  • the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are P-type transistors.
  • the pixel driving circuit further includes an initialization transistor T3 connected between the switch transistor T2 and the initialization voltage terminal VI, and the initialization transistor T3 is used for according to the first scan signal Scan (n-1) Transmit the initialization signal Vi to one of the source or the drain of the drive transistor T1, and transmit the initialization signal Vi to the switching transistor T2 through the switching transistor T2 The gate of the transistor T1 is driven.
  • the gate of the initialization transistor T3 is connected to the first scan signal line S(n-1), and either the source or the drain of the initialization transistor T3 is connected to the initialization voltage terminal VI, so The other one of the source or the drain of the initialization transistor T3, one of the source or drain of the switching transistor T2, and one of the source or drain of the drive transistor T1 connection.
  • the active layer of the switching transistor T2 and the active layer of the initialization transistor T3 include the same or different semiconductor materials.
  • the pixel driving circuit can improve the switching transistor T2 and the initialization transistor T3 through the switching transistor T2 and the initialization transistor T3.
  • the light-emitting device D1 has a problem of uneven light emission due to the unstable gate voltage of the driving transistor T1, thereby improving the flickering phenomenon.
  • the active layer of the switching transistor T2 and the active layer of the initialization transistor T3 include different semiconductor materials
  • the active layer of the initialization transistor T3 includes silicon semiconductor, so that the pixel driving circuit Only the switching transistor T2 can improve the problem of uneven light emission of the light-emitting device D1 due to the unstable gate voltage of the driving transistor T1, and improve the flickering phenomenon.
  • the silicon semiconductor includes monocrystalline silicon, polycrystalline silicon, and the like.
  • the polysilicon includes low temperature polysilicon.
  • the leakage current of the initialization transistor T3 is greater than the leakage current of the switching transistor T2, so the initialization signal Vi can be dynamically variable to transmit the reset signal Vi to the source of the driving transistor T1 through the initialization transistor T3 by utilizing the leakage current characteristic of the initialization transistor T3 when the light-emitting device D1 is in the light-emitting state one of the electrode or the drain electrode, thereby reducing the influence of one of the source electrode or the drain electrode of the driving transistor T1 on the gate voltage of the driving transistor T1, ensuring the light-emitting device Luminescence stability of D1.
  • the initialization signal Vi loaded by the initialization voltage terminal VI is Constant signal; when the driving transistor T1 drives the light-emitting device D1 to emit light, the initialization signal Vi is a continuous rising signal or a continuous falling signal.
  • the pixel driving circuit further includes a reset transistor T7 connected between the initialization voltage terminal VI and the light-emitting device D1, and the reset transistor T7 is used for scanning according to the first scan
  • the signal Scan(n-1) or the second scan signal Scan(n) transmits the initialization signal Vi to the anode of the light emitting device D1 to initialize the anode voltage of the light emitting device D1.
  • the reset transistor T7 may be directly connected to the initialization voltage terminal VI, or may be indirectly connected to the initialization voltage terminal VI.
  • the gate of the reset transistor T7 is connected to the first scan signal line S(n-1) or the second scan signal line S(n), and the source or drain of the reset transistor T7
  • One of the electrodes is connected to the anode of the light-emitting device D1
  • the other of the source or the drain of the reset transistor T7 is connected to the initialization voltage terminal VI to connect the initialization signal Vi is transferred to the other of the source or the drain of the reset transistor T7, and to the anode of the light emitting device D1 via the reset transistor T7.
  • the reset transistor T7 can also be located in the initialization transistor T3 and the anode of the light-emitting device D1, so that one of the source or drain of the reset transistor T7 indirectly receives the initialization signal Vi.
  • the gate of the reset transistor T7 is connected to the first scan signal line S(n-1), and either the source or the drain of the reset transistor T7 is connected to the anode of the light emitting device D1 , the other of the source or the drain of the reset transistor T7 and one of the source or the drain of the initialization transistor T3, the source or the drain of the switching transistor T2
  • One of the source or drain of the drive transistor T1 is connected, so that the initialization signal Vi is transmitted to the source or the drain of the reset transistor T7 through the initialization transistor T3, respectively one of the drain, one of the source or drain of the switching transistor T2, one of the source or drain of the drive transistor T1 to pass the initialization transistor T3 and the reset
  • the transistor T7 realizes the initialization of the anode voltage of the light-emitting device D1; realizes the initialization of the gate voltage of the driving transistor T1 through the initialization transistor T3 and the switching transistor T2; reduces the driving transistor through the initialization transistor T3 The effect of one of the source or
  • the active layer of the reset transistor T7 includes an oxide semiconductor or a silicon semiconductor. Further, the active layer of the reset transistor T7 includes a silicon semiconductor, so that when the pixel driving circuit adopts the dynamically variable initialization signal Vi, the light emission can be dynamically compensated by the leakage current characteristic of the reset transistor T7.
  • the anode voltage of the device D1 further improves the light-emitting stability of the light-emitting device D1.
  • the reset transistor T7 may also be indirectly connected to the initialization voltage terminal VI through the initialization transistor T3 . Further, when the reset transistor T7 is indirectly connected to the initialization voltage terminal VI through the initialization transistor T3, in order to prevent the data transistor T4 from being turned on, the reset transistor T7 is also turned on, and the reset transistor T7 is also turned on. The gate of T7 is connected to the first scan signal line S(n-1).
  • the pixel driving circuit further includes a storage capacitor C1 connected in series between the gate of the driving transistor Td and the first voltage terminal ELVDD, and the storage capacitor C1 is used to maintain all the the gate voltage of the driving transistor T1.
  • the cathode of the light emitting device D1 is connected to the second voltage terminal ELVSS.
  • the driving transistor T1, the reset transistor T7 and the data transistor T4 include P-type transistors or N-type transistors.
  • Embodiments of the present application further provide a driving method for a pixel driving circuit, which is used for driving any of the above-mentioned pixel driving circuits.
  • the driving Methods include:
  • the switching transistor T2 is used to load the initialization signal Vi loaded from the initialization voltage terminal VI to the gate of the driving transistor T1 to initialize the gate voltage of the driving transistor T1.
  • the data signal Vdata loaded from the data voltage terminal DA is loaded to the gate of the driving transistor T1 by using the data transistor T4 and the switching transistor T2 to compensate the the threshold voltage of the driving transistor T1.
  • the light-emitting control transistor is used to drive the light-emitting device D1 to emit light by the driving transistor T1.
  • FIGS. 3A to 3C are schematic diagrams of the operation of the pixel driving circuit shown in FIG. 1A ;
  • FIGS. 3D to 3F are schematic diagrams of the operation of the pixel driving circuit shown in FIG.
  • the initialization transistor T3, the reset transistor T7, the first light-emitting control transistor T5, the second light-emitting control transistor T6 and the data transistor T4 are P-type silicon transistors, and the switching transistor T2 is an N-type oxide transistor Take an example to illustrate.
  • the first scan signal Scan(n-1) is at a low level
  • the first light emission control signal Em1 the second light emission control signal Em2 and the second scan signal Scan( n) is a high level
  • the switching transistor T2 and the initialization transistor T3 are turned on in response to the first lighting control signal Em1 and the first scanning signal Scan(n-1), respectively, and the first lighting The control transistor T5, the second light emission control transistor T6 and the data transistor T4 are turned off.
  • the initialization signal Vi is transmitted to one of the source or drain of the driving transistor T1 (ie, point P), and the initialization signal Vi is transmitted to the driving transistor T1 through the switching transistor T2
  • the gate ie, the Q point
  • the reset transistor T7 is also turned on in response to the first scan signal Scan(n-1), and as shown in FIG. 3D, the initialization signal Vi is transmitted to all
  • the anode of the light-emitting device D1 realizes the initialization of the anode voltage of the light-emitting device D1.
  • the first scan signal Scan(n-1), the first light-emitting control signal Em1 and the second light-emitting control signal Em2 are at high level
  • the The second scan signal Scan(n) is at a low level
  • the switch transistor T2 is turned on in response to the first light-emitting control signal Em1
  • the data transistor T4 is turned on in response to the second scan signal Scan(n)
  • the initialization transistor T3, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned off.
  • the data signal Vdata with the function of compensating the threshold voltage is transmitted to the gate of the driving transistor T1 through the data transistor T4 and the switching transistor T2 to compensate the threshold voltage of the driving transistor T1, as shown in FIG. 3B and FIG. 3E is shown.
  • the reset transistor T7 is turned on in response to the first scan signal Scan(n)
  • the initialization signal Vi is transmitted to the anode of the light-emitting device D1 to
  • the initialization of the anode voltage of the light-emitting device D1 is realized in the data writing and threshold voltage compensation stage t2, as shown in FIG. 3B .
  • the first scan signal Scan(n-1) and the second scan signal Scan(n) are at high level
  • the signal Em2 is at a low level
  • the first light-emitting control transistor Te1 and the second light-emitting control transistor Te2 are turned on in response to the second light-emitting control signal Em2, the initialization transistor T3, the reset transistor T7, and the data transistor T4 and the switching transistor T2 are turned off.
  • the driving transistor Td generates a driving current for driving the light-emitting device D1 to emit light, the light-emitting device D1 emits light, and the storage capacitor Cst maintains the gate voltage of the driving transistor Td to maintain the
  • the continuous and stable light emission of the light-emitting device D1 is shown in FIG. 3C and FIG. 3F .
  • the initialization signal Vi may be a constant signal or a dynamically variable signal.
  • the initialization signal Vi is a constant signal in the initialization phase t1 and the data writing and threshold voltage compensation phase t2, and in the light-emitting phase t3, the The initialization signal Vi rises continuously with the gate voltage of the driving transistor Td; the gate voltage.
  • FIG. 4 is a schematic structural diagram of a display panel provided by an embodiment of the present application
  • FIGS. 5A to 5D are schematic circuit structural diagrams of a pixel driving circuit provided by an embodiment of the present application.
  • Embodiments of the present application also provide a display panel.
  • the display panel includes a display area 100a and a non-display area 100b.
  • the display panel includes: a plurality of light-emitting devices D1, a plurality of pixel driving circuits 101, a multi-level gate driving circuit 102 and a plurality of light-emitting signal control circuits 103 .
  • the display panel includes a self-luminous display panel, a passive light-emitting display panel, a quantum dot display panel, and the like.
  • the display panel is a passive light-emitting display panel
  • the display panel includes a light-emitting source.
  • the light-emitting source includes the light-emitting device D1.
  • a plurality of the light emitting devices D1 are located in the display area 100a.
  • the multi-level gate driving circuits 102 are used to provide multi-level scanning signals, and the multi-level gate driving circuits 102 are connected to the plurality of pixel driving circuits 101 through a plurality of scanning signal lines SL; a plurality of the light-emitting signals
  • the control circuit 103 is used for providing a plurality of light-emitting control signals, and the plurality of the light-emitting signal control circuits 103 are connected to the plurality of the pixel driving circuits 101 through a plurality of light-emitting control signal lines EM.
  • Each of the pixel driving circuits 101 is used to drive the corresponding light-emitting device D1 to emit light, and each of the pixel driving circuits 101 includes a driving transistor T1 and a switching transistor T2 whose active layer includes an oxide semiconductor.
  • the switching transistor T2 It is used for resetting the gate voltage of the driving transistor T1 according to the corresponding light-emitting control signal and compensating the threshold voltage of the driving transistor Td with the data signal Vdata.
  • Using the low leakage characteristics of the switching transistor T2 to improve the problem of uneven light emission of the light-emitting device D1 caused by the unstable gate voltage of the driving transistor T1, and reduce the power consumption of the display panel, it is beneficial to improve the performance of the display panel.
  • the low-frequency driving mode is used for display, the problem of flickering is easy to occur, which improves the display quality of the display panel.
  • one of the source or the drain of the switching transistor T2 is connected to the gate of the driving transistor T1
  • the other of the source or the drain of the switching transistor T2 is connected to the gate of the driving transistor T1.
  • One of the source or the drain of the drive transistor T1 is connected.
  • each of the pixel driving circuits further includes an initialization transistor T3, a data transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, a reset transistor T7 and a storage capacitor C1.
  • the initialization transistor T3 is configured to transmit an initialization signal Vi to the switch transistor T2 according to the corresponding scan signal. Specifically, one of the source or the drain of the initialization transistor T3 is connected to the initialization voltage terminal VI, and the other of the source or the drain of the initialization transistor T3 is connected to the switching transistor One of the source or the drain of T2, one of the source or the drain of the drive transistor T1 is connected.
  • the active layer of the initialization transistor T3 includes silicon semiconductor or oxide semiconductor. Further, the active layer of the initialization transistor T3 includes a silicon semiconductor.
  • the initialization signal Vi loaded by the initialization voltage terminal VI is a signal that continuously rises or is connected to fall when the light-emitting device D1 is in the light-emitting state, so that the display panel passes through the switching transistor T2. and the initialization transistor T3 to dynamically compensate the gate voltage of the drive transistor T1 and reduce the influence of either the source or the drain of the drive transistor T1 on the gate voltage of the drive transistor T1 , further improving the light-emitting stability of the light-emitting device D1, thereby further improving the display quality of the display panel.
  • the data transistor T4 is used for transmitting the data signal Vdata to the switching transistor T2 according to the corresponding scan signal. Specifically, one of the source or the drain of the data transistor T4 is connected to the data voltage terminal DA, and the other of the source or the drain of the data transistor T4 is connected to the driving transistor One of the source or the drain of T1 is connected.
  • the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are configured to cause the driving transistor T1 to generate a driving current for driving the light-emitting device D1 to emit light according to the corresponding light-emitting control signal.
  • the first light-emitting control transistor T5 and the second light-emitting control transistor T6 respond to the same light-emitting control signal.
  • one of the source or the drain of the first light-emitting control transistor T5 is connected to the first voltage terminal ELVDD, and the other of the source or the drain of the first light-emitting control transistor T5 One is connected to one of the source or the drain of the driving transistor T1; one of the source or the drain of the second light-emitting control transistor T6 is connected to all of the driving transistor T1 The other one of the source electrode or the drain electrode is connected, and the other one of the source electrode or the drain electrode of the second light emission control transistor T6 is connected to the anode electrode of the light emitting device D1.
  • the reset transistor T7 is used for resetting the anode voltage of the light emitting device D1 according to the corresponding scan signal. Specifically, one of the source or drain of the reset transistor T7 and the initialization voltage terminal VI or one of the source or the drain of the initialization transistor T3, the switching transistor One of the source or the drain of T2 is connected, and the other of the source or the drain of the reset transistor T7 is connected to the anode of the light emitting device D1.
  • the storage capacitor C1 is used to maintain the gate voltage of the driving transistor T1, and the storage capacitor C1 is connected in series between the first voltage terminal ELVDD and the gate of the driving transistor T1.
  • the cathode of the light emitting device D1 is connected to the second voltage terminal ELVSS.
  • the plurality of light-emitting control signal lines EM include a first light-emitting control signal line EM1 and a second light-emitting control signal line EM2.
  • the first light-emitting control signal line EM1 is configured as A first light emission control signal Em1 is supplied to the switching transistor T2, and the first light emission control signal line EM1 or the second light emission control signal line EM2 is configured to supply the first light emission control transistor T5 and the second light emission control signal line EM2.
  • the light emission control transistor T6 provides the second light emission control signal Em2.
  • the gate of the switching transistor T2 is connected to the first light emission control signal line EM1, and the gate of the first light emission control transistor T5 and the gate of the second light emission control transistor T6 are connected to the first light emission control signal line EM1.
  • the control signal line EM1 or the second light emission control signal line EM2 is connected.
  • the gate of the switching transistor T2, the gate of the first light-emitting control transistor T5 and the gate of the second light-emitting control transistor T6 are all connected to the first light-emitting control signal line EM1, and the
  • the switch transistor T2 is an N-type transistor, and the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are P-type transistors, so as to prevent the switch transistor T2 from affecting the light-emitting state of the light-emitting device D1.
  • the plurality of scan signal lines SL include a first scan signal line S(n-1) and a second scan signal line S(n); the first scan signal line S(n-1) is configured to extend to the
  • the initialization transistor T3 provides the first scan signal Scan(n-1), and the second scan signal line S(n) is configured to provide the second scan signal Scan(n) to the data transistor T4. That is, the gate of the initialization transistor T3 is connected to the first scan signal line S(n-1), and the gate of the data transistor T4 is connected to the second scan signal line S(n).
  • the gate of the reset transistor T7 is connected to the first scan signal line S(n-1) or the second scan signal line S(n).
  • the drive transistor T1, the switch transistor T2, the initialization transistor T3, the data transistor T4, the first light-emitting control transistor T5, the second light-emitting control transistor T6, and the reset transistor T7 includes N-type transistors and/or P-type transistors.
  • Embodiments of the present application further provide a display device, which includes any of the above-mentioned pixel driving circuits and any of the above-mentioned display panels.
  • the display device further includes devices such as sensors and touch electrodes.

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Abstract

一种像素驱动电路及其驱动方法、显示面板。像素驱动电路包括连接于驱动晶体管（T1）的栅极与初始化电压端（VI）之间、驱动晶体管（T1）的源极或漏极中的一者之间的开关晶体管（T2），开关晶体管（T2）的有源层包括氧化物半导体，以通过开关晶体管（T2）的低漏电流特性改善显示面板在采用低频驱动方式进行显示时，易出现闪烁现象的问题，改善显示质量。

Description

像素驱动电路及其驱动方法、显示面板 技术领域
本申请涉及显示技术领域，特别涉及一种像素驱动电路及其驱动方法、一种显示面板。
 背景技术
在像素驱动电路驱动发光器件发光时，像素驱动电路中驱动晶体管的栅极电位变化易导致发光器件发光不稳定。特别地，在显示面板采用低频驱动方式进行显示时会出现闪烁现象，影响显示面板的显示质量。
 技术问题
本申请实施例提供一种像素驱动电路及其驱动方法、一种显示面板，可以改善显示面板在采用低频驱动方式进行显示时，易出现闪烁现象的问题。
 技术解决方案
本申请实施例提供一种像素驱动电路，所述像素驱动电路包括：发光器件、驱动晶体管、数据晶体管、开关晶体管及发光控制晶体管。所述驱动晶体管与所述发光器件串联；所述数据晶体管连接于所述驱动晶体管与数据电压端之间；所述开关晶体管连接于所述驱动晶体管的栅极与初始化电压端之间、以及连接于所述驱动晶体管的所述栅极与所述驱动晶体管的源极或漏极中的一者之间，所述开关晶体管的有源层包括氧化物半导体；所述发光控制晶体管与所述驱动晶体管串联，所述开关晶体管的栅极和所述发光控制晶体管的栅极均连接于发光控制信号线。
本申请的实施例还提供一种像素驱动电路的驱动方法，用于驱动任一上述的像素驱动电路，所述驱动方法包括：利用所述开关晶体管将所述初始化电压端载入的初始信号加载至所述驱动晶体管的栅极；利用所述数据晶体管、所述开关晶体管将所述数据电压端载入的数据信号加载至所述驱动晶体管的所述栅极；利用所述发光控制晶体管以使所述驱动晶体管驱动所述发光器件发光。
本申请的实施例还提供一种显示面板，包括：多个像素驱动电路、多个发光器件、多级栅极驱动电路以及多个发光信号控制电路。
每一所述像素驱动电路包括驱动晶体管及有源层包括氧化物半导体的开关晶体管；每一所述像素驱动电路用于驱动对应的所述发光器件发光；多级所述栅极驱动电路用于提供多级扫描信号，多级所述栅极驱动电路通过多条扫描信号线连接于多个所述像素驱动电路；多个所述发光信号控制电路用于提供多个发光控制信号，多个所述发光信号控制电路通过多条发光控制信号线连接于多个所述像素驱动电路。其中，所述开关晶体管用于根据对应的所述发光控制信号重置所述驱动晶体管的栅极电压并利用数据信号补偿所述驱动晶体管的阈值电压。
本申请的实施例还提供一种显示装置，所述显示装置包括上述的任一种像素驱动电路及上述的任一种显示面板。
 有益效果
相较于现有技术，本申请实施例提供的像素驱动电路及其驱动方法、显示面板，所述像素驱动电路包括：发光器件、驱动晶体管、数据晶体管、开关晶体管及发光控制晶体管。所述驱动晶体管与所述发光器件串联；所述数据晶体管连接于所述驱动晶体管与数据电压端之间；所述开关晶体管连接于所述驱动晶体管的栅极与初始化电压端之间、以及连接于所述驱动晶体管的所述栅极与所述驱动晶体管的源极或漏极中的一者之间，所述开关晶体管的有源层包括氧化物半导体；所述发光控制晶体管与所述驱动晶体管串联，所述开关晶体管的栅极和所述发光控制晶体管的栅极均连接于发光控制信号线。通过所述开关晶体管的低漏电流特性改善所述驱动晶体管栅极电压不稳定造成的发光器件发光不均的问题，有利于改善显示面板在采用低频驱动方式进行显示时，易出现闪烁现象的问题，改善显示面板的显示质量。
 附图说明
图1A~图1D是本申请实施例提供的像素驱动电路的电路结构示意图；
图2是本申请的实施例提供的像素驱动电路的工作时序图；
图3A~图3C是图1A所示的像素驱动电路的工作示意图；
图3D~图3F是图1B所示的像素驱动电路的工作示意图；
图4是本申请的实施例提供的显示面板的结构示意图；
图5A~图5D是本申请实施例提供的像素驱动电路的电路结构示意图。
 本发明的实施方式
为使本申请的目的、技术方案及效果更加清楚、明确，以下参照附图并举实施例对本申请进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
请参阅图1A~图1D是本申请实施例提供的像素驱动电路的电路结构示意图；如图2是本申请的实施例提供的像素驱动电路的工作时序图。
本申请提供一种像素驱动电路，所述像素驱动电路包括：发光器件D1、驱动晶体管T1、开关晶体管T2、发光控制晶体管及数据晶体管T4。
可选地，所述发光器件D1包括有机发光二极管、次毫米发光二极管或微型发光二极管。
所述驱动晶体管T1连接于第一电压端ELVDD与所述发光器件D1之间，所述驱动晶体管T1用于驱动所述发光器件D1发光。
所述开关晶体管T2连接于所述驱动晶体管T1的栅极与初始化电压端VI之间、以及连接于所述驱动晶体管T1的所述栅极与所述驱动晶体管T1的源极或漏极中的一者之间。所述开关晶体管T2用于根据第一发光控制信号Em1将初始化信号Vi或具有补偿阈值电压作用的数据信号Vdata传输至所述驱动晶体管T1的所述栅极，初始化所述驱动晶体管T1的栅极电压或补偿所述驱动晶体管T1的阈值电压。
其中，所述开关晶体管T2的有源层包括氧化物半导体，以利用所述开关晶体管T2的低漏电流特性维持所述驱动晶体管T1栅极电压的稳定性，从而使所述驱动晶体管T1在驱动所述发光器件D1发光时，所述发光器件D1不会因所述驱动晶体管T1的栅极电压不稳定导致出现发光不均的问题，因此可以改善闪烁现象，有利于降低功耗并提高所述发光器件D1的发光稳定性。
可选地，所述氧化物半导体包括金属氧化物半导体。进一步地，所述金属氧化物半导体包括铟镓锌氧化物、氧化锌、氧化锡、氧化铟等。
所述数据晶体管T4连接于所述驱动晶体管T1与数据电压端DA之间，所述数据晶体管T4用于根据第二扫描信号线S(n)载入的第二扫描信号Scan(n)将所述数据信号Vdata通过所述开关晶体管T2传输至所述驱动晶体管T1的栅极。
具体地，所述数据晶体管T4的栅极与所述第二扫描信号线S(n)连接，所述数据晶体管T4的源极或漏极中的一者与所述数据电压端DA连接，所述数据晶体管T4的源极或漏极中的另一者与所述驱动晶体管T1的所述源极或所述漏极中的一者连接。
所述发光控制晶体管与所述驱动晶体管T1串联，所述开关晶体管T2的栅极和所述发光控制晶体管的栅极均连接于发光控制信号线EM，以降低控制信号线的数量，降低控制难度，有利于节省布线空间。
可选地，与所述开关晶体管T2的栅极连接的所述发光控制信号线EM载入第一发光控制信号Em1，与所述发光控制晶体管的栅极连接的发光控制信号线EM载入第二发光控制信号Em2。其中，所述第一发光控制信号Em1与所述第二发光控制信号Em2的时序可相同或不同。进一步地，所述第一发光控制信号Em1与所述第二发光控制信号Em2的时序不同，所述第二发光控制信号Em2包括实现插黑技术的时段。
进一步地，所述发光控制晶体管包括第一发光控制晶体管T5和第二发光控制晶体管T6，所述第一发光控制晶体管T5串联于所述驱动晶体管T1与第一电压端ELVDD之间，所述第二发光控制晶体管T6串联于所述驱动晶体管T1与第二电压端ELVSS之间，所述第一发光控制晶体管T5的栅极和所述第二发光控制晶体管T6栅极均与所述发光控制信号线EM连接。
具体地，所述第一发光控制晶体管T5的源极或漏极中的一者与所述第一电压端ELVDD连接，所述第一发光控制晶体管T5的所述源极或所述漏极中的另一者与所述驱动晶体管T1的所述源极或所述漏极中的一者连接。所述第二发光控制晶体管T6的源极或漏极中的一者与所述驱动晶体管T1的所述源极或所述漏极中的另一者连接，所述第二发光控制晶体管T6的所述源极或所述漏极中的另一者与所述发光器件D1的阳极连接。
进一步地，若所述第一发光控制信号Em1与所述第二发光控制信号Em2的时序相同，则所述第一发光控制晶体管T5、所述第二发光控制晶体管T6及所述开关晶体管T2均连接于同一所述发光控制信号线EM，以利用所述第一发光控制晶体管T5、所述第二发光控制晶体管T6及所述开关晶体管T2分别实现对所述发光器件D1发光状态的控制及所述驱动晶体管T1栅极电压初始化及阈值电压的补偿。进一步地，为避免所述第一发光控制晶体管T5、所述第二发光控制晶体管T6与所述开关晶体管T2在工作时出现相互干扰，所述第一发光控制晶体管T5、所述第二发光控制晶体管T6与所述开关晶体管T2的类型不同。具体地，所述开关晶体管T2为N型晶体管，所述第一发光控制晶体管T5与所述第二发光控制晶体管T6为P型晶体管。
请继续参阅图1A~图1D，所述像素驱动电路还包括连接于所述开关晶体管T2及所述初始化电压端VI之间的初始化晶体管T3，所述初始化晶体管T3用于根据第一扫描信号Scan(n-1)将所述初始化信号Vi传输至所述驱动晶体管T1的所述源极或所述漏极中的一者，且将所述初始化信号Vi通过所述开关晶体管T2传输至所述驱动晶体管T1的所述栅极。
具体地，所述初始化晶体管T3的栅极与第一扫描信号线S(n-1)连接，所述初始化晶体管T3的源极或漏极中的一者与所述初始化电压端VI连接，所述初始化晶体管T3的所述源极或所述漏极中的另一者与所述开关晶体管T2的源极或漏极中的一者、所述驱动晶体管T1的源极或漏极中的一者连接。
可选地，所述开关晶体管T2的有源层与所述初始化晶体管T3的有源层包括的半导体材料相同或不同。
具体地，在所述开关晶体管T2的有源层与所述初始化晶体管T3的有源层包括的半导体材料相同时，所述像素驱动电路可通过所述开关晶体管T2及所述初始化晶体管T3改善所述发光器件D1因所述驱动晶体管T1的栅极电压不稳定导致出现发光不均的问题，改善闪烁现象。
具体地，在所述开关晶体管T2的有源层与所述初始化晶体管T3的有源层包括的半导体材料不同时，所述初始化晶体管T3的有源层包括硅半导体，以使所述像素驱动电路仅通过所述开关晶体管T2改善所述发光器件D1因所述驱动晶体管T1的栅极电压不稳定导致出现发光不均的问题，改善闪烁现象。可选地，所述硅半导体包括单晶硅、多晶硅等。进一步地，所述多晶硅包括低温多晶硅。
进一步地，由于所述初始化晶体管T3的有源层包括所述硅半导体时，所述初始化晶体管T3的漏电流大于所述开关晶体管T2的漏电流，因此，所述初始化信号Vi可为动态可变的电压信号，以在所述发光器件D1处于发光状态时，利用所述初始化晶体管T3的漏电流特性，使所述复位信号Vi经所述初始化晶体管T3传输至所述驱动晶体管T1的所述源极或所述漏极中的一者，从而降低所述驱动晶体管T1的所述源极或所述漏极中的一者对所述驱动晶体管T1的栅极电压的影响，保证所述发光器件D1的发光稳定性。
其中，在所述开关晶体管T2及所述初始化晶体管T3同时导通，或所述开关晶体管T2及所述数据晶体管T4同时导通时，所述初始化电压端VI载入的所述初始化信号Vi为恒定信号；在所述驱动晶体管T1驱动所述发光器件D1发光时，所述初始化信号Vi为连续上升信号或连续下降信号。
请继续参阅图1A~图1D，所述像素驱动电路还包括连接于所述初始化电压端VI与所述发光器件D1之间的复位晶体管T7，所述复位晶体管T7用于根据所述第一扫描信号Scan(n-1)或第二扫描信号Scan(n)将所述初始化信号Vi传输至所述发光器件D1的阳极，对所述发光器件D1的阳极电压初始化。
可选地，所述复位晶体管T7可直接与所述初始化电压端VI连接，也可间接的与所述初始化电压端VI连接。
具体地，请参阅图1A，所述复位晶体管T7的栅极与第一扫描信号线S(n-1)或第二扫描信号线S(n)连接，所述复位晶体管T7的源极或漏极中的一者与所述发光器件D1的阳极连接，所述复位晶体管T7的所述源极或所述漏极中的另一者与所述初始化电压端VI连接，以将所述初始化信号Vi传输至所述复位晶体管T7的所述源极或所述漏极中的另一者，并经所述复位晶体管T7传输至所述发光器件D1的阳极。
具体地，请参阅图1B，由于所述初始化晶体管T3的所述源极或所述漏极的一者与所述初始化电压端VI连接，因此所述复位晶体管T7还可位于所述初始化晶体管T3与所述发光器件D1的阳极之间，以使所述复位晶体管T7的所述源极或漏极中的一者间接接收所述初始化信号Vi。因此，所述复位晶体管T7的栅极与所述第一扫描信号线S(n-1)连接，所述复位晶体管T7的源极或漏极中的一者与所述发光器件D1的阳极连接，所述复位晶体管T7的所述源极或所述漏极中的另一者与所述初始化晶体管T3的源极或漏极中的一者、所述开关晶体管T2的源极或漏极中的一者、所述驱动晶体管T1的源极或漏极中的一者连接，以使所述初始化信号Vi经所述初始化晶体管T3分别传输至所述复位晶体管T7的所述源极或所述漏极中的一者，所述开关晶体管T2的源极或漏极中的一者、所述驱动晶体管T1的源极或漏极中的一者，以通过所述初始化晶体管T3及所述复位晶体管T7实现对所述发光器件D1阳极电压的初始化；通过所述初始化晶体管T3及所述开关晶体管T2实现对所述驱动晶体管T1栅极电压的初始化；通过所述初始化晶体管T3降低所述驱动晶体管T1的所述源极或所述漏极中的一者对所述驱动晶体管T1的栅极电压的影响。
可选地，所述复位晶体管T7的有源层包括氧化物半导体或硅半导体。进一步地，所述复位晶体管T7的有源层包括硅半导体，以使所述像素驱动电路采用动态可变的所述初始化信号Vi时，通过所述复位晶体管T7的漏电流特性动态补偿所述发光器件D1的阳极电压，进一步提高所述发光器件D1的发光稳定性。
可选地，在图1C~图1D所示的像素驱动电路中，所述复位晶体管T7还可通过所述初始化晶体管T3间接与所述初始化电压端VI连接。进一步地，在所述复位晶体管T7通过所述初始化晶体管T3间接与所述初始化电压端VI连接时，为避免所述数据晶体管T4导通时，所述复位晶体管T7也导通，所述复位晶体管T7的栅极与第一扫描信号线S(n-1)连接。
请继续参阅图1A~图1D，所述像素驱动电路还包括串联在所述驱动晶体管Td的所述栅极及第一电压端ELVDD之间的存储电容C1，所述存储电容C1用于维持所述驱动晶体管T1的所述栅极电压。所述发光器件D1的阴极与第二电压端ELVSS连接。
可选地，所述驱动晶体管T1、所述复位晶体管T7及所述数据晶体管T4包括P型晶体管或N型晶体管。
请继续参阅图1A~图1D及图2，本申请的实施例还提供一种像素驱动电路的驱动方法，用于驱动任一种上述的像素驱动电路，在第N帧周期内，所述驱动方法包括：
初始化阶段t1，利用所述开关晶体管T2将所述初始化电压端VI载入的所述初始化信号Vi加载至所述驱动晶体管T1的栅极，初始化所述驱动晶体管T1的栅极电压。
数据写入及阈值电压补偿阶段t2，利用所述数据晶体管T4、所述开关晶体管T2将所述数据电压端DA载入的所述数据信号Vdata加载至所述驱动晶体管T1的栅极，补偿所述驱动晶体管T1的阈值电压。
发光阶段t3，利用所述发光控制晶体管以使所述驱动晶体管T1驱动所述发光器件D1发光。
以图1A~图1B所示的像素驱动电路为例，对所述像素驱动电路的工作原理进行说明，图1C~图1D所示的像素驱动电路的工作原理与图1A~图1B所示的像素驱动电路的工作原理相似，在此不再进行赘述。具体地，如图3A~图3C是图1A所示的像素驱动电路的工作示意图；如图3D~图3F是图1B所示的像素驱动电路的工作示意图；以所述驱动晶体管T1、所述初始化晶体管T3、所述复位晶体管T7、所述第一发光控制晶体管T5、所述第二发光控制晶体管T6及所述数据晶体管T4为P型硅晶体管，所述开关晶体管T2为N型氧化物晶体管为例进行说明。
在所述初始化阶段t1，所述第一扫描信号Scan(n-1)为低电平，所述第一发光控制信号Em1、所述第二发光控制信号Em2及所述第二扫描信号Scan(n)为高电平，则所述开关晶体管T2及所述初始化晶体管T3分别响应所述第一发光控制信号Em1、所述第一扫描信号Scan(n-1)导通，所述第一发光控制晶体管T5、所述第二发光控制晶体管T6及所述数据晶体管T4截止。所述初始化信号Vi被传输至所述驱动晶体管T1的源极或漏极中的一者（即P点），且所述初始化信号Vi通过所述开关晶体管T2被传输至所述驱动晶体管T1的栅极（即Q点），初始化所述驱动晶体管T1的栅极电压，如图3A和图3D所示。其中，在图1B所示的像素驱动电路中，所述复位晶体管T7也响应所述第一扫描信号Scan(n-1)导通，如图3D所示，所述初始化信号Vi被传输至所述发光器件D1的阳极，实现对所述发光器件D1阳极电压的初始化。
在所述数据写入及阈值电压补偿阶段t2，所述第一扫描信号Scan(n-1)、所述第一发光控制信号Em1及所述第二发光控制信号Em2为高电平，所述第二扫描信号Scan(n)为低电平，所述开关晶体管T2响应所述第一发光控制信号Em1导通，所述数据晶体管T4响应所述第二扫描信号Scan(n)导通，所述初始化晶体管T3、所述第一发光控制晶体管T5及所述第二发光控制晶体管T6截止。具有补偿阈值电压作用的所述数据信号Vdata经所述数据晶体管T4、所述开关晶体管T2被传输至所述驱动晶体管T1的栅极，补偿所述驱动晶体管T1的阈值电压，如图3B和图3E所示。其中，在图1A所示的像素驱动电路中，若所述复位晶体管T7响应所述第一扫描信号Scan(n)导通，所述初始化信号Vi被传输至所述发光器件D1的阳极，以在所述数据写入及阈值电压补偿阶段t2实现对所述发光器件D1阳极电压的初始化，如图3B所示。
在所述发光阶段t3，所述第一扫描信号Scan(n-1)及所述第二扫描信号Scan(n)为高电平，所述第一发光控制信号Em1及所述第二发光控制信号Em2为低电平，所述第一发光控制晶体管Te1及第二发光控制晶体管Te2响应所述第二发光控制信号Em2导通，所述初始化晶体管T3、所述复位晶体管T7、所述数据晶体管T4及所述开关晶体管T2截止。所述驱动晶体管Td产生驱动所述发光器件D1发光的驱动电流，所述发光器件D1发光，所述存储电容Cst维持所述驱动晶体管Td的栅极电压，以在一帧周期内，维持所述发光器件D1的持续稳定发光，如图3C和图3F所示。
可选地，所述初始化信号Vi可为恒定信号，也可为动态可变信号。具体地，所述初始化信号Vi为动态可变信号时，所述初始化信号Vi在所述初始化阶段t1和所述数据写入及阈值电压补偿阶段t2为恒定信号，在所述发光阶段t3，所述初始化信号Vi随所述驱动晶体管Td的栅极电压的下降连续上升；或，随所述驱动晶体管Td的栅极电压的上升连续下降，以在所述发光阶段t3动态补偿所述驱动晶体管Td的栅极电压。
如图4是本申请的实施例提供的显示面板的结构示意图；如图5A~图5D是本申请实施例提供的像素驱动电路的电路结构示意图。本申请的实施例还提供一种显示面板。所述显示面板包括显示区100a及非显示区100b，所述显示面板包括：多个发光器件D1、多个像素驱动电路101、多级所述栅极驱动电路102及多个发光信号控制电路103。
可选地，所述显示面板包括自发光显示面板、被动发光显示面板及量子点显示面板等。所述显示面板为被动发光显示面板时，所述显示面板包括发光源。进一步地，所述发光源包括所述发光器件D1。
多个所述发光器件D1位于所述显示区100a内。多级所述栅极驱动电路102用于提供多级扫描信号，多级所述栅极驱动电路102通过多条扫描信号线SL连接于多个所述像素驱动电路101；多个所述发光信号控制电路103用于提供多个发光控制信号，多个所述发光信号控制电路103通过多条发光控制信号线EM连接于多个所述像素驱动电路101。
每一所述像素驱动电路101用于驱动对应的所述发光器件D1发光，每一所述像素驱动电路101包括驱动晶体管T1及有源层包括氧化物半导体的开关晶体管T2，所述开关晶体管T2用于根据对应的所述发光控制信号重置所述驱动晶体管T1的栅极电压并利用数据信号Vdata补偿所述驱动晶体管Td的阈值电压。利用所述开关晶体管T2的低漏电特性改善所述驱动晶体管T1栅极电压不稳定造成的所述发光器件D1发光不均的问题，并降低所述显示面板的功耗，有利于改善显示面板在采用低频驱动方式进行显示时，易出现闪烁现象的问题，改善显示面板的显示质量。
具体地，所述开关晶体管T2的源极或漏极中的一者与所述驱动晶体管T1的栅极连接，所述开关晶体管T2的所述源极或所述漏极中的另一者与所述驱动晶体管T1的源极或漏极中的一者连接。
进一步地，每一所述像素驱动电路还包括初始化晶体管T3、数据晶体管T4、第一发光控制晶体管T5、第二发光控制晶体管T6、复位晶体管T7及存储电容C1。
所述初始化晶体管T3用于根据对应的所述扫描信号向所述开关晶体管T2传输初始化信号Vi。具体地，所述初始化晶体管T3的源极或漏极中的一者与初始化电压端VI连接，所述初始化晶体管T3的所述源极或所述漏极中的另一者与所述开关晶体管T2的所述源极或所述漏极中的一者、所述驱动晶体管T1的所述源极或所述漏极中的一者连接。可选地，所述初始化晶体管T3的有源层包括硅半导体或氧化物半导体。进一步地，所述初始化晶体管T3的有源层包括硅半导体。可选地，所述初始化电压端VI载入的所述初始化信号Vi在所述发光器件D1处于发光状态时，为连续上升或连接下降的信号，以使所述显示面板通过所述开关晶体管T2及所述初始化晶体管T3动态补偿所述驱动晶体管T1的栅极电压，并降低所述驱动晶体管T1的所述源极或所述漏极中的一者对所述驱动晶体管T1栅极电压的影响，进一步提高所述发光器件D1的发光稳定性，从而进一步改善所述显示面板的显示质量。
所述数据晶体管T4用于根据对应的所述扫描信号向所述开关晶体管T2传输所述数据信号Vdata。具体地，所述数据晶体管T4的源极或漏极中的一者与数据电压端DA连接，所述数据晶体管T4的所述源极或所述漏极中的另一者与所述驱动晶体管T1的所述源极或所述漏极中的一者连接。
所述第一发光控制晶体管T5和所述第二发光控制晶体管T6用于根据对应的所述发光控制信号使所述驱动晶体管T1产生驱动所述发光器件D1发光的驱动电流。其中，所述第一发光控制晶体管T5和所述第二发光控制晶体管T6响应相同的所述发光控制信号。具体地，所述第一发光控制晶体管T5的源极或漏极中的一者与第一电压端ELVDD连接，所述第一发光控制晶体管T5的所述源极或所述漏极中的另一者与所述驱动晶体管T1的所述源极或所述漏极中的一者连接；所述第二发光控制晶体管T6的源极或漏极中的一者与所述驱动晶体管T1的所述源极或所述漏极中的另一者连接，所述第二发光控制晶体管T6的所述源极或所述漏极中的另一者与所述发光器件D1的阳极连接。
所述复位晶体管T7用于根据对应的所述扫描信号对所述发光器件D1的阳极电压进行复位。具体地，所述复位晶体管T7的源极或漏极中的一者与所述初始化电压端VI或所述初始化晶体管T3的所述源极或所述漏极中的一者、所述开关晶体管T2的所述源极或所述漏极中的一者连接，所述复位晶体管T7的所述源极或所述漏极中的另一者与所述发光器件D1的所述阳极连接。
所述存储电容C1用于维持所述驱动晶体管T1的栅极电压，所述存储电容C1串联在所述第一电压端ELVDD及所述驱动晶体管T1的所述栅极之间。
所述发光器件D1的阴极与第二电压端ELVSS连接。
请继续参阅图4及图5A~图5D，多条所述发光控制信号线EM包括第一发光控制信号线EM1与第二发光控制信号线EM2，所述第一发光控制信号线EM1被配置为向所述开关晶体管T2提供第一发光控制信号Em1，所述第一发光控制信号线EM1或所述第二发光控制信号线EM2被配置为向所述第一发光控制晶体管T5和所述第二发光控制晶体管T6提供第二发光控制信号Em2。即所述开关晶体管T2的栅极与所述第一发光控制信号线EM1连接，所述第一发光控制晶体管T5的栅极和所述第二发光控制晶体管T6的栅极与所述第一发光控制信号线EM1或所述第二发光控制信号线EM2连接。
进一步地，所述开关晶体管T2的栅极、所述第一发光控制晶体管T5的栅极和所述第二发光控制晶体管T6的栅极均与所述第一发光控制信号线EM1连接，所述开关晶体管T2为N型晶体管，所述第一发光控制晶体管T5与所述第二发光控制晶体管T6为P型晶体管，以避免所述开关晶体管T2对所述发光器件D1的发光状态造成影响。
多条所述扫描信号线SL包括第一扫描信号线S(n-1)与第二扫描信号线S(n)；所述第一扫描信号线S(n-1)被配置为向所述初始化晶体管T3提供第一扫描信号Scan(n-1)，所述第二扫描信号线S(n)被配置为向所述数据晶体管T4提供第二扫描信号Scan(n)。即所述初始化晶体管T3的栅极与所述第一扫描信号线S(n-1)连接，所述数据晶体管T4的栅极与所述第二扫描信号线S(n)连接。可选地，所述复位晶体管T7的栅极与所述第一扫描信号线S(n-1)或所述第二扫描信号线S(n)连接。
可选地，所述驱动晶体管T1、所述开关晶体管T2、所述初始化晶体管T3、所述数据晶体管T4、所述第一发光控制晶体管T5、所述第二发光控制晶体管T6及所述复位晶体管T7包括N型晶体管和/或P型晶体管。
本申请的实施例还提供一种显示装置，所述显示装置包括上述的任一种像素驱动电路及上述的任一种显示面板。
可选地，所述显示装置还包括传感器、触控电极等器件。
以上仅应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (17)

  1. 一种像素驱动电路，其中，包括：
    发光器件；
    驱动晶体管，与所述发光器件串联；
    数据晶体管，连接于所述驱动晶体管与数据电压端之间；
    开关晶体管，连接于所述驱动晶体管的栅极与初始化电压端之间、以及连接于所述驱动晶体管的所述栅极与所述驱动晶体管的源极或漏极中的一者之间，所述开关晶体管的有源层包括氧化物半导体；以及，
    发光控制晶体管，与所述驱动晶体管串联；
    其中，所述开关晶体管的栅极和所述发光控制晶体管的栅极均连接于发光控制信号线。
  2. 根据权利要求1所述的像素驱动电路，其中，还包括：
    初始化晶体管，连接于所述开关晶体管及所述初始化电压端之间，所述初始化晶体管的有源层包括硅半导体。
  3. 根据权利要求2所述的像素驱动电路，其中，在所述开关晶体管及所述初始化晶体管同时导通，或所述开关晶体管及所述数据晶体管同时导通时，所述初始化电压端载入的初始化信号为恒定信号；在所述驱动晶体管驱动所述发光器件发光时，所述初始化信号为连续上升信号或连续下降信号。
  4. 根据权利要求2所述的像素驱动电路，其中，还包括：复位晶体管，所述复位晶体管连接于所述初始化电压端与所述发光器件之间，所述复位晶体管的栅极与第一扫描信号线或第二扫描信号线连接；或所述复位晶体管连接于所述初始化晶体管与所述发光器件之间，所述复位晶体管的所述栅极与所述第一扫描信号线连接。
  5. 根据权利要求4所述的像素驱动电路，其中，所述初始化晶体管的栅极与所述第一扫描信号线连接，所述数据晶体管的栅极与所述第二扫描信号线连接。
  6. 根据权利要求1所述的像素驱动电路，其中，所述发光控制晶体管包括第一发光控制晶体管和第二发光控制晶体管，所述第一发光控制晶体管串联于所述驱动晶体管与第一电压端之间，所述第二发光控制晶体管串联于所述驱动晶体管与第二电压端之间，所述第一发光控制晶体管的栅极、所述第二发光控制晶体管的栅极和所述开关晶体管的所述栅极连接于同一所述发光控制信号线。
  7. 根据权利要求6所述的像素驱动电路，其中，所述开关晶体管为N型晶体管，所述第一发光控制晶体管与所述第二发光控制晶体管为P型晶体管。
  8. 根据权利要求6所述的像素驱动电路，其中，所述像素驱动电路还包括存储电容，所述存储电容串联在所述驱动晶体管的所述栅极及所述第一电压端之间。
  9. 一种像素驱动电路的驱动方法，其中，用于驱动如权利要求1所述的像素驱动电路，所述驱动方法包括：
    利用所述开关晶体管将所述初始化电压端载入的初始信号加载至所述驱动晶体管的栅极；
    利用所述数据晶体管、所述开关晶体管将所述数据电压端载入的数据信号加载至所述驱动晶体管的所述栅极；
    利用所述发光控制晶体管以使所述驱动晶体管驱动所述发光器件发光。
  10. 根据权利要求9所述的驱动方法，其中，所述驱动晶体管驱动所述发光器件发光时，所述初始化信号随所述驱动晶体管的栅极电压的下降连续上升；或，随所述驱动晶体管的栅极电压的上升连续下降。
  11. 一种显示面板，其中，包括：
    多个像素驱动电路，每一所述像素驱动电路包括驱动晶体管及有源层包括氧化物半导体的开关晶体管；
    多个发光器件，每一所述像素驱动电路用于驱动对应的所述发光器件发光；
    多级栅极驱动电路，用于提供多级扫描信号，多级所述栅极驱动电路通过多条扫描信号线连接于多个所述像素驱动电路；
    多个发光信号控制电路，用于提供多个发光控制信号，多个所述发光信号控制电路通过多条发光控制信号线连接于多个所述像素驱动电路；其中，所述开关晶体管用于根据对应的所述发光控制信号重置所述驱动晶体管的栅极电压并利用数据信号补偿所述驱动晶体管的阈值电压。
  12. 根据权利要求11所述的显示面板，其中，每一所述像素驱动电路还包括初始化晶体管，所述初始化晶体管用于根据对应的所述扫描信号向所述开关晶体管传输初始化信号；所述初始化晶体管的有源层包括硅半导体。
  13. 根据权利要求12所述的显示面板，其中，每一所述像素驱动电路还包括：
    数据晶体管，用于根据对应的所述扫描信号向所述开关晶体管传输所述数据信号；
    复位晶体管，用于根据对应的所述扫描信号对所述发光器件的阳极电压进行复位；
    第一发光控制晶体管和第二发光控制晶体管，用于根据对应的所述发光控制信号使所述驱动晶体管产生驱动所述发光器件发光的驱动电流；其中，所述第一发光控制晶体管和第二发光控制晶体管响应相同的所述发光控制信号；
    存储电容，用于维持所述驱动晶体管的栅极电压。
  14. 根据权利要求13所述的显示面板，其中，
    多条所述发光控制信号线包括第一发光控制信号线与第二发光控制信号线，所述第一发光控制信号线被配置为向所述开关晶体管提供第一发光控制信号，所述第一发光控制信号线或所述第二发光控制信号线被配置为向所述第一发光控制晶体管和所述第二发光控制晶体管提供第二发光控制信号；
    多条所述扫描信号线包括第一扫描信号线与第二扫描信号线；所述第一扫描信号线被配置为向所述初始化晶体管提供第一扫描信号，所述第一扫描信号线被配置为向所述数据晶体管提供第二扫描信号。
  15. 根据权利要求14所述的显示面板，其中，所述开关晶体管为N型晶体管，所述第一发光控制晶体管与所述第二发光控制晶体管为P型晶体管。
  16. 根据权利要求14所述的显示面板，其中，
    所述开关晶体管的源极或漏极中的一者与所述驱动晶体管的栅极连接，所述开关晶体管的所述源极或所述漏极中的另一者与所述驱动晶体管的源极或漏极中的一者连接；
    所述初始化晶体管的源极或漏极中的一者与初始化电压端连接，所述初始化晶体管的所述源极或所述漏极中的另一者与所述开关晶体管的所述源极或所述漏极中的一者、所述驱动晶体管的所述源极或所述漏极中的一者连接；
    所述数据晶体管的源极或漏极中的一者与数据电压端连接，所述数据晶体管的所述源极或所述漏极中的另一者与所述驱动晶体管的所述源极或所述漏极中的一者连接；
    所述第一发光控制晶体管的源极或漏极中的一者与第一电压端连接，所述第一发光控制晶体管的所述源极或所述漏极中的另一者与所述驱动晶体管的所述源极或所述漏极中的一者连接；
    所述第二发光控制晶体管的源极或漏极中的一者与所述驱动晶体管的所述源极或所述漏极中的另一者连接，所述第二发光控制晶体管的所述源极或所述漏极中的另一者与所述发光器件的阳极连接；
    所述复位晶体管的栅极与所述第一扫描信号线或所述第二扫描信号线连接，所述复位晶体管的源极或漏极中的一者与所述初始化电压端或所述初始化晶体管的所述源极或所述漏极中的一者、所述开关晶体管的所述源极或所述漏极中的一者连接，所述复位晶体管的所述源极或所述漏极中的另一者与所述发光器件的所述阳极连接；
    存储电容，串联在所述第一电压端及所述驱动晶体管的所述栅极之间。
  17. 根据权利要求11所述的显示面板，其中，所述发光器件包括有机发光二极管、次毫米发光二极管或微型发光二极管。
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