WO2022000695A1 - 一种像素驱动电路、显示面板以及显示装置 - Google Patents

一种像素驱动电路、显示面板以及显示装置 Download PDF

Info

Publication number
WO2022000695A1
WO2022000695A1 PCT/CN2020/106724 CN2020106724W WO2022000695A1 WO 2022000695 A1 WO2022000695 A1 WO 2022000695A1 CN 2020106724 W CN2020106724 W CN 2020106724W WO 2022000695 A1 WO2022000695 A1 WO 2022000695A1
Authority
WO
WIPO (PCT)
Prior art keywords
power supply
transistor
supply voltage
control
module
Prior art date
Application number
PCT/CN2020/106724
Other languages
English (en)
French (fr)
Inventor
苏华生
付舰航
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US17/054,522 priority Critical patent/US11410615B2/en
Publication of WO2022000695A1 publication Critical patent/WO2022000695A1/zh

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technology, and in particular, to a pixel driving circuit, a display panel and a display device.
  • the luminescence wave of the light-emitting device will shift; the optical integrating sphere measurement found that under different currents, taking the light-emitting device as a micro-LED (Micro-LED) as an example, the light-emitting wavelength exhibits a U-shaped change , as shown in Figure 1, the abscissa in Figure 1 represents the current, in milliamperes, and the ordinate represents the peak wavelength, in nm, and this phenomenon occurs in most light-emitting devices.
  • Micro-LED Micro-LED
  • the light-emitting device When the spectrum is shifted, the light-emitting device appears color shift.
  • the brightness of the light-emitting device is mainly controlled by the pulse width modulation method to control the light-emitting time of the light-emitting device, so as to improve the color shift caused by the current change.
  • the time is shortened, thereby requiring chips with faster processing power, resulting in higher production costs.
  • the purpose of the present invention is to provide a pixel driving circuit, a display panel and a display device, which can reduce the production cost.
  • the present invention provides a pixel driving circuit, which is used for driving a light-emitting device to emit light;
  • the pixel driving circuit includes:
  • a data writing module a driving transistor, a first control module, a compensation module and a first storage module
  • the data writing module is respectively connected to the scanning signal and the data signal, the data writing module is connected with the gate of the driving transistor, and the data writing module is used for, under the control of the scanning signal, to writing the data signal to the gate of the drive transistor;
  • the first control module is connected to the first node, and the first control module is connected to a first control signal and a first power supply voltage; the first control module is used for when the voltage of the first control signal is greater than the first power supply voltage When the threshold voltage is preset, under the control of the first control signal, the first power supply voltage is written into the first node;
  • the compensation module is respectively connected to the first node and the source of the driving transistor, the compensation module is connected to a third power supply voltage, and the compensation module is used for, under the control of the first power supply voltage, to the third power supply voltage is input to the source of the driving transistor; the third power supply voltage is greater than the first power supply voltage;
  • the drain of the driving transistor is connected to the first end of the light emitting device, and the second end of the light emitting device is grounded.
  • the present invention also provides a display panel including the above pixel driving circuit.
  • the present invention also provides a display device comprising the above-mentioned display panel.
  • the pixel driving circuit, the display panel and the display device of the present invention include: a first control module is connected to the first node, the first control module is connected to a first control signal and a first power supply voltage; When the voltage of the first control signal is greater than the first preset threshold voltage, the first power supply voltage is written into the first node under the control of the first control signal; When the voltage of a control signal is greater than the first preset threshold voltage, the first power supply voltage is written into the first node to control the light-emitting of the light-emitting device, so as to avoid color shift of the light-emitting device. low, thus reducing production costs.
  • Fig. 1 is the relation diagram between existing electric current and peak wavelength
  • FIG. 2 is a schematic structural diagram of an existing pixel driving circuit
  • FIG. 3 is a driving timing diagram of the pixel driving circuit shown in FIG. 2;
  • FIG. 4 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a pixel driving circuit according to another embodiment of the present invention.
  • FIG. 6 is an operation timing diagram of an embodiment of the pixel driving circuit shown in FIG. 5 .
  • FIG. 7 is a schematic structural diagram of a pixel driving circuit according to another embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of a pixel driving circuit according to still another embodiment of the present invention.
  • FIG. 9 is an operation timing diagram of an embodiment of the pixel driving circuit shown in FIG. 8 .
  • first and second are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, features defined as “first”, “second” may expressly or implicitly include one or more of said features. In the description of the present application, “plurality” means two or more, unless otherwise expressly and specifically defined.
  • the terms “installed”, “connected” and “connected” should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
  • installed should be understood in a broad sense, for example, it may be a fixed connection or a detachable connection Connection, or integral connection; it can be mechanical connection, electrical connection or can communicate with each other; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal communication of two elements or the interaction of two elements relation.
  • a first feature "on” or “under” a second feature may include direct contact between the first and second features, or may include the first and second features Not directly but through additional features between them.
  • the first feature being “above”, “over” and “above” the second feature includes the first feature being directly above and obliquely above the second feature, or simply means that the first feature is level higher than the second feature.
  • the first feature is “below”, “below” and “below” the second feature includes the first feature being directly below and diagonally below the second feature, or simply means that the first feature has a lower level than the second feature.
  • the existing pixel driving circuit includes: a first transistor T1, a second transistor T2 and a third transistor T3; the gate of the first transistor T1 is connected to the first scan signal Scan1, and the source of the first transistor T1
  • the electrode is connected to the data signal vdata
  • the drain is connected to one end of the storage capacitor Cst and the gate of the third transistor T3, the gate of the second transistor T2 is connected to the second scan signal Scan2, and the source of the second transistor T2 is connected to vini
  • the drain is connected to one end of the storage capacitor Cst and the gate of the third transistor T3 respectively
  • the source of the third transistor T3 is connected to the cathode of the light-emitting device D0
  • the anode of the light-emitting device D0 is connected to the high-level power supply voltage OVDD
  • the drain of the third transistor T3 is connected to the low-level power supply voltage OVSS.
  • the data signal vdata is input to the gate of T3.
  • T3 is turned on, the light-emitting device D0 emits light.
  • vini is input to the gate of T3. pole, T3 is turned off, and the light-emitting device D0 does not emit light.
  • the level of vini is opposite to that of the data signal vdata.
  • one global scan of the panel is performed within one frame (1F, that is, 1 frame).
  • (1F that is, 1 frame).
  • 8 global scans but the time of one frame is fixed, so the time of each PWM scan will be shorter, which requires the chip to scan faster, send data faster, and require higher bandwidth .
  • a low-resolution scan requires fewer lines to scan at a time, while a high-resolution scan requires more lines to scan, so when it is applied to a high-resolution display panel, the scan speed is faster, so it is easy to Restricted by the scan rate of the chip, it cannot be applied to high-resolution display panels.
  • FIG. 4 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention.
  • the pixel driving circuit 20 of this embodiment is used to drive the light-emitting device to emit light; the pixel driving circuit 20 includes: a data writing module 21, a driving transistor M0, a first control module 22 and a compensation module 23; In an embodiment, the pixel driving circuit 20 further includes a first storage module 24 .
  • the data writing module 21 is respectively connected to the scan signal SC1 and the data signal Da, the data writing module 21 is connected to the gate of the driving transistor M0, and the data writing module 21 is used for the scanning signal Under the control of SC1, write the data signal Da into the gate of the drive transistor M0;
  • the first control module 22 is connected to the first node P, and the first control module 22 accesses the first control signal S1 and the first power supply voltage V1; the first control module 22 is used for when the first control When the voltage of the signal S1 is greater than the first preset threshold voltage, the first power supply voltage V1 is written into the first node P under the control of the first control signal S1;
  • the compensation module 23 is respectively connected to the first node P and the source of the driving transistor M0, the compensation module 23 is connected to the third power supply voltage ovdd, and the compensation module 23 is used for the first power supply Under the control of the voltage V1, the third power supply voltage ovdd is input to the source of the driving transistor M0; the third power supply voltage ovdd is greater than the first power supply voltage V1;
  • the drain of the driving transistor M0 is connected to the first end of the light emitting device D1, and the second end of the light emitting device D1 is grounded.
  • the first end is an anode and the second end is a cathode.
  • the first storage module 24 is used for storing the data signal Da.
  • the data writing module 21 includes a fourth transistor M4, the gate of the fourth transistor M4 is connected to the scan signal SC1, and the source of the fourth transistor M4 The data signal Da is connected, and the drain of the fourth transistor M4 is connected to the gate of the driving transistor M0.
  • the first control module 22 includes a first transistor M1; the gate of the first transistor M1 is connected to the first control signal S1, and the source of the first transistor M1 is connected to the first control signal S1.
  • the compensation module 23 includes a third transistor M3, the gate of the third transistor M3 is connected to the first node P, and the source of the third transistor M3 is connected to a third power supply voltage ovdd; the drain of the third transistor M3 is connected to the source of the driving transistor M0.
  • the third power supply voltage ovdd is greater than the first power supply voltage V1.
  • the first storage module 24 includes a first capacitor C1, one end of the first capacitor C1 is connected to the drain of the fourth transistor M4, and the other end of the first capacitor C1 is connected to the drain of the light-emitting device. The first end is connected.
  • the light-emitting device D1 can be one of an organic light-emitting diode, a micro light-emitting diode, and a miniOLED.
  • FIG. 5 only provides an example, and does not constitute a limitation to the present invention, and the structure of each module is not limited to the structure shown in FIG. 5 .
  • the first transistor, the third transistor, the fourth transistor and the driving transistor are metal oxide semiconductor field effect transistors.
  • the first to fourth transistors and the driving transistor are N-type transistors as an example, wherein Da1 to Dan represent one of the light-emitting devices in the first row to the nth row in the display panel
  • the input data signal, n is a natural number, to explain the working principle of the above pixel driving circuit:
  • M4 is turned on, Da is written to the gate of M0, and S1 is at a low level at this time, so M1 is turned off, causing M3 to be turned off, and the light-emitting device D1 is in an off state;
  • M4 In the control phase (t3 period), M4 is turned off, and S1 is increased (raised) at this time, but since the maximum value of S1 is small (the voltage difference Vgs between the gate and source of M1 is less than the threshold voltage Vth), M1 is turned off state, so that M3 is also in an off state, so the light-emitting device D1 is in an off state;
  • S1 continues to increase (raise), and at this time, when the first control voltage S1 is greater than the first preset threshold voltage, that is, the minimum value of S1 is relatively large (the difference between the gate and source of M1 is large).
  • the voltage difference Vgs is greater than the threshold voltage Vth), so that M1 is in a conductive state, which in turn causes M3 to be in a conductive state, so the light-emitting device emits light;
  • the first control voltage controls the length of time that the Vgs of M1 reaches Vth, thereby controlling the light-emitting time of the light-emitting device.
  • each transistor in this application is not limited to using N-type transistors. In practical applications, each transistor may also be a P-type transistor.
  • the phase of each signal in Figure 6 can be adjusted according to the function of each module and transistor. For example, when M1, M3, M4, and M0 are all P-type transistors, S1, V1, The phases of the SC1 and Da signals are opposite to those of the respective signals shown in FIG. 6 .
  • Another embodiment of the present application further provides a pixel driving method, which is applied to the pixel driving circuit described in any of the embodiments.
  • the pixel driving method in each frame period sequentially includes a compensation stage, a control stage, and a light-emitting stage.
  • the first control voltage continues to increase; when the first control voltage is greater than a first preset threshold voltage, under the control of the first control module, the first power writing a voltage to the first node; and under the control of the first power supply voltage, writing the third power supply voltage to the source of the driving transistor, so that the light emitting device emits light.
  • the maximum value of the first control voltage is smaller than the first preset threshold voltage; in the light-emitting stage, the minimum value of the first control voltage is larger than the first Preset threshold voltage.
  • the first preset threshold voltage may be the threshold voltage Vth of M1.
  • the light-emitting device is controlled to emit light when the gate-source voltage Vgs of the control device M1 is greater than the threshold voltage Vth, the brightness of the light-emitting device is controlled; when M3 is turned on, both ovdd and V1 are constant voltages, so that the input
  • the current of the light-emitting device is a constant current, and this current drives the light-emitting device to emit light, so the problem of wavelength drift of the light-emitting device can be solved, thereby avoiding the color shift of the light-emitting device; It has a longer charging time, which reduces the requirements for the chip, thereby reducing the production cost; when the data voltage is appropriately large, the current is not sensitive to the threshold voltage, so there is no need to consider the Vth drift and compensation of the transistor.
  • FIG. 7 is a schematic structural diagram of a pixel driving circuit according to another embodiment of the present invention.
  • the pixel driving circuit 20 of this embodiment further includes: a second control module 25; in one embodiment, the pixel driving circuit 20 may further include a second storage module 26.
  • the second control module 25 is connected to the first node P, and the second control module 26 accesses the second control signal S2 and the second power supply voltage V2; the second control module 26 is used for the second control Under the control of the signal S2, the second power supply voltage V2 is written into the first node;
  • the first power supply voltage V1 is greater than the second power supply voltage V2; the second power supply voltage V2 is less than the second preset threshold voltage, that is, the second power supply voltage V2 is less than the threshold voltage of the third transistor M3 .
  • the second preset threshold voltage is the threshold voltage of the third transistor M3.
  • the second storage module 26 is connected to the first node P, and the second storage module 26 is used for storing the first power supply voltage V1 or the second power supply voltage V2.
  • the second control module 25 includes a second transistor M2; the gate of the second transistor M2 is connected to the second control signal S2, and the second transistor M2 is connected to the second control signal S2.
  • the source of M2 is connected to the second power supply voltage V2; the drain of the second transistor M2 is connected to the first node P.
  • the second storage module 26 includes a second capacitor C2, one end of the second capacitor C2 is connected to the first node P, and the other end of the second capacitor C2 is grounded.
  • FIG. 8 only provides an example, and does not limit the present invention, and the structure of each module is not limited to the structure shown in FIG. 8 .
  • the first to fourth transistors and the driving transistor are metal-oxide-semiconductor field-effect transistors.
  • the first to fourth transistors and the driving transistor are N-type transistors as an example, wherein Da1 to Dan represent one of the light-emitting devices in the first row to the nth row in the display panel
  • the input data signal explains the working principle of the above pixel driving circuit:
  • S1 continues to increase (raise), and when the first control voltage S1 is greater than the first preset threshold voltage, that is, the minimum value of S1 is larger (the gate-source of M1 is greater than the gate-source voltage of M1).
  • the voltage difference Vgs between the two is greater than the threshold voltage Vth), so that M1 is in a conductive state, which in turn causes M3 to be in a conductive state, so the light-emitting device emits light;
  • the first control voltage controls the length of time that the Vgs of M1 reaches Vth, thereby controlling the light-emitting time of the light-emitting device.
  • each transistor may also be a P-type transistor.
  • the phase of each signal in Fig. 9 can be adjusted according to the function of each module and transistor. For example, when M1, M2, M3, M4, and M0 are all P-type transistors, S1, The phases of the S2, V1, V2, SC1 and Da signals are opposite to those of the respective signals shown in FIG. 9 .
  • the second control module due to the addition of the second control module, the increase time of the gate voltage of M3 can be shortened, and the charging efficiency can be improved.
  • the second control module can also turn off M3 in time. .
  • Another embodiment of the present application further provides a pixel driving method, which is applied to the pixel driving circuit described in any of the embodiments.
  • the pixel driving method in each frame period sequentially includes a compensation stage, a control stage, and a light-emitting stage.
  • the first control voltage continues to increase; when the first control voltage is greater than a first preset threshold voltage, under the control of the first control voltage, the first power writing a voltage to the first node; and under the control of the first power supply voltage, writing the third power supply voltage to the source of the driving transistor, so that the light emitting device emits light.
  • the maximum value of the first control voltage is smaller than a first preset threshold voltage; in the light-emitting stage, the minimum value of the first control voltage is larger than the first preset threshold voltage threshold voltage.
  • the first preset threshold voltage may be the threshold voltage Vth of M1.
  • Another embodiment of the present application further provides a display panel, where the display panel includes the pixel driving circuit described in any one of the foregoing embodiments.
  • Another embodiment of the present application further provides a display device, where the display device includes the display panel described in any one of the embodiments.
  • the display device in this embodiment may be any display device with 2D or 3D display function, such as display panel, electronic paper, mobile phone, tablet computer, television, notebook computer, digital photo frame, navigator, wearable device, etc. product or component.
  • the time when Vgs reaches Vth can be controlled, thereby controlling the light-emitting duration of the light-emitting device. Since the gate-source voltage Vgs of the control device M1 is greater than or equal to the threshold voltage Vth, the light-emitting device is controlled to emit light, thereby realizing the control of the brightness of the light-emitting device; when M3 is turned on, both ovdd and V1 are constant voltages, so that the input The current of the light-emitting device is a constant current, and this current drives the light-emitting device to emit light, so the problem of wavelength drift of the light-emitting device can be solved, thereby avoiding the color shift of the light-emitting device; It has a longer charging time, which reduces the requirements for the chip, thereby reducing the production cost; when the data voltage is appropriately large, the current is not sensitive to the threshold voltage, so there is no need to consider the Vth drift and compensation of the transistor.
  • the pixel driving circuit, the display panel and the display device of the present invention include: a first control module is connected to the first node, the first control module is connected to a first control signal and a first power supply voltage; When the voltage of the first control signal is greater than the first preset threshold voltage, the first power supply voltage is written into the first node under the control of the first control signal; When the voltage of a control signal is greater than the first preset threshold voltage, the first power supply voltage is written into the first node to control the light-emitting of the light-emitting device, so as to avoid color shift of the light-emitting device. low, thus reducing production costs.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

一种像素驱动电路（20）、显示面板以及显示装置，其中，像素驱动电路（20）包括：第一控制模块（22）与第一节点（P）连接，第一控制模块（22）接入第一控制信号（S1）和第一电源电压（V1）；第一控制模块（22）用于当第一控制信号（S1）的电压大于第一预设阈值电压时，在第一控制信号（S1）的控制下，将第一电源电压（V1）写入第一节点（P）。

Description

一种像素驱动电路、显示面板以及显示装置 技术领域
本发明涉及显示技术领域，特别是涉及一种像素驱动电路、显示面板以及显示装置。
 背景技术
发光器件在不同的电流密度下，发光波普会发生偏移；光学积分球测量发现，在不同的电流下，以发光器件为微型发光二极管（Micro-LED）为例，发光波长呈现U型变化，如图1所示，图1中横坐标表示电流，单位为毫安，纵坐标表示峰值波长，单位为nm，且这种现象发生在绝大部分的发光器件中。
 技术问题
当光谱发生偏移时，导致发光器件出现色偏。目前主要通过脉冲宽度调制方式控制发光器件的发光时间来控制亮度，以改善电流变化引起的色偏，然而由于这种方式在一帧时间内需要进行多次全局扫面，因此使得每一次的扫描时间缩短，从而需要芯片具有更快的处理能力，导致生产成本较高。
 技术解决方案
本发明的目的在于提供一种像素驱动电路、显示面板以及显示装置，能够降低生产成本。
为解决上述技术问题，本发明提供一种像素驱动电路，所述像素驱动电路用于驱动发光器件发光；其包括：
数据写入模块、驱动晶体管、第一控制模块、补偿模块以及第一存储模块；
所述数据写入模块分别接入扫描信号和数据信号，所述数据写入模块与所述驱动晶体管的栅极连接，所述数据写入模块用于在所述扫描信号的控制下，将所述数据信号写入所述驱动晶体管的栅极；
所述第一控制模块与第一节点连接，所述第一控制模块接入第一控制信号和第一电源电压；所述第一控制模块用于当所述第一控制信号的电压大于第一预设阈值电压时，在所述第一控制信号的控制下，将所述第一电源电压写入所述第一节点；
所述补偿模块分别与所述第一节点以及所述驱动晶体管的源极连接，所述补偿模块接入第三电源电压，所述补偿模块用于在所述第一电源电压的控制下，将所述第三电源电压输入所述驱动晶体管的源极；所述第三电源电压大于所述第一电源电压；
所述驱动晶体管的漏极与所述发光器件的第一端连接，所述发光器件的第二端接地。
本发明还提供一种显示面板，其包括上述像素驱动电路。
本发明还提供一种显示装置，其包括上述显示面板。
 有益效果
本发明的像素驱动电路、显示面板以及显示装置，包括；第一控制模块与第一节点连接，所述第一控制模块接入第一控制信号和第一电源电压；所述第一控制模块用于当所述第一控制信号的电压大于第一预设阈值电压时，在所述第一控制信号的控制下，将所述第一电源电压写入所述第一节点；由于当所述第一控制信号的电压大于第一预设阈值电压时，将所述第一电源电压写入所述第一节点以控制发光器件的发光，从而避免发光器件出现色偏，此外由于对芯片的要求较低，因此降低了生产成本。
 附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面对实施例中所需要使用的附图作简单的介绍。下面描述中的附图仅为本申请的部分实施例，对于本领域普通技术人员而言，在不付出创造性劳动的前提下，还可以根据这些附图获取其他的附图。
图1为现有电流与峰值波长之间的关系图；
图2为现有像素驱动电路的结构示意图；
图3为图2所示像素驱动电路的驱动时序图；
图4为本发明一实施方式的像素驱动电路的结构示意图。
图5为本发明另一实施方式的像素驱动电路的结构示意图。
图6为图5所示的像素驱动电路的一实施方式的工作时序图。
图7为本发明又一实施方式的像素驱动电路的结构示意图。
图8为本发明再一实施方式的像素驱动电路的结构示意图。
图9为图8所示的像素驱动电路的一实施方式的工作时序图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
如图2所示，现有的像素驱动电路包括：第一晶体管T1、第二晶体管T2以及第三晶体管T3；第一晶体管T1的栅极接入第一扫描信号Scan1，第一晶体管T1的源极接入数据信号vdata，漏极分别与存储电容Cst的一端以及第三晶体管T3的栅极连接，第二晶体管T2的栅极接入第二扫描信号Scan2，第二晶体管T2的源极接入vini，漏极分别与存储电容Cst的一端以及第三晶体管T3的栅极连接，第三晶体管T3的源极与发光器件D0的阴极连接，发光器件D0的阳极接入高电平电源电压OVDD，第三晶体管T3的漏极接入低电平电源电压OVSS，当T1开启时，将数据信号vdata输入T3的栅极，T3开启，发光器件D0发光，当T2开启时，将vini输入T3的栅极，T3关闭，发光器件D0不发光。其中vini的电平与数据信号vdata的电平相反。
如图3所示，传统方式一帧（1F，也即1frame）时间内进行面板一次全局扫描，在一实施方式中，脉冲宽度调制（PWM，Pulse Width Modulation)）的方式则需要进行（灰色部分）8次全局扫面，然而一帧的时间是一定的，因此每一次PWM扫描的时间就会变短，从而要求芯片的扫描的速度要更快、发送数据更快，且对带宽需求更高。低分辨率扫描一次需要扫描的行数较少，而高分辨率下扫描一次需要扫描的行数更多，因此当其应用在高分辨率的显示面板时，需要扫描的速度更快，因此容易受到芯片的扫描速率的限制，无法适用于高分辨率的显示面板中。
请参照图4，图4为本发明一实施方式的像素驱动电路的结构示意图。
如图4所示，本实施例的像素驱动电路20用于驱动发光器件发光；该像素驱动电路20包括：数据写入模块21、驱动晶体管M0、第一控制模块22以及补偿模块23；在一实施方式中，该像素驱动电路20还包括第一存储模块24。
所述数据写入模块21分别接入扫描信号SC1和数据信号Da，所述数据写入模块21与所述驱动晶体管M0的栅极连接，所述数据写入模块21用于在所述扫描信号SC1的控制下，将所述数据信号Da写入所述驱动晶体管M0的栅极；
所述第一控制模块22与第一节点P连接，所述第一控制模块22接入第一控制信号S1和第一电源电压V1；所述第一控制模块22用于当所述第一控制信号S1的电压大于第一预设阈值电压时，在所述第一控制信号S1的控制下，将所述第一电源电压V1写入所述第一节点P；
所述补偿模块23分别与所述第一节点P以及所述驱动晶体管M0的源极连接，所述补偿模块23接入第三电源电压ovdd，所述补偿模块23用于在所述第一电源电压V1的控制下，将所述第三电源电压ovdd输入所述驱动晶体管M0的源极；所述第三电源电压ovdd大于所述第一电源电压V1;
所述驱动晶体管M0的漏极与所述发光器件D1的第一端连接，所述发光器件D1的第二端接地。在一实施方式中，第一端为阳极，第二端为阴极。
所述第一存储模块24用于存储所述数据信号Da。
在另一实施方式中，如图5所示，所述数据写入模块21包括第四晶体管M4，所述第四晶体管M4的栅极接入扫描信号SC1，所述第四晶体管M4的源极接入数据信号Da，所述第四晶体管M4的漏极与所述驱动晶体M0管的栅极连接。
在一实施方式中，所述第一控制模块22包括第一晶体管M1；所述第一晶体管M1的栅极接入所述第一控制信号S1，所述第一晶体管M1的源极接入第一电源电压V1；所述第一晶体管M1的漏极与所述第一节点P连接。
在一实施方式中，所述补偿模块23包括第三晶体管M3，所述第三晶体管M3的栅极与所述第一节点P连接，所述第三晶体管M3的源极接入第三电源电压ovdd；所述第三晶体管M3的漏极与所述驱动晶体管M0的源极连接。第三电源电压ovdd大于所述第一电源电压V1。
在一实施方式中，所述第一存储模块24包括第一电容C1，所述第一电容C1的一端与第四晶体管M4的漏极连接，所述第一电容C1的另一端与发光器件的第一端连接。
上述发光器件D1可为有机发光二极管、微型发光二极管以及miniOLED中的一种。
当然，可以理解的，图5仅给出一种示例，并不能对本发明构成限定，各模块的结构不限于图5所示的结构。
在一实施方式中，为了提高导电性能，第一晶体管、第三晶体管、第四晶体管以及驱动晶体管为金属氧化物半导体场效应晶体管。
在一实施方式中，如图6所示，以第一晶体管至第四晶体管以及驱动晶体管为N型晶体管为例，其中Da1至Dan表示显示面板中第1行至第n行中其中一发光器件输入的数据信号，n为自然数，对上述像素驱动电路的工作原理进行说明：
在初始化阶段（t1时段），所有信号初始化，也即整个像素驱动电路处于初始化阶段；
在补偿阶段（t2时段），M4打开，Da写入M0的栅极，此时S1为低电平，因此M1截止，导致M3截止，发光器件D1处于熄灭状态；
在控制阶段（t3时段），M4断开，此时S1增大（抬升），但由于S1的最大值较小（M1的栅源之间的压差Vgs小于阈值电压Vth），使得M1处于截止状态，进而导致M3也处于截止状态，因此发光器件D1处于熄灭状态；
在发光阶段（t4时段），S1继续增大（抬升），此时所述第一控制电压S1大于第一预设阈值电压时，也即S1的最小值较大（M1的栅源之间的压差Vgs大于阈值电压Vth），使得M1处于导通状态，进而导致M3也处于导通状态，因此发光器件发光；
因此通过第一控制电压控制M1的Vgs达到Vth的时长，进而控制发光器件的发光时间。
需要说明的是，本申请中各晶体管并不限于采用N型管，实际应用中，各晶体管还可以为P型管。当各晶体管为P型管时，可以根据各模块以及晶体管的功能适应调整图6中各信号的相位即可，例如，当M1、M3、M4、M0均为P型管时，S1、V1、SC1以及Da信号的相位与图6中示出的各信号相位相反。
本申请另一实施例还提供了一种像素驱动方法，应用于任一实施例所述的像素驱动电路，各帧周期内的像素驱动方法依次包括补偿阶段、控制阶段以及发光阶段。
S101、所述补偿阶段，在所述数据写入模块的控制下，将所述数据电压写入所述驱动晶体管的栅极；
S102、所述控制阶段，所述第一控制电压增大；
S103、所述发光阶段，所述第一控制电压继续增大；当所述第一控制电压大于第一预设阈值电压时，在所述第一控制模块的控制下，将所述第一电源电压写入所述第一节点；以及在所述第一电源电压的控制下，将所述第三电源电压写入所述驱动晶体管的源极，以使所述发光器件发光。
在一实施方式中，所述控制阶段，所述第一控制电压的最大值小于所述第一预设阈值电压；在所述发光阶段，所述第一控制电压的最小值大于所述第一预设阈值电压。其中，该第一预设阈值电压可为M1的阈值电压Vth。
由于通过当控制器件M1的栅源级电压Vgs大于阈值电压Vth时才控制发光器件发光，从而实现对发光器件的亮度的控制；由当M3导通时，ovdd和V1都为恒定电压，使得输入发光器件的电流为恒定电流，并以此电流驱动发光器件发光，因此可以解决发光器件的波长漂移的问题，从而避免发光器件出现色偏；此外由于不需要通过脉冲宽度调整的方式进行驱动，因此具有较长的充电时间，降低了对芯片的要求，进而降低了生产成本；当数据电压适当大时，电流对阈值电压不敏感，因此不需要考虑晶体管的Vth漂移及补偿问题。
请参照图7，图7为本发明另一实施方式的像素驱动电路的结构示意图。
如图7所示，在上一实施例的基础上，本实施例的像素驱动电路20还包括：第二控制模块25；在一实施方式中，该像素驱动电路20还可包括第二存储模块26。
所述第二控制模块25与所述第一节点P连接，第二控制模块26接入第二控制信号S2和第二电源电压V2；所述第二控制模块26用于在所述第二控制信号S2的控制下，将所述第二电源电压V2写入所述第一节点；
所述第一电源电压V1大于所述第二电源电压V2；所述第二电源电压V2小于第二预设阈值电压，也即所述第二电源电压V2小于所述第三晶体管M3的阈值电压。第二预设阈值电压为第三晶体管M3的阈值电压。
所述第二存储模块26与所述第一节点P连接，所述第二存储模块26用于存储第一电源电压V1或第二电源电压V2。
在另一实施方式中，如图8所示，所述第二控制模块25包括第二晶体管M2；所述第二晶体管M2的栅极接入所述第二控制信号S2，所述第二晶体管M2的源极接入第二电源电压V2；所述第二晶体管M2的漏极与所述第一节点P连接。
在一实施方式中，所述第二存储模块26包括第二电容C2，所述第二电容C2的一端与所述第一节点P连接，所述第二电容C2的另一端接地。
当然，可以理解的，图8仅给出一种示例，并不能对本发明构成限定，各模块的结构不限于图8所示的结构。
在一实施方式中，为了提高导电性能，第一晶体管至第四晶体管以及驱动晶体管为金属氧化物半导体场效应晶体管。
在一实施方式中，如图9所示，以第一晶体管至第四晶体管以及驱动晶体管为N型晶体管为例，其中Da1至Dan表示显示面板中第1行至第n行中其中一发光器件输入的数据信号，对上述像素驱动电路的工作原理进行说明：
在初始化阶段（t1时段），所有信号初始化，也即整个像素驱动电路处于初始化阶段；
在补偿阶段（t2时段），M4打开，Da写入M0的栅极，M2打开，V2写入第一节点，给C2提供一个初始电位，此时S1为低电平，因此M1截止，导致M3截止，发光器件D1处于熄灭状态；
在控制阶段（t3时段），M4和M2均断开，此时S1增大（抬升），但由于S1的最大值较小（M1的栅源之间的压差Vgs小于阈值电压Vth），使得M1处于截止状态，进而导致M3也处于截止状态，因此发光器件D1处于熄灭状态；
在发光阶段（t4时段），S1继续增大（抬升），此时所述第一控制电压S1大于所述第一预设阈值电压时，也即S1的最小值较大（M1的栅源之间的压差Vgs大于阈值电压Vth），使得M1处于导通状态，进而导致M3也处于导通状态，因此发光器件发光；
因此通过第一控制电压控制M1的Vgs达到Vth的时长，进而控制发光器件的发光时间。
需要说明的是，本申请中各晶体管并不限于采用N型管，实际应用中，各晶体管还可以为P型管。当各晶体管为P型管时，可以根据各模块以及晶体管的功能适应调整图9中各信号的相位即可，例如，当M1、M2、M3、M4、M0均为P型管时，S1、S2、V1、V2、SC1以及Da信号的相位与图9中示出的各信号相位相反。
在上一实施例的基础上，由于增加第二控制模块，因此可以缩短M3的栅极电压的增长时间，提高充电效率，此外当增加第二存储模块，第二控制模块还可将M3及时关闭。
本申请另一实施例还提供了一种像素驱动方法，应用于任一实施例所述的像素驱动电路，各帧周期内的像素驱动方法依次包括补偿阶段、控制阶段以及发光阶段。
S201、所述补偿阶段，在所述数据写入模块的控制下，将所述数据电压写入所述驱动晶体管的栅极；以及在所述第二控制模块的控制下，将所述第二电源电压写入所述第一节点；
S202、所述控制阶段，所述第一控制电压增大；
S203、所述发光阶段，所述第一控制电压继续增大；当所述第一控制电压大于第一预设阈值电压时，在所述第一控制电压的控制下，将所述第一电源电压写入所述第一节点；以及在第一电源电压的控制下，将所述第三电源电压写入所述驱动晶体管的源极，以使所述发光器件发光。
在一实施方式中，所述控制阶段，所述第一控制电压的最大值小于第一预设阈值电压；在所述发光阶段，所述第一控制电压的最小值大于所述第一预设阈值电压。其中，该第一预设阈值电压可为M1的阈值电压Vth。
本申请另一实施例还提供了一种显示面板，该显示面板包括上述任意一实施例所述的像素驱动电路。
本申请另一实施例还提供了一种显示装置，所述显示装置包括任一实施例所述的显示面板。需要说明的是，本实施例中的显示装置可以为：显示面板、电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪、可穿戴设备等任何具有2D或3D显示功能的产品或部件。
由于控制第一控制电压的坡度，便能控制Vgs达到Vth的时间，从而控制发光器件的发光时长。由于通过控制器件M1的栅源级电压Vgs大于等于阈值电压Vth时才控制发光器件发光，从而实现对发光器件的亮度的控制；由当M3导通时，ovdd和V1都为恒定电压，使得输入发光器件的电流为恒定电流，并以此电流驱动发光器件发光，因此可以解决发光器件的波长漂移的问题，从而避免发光器件出现色偏；此外由于不需要通过脉冲宽度调整的方式进行驱动，因此具有较长的充电时间，降低了对芯片的要求，进而降低了生产成本；当数据电压适当大时，电流对阈值电压不敏感，因此不需要考虑晶体管的Vth漂移及补偿问题。
具体的，本实例提供的像素驱动电路的驱动方法具体工作过程和原理可以参照前述实施例的描述，此处不再赘述。
本发明的像素驱动电路、显示面板以及显示装置，包括；第一控制模块与第一节点连接，所述第一控制模块接入第一控制信号和第一电源电压；所述第一控制模块用于当所述第一控制信号的电压大于第一预设阈值电压时，在所述第一控制信号的控制下，将所述第一电源电压写入所述第一节点；由于当所述第一控制信号的电压大于第一预设阈值电压时，将所述第一电源电压写入所述第一节点以控制发光器件的发光，从而避免发光器件出现色偏，此外由于对芯片的要求较低，因此降低了生产成本。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种像素驱动电路，其包括：所述像素驱动电路用于驱动发光器件发光；所述像素驱动电路包括：
    数据写入模块、驱动晶体管、第一控制模块、补偿模块以及第一存储模块；
    所述数据写入模块分别接入扫描信号和数据信号，所述数据写入模块与所述驱动晶体管的栅极连接，所述数据写入模块用于在所述扫描信号的控制下，将所述数据信号写入所述驱动晶体管的栅极；
    所述第一控制模块与第一节点连接，所述第一控制模块接入第一控制信号和第一电源电压；所述第一控制模块用于当所述第一控制信号的电压大于第一预设阈值电压时，在所述第一控制信号的控制下，将所述第一电源电压写入所述第一节点；
    所述补偿模块分别与所述第一节点以及所述驱动晶体管的源极连接，所述补偿模块接入第三电源电压，所述补偿模块用于在所述第一电源电压的控制下，将所述第三电源电压输入所述驱动晶体管的源极；所述第三电源电压大于所述第一电源电压；
    所述驱动晶体管的漏极与所述发光器件的第一端连接，所述发光器件的第二端接地。
  2. 根据权利要求1所述的像素驱动电路，其中
    所述像素驱动电路还包括第二控制模块；
    所述第二控制模块与所述第一节点连接，所述第二控制模块接入第二控制信号和第二电源电压；所述第二控制模块用于在所述第二控制信号的控制下，将所述第二电源电压写入所述第一节点；所述第二电源电压小于第二预设阈值电压；所述第一电源电压大于所述第二电源电压。
  3. 根据权利要求2所述的像素驱动电路，其中
    所述第二控制模块包括第二晶体管；所述第二晶体管的栅极接入所述第二控制信号，所述第二晶体管的源极接入第二电源电压；所述第二晶体管的漏极与所述第一节点连接。
  4. 根据权利要求2所述的像素驱动电路，其中所述像素驱动电路还包括：第二存储模块；
    所述第二存储模块与所述第一节点连接，所述第二存储模块用于存储第一电源电压或第二电源电压。
  5. 根据权利要求4所述的像素驱动电路，其中
    所述第二存储模块包括第二电容，所述第二电容的一端与所述第一节点连接，所述第二电容的另一端接地。
  6. 根据权利要求1所述的像素驱动电路，其中
    所述第一控制模块包括第一晶体管；所述第一晶体管的栅极接入所述第一控制信号，所述第一晶体管的源极接入所述第一电源电压；所述第一晶体管的漏极与所述第一节点连接。
  7. 根据权利要求1所述的像素驱动电路，其中
    所述补偿模块包括第三晶体管，所述第三晶体管的栅极与所述第一节点连接，所述第三晶体管的源极接入所述第三电源电压；所述第三晶体管的漏极与所述驱动晶体管的源极连接。
  8. 一种显示面板，其包括像素驱动电路，所述像素驱动电路用于驱动发光器件发光；所述像素驱动电路包括：
    数据写入模块、驱动晶体管、第一控制模块、补偿模块以及第一存储模块；
    所述数据写入模块分别接入扫描信号和数据信号，所述数据写入模块与所述驱动晶体管的栅极连接，所述数据写入模块用于在所述扫描信号的控制下，将所述数据信号写入所述驱动晶体管的栅极；
    所述第一控制模块与第一节点连接，所述第一控制模块接入第一控制信号和第一电源电压；所述第一控制模块用于当所述第一控制信号的电压大于第一预设阈值电压时，在所述第一控制信号的控制下，将所述第一电源电压写入所述第一节点；
    所述补偿模块分别与所述第一节点以及所述驱动晶体管的源极连接，所述补偿模块接入第三电源电压，所述补偿模块用于在所述第一电源电压的控制下，将所述第三电源电压输入所述驱动晶体管的源极；所述第三电源电压大于所述第一电源电压；
    所述驱动晶体管的漏极与所述发光器件的第一端连接，所述发光器件的第二端接地。
  9. 根据权利要求8所述的显示面板，其中
    所述像素驱动电路还包括第二控制模块；
    所述第二控制模块与所述第一节点连接，所述第二控制模块接入第二控制信号和第二电源电压；所述第二控制模块用于在所述第二控制信号的控制下，将所述第二电源电压写入所述第一节点；所述第二电源电压小于第二预设阈值电压；所述第一电源电压大于所述第二电源电压。
  10. 根据权利要求9所述的显示面板，其中
    所述第二控制模块包括第二晶体管；所述第二晶体管的栅极接入所述第二控制信号，所述第二晶体管的源极接入第二电源电压；所述第二晶体管的漏极与所述第一节点连接。
  11. 根据权利要求9所述的显示面板，其中所述像素驱动电路还包括：第二存储模块；
    所述第二存储模块与所述第一节点连接，所述第二存储模块用于存储第一电源电压或第二电源电压。
  12. 根据权利要求11所述的显示面板，其中
    所述第二存储模块包括第二电容，所述第二电容的一端与所述第一节点连接，所述第二电容的另一端接地。
  13. 根据权利要求8所述的显示面板，其中
    所述第一控制模块包括第一晶体管；所述第一晶体管的栅极接入所述第一控制信号，所述第一晶体管的源极接入所述第一电源电压；所述第一晶体管的漏极与所述第一节点连接。
  14. 根据权利要求8所述的显示面板，其中
    所述补偿模块包括第三晶体管，所述第三晶体管的栅极与所述第一节点连接，所述第三晶体管的源极接入所述第三电源电压；所述第三晶体管的漏极与所述驱动晶体管的源极连接。
  15. 一种显示装置，其包括显示面板，其包括像素驱动电路，所述像素驱动电路用于驱动发光器件发光；所述像素驱动电路包括：
    数据写入模块、驱动晶体管、第一控制模块、补偿模块以及第一存储模块；
    所述数据写入模块分别接入扫描信号和数据信号，所述数据写入模块与所述驱动晶体管的栅极连接，所述数据写入模块用于在所述扫描信号的控制下，将所述数据信号写入所述驱动晶体管的栅极；
    所述第一控制模块与第一节点连接，所述第一控制模块接入第一控制信号和第一电源电压；所述第一控制模块用于当所述第一控制信号的电压大于第一预设阈值电压时，在所述第一控制信号的控制下，将所述第一电源电压写入所述第一节点；
    所述补偿模块分别与所述第一节点以及所述驱动晶体管的源极连接，所述补偿模块接入第三电源电压，所述补偿模块用于在所述第一电源电压的控制下，将所述第三电源电压输入所述驱动晶体管的源极；所述第三电源电压大于所述第一电源电压；
    所述驱动晶体管的漏极与所述发光器件的第一端连接，所述发光器件的第二端接地。
  16. 根据权利要求15所述的显示装置，其中
    所述像素驱动电路还包括第二控制模块；
    所述第二控制模块与所述第一节点连接，所述第二控制模块接入第二控制信号和第二电源电压；所述第二控制模块用于在所述第二控制信号的控制下，将所述第二电源电压写入所述第一节点；所述第二电源电压小于第二预设阈值电压；所述第一电源电压大于所述第二电源电压。
  17. 根据权利要求16所述的显示装置，其中
    所述第二控制模块包括第二晶体管；所述第二晶体管的栅极接入所述第二控制信号，所述第二晶体管的源极接入第二电源电压；所述第二晶体管的漏极与所述第一节点连接。
  18. 根据权利要求16所述的显示装置，其中所述像素驱动电路还包括：第二存储模块；
    所述第二存储模块与所述第一节点连接，所述第二存储模块用于存储第一电源电压或第二电源电压。
  19. 根据权利要求18所述的显示装置，其中
    所述第二存储模块包括第二电容，所述第二电容的一端与所述第一节点连接，所述第二电容的另一端接地。
  20. 根据权利要求15所述的显示装置，其中
    所述第一控制模块包括第一晶体管；所述第一晶体管的栅极接入所述第一控制信号，所述第一晶体管的源极接入所述第一电源电压；所述第一晶体管的漏极与所述第一节点连接。
PCT/CN2020/106724 2020-07-02 2020-08-04 一种像素驱动电路、显示面板以及显示装置 WO2022000695A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/054,522 US11410615B2 (en) 2020-07-02 2020-08-04 Pixel driving circuit, display panel and display device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010628792.2 2020-07-02
CN202010628792.2A CN111785201B (zh) 2020-07-02 2020-07-02 一种像素驱动电路及其驱动方法、显示面板以及显示装置

Publications (1)

Publication Number Publication Date
WO2022000695A1 true WO2022000695A1 (zh) 2022-01-06

Family

ID=72759515

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/106724 WO2022000695A1 (zh) 2020-07-02 2020-08-04 一种像素驱动电路、显示面板以及显示装置

Country Status (3)

Country Link
US (1) US11410615B2 (zh)
CN (1) CN111785201B (zh)
WO (1) WO2022000695A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116798345B (zh) * 2023-06-30 2024-05-17 惠科股份有限公司 像素驱动电路、驱动方法和显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1595477A (zh) * 2003-09-08 2005-03-16 三洋电机株式会社 显示装置
US20090021536A1 (en) * 2006-03-10 2009-01-22 Canon Kabushiki Kaisha Driving circuit of display element and image display apparatus
CN101437341A (zh) * 2007-11-14 2009-05-20 英飞凌科技股份有限公司 有机发光二极管驱动器
CN106469539A (zh) * 2015-08-04 2017-03-01 启耀光电股份有限公司 显示面板和像素电路
CN107481662A (zh) * 2017-07-20 2017-12-15 友达光电股份有限公司 显示面板及其像素的驱动方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3973471B2 (ja) * 2001-12-14 2007-09-12 三洋電機株式会社 デジタル駆動型表示装置
JP2003295825A (ja) * 2002-02-04 2003-10-15 Sanyo Electric Co Ltd 表示装置
US10796622B2 (en) * 2009-06-16 2020-10-06 Ignis Innovation Inc. Display system with compensation techniques and/or shared level resources
US20210049957A1 (en) * 2018-06-28 2021-02-18 Sapien Semiconductors Inc. Pixel and display device including the same
CN110021263B (zh) * 2018-07-05 2020-12-22 京东方科技集团股份有限公司 像素电路及其驱动方法、显示面板
US10600356B1 (en) * 2018-11-14 2020-03-24 a.u. Vista Inc. Display systems and methods involving time-modulated current control
CN109872686B (zh) * 2019-04-19 2020-05-29 京东方科技集团股份有限公司 一种驱动电路、显示面板及显示面板的制作方法
CN110010057B (zh) * 2019-04-25 2021-01-22 京东方科技集团股份有限公司 像素驱动电路、像素驱动方法和显示装置
CN109920371B (zh) * 2019-04-26 2021-01-29 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置
CN110782831B (zh) * 2019-11-05 2021-02-26 京东方科技集团股份有限公司 像素驱动电路、显示设备和像素驱动电路驱动方法
CN210378422U (zh) * 2019-11-27 2020-04-21 京东方科技集团股份有限公司 像素电路和显示装置
CN111210765B (zh) * 2020-02-14 2022-02-11 华南理工大学 像素电路、像素电路的驱动方法和显示面板
CN111210767A (zh) * 2020-03-05 2020-05-29 深圳市华星光电半导体显示技术有限公司 像素驱动电路及其驱动方法、显示面板
CN111326101A (zh) * 2020-03-10 2020-06-23 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示面板
CN111261098B (zh) * 2020-03-17 2021-11-12 京东方科技集团股份有限公司 像素驱动电路及驱动方法、显示装置
CN111243498B (zh) * 2020-03-17 2021-03-23 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置
CN111243514B (zh) * 2020-03-18 2023-07-28 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示面板
CN111223444A (zh) * 2020-03-19 2020-06-02 京东方科技集团股份有限公司 像素驱动电路及驱动方法、显示装置
CN111243521B (zh) * 2020-03-31 2021-04-30 厦门天马微电子有限公司 像素驱动电路、驱动方法及显示面板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1595477A (zh) * 2003-09-08 2005-03-16 三洋电机株式会社 显示装置
US20090021536A1 (en) * 2006-03-10 2009-01-22 Canon Kabushiki Kaisha Driving circuit of display element and image display apparatus
CN101437341A (zh) * 2007-11-14 2009-05-20 英飞凌科技股份有限公司 有机发光二极管驱动器
CN106469539A (zh) * 2015-08-04 2017-03-01 启耀光电股份有限公司 显示面板和像素电路
CN107481662A (zh) * 2017-07-20 2017-12-15 友达光电股份有限公司 显示面板及其像素的驱动方法

Also Published As

Publication number Publication date
CN111785201A (zh) 2020-10-16
US20220189414A1 (en) 2022-06-16
CN111785201B (zh) 2021-09-24
US11410615B2 (en) 2022-08-09

Similar Documents

Publication Publication Date Title
WO2021068637A1 (zh) 像素电路及其驱动方法、显示面板
US10978002B2 (en) Pixel circuit and driving method thereof, and display panel
WO2023005694A1 (zh) 像素电路及其驱动方法、显示面板
KR20240035937A (ko) 화소 구동 회로, 그 구동 방법 및 표시 패널
US11417280B2 (en) Pixel circuit and driving method therefor, and display substrate and display device
US10657888B2 (en) Driving method for pixel driving circuit, display panel and display device
CN107871471B (zh) 一种像素驱动电路及其驱动方法、显示装置
WO2022217626A1 (zh) 像素驱动电路及其驱动方法、显示面板
WO2020191511A1 (zh) 移位寄存器单元、驱动电路、显示装置以及驱动方法
US11922881B2 (en) Pixel circuit and driving method thereof, array substrate and display apparatus
WO2023004810A1 (zh) 像素电路及其驱动方法、显示装置
WO2021083014A1 (zh) 像素驱动电路及其驱动方法、显示面板、显示装置
CN113851082B (zh) 像素驱动电路及其驱动方法、显示面板
WO2022193355A1 (zh) 像素驱动电路、显示面板及显示装置
WO2022099508A1 (zh) 像素驱动电路及显示面板
WO2023103038A1 (zh) 像素电路及显示面板
WO2022041330A1 (zh) 驱动电路及其驱动方法、显示装置
US11605349B2 (en) Display panel having a reset control circuit
WO2021035414A1 (zh) 像素电路及驱动方法、显示基板及驱动方法、显示装置
WO2022000695A1 (zh) 一种像素驱动电路、显示面板以及显示装置
US11798477B1 (en) Pixel circuit, display panel, and display apparatus
WO2020252913A1 (zh) 像素驱动电路及显示面板
WO2022205530A1 (zh) 像素驱动电路、显示面板及显示装置
WO2022226727A1 (zh) 像素电路、像素驱动方法和显示装置
US11282442B2 (en) Pixel driving circuit and driving method thereof, and display panel

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20942758

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20942758

Country of ref document: EP

Kind code of ref document: A1