WO2022196394A1 - フォトニック結晶面発光レーザおよびその製造方法 - Google Patents

フォトニック結晶面発光レーザおよびその製造方法 Download PDF

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WO2022196394A1
WO2022196394A1 PCT/JP2022/009415 JP2022009415W WO2022196394A1 WO 2022196394 A1 WO2022196394 A1 WO 2022196394A1 JP 2022009415 W JP2022009415 W JP 2022009415W WO 2022196394 A1 WO2022196394 A1 WO 2022196394A1
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region
layer
semiconductor layer
photonic crystal
light emitting
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English (en)
French (fr)
Japanese (ja)
Inventor
藤原直樹
河野直哉
古谷章
伊藤友樹
野田進
井上卓也
石崎賢司
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Sumitomo Electric Industries Ltd
Kyoto University NUC
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Sumitomo Electric Industries Ltd
Kyoto University NUC
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Priority to EP22771148.8A priority Critical patent/EP4311043A4/en
Priority to US18/281,791 priority patent/US20240170917A1/en
Priority to JP2023506970A priority patent/JP7811935B2/ja
Priority to CN202280018249.8A priority patent/CN116918200A/zh
Publication of WO2022196394A1 publication Critical patent/WO2022196394A1/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/11—Comprising a photonic bandgap structure
    • H—ELECTRICITY
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    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042—Electrical excitation ; Circuits therefor
    • H01S5/0425—Electrodes, e.g. characterised by the structure
    • H01S5/04254—Electrodes, e.g. characterised by the structure characterised by the shape
    • H—ELECTRICITY
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    • H01S5/00—Semiconductor lasers
    • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042—Electrical excitation ; Circuits therefor
    • H01S5/0425—Electrodes, e.g. characterised by the structure
    • H01S5/04256—Electrodes, e.g. characterised by the structure characterised by the configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
    • H01S5/2222—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers having special electric properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S2301/00—Functional characteristics
    • H01S2301/17—Semiconductor lasers comprising special layers
    • H01S2301/176—Specific passivation layers on surfaces other than the emission facet
    • H—ELECTRICITY
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    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/062—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes
    • H01S5/06226—Modulation at ultra-high frequencies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/185—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only horizontal cavities, e.g. horizontal cavity surface-emitting lasers [HCSEL]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/2054—Methods of obtaining the confinement
    • H01S5/2081—Methods of obtaining the confinement using special etching techniques
    • H01S5/2086—Methods of obtaining the confinement using special etching techniques lateral etch control, e.g. mask induced
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223—Buried stripe structure
    • H01S5/2231—Buried stripe structure with inner confining structure only between the active layer and the upper electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/34306—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000nm, e.g. InP based 1300 and 1500nm lasers

Definitions

  • the present disclosure relates to a photonic crystal surface emitting laser and its manufacturing method.
  • PCSEL Photonic-crystal Surface Emitting Laser
  • Photonic crystals act as diffraction gratings, reflecting and diffracting light. Light oscillates at the reflection wavelength of the photonic crystal, and the light is emitted in the normal direction of the surface.
  • PCSELs are superior to edge-emitting lasers in single-mode operation and high output because the cavity is developed in a plane.
  • a photonic crystal surface emitting laser includes a light emitting region that emits light in a direction that intersects with the in-plane direction, and a light emitting region that is adjacent to the light emitting region in the in-plane direction so that current is less likely to flow than the light emitting region. and a current confinement region, wherein the light emitting region and the current confinement region have a photonic crystal layer, and the photonic crystal layer is periodic in the in-plane direction in the first region and the first region. and a second region arranged equidistantly, wherein the refractive index of the second region is different from the refractive index of the first region, and the light emitting region comprises a first semiconductor layer having a first conductivity type. and an active layer having an optical gain and a second semiconductor layer having a second conductivity type, wherein the first semiconductor layer, the active layer and the second semiconductor layer are stacked in order in the light emitting direction.
  • a method for manufacturing a photonic crystal surface emitting laser includes forming a light emitting region that emits light in a direction intersecting an in-plane direction; and forming a current confinement region through which current is less likely to flow than the region, wherein the step of forming the light emitting region and the step of forming the current confinement region include a step of providing a photonic crystal layer, and the photonic crystal layer is provided.
  • the nick crystal layer has a first region and second regions periodically arranged in the in-plane direction of the first region, and the refractive index of the second region is the refractive index of the first region.
  • the step of forming the light emitting region includes sequentially stacking a first semiconductor layer having a first conductivity type, an active layer having an optical gain, and a second semiconductor layer having a second conductivity type. including the step of
  • FIG. 1A is a plan view illustrating the photonic crystal surface emitting laser according to the first embodiment.
  • FIG. 1B is a cross-sectional view along line AA of FIG. 1A.
  • FIG. 2A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 2B is a cross-sectional view along line AA of FIG. 2A.
  • FIG. 3A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 3B is a cross-sectional view along line AA of FIG. 3A.
  • FIG. 4A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 4B is a cross-sectional view along line AA of FIG.
  • FIG. 5A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 5B is a cross-sectional view along line AA of FIG. 5A.
  • FIG. 6A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 6B is a cross-sectional view along line AA of FIG. 6A.
  • FIG. 7A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 7B is a cross-sectional view along line AA of FIG. 7A.
  • FIG. 8A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 8B is a cross-sectional view along line AA of FIG.
  • FIG. 9A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 9B is a cross-sectional view along line AA of FIG. 9A.
  • FIG. 10A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 10B is a cross-sectional view along line AA of FIG. 10A.
  • FIG. 11A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 11B is a cross-sectional view along line AA of FIG. 11A.
  • FIG. 12A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 12B is a cross-sectional view along line AA of FIG.
  • FIG. 12A is a cross-sectional view illustrating a photonic crystal surface emitting laser according to a comparative example.
  • FIG. 14 is a cross-sectional view illustrating a photonic crystal surface emitting laser according to the second embodiment.
  • FIG. 15A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 15B is a cross-sectional view along line AA of FIG. 15A.
  • FIG. 16A is a plan view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 16B is a cross-sectional view along line AA of FIG. 16A.
  • FIG. 17A is a plan view illustrating the photonic crystal surface emitting laser according to the third embodiment.
  • FIG. 17B is a cross-sectional view along line AA of FIG. 17A.
  • FIG. 18A is a cross-sectional view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 18B is a cross-sectional view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • FIG. 19 is a cross-sectional view illustrating a method of manufacturing a photonic crystal surface emitting laser.
  • Light is generated by energizing the PCSEL and injecting carriers into the active layer. For example, light is emitted from one end surface of the PCSEL. The current may leak outside the light-extracting portion (light-emitting region). Current leakage may degrade the characteristics of the photonic crystal surface emitting laser. Accordingly, it is an object of the present invention to provide a photonic crystal surface emitting laser capable of improving characteristics and a method of manufacturing the same.
  • One aspect of the present disclosure includes (1) a light-emitting region that emits light in a direction that intersects with the in-plane direction, and a current constriction that is adjacent to the light-emitting region in the in-plane direction and in which current is less likely to flow than the light-emitting region and a region, wherein the light emitting region and the current confinement region have a photonic crystal layer, and the photonic crystal layer is periodically formed in the in-plane direction in the first region and the first region.
  • the light emitting region comprising a first semiconductor layer having a first conductivity type;
  • It is a photonic crystal surface emitting laser.
  • a current can be injected into the light emitting region.
  • the current confinement region includes the first semiconductor layer, the third semiconductor layer having the second conductivity type, the fourth semiconductor layer having the first conductivity type, and the second conductivity type. and a fifth semiconductor layer having , may form a thyristor.
  • the formation of the thyristor in the current confinement layer makes it difficult for the current to flow. Current leakage from the light emitting region to the current confinement region can be suppressed.
  • the current confinement region may have a sixth semiconductor layer, and the sixth semiconductor layer may be insulated. Since the current confinement region has the insulated sixth semiconductor layer, it is difficult for current to flow through the current confinement layer. Current leakage from the light emitting region to the current confinement region can be suppressed.
  • the active layer may be provided in the light emitting region and the current confinement region.
  • the manufacturing process can be simplified.
  • the current confinement region may have a seventh semiconductor layer, the seventh semiconductor layer may be adjacent to the active layer in the in-plane direction and have a bandgap greater than the energy of the light. .
  • the light reflectance of the current confinement region is increased. Light loss can be suppressed by reflecting light to the light emitting region.
  • the current confinement region may surround the entire periphery of the light emitting region. Current leakage in all directions from the light emitting region can be suppressed.
  • an eighth semiconductor layer having the second conductivity type is laminated on the second semiconductor layer, and at least part of the current confinement region extends from the eighth semiconductor layer. may be exposed.
  • a current can be injected into the light emitting region through the eighth semiconductor layer. Parasitic capacitance can be reduced by not providing the eighth semiconductor layer in at least part of the current confinement region.
  • a first electrode provided on the upper surface of the eighth semiconductor layer and in the light emitting region, and a second electrode provided on the surface of the substrate opposite to the side on which the first semiconductor layer is provided. and, the first electrode may be ring-shaped in the in-plane direction, and the eighth semiconductor layer may be exposed in a portion of the light emitting region surrounded by the first electrode.
  • a current can be injected into the light emitting region using the first electrode and the second electrode.
  • Light can be emitted from a portion of the light emitting region surrounded by the first electrode.
  • the first semiconductor layer, the photonic crystal layer, the active layer, and the second semiconductor layer are stacked in this order, provided between the photonic crystal layer and the active layer, and a ninth semiconductor layer having a first conductivity type, the photonic crystal layer having the first conductivity type, the second regions of the photonic crystal being holes, and The end on the active layer side may be covered with the ninth semiconductor layer. Since the active layer is laminated on the ninth semiconductor layer, the occurrence of depressions in the active layer is suppressed.
  • forming the light-emitting region and forming the current confinement region include providing a photonic crystal layer, wherein the photonic crystal layer comprises a first region and a second photonic crystal layer; and second regions periodically arranged in the in-plane direction of the one region, wherein the refractive index of the second regions is different from the refractive index of the first regions, and the step of forming the light emitting regions is , a step of sequentially stacking a first semiconductor layer having a first conductivity type, an active layer having an optical gain, and a second semiconductor layer having a second conductivity type.
  • a current can be injected into the light emitting region.
  • it is difficult for current to flow through the current confinement region it is possible to suppress leakage of current from the light emitting region to the current confinement region. Suppression of current leakage can improve the characteristics of the photonic crystal surface emitting laser.
  • FIG. 1A is a plan view illustrating the photonic crystal surface emitting laser 100 according to the first embodiment
  • FIG. 1B is a cross-sectional view along line AA in FIG. 1A
  • the XY plane in the figure is the direction (in-plane direction) in which the surface of the semiconductor layer included in the photonic crystal surface emitting laser 100 extends.
  • the shape of the photonic crystal surface emitting laser 100 in the XY plane is rectangular.
  • the Z-axis direction is the stacking direction of the semiconductor layers, and is the direction in which light is emitted.
  • the X-axis direction, Y-axis direction and Z-axis direction are orthogonal to each other.
  • the drawings in this specification are schematic diagrams, and the dimensions, the number of holes, etc. can be changed from those in the drawings.
  • the photonic crystal surface emitting laser 100 has a light emitting region 30 and a current confinement region 32.
  • the light emitting region 30 is, for example, a circular region in the XY plane and is located in the center of the photonic crystal surface emitting laser 100.
  • a current confinement region 32 surrounds the light emitting region 30 all around.
  • the light emitting region 30 and the current confinement region 32 are regions from the upper end to the lower end of the photonic crystal surface emitting laser 100 in the Z-axis direction.
  • the substrate 10 first semiconductor layer
  • the photonic crystal layer 12 the clad layer 14 (ninth semiconductor layer), the active layer 16, the clad layer 18, the clad layer 22, and a contact layer 24 (eighth semiconductor layer) are laminated in this order.
  • the cladding layer 18 and the cladding layer 22 are different layers and are formed in separate processes as described later. Both the clad layer 18 and the clad layer 22 are p-type semiconductor layers and correspond to the second semiconductor layer.
  • the boundary between clad layer 18 and clad layer 22 is indicated by a dashed line in FIG. 1B.
  • the contact layer 24 is circular in the XY plane and covers the entire light emitting region 30 .
  • an electrode 28 first electrode is provided on the upper surface of the contact layer 24 .
  • the substrate 10 In the current confinement region 32, the substrate 10, the photonic crystal layer 12, the clad layer 14, the active layer 16, the clad layer 18 (third semiconductor layer), the buried layer 20 (fourth semiconductor layer) and the clad layer 22 (fourth semiconductor layer). 5 semiconductor layers) are laminated in this order.
  • Contact layer 24 is not provided in current confinement region 32 .
  • the insulating film 21 is provided on the upper surface of the clad layer 22 and covers the entire current confinement region 32 as shown in FIG. 1A.
  • the electrode 25 (second electrode) is provided on the bottom surface of the substrate 10 and spreads over the light emitting region 30 and the current confinement region 32 .
  • pads 26 and wirings 27 are provided on the top surface of the insulating film 21 .
  • the electrodes 28 and pads 26 are electrically connected by wiring 27 .
  • the electrodes 28 are made of metal, for example a laminate of titanium, platinum and gold (Ti/Pt/Au).
  • the wiring 27 and the pads 26 are made of metal such as Au.
  • the electrode 25 is made of metal such as an alloy of gold, germanium and Ni (AuGeNi).
  • the shape of the electrode 28 is a ring in the XY plane. A portion surrounded by the electrode 28 is not provided with a structure that blocks the emitted light. Those made of a material transparent to emitted light may be provided. A portion of the light emitting region 30 surrounded by the electrode 28 becomes an aperture 34 . Light is emitted from the aperture 34 in the Z-axis direction.
  • a diameter D1 of the light emitting region 30 is, for example, 15 ⁇ m.
  • a diameter D3 of the aperture 34 is, for example, 10 ⁇ m.
  • a diameter D2 of the pad 26 is, for example, 50 ⁇ m.
  • the side length L1 in the X-axis direction of the photonic crystal surface emitting laser 100 is, for example, 500 ⁇ m.
  • the length of the side in the Y-axis direction may be equal to, for example, the length L1 of the side in the X-axis direction, or may be different from L1.
  • the substrate 10 is a semiconductor substrate made of, for example, n-type indium phosphide (n-InP).
  • the cladding layer 14 and the buried layer 20 are made of n-InP, for example.
  • the clad layer 14 has a thickness of 150 nm, for example.
  • the thickness of the embedded layer 20 is, for example, 500 nm.
  • the clad layers 18 and 22 are made of p-InP, for example.
  • the thickness of the clad layer 18 from the active layer 16 to the buried layer 2 is, for example, 300 nm.
  • the thickness of the clad layer 22 in the light emitting region 30 is, for example, 3 ⁇ m.
  • the contact layer 24 is made of, for example, 300 nm thick p-type indium gallium arsenide (p-InGaAs).
  • p-InGaAs p-type indium gallium arsenide
  • silicon (Si) is used as an n-type dopant.
  • Zinc (Zn), for example, is used as a p-type dopant.
  • the active layer 16 includes, for example, a plurality of well layers and barrier layers, and has a multiple quantum well structure (MQW: Multi Quantum Well).
  • the well layers and barrier layers are made of, for example, undoped gallium indium arsenide phosphide (i-GaInAsP).
  • the well layers and barrier layers are formed of a mixed crystal system that can be lattice-matched to InP, and are formed of undoped indium aluminum gallium arsenide (i-InAlGaAs), for example.
  • the active layer 16 has spacer layers (not shown) between the clad layer 14 and the clad layer 18, respectively.
  • the thickness of the active layer 16 including the spacer layer is, for example, 200 nm. A spacer layer may not be provided.
  • the photonic crystal layer 12 has a base material 12a (first region) and a plurality of holes 13 (second region).
  • the base material 12a is made of n-type indium gallium arsenide phosphide (n-InGaAsP) with a thickness of 300 nm, for example.
  • the bandgap wavelength of the photonic crystal layer 12 is, for example, 1.1 ⁇ m, which is smaller than the oscillation wavelength of light.
  • a plurality of holes 13 are provided in the base material 12a and are periodically arranged in the X-axis direction and the Y-axis direction.
  • a distance L2 between two adjacent holes 13 is, for example, 400 nm.
  • the diameter D4 of the holes 13 is, for example, 100 nm.
  • the depth D5 of the holes 13 shown in FIG. 1B is, for example, 100 nm or more and 2000 nm or less.
  • the holes 13 extend from the bottom surface of the cladding layer 14 to the bottom surface of the photonic crystal layer 12 in the Z-axis direction.
  • the inside of the hole 13 is hollow and filled with gas.
  • the refractive index of InGaAsP, which is the base material of the photonic crystal layer 12, and the refractive index of the holes 13 are different. That is, the refractive index of the photonic crystal layer 12 changes periodically within the XY plane. Light is reflected and refracted within the plane of the photonic crystal layer 12 and oscillates at a wavelength corresponding to the arrangement of the holes 13 .
  • the substrate 10, the photonic crystal layer 12 and the cladding layer 14 are n-type semiconductor layers and are located below the active layer 16 in the Z-axis direction.
  • Cladding layers 18 and 22 are p-type semiconductor layers and are located on active layer 16 .
  • the light emitting region 30 has a pin (positive-intrinsic-negative) structure in the Z-axis direction. Since the light-emitting region 30 has a pin structure, current tends to flow in the Z-axis direction. Light is generated by passing a current through the light emitting region 30 and injecting carriers into the active layer 16 .
  • the size of the spot diameter of light emitted from the photonic crystal surface emitting laser 100 depends on the diameter of the light emitting region 30 .
  • the substrate 10 , the photonic crystal layer 12 and the cladding layer 14 are n-type semiconductor layers and are located below the active layer 16 .
  • a p-type clad layer 18, an n-type buried layer 20, and a p-type clad layer 22 are laminated in this order on the active layer 16.
  • the thyristor 23 is formed by alternately stacking n-type layers and p-type layers along the Z-axis direction. Due to the presence of the thyristor 23 , current is less likely to flow in the current confinement region 32 than in the light emitting region 30 .
  • the photonic crystal layer 12 is provided with a plurality of holes 13, light is reflected and diffracted within the XY plane. Light of a specific wavelength such as 1.3 ⁇ m is amplified corresponding to the period of the plurality of holes 13 . Since the electrode 25 functions as a mirror that reflects light, the light propagating downward in FIG. 1B is not emitted from the bottom surface, but is reflected and propagates upward. A portion of the light emitting region 30 surrounded by the electrode 28 functions as an aperture 34 . Light is emitted from the inside of the aperture 34 to the outside (upward) of the photonic crystal surface emitting laser 100 . By repeatedly turning the current on and off, the intensity of the light can be modulated. The modulation frequency is several tens of GHz such as 25 GHz and 50 GHz.
  • the thyristor 23 is formed in the current confinement region 32, it is difficult for current to flow.
  • the light emitting region 30 has a pin structure in the Z-axis direction, current flows easily.
  • a current can be selectively input to the light emitting region 30 to suppress leakage of current to the current confinement region 32 . By suppressing leakage, it is possible to improve the characteristics of the photonic crystal surface emitting laser 100 .
  • FIG. 2A, 3A, 4A, 5A, 6A, 7A, 8A, 9A, 10A, 11A, and 12A are plan views illustrating the method of manufacturing the photonic crystal surface emitting laser 100.
  • FIG. be. 2B, 3B, 4B, 5B, 6B, 7B, 8B, 9B, 10B, 11B, and 12B are cross-sectional views along line AA in corresponding plan views. .
  • the photonic crystal layer 12 is epitaxially grown on the upper surface of the substrate 10 by, for example, metal-organic vapor phase epitaxy (MOVPE). Voids 13 are not formed in this step.
  • MOVPE metal-organic vapor phase epitaxy
  • an insulating film 40 of silicon oxide (SiO 2 ) is formed on the upper surface of the photonic crystal layer 12 by plasma CVD (Chemical Vapor Deposition), for example.
  • a photoresist is applied to the upper surface of the insulating film 40, and patterning is performed by lithography using an electron beam or the like.
  • the resist pattern is transferred to the insulating film 40 by dry etching or the like.
  • the transferred pattern corresponds to the plurality of holes 13 . Dry etching is performed using the insulating film 40 as a mask to form a plurality of holes 13 in the photonic crystal layer 12 .
  • the arrangement of the plurality of holes 13 can be adjusted according to the wavelength of light.
  • an arrangement corresponding to an oscillation wavelength of 1.3 ⁇ m is used.
  • a gas capable of processing InP and InGaAsP such as (CH 3 ), silicon tetrachloride (SiCl 4 ), chlorine (Cl 2 ), hydrogen iodide (HI), or the like, is used.
  • the insulating film 40 is removed.
  • the cladding layer 14, the active layer 16 and the cladding layer 18a are crystal-grown on the upper surface of the photonic crystal layer 12 in this order.
  • the cladding layer 14 is, for example, an n-InP layer with a thickness of 150 nm. By providing the cladding layer 14 on the holes 13, the holes 13 become closed spaces that do not communicate with the outside space.
  • the upper surface of the cladding layer 14 is flat.
  • An active layer 16 and a clad layer 18a are epitaxially grown on the upper surface of the clad layer 14. As shown in FIG.
  • the cladding layer 18a is, for example, a p-InP layer with a thickness of 200 nm.
  • an insulating film 42 is formed on the upper surface of the cladding layer 18a by, for example, plasma CVD, and processed into a circle with a diameter of 15 ⁇ m by photolithography and dry etching.
  • the insulating film 42 is, for example, a SiO 2 film with a thickness of 300 nm, and is located in the central portion of the upper surface of the clad layer 18a. The portion covered with the insulating film 42 becomes the light emitting region 30 , and the portion outside the insulating film 42 becomes the current confinement region 32 .
  • insulating film 42 functions as a selective growth mask.
  • the cladding layer 18b and the buried layer 20 are epitaxially grown in order on the portion of the upper surface of the cladding layer 18a that is not covered with the insulating film 42.
  • the clad layer 18b is, for example, a p-InP layer with a thickness of 300 nm, and forms the clad layer 18 together with the clad layer 18a.
  • the cladding layer 18b and the buried layer 20 do not grow on the portion of the upper surface of the cladding layer 18a covered with the insulating film 42 .
  • the insulating film 42 is removed as shown in FIGS. 7A and 7B.
  • the top surface of the clad layer 18 is exposed in the light emitting region 30 .
  • the clad layer 22 is epitaxially grown on the upper surface of the clad layer 18 in the light emitting region 30 and the upper surface of the buried layer 20 in the current confinement region 32 by, for example, the MOPVE method.
  • the step between the clad layer 18 and the buried layer 20 is filled with the clad layer 22, and the upper surface of the clad layer 22 becomes a flat surface.
  • n-type substrate 10 In current confinement region 32 , n-type substrate 10 , n-type photonic crystal layer 12 , n-type clad layer 14 , p-type clad layer 18 , n-type buried layer 20 , and p-type clad layer 22 are stacked to form the thyristor 23 .
  • an n-type substrate 10, an n-type photonic crystal layer 12, an n-type clad layer 14, an MQW structure active layer 16, a p-type clad layer 18 and a p-type clad layer 22 are laminated. to form a pin structure.
  • the contact layer 24 is epitaxially grown on the upper surface of the clad layer 22 by, for example, MOVPE method.
  • a resist pattern (not shown) is formed by photolithography, and wet etching is performed to remove the contact layer 24 from the current confinement region 32 .
  • a circular contact layer 24 remains in the light emitting region 30 .
  • the insulating film 21 is formed by plasma CVD, for example, and the insulating film 21 is removed from the contact layer 24 by etching or the like.
  • the contact layer 24 is exposed in the light emitting region 30 .
  • the insulating film 21 remains in the current confinement region 32 .
  • an electrode 28 is formed on the upper surface of the contact layer 24 by, for example, vacuum deposition and lift-off.
  • the electrode 28 has an annular shape, and the contact layer 24 is exposed in a portion surrounded by the electrode 28 .
  • the exposed portion of the contact layer 24 becomes the aperture 34 .
  • pads 26, wirings 27 and electrodes 25 are formed by vacuum deposition, lift-off, and the like. Specifically, after polishing the lower surface of the substrate 10 to a mirror finish, the electrode 25 is provided on the entire lower surface. A pad 26 and a wiring 27 are provided on the upper surface of the insulating film 21 . The photonic crystal surface emitting laser 100 is formed through the above steps.
  • FIG. 13 is a cross-sectional view illustrating a photonic crystal surface emitting laser 100R according to a comparative example.
  • a clad layer 18 is provided on the active layer 16, and a contact layer 24 and an insulating film 21 are provided on the upper surface of the clad layer 18.
  • Buried layer 20 and clad layer 22 are not provided and no thyristor is formed.
  • the n-type layers (substrate 10, photonic crystal layer 12 and cladding layer 14), active layer 16, and p-type cladding layer 18 form a pin structure in the entire photonic crystal surface emitting laser 100R. to form
  • the current diffuses in the XY plane in the cladding layer 18 and leaks outside the light emitting region 30 .
  • Such leakage current is less likely to contribute to the generation of light extracted from aperture 34 .
  • Leakage of current may cause deterioration of characteristics such as deterioration of threshold current and reduction of optical output.
  • the photonic crystal surface emitting laser 100R is miniaturized, the influence of the leak current increases.
  • the diameter of the light emitting region 30 is, for example, 10 ⁇ m to 20 ⁇ m.
  • the n-type substrate 10, the n-type photonic crystal layer 12 and the n-type cladding layer 14 are stacked under the active layer 16 in the light emitting region 30.
  • FIG. P-type clad layers 18 and 22 are laminated on the active layer 16 . Since the light emitting region 30 has a pin structure in the Z-axis direction, current can be injected into the active layer 16 .
  • n-type substrate 10, n-type photonic crystal layer 12, n-type clad layer 14, p-type clad layer 18, n-type buried layer 20, and p-type clad layer. 22 are stacked in order.
  • N-type layers and p-type layers are alternately stacked in the Z-axis direction, and a thyristor 23 is formed in the current confinement region 32 .
  • Current is less likely to flow through the current confinement region 32 having the thyristor 23 than through the light emitting region 30 . Leakage of current from the light emitting region 30 to the current confinement region 32 is suppressed, and the current flows intensively in the light emitting region 30 .
  • the characteristics of the photonic crystal surface emitting laser 100 can be improved.
  • the threshold current is 12mA.
  • the optical output is 1.5 mW when a current of 30 mA is input.
  • the threshold current is 3 mA, which is lower than the comparative example.
  • the optical output when a current of 30 mA is input is 4 mW, which is higher than that of the comparative example.
  • characteristics can be improved, such as improved threshold current and improved optical output.
  • the diameters D1 and D3 By setting the diameters D1 and D3 to the above values and suppressing current leakage, it is possible to reduce the spot diameter of the emitted light and realize the photonic crystal surface emitting laser 100 with high efficiency.
  • light By reducing the diameter of the light emitting region 30, light can be modulated at frequencies of 10 GHz and above, such as 25 GHz and 50 GHz.
  • a p-type layer, an undoped layer (i), and an n-type layer are arranged in the light emitting region 30 from the upper side to the lower side in the Z-axis direction in FIG. 1B.
  • layers are stacked in the order of pnpn.
  • the order of p-type layers and n-type layers may be reversed.
  • a semiconductor layer included in the photonic crystal surface emitting laser 100 may be formed of a compound semiconductor such as a GaAs semiconductor other than the above.
  • the active layer 16 is provided in the light emitting region 30 and the current confinement region 32. As shown in FIG. 4B, since the active layer 16 is laminated on both regions at the same time, the process is simplified and the cost is reduced.
  • the current confinement region 32 preferably surrounds the light emitting region 30, and particularly preferably completely surrounds the entire periphery of the light emitting region 30. As shown in FIG. Current leakage in all directions from the light emitting region 30 can be suppressed in the XY plane. characteristics can be effectively improved.
  • the contact layer 24 is provided in the light emitting region 30 on the top surface of the clad layer 22 .
  • the contact layer 24 is not provided in the current confinement region 32, and the upper surface of the current confinement region 32 is exposed. Since the contact layer 24 has a lower resistance than other semiconductor layers, an electric field is applied to the entire contact layer 24 . If the contact layer 24 is provided over the entire upper surface of the cladding layer 22, an electric field is applied not only to the light emitting region 30 but also to the current confinement region 32, increasing the parasitic capacitance. Parasitic capacitance can be reduced by not providing the contact layer 24 in the current confinement region 32 as in FIG. 1B. Advantageous for high-speed modulation.
  • the contact layer 24 may be provided in part of the current confinement region 32, but preferably at least part of the current confinement region 32 is exposed from the contact layer 24 in order to reduce parasitic capacitance.
  • the contact layer 24 preferably covers the entire light emitting region 30 to reduce electrical resistance.
  • the light emitting region 30 is circular in the XY plane, and the electrode 28 is annular.
  • the shape of the light emitting region 30 in the XY plane may be circular, elliptical, or polygonal.
  • the electrode 28 may have an elliptical or elliptical outer shape, as long as it is ring-shaped. A portion surrounded by the electrode 28 becomes an aperture 34, and light can be emitted without loss due to the electrode 28.
  • the electrode 28 only needs to be in contact with part of the contact layer 24 .
  • the dopant concentration of the contact layer 24 is higher than that of other semiconductor layers, and the contact layer 24 has high conductivity.
  • the current flows through the contact layer 24 and is input to the active layer 16 .
  • the interface between substrate 10 and electrode 25 functions as a mirror. Light loss is suppressed by reflecting upward the light propagating downward in the Z-axis direction.
  • An aperture may be formed on the bottom surface of the substrate 10 to emit light from the bottom surface.
  • the electrode 25 is ring-shaped, and a portion surrounded by the electrode 25 serves as an aperture. In order to reflect light downward, it is preferable that the interface between the electrode 28 and the contact layer 24 has a high light reflectance.
  • the photonic crystal layer 12 is an n-type layer and is provided between the active layer 16 and the substrate 10 .
  • Substrate 10, photonic crystal layer 12 and cladding layer 14 become part of pin structure and thyristor 23 as n-type layers.
  • the plurality of holes 13 extend inside the photonic crystal layer 12 .
  • the ends of the holes 13 on the upper side in the Z-axis direction are filled with the clad layer 14 .
  • the flat surface of the cladding layer 14 is arranged over the holes 13 .
  • the active layer 16 is crystal-grown on the upper surface of the cladding layer 14, and the cladding layers 18 and 22, the buried layer 20, and the contact layer 24 are grown on the active layer 16.
  • a semiconductor layer having high crystallinity can be grown while suppressing the formation of depressions and the like.
  • the photonic crystal layer 12 is a p-type layer and may be provided between the active layer 16 and the cladding layer 18 .
  • Photonic crystal layer 12 and cladding layer 18 become part of pin structure and thyristor 23 as p-type layers.
  • the photonic crystal layer 12 may have a region with a refractive index different from that of the base material.
  • the photonic crystal layer 12 may have a base material semiconductor (such as InGaAsP) and a semiconductor region different from the base material.
  • FIG. 14 is a cross-sectional view illustrating a photonic crystal surface emitting laser 200 according to the second embodiment. Description of the same configuration as in the first embodiment is omitted. The plan view is the same as FIG. 1A.
  • the active layer 16 is not provided between the clad layer 14 and the clad layer 18 of the current confinement region 32, but the passive layer 50 (seventh semiconductor layer) is provided.
  • the passive layer 50 is adjacent to the active layer 16 in the XY plane and surrounds the entire perimeter of the active layer 16 .
  • the passive layer 50 is made of a mixed crystal semiconductor such as InGaAsP and has no optical gain.
  • the thickness of the passive layer 50 may be equal to or different from the thickness of the active layer 16, for example.
  • the equivalent refractive index of passive layer 50 may be equal to or different from that of active layer 16, for example. For example, it is acceptable if there is no adverse optical effect such as a decrease in reflectance.
  • the PL (Photoluminescence) wavelength of the passive layer 50 is 50 nm or more smaller than the wavelength at which the gain of the active layer 16 peaks. Therefore, the passive layer 50 is less likely to absorb light.
  • FIGS. 3A to 5B are plan views illustrating the method of manufacturing the photonic crystal surface emitting laser 200.
  • FIG. 15B and 16B are cross-sectional views along line AA in corresponding plan views. The steps shown in FIGS. 3A to 5B are also common to the second embodiment.
  • an insulating film 42 is provided in the central portion of the upper surface of the cladding layer 18a.
  • the insulating film 42 as a mask, for example, dry etching and wet etching are performed to remove portions of the cladding layer 18a and the active layer 16 that are not covered with the insulating film 42 .
  • the portion of the upper surface of the cladding layer 14 that is included in the current confinement region 32 is exposed.
  • the portion covered with the insulating film 42 is not etched.
  • the passive layer 50, the cladding layer 18c, and the buried layer 20 are epitaxially grown on the upper surface of the cladding layer 14 in this order by, for example, the MOVPE method.
  • a passive layer 50 surrounds the active layer 16 .
  • the clad layer 18 c forms the clad layer 18 together with the clad layer 18 a remaining in the light emitting region 30 .
  • the subsequent steps are the same as those shown in FIGS. 7A to 12B.
  • the pin structure including the active layer 16 is formed in the light emitting region 30, current can be injected into the active layer 16.
  • a passive layer 50 is provided in the current confinement region 32 of the second embodiment. Therefore, the light reflectance of the current confinement region 32 is higher than in the first embodiment, and the characteristics can be improved.
  • the effective light loss outside the aperture 34 (current confinement region 32) of the first embodiment is 240 cm ⁇ 1 and the light reflectance is about 86%.
  • the current confinement region 32 of the second embodiment has an effective optical loss of 15 cm ⁇ 1 and a reflectance of 97%. Light loss can be suppressed by reflecting most of the light incident on the current confinement region 32 from the light emitting region 30 to the light emitting region 30 .
  • the threshold current can be reduced to 1.5mA. A light output of 7 mW is obtained when a current of 30 mA is input. As can be seen, further improvements in threshold current and light output are possible.
  • FIG. 17A is a plan view illustrating a photonic crystal surface emitting laser 300 according to the third embodiment
  • FIG. 17B is a cross-sectional view along line AA in FIG. 17A. Descriptions of the same configuration as in the first embodiment and the same configuration as in the second embodiment will be omitted.
  • the active layer 16 and the clad layer 18 are laminated in order on the upper surface of the clad layer 14.
  • a contact layer 24 is provided on the upper surface of the clad layer 18 .
  • a passive layer 50 and a clad layer 18 are laminated in this order on the upper surface of the clad layer 14 in the current confinement region 32 .
  • An insulating film 21 is provided on the upper surface of the clad layer 18 .
  • the cladding layer 18 is made of InP with a thickness of approximately 3.2 ⁇ m, for example. Buried layer 20 and clad layer 22 are not provided. A thyristor is not formed in the current confinement region 32 .
  • region 18d second semiconductor layer
  • region 18e sixth semiconductor layer
  • region 18e surrounds the entire perimeter of region 18d.
  • region 18d has p-type conductivity.
  • a region 18e is a region insulated by ion implantation.
  • FIG. 18A to 19 are cross-sectional views illustrating a method of manufacturing the photonic crystal surface emitting laser 300.
  • FIG. 2A to 5B of the first embodiment and the steps shown in FIGS. 15A and 15B of the second embodiment are also performed in the third embodiment.
  • the cladding layer 18c is epitaxially grown on the upper surface of the passive layer 50. As shown in FIG. Buried layer 20 is not provided. As shown in FIG. 18B, the insulating film 42 used as a selective growth mask is removed. The clad layer 18 is formed by growing a p-InP layer on the clad layer 18c.
  • the contact layer 24 is epitaxially grown on the upper surface of the cladding layer 18 .
  • Etching is performed using the insulating film 46 as a mask to shape the contact layer 24 into a circular shape.
  • hydrogen ions protons, H +
  • a portion of the cladding layer 18 that is not covered with the insulating film 46 is insulated by injecting protons.
  • the insulated portion is the region 18e.
  • Protons are not injected into the portion covered with the insulating film 46 . Therefore, contact layer 24 still has p-type conductivity.
  • a portion of the clad layer 18 under the insulating film 46 becomes a region 18d and has p-type conductivity. Since the active layer 16 is also protected by the insulating film 46, protons are not injected.
  • the depth of proton implantation is about the same as the thickness of the clad layer 18.
  • No protons are injected into the layers below cladding layer 18 , ie, passive layer 50 , cladding layer 14 , photonic crystal layer 12 and substrate 10 .
  • Cladding layer 14, photonic crystal layer 12 and substrate 10 maintain n-type conductivity.
  • the steps after proton injection are the same as in the first embodiment.
  • the region 18e of the cladding layer 18 is a region insulated by proton injection, it is difficult for current to flow through the current confinement region 32.
  • FIG. Current leakage from the light emitting region 30 to the current confinement region 32 can be suppressed, and the characteristics of the photonic crystal surface emitting laser 300 can be improved. Since the passive layer 50 is adjacent to the active layer 16, the light reflectance of the current confinement region 32 is increased, and light loss is suppressed.
  • the depth of proton implantation is preferably about the same as the thickness of the clad layer 18, for example.
  • a region 18e in the current confinement region 32 of the cladding layer 18 can be insulated over the entire depth direction. Current leakage can be effectively suppressed.
  • protons are not injected into the cladding layer 14 . Ions other than protons may be implanted for insulation.
  • substrate first semiconductor layer
  • photonic crystal layer 12a base material (first region) 13 vacancies (second region) 14 clad layer (ninth semiconductor layer) 18 clad layer (second semiconductor layer, third semiconductor layer) 18a, 18b, 18c clad layer 22 clad layer (second semiconductor layer, fifth semiconductor layer) 16 active layer 18d region (second semiconductor layer) 18e region (sixth semiconductor layer) 20 embedded layer (fourth semiconductor layer) 21, 40, 42, 46 insulating film 23 thyristor 24 contact layer (eighth semiconductor layer) 25, 28 electrode 26 pad 27 wiring 30 light emitting region 32 current confinement region 34 aperture 50 passive layer (seventh semiconductor layer) 100, 100R, 200, 300 Photonic crystal surface emitting laser

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