WO2022181084A1 - インバータ回路およびモータモジュール - Google Patents
インバータ回路およびモータモジュール Download PDFInfo
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- WO2022181084A1 WO2022181084A1 PCT/JP2022/000637 JP2022000637W WO2022181084A1 WO 2022181084 A1 WO2022181084 A1 WO 2022181084A1 JP 2022000637 W JP2022000637 W JP 2022000637W WO 2022181084 A1 WO2022181084 A1 WO 2022181084A1
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- semiconductor switching
- sinusoidal waveform
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- 239000004065 semiconductor Substances 0.000 claims description 169
- 238000004364 calculation method Methods 0.000 claims description 29
- 238000010586 diagram Methods 0.000 description 24
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 230000005669 field effect Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
- H02P27/14—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation with three or more levels of voltage
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
- H02P29/50—Reduction of harmonics
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
Definitions
- the present invention relates to inverter circuits and motor modules.
- Patent Document 1 An inverter that converts a DC voltage to an AC voltage and outputs a three-phase terminal voltage is known (for example, Patent Document 1).
- the inverter described in Patent Document 1 generates an output waveform by superimposing a waveform on a sine wave as the duty waveform of the PWM signal given to the high-side switching element of each phase.
- the inverter described in Patent Document 1 a waveform including non-smooth points is superimposed, so the obtained modulated waveform also includes non-differentiable points and does not become a smooth waveform. Therefore, the output waveform contains many harmonics.
- a non-smooth waveform containing non-differentiable points contains many high-order harmonics, and may cause noise or uneven torque when the motor is driven by an inverter.
- the present invention has been made in view of the above problems, and its object is to provide an inverter circuit and a motor module that can suppress harmonics contained in the output while reducing the number of switching times.
- An exemplary inverter circuit of the present invention outputs AC output of three or more phases.
- the inverter circuit comprises at least three output terminals, a first input terminal, a second input terminal and at least three series bodies.
- the at least three output terminals output three or more phases of output voltage and three or more phases of output current.
- a first voltage is applied to the first input terminal.
- a second voltage is applied to the second input terminal.
- the second voltage is lower than the first voltage.
- the at least three series bodies have two semiconductor switching elements connected in series.
- the at least three series bodies are connected in parallel with each other.
- Each of the at least three series bodies has one end connected to the first input terminal and the other end connected to the second input terminal.
- Each of the at least three series bodies has a first semiconductor switching element and a second semiconductor switching element.
- the first semiconductor switching element is connected to the first input terminal.
- the second semiconductor switching element is connected to the second input terminal.
- the first semiconductor switching element and the second semiconductor switching element are connected at a connection point.
- the connection points in each of the at least three series bodies are connected to the at least three output terminals.
- the first semiconductor switching element is switched on and off at a frequency higher than the frequency of the AC output.
- the second semiconductor switching element is switched on and off at a frequency higher than the frequency of the AC output.
- One period of the AC output has a full switching period and one phase fixed period. At least one of the first semiconductor switching element and the second semiconductor switching element switches in all phases during the entire switching period.
- one of the first semiconductor switching element and the second semiconductor switching element of one phase is fixed to be off, and the other is fixed to be on. At least one of the first semiconductor switching element and the second semiconductor switching element switches in phases other than .
- the waveform of the output voltage of each phase is a waveform obtained by subtracting a common offset wave from a sinusoidal waveform.
- the waveform of the offset wave matches the sinusoidal waveform of the one phase in the one-phase fixed period, or matches the sinusoidal waveform of the one phase shifted in the amplitude direction.
- the waveform of the offset wave has a slope that changes continuously or a slope that is constant in switching between the full switching period and the one-phase fixed period.
- An exemplary motor module of the present invention includes the inverter circuit described above and an n-phase motor.
- the n-phase motor is driven by the inverter circuit.
- FIG. 1 is a block diagram of a motor module according to an embodiment of the invention.
- FIG. 2 is a circuit diagram showing an inverter section.
- FIG. 3 is a diagram showing output voltage, output voltage, and output voltage.
- FIG. 4A is a diagram showing a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 4B is a diagram showing the output voltage after modulation, the output voltage, and the output voltage.
- FIG. 5 is a diagram showing a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 6A shows a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 6A shows a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 6B is a diagram showing the output voltage after modulation, the output voltage, and the output voltage.
- FIG. 7A shows a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 7B is a diagram showing the output voltage after modulation, the output voltage, and the output voltage.
- FIG. 8A shows a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 8B is a diagram showing the output voltage after modulation, the output voltage, and the output voltage.
- FIG. 9A shows a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 9B is a diagram showing the output voltage after modulation, the output voltage, and the output voltage.
- FIG. 10 is a diagram showing output voltage, output voltage, and output voltage.
- FIG. 11A is a diagram showing a sinusoidal waveform, a sinusoidal waveform, a sinusoidal waveform and an offset wave.
- FIG. 11B is a diagram showing the output voltage after modulation, the output voltage, and the output voltage.
- FIG. 1 is a block diagram of a motor module 200 according to an embodiment of the invention.
- FIG. 2 is a circuit diagram showing the inverter section 110. As shown in FIG.
- the motor module 200 includes a motor drive circuit 100 and a three-phase motor M.
- a three-phase motor M is driven by a motor drive circuit 100 .
- the three-phase motor M is, for example, a brushless DC motor.
- a three-phase motor M has a U-phase, a V-phase and a W-phase.
- the motor drive circuit 100 corresponds to an example of an "inverter circuit".
- the motor drive circuit 100 controls driving of the three-phase motor M using a two-phase modulation method.
- the motor drive circuit 100 includes an inverter section 110 and a signal generation section 120 .
- the motor drive circuit 100 outputs AC outputs of three or more phases. In this embodiment, the motor drive circuit 100 outputs a three-phase AC output.
- the motor drive circuit 100 has at least three output terminals 102 . In this embodiment, the motor drive circuit 100 has three output terminals 102 .
- the three output terminals 102 include an output terminal 102u, an output terminal 102v, and an output terminal 102w. At least three output terminals 102 output three or more phases of output voltage and three or more phases of output current. In this embodiment, the three output terminals 102 output three-phase output voltages and three-phase output currents to the three-phase motor M.
- the output terminal 102u outputs the U-phase output voltage Vu and the U-phase output current Iu to the three-phase motor M.
- Output terminal 102v outputs V-phase output voltage Vv and V-phase output current Iv to three-phase motor M.
- FIG. The output terminal 102w outputs the W-phase output voltage Vw and the W-phase output current Iw to the three-phase motor M.
- the motor drive circuit 100 includes a first input terminal P, a second input terminal N, a capacitor C, and at least three series bodies 112.
- the motor drive circuit 100 comprises a first input terminal P, a second input terminal N, a capacitor C, and three series bodies 112 .
- the motor drive circuit 100 includes an inverter section 110.
- the inverter section 110 includes a first input terminal P, a second input terminal N, a capacitor C, and three series bodies. 112.
- Inverter section 110 further includes a DC voltage source B.
- the DC voltage source B may be provided outside the inverter section 110 .
- a first voltage V1 is applied to the first input terminal P.
- a first input terminal P is connected to a DC voltage source B;
- a second voltage V2 is applied to the second input terminal N.
- a second input terminal N is connected to a DC voltage source B;
- the second voltage V2 is lower than the first voltage V1.
- a capacitor C is connected between the first input terminal P and the second input terminal N.
- the semiconductor switching element is, for example, an IGBT (insulated gate bipolar transistor). Note that the semiconductor switching element may be another transistor such as a field effect transistor.
- the three series bodies 112 include a series body 112u, a series body 112v, and a series body 112w. The three series bodies 112 are connected in parallel with each other. Each of the three series bodies 112 is connected to the first input terminal P at one end. Each of the three series bodies 112 is connected to the second input terminal N at the other end.
- a rectifying element D is connected in parallel to each of these semiconductor switching elements, with the first input terminal P side (upper side of the paper) as a cathode and the second input terminal N side (lower side of the paper) as an anode. If a field effect transistor is used as the semiconductor switching element, a parasitic diode may be used as this rectifying element.
- Each of the three series bodies 112 has a first semiconductor switching element and a second semiconductor switching element.
- the series body 112u has a first semiconductor switching element Up and a second semiconductor switching element Un.
- Series body 112v has a first semiconductor switching element Vp and a second semiconductor switching element Vn.
- the series body 112w has a first semiconductor switching element Wp and a second semiconductor switching element Wn.
- the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are connected to the first input terminal P.
- the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are semiconductor switching elements on the high voltage side.
- the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are connected to the second input terminal N.
- the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are semiconductor switching elements on the low voltage side.
- the first semiconductor switching element and the second semiconductor switching element are connected at the connection point 114 .
- the first semiconductor switching element Up and the second semiconductor switching element Un are connected at a connection point 114u.
- the first semiconductor switching element Vp and the second semiconductor switching element Vn are connected at a connection point 114v.
- the first semiconductor switching element Wp and the second semiconductor switching element Wn are connected at a connection point 114w.
- connection point 114 in each of the three series bodies 112 is connected to the three output terminals 102 .
- a connection point 114u in the series body 112u is connected to the output terminal 102u.
- a connection point 114v in the series body 112v is connected to the output terminal 102v.
- a connection point 114w in the series body 112w is connected to the output terminal 102w.
- a PWM signal is input to the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp.
- a PWM signal is output from the signal generator 120 .
- the PWM signal input to the first semiconductor switching element Up may be referred to as "UpPWM signal”.
- the PWM signal input to the first semiconductor switching element Vp may be referred to as "Vp PWM signal”.
- a PWM signal input to the first semiconductor switching element Wp may be referred to as a "Wp PWM signal”.
- the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are switched on and off at a frequency higher than the frequency of the AC output.
- the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp are turned on when the UpPWM signal, the VpPWM signal, and the WpPWM signal are at HIGH level, respectively.
- the first semiconductor switching element Up, the first semiconductor switching element Vp and the first semiconductor switching element Wp are turned off when the UpPWM signal, the VpPWM signal and the WpPWM signal are at LOW level, respectively.
- a PWM signal is input to the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn.
- a PWM signal is output from the signal generator 120 .
- the PWM signal input to the second semiconductor switching element Un may be referred to as "UnPWM signal”.
- the PWM signal input to the second semiconductor switching element Vn may be referred to as "Vn PWM signal”.
- a PWM signal input to the second semiconductor switching element Wn may be referred to as a "Wn PWM signal”.
- the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are switched on and off at a frequency higher than the frequency of the AC output.
- the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned on when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at HIGH level, respectively.
- the second semiconductor switching element Un, the second semiconductor switching element Vn, and the second semiconductor switching element Wn are turned off when the UnPWM signal, the VnPWM signal, and the WnPWM signal are at LOW level, respectively.
- the signal generation section 120 has a carrier generation section 122, a voltage command value generation section 124, and a comparison section 126.
- the signal generator 120 is a hardware circuit configured by a processor such as a CPU (Central Processing Unit) and an ASIC (Application Specific Integrated Circuit).
- the processor of signal generation unit 120 functions as carrier generation unit 122, voltage command value generation unit 124, and comparison unit 126 by executing computer programs stored in the storage device.
- the signal generation section 120 controls the inverter section 110 . Specifically, the signal generation unit 120 controls the inverter unit 110 by generating a PWM signal and outputting the PWM signal. More specifically, signal generator 120 generates a PWM signal to be input to each of three serial bodies 112 .
- the carrier generator 122 generates a carrier signal.
- a carrier signal is, for example, a triangular wave. Note that the carrier signal may be a sawtooth wave.
- the voltage command value generation unit 124 generates a voltage command value.
- a voltage command value corresponds to a voltage value output from the motor drive circuit 100 . That is, voltage command value generation unit 124 generates voltage values corresponding to output voltage Vu, output voltage Vv, and output voltage Vw as voltage command values.
- the comparator 126 generates a PWM signal by comparing the carrier signal and the voltage command value.
- FIG. 3 is a diagram showing output voltage Vu, output voltage Vv, and output voltage Vw.
- the output voltage Vu is indicated by a solid line
- the output voltage Vv is indicated by a broken line
- the output voltage Vw is indicated by a dashed line.
- the vertical axis of FIG. 3 represents the voltage value normalized by the input voltage V1-V2, and the output voltage of each phase takes a value in the range of 0-1.
- This value also represents the duty value, which is the ratio of the ON time of the first semiconductor switching element of each phase to the PWM period.
- the value obtained by subtracting the value on the vertical axis from 1 is the ratio of the ON time of the second semiconductor switching element to the PWM cycle.
- complementary switching is performed after providing an appropriate dead time to prevent both from being turned on at the same time.
- the horizontal axis of FIG. 3 represents the electrical rotation angle of the motor in degrees.
- one cycle of the AC output has a full switching period T1 and a one-phase fixed period T2.
- the entire switching period T1 at least one of the first semiconductor switching element and the second semiconductor switching element switches in all phases.
- at least one of the first semiconductor switching element and the second semiconductor switching element switches in all of the U-phase, V-phase, and W-phase during the entire switching period T1.
- the total switching period T1 has electrical rotation angles of 60° to 120°, 180° to 240° and 300° to 360°.
- the one-phase fixed period T2 At least one of the first semiconductor switching element and the second semiconductor switching element of one phase is fixed to OFF, and the other is fixed to ON, except for one phase. At least one of the first semiconductor switching element and the second semiconductor switching element switches in the first phase.
- the one-phase fixed period T2 has electrical rotation angles of 0 to 60 degrees, 120 to 180 degrees and 240 to 300 degrees.
- one phase is continuously turned off during the one-phase fixed period T2.
- the electrical rotation angle when the electrical rotation angle is 0 degree to 60 degrees, one of the V-phase first semiconductor switching element Vp and second semiconductor switching element Vn is fixed to OFF, and the other is fixed to ON. Further, when the electrical rotation angle is 0 degree to 60 degrees, in the U phase and the W phase, the first semiconductor switching element (first semiconductor switching element Up and first semiconductor switching element Wp) or the second semiconductor switching element (second semiconductor switching element At least one of the element Un and the second semiconductor switching element Wn) switches.
- the electrical rotation angle is 120 degrees to 180 degrees
- one of the W-phase first semiconductor switching element Wp and the second semiconductor switching element Wn is fixed to OFF, and the other is fixed to ON.
- the electrical rotation angle is 120 degrees to 180 degrees, in the U phase and the V phase, the first semiconductor switching element (first semiconductor switching element Up and first semiconductor switching element Vp) or the second semiconductor switching element (second semiconductor switching element At least one of the element Un and the second semiconductor switching element Vn) switches.
- the electrical rotation angle is 240 degrees to 300 degrees
- one of the U-phase first semiconductor switching element Up and second semiconductor switching element Un is fixed to be off, and the other is fixed to be on.
- the electrical rotation angle is 240 degrees to 300 degrees
- the first semiconductor switching element first semiconductor switching element Vp and first semiconductor switching element Wp
- the second semiconductor switching element second semiconductor switching element At least one of the device Vn and the second semiconductor switching device Wn
- FIG. 4A is a diagram showing a sinusoidal waveform Vub, a sinusoidal waveform Vvb, a sinusoidal waveform Vwb, and an offset wave OW.
- FIG. 4B is a diagram showing the output voltage Vu, the output voltage Vv, and the output voltage Vw after modulation.
- the sinusoidal waveform Vub, the sinusoidal waveform Vvb, and the sinusoidal waveform Vwb are sinusoidal.
- the sinusoidal waveform Vvb is 120 degrees out of phase with the sinusoidal waveform Vub.
- the sinusoidal waveform Vwb is 120 degrees out of phase with respect to the sinusoidal waveform Vvb.
- the sinusoidal waveform Vub is 120 degrees out of phase with the sinusoidal waveform Vwb.
- the waveform of the output voltage of each phase is a waveform obtained by subtracting a common offset wave OW from the sine wave waveforms (sine wave waveform Vub, sine wave waveform Vvb, sine wave waveform Vwb).
- the offset wave OW matches the sinusoidal waveform of one phase in the one-phase fixed period T2. Specifically, the offset wave OW coincides with the V-phase sinusoidal waveform when the electrical rotation angle is 0 to 60 degrees. At an electrical rotation angle of 120 degrees to 180 degrees, the offset wave OW matches the W-phase sinusoidal waveform. At an electrical rotation angle of 240 degrees to 300 degrees, it matches the U-phase sinusoidal waveform. Note that the offset wave OW may not completely match the sine wave waveform of one phase in the one-phase fixed period T2. For example, the offset wave OW may be slightly deviated from the sinusoidal waveform of one phase during the one-phase fixed period T2.
- the period of the offset wave OW is 1/n of the period of the sinusoidal waveform. n is the number of phases of AC output. In this embodiment, the AC output has three phases. Therefore, the period of the offset wave OW is 1/3 of the period of the sinusoidal waveform. That is, the period of the offset wave OW is 120 degrees.
- the slope changes continuously or the slope is constant.
- output voltage Vu, output voltage Vv and output voltage Vw are differentiable.
- the output voltage Vu, the output voltage Vv and the output voltage Vw are smooth curves. That is, the output voltage Vu, the output voltage Vv, and the output voltage Vw form curves without corners.
- the output voltage Vu, the output voltage Vv, and the output voltage Vw may partially include linear portions. In this case, the linear portion and the curved portion are smoothly connected.
- the waveform of the offset wave OW has a minimum matching period T3 and a maximum calculation period T4.
- the waveform of the offset wave OW matches the minimum sinusoidal waveform of the sinusoidal waveforms of each phase. It should be noted that the offset wave OW may not completely match the minimum sine wave waveform of the sine wave waveforms of the respective phases during the minimum matching period T3. For example, the offset wave OW may slightly deviate from the minimum sinusoidal waveform of the sinusoidal waveforms of each phase during the minimum coincidence period T3.
- the minimum matching period T3 is the electrical rotation angles of 0 to 60 degrees, 120 to 180 degrees and 240 to 300 degrees. In this embodiment, the minimum matching period T3 is the same period as the one-phase fixed period T2.
- the offset wave OW matches the minimum sine wave waveform Vvb of the sine wave waveforms of the respective phases.
- the offset wave OW matches the minimum sinusoidal waveform Vwb of the sinusoidal waveforms of the respective phases.
- the offset wave OW matches the minimum sinusoidal waveform Vub of each phase.
- the waveform of the offset wave OW is calculated from the maximum sinusoidal waveform of the sinusoidal waveforms of each phase.
- the maximum calculation period T4 is for the electrical rotation angles of 60 degrees to 120 degrees, 180 degrees to 240 degrees, and 300 degrees to 360 degrees.
- the maximum calculation period T4 is the same period as the total switching period T1.
- the offset wave OW is derived using any of the sine wave waveforms before modulation for each electrical rotation angle range.
- the minimum sine wave of each phase is used as the modulated wave when the electrical rotation angles are 0 to 60 degrees, 120 to 180 degrees, and 240 to 300 degrees.
- the modulated wave is the one shifted by
- the minimum sine wave and the maximum sine wave are switched at electric machine rotation angles of 60 degrees, 120 degrees, 180 degrees, 240 degrees, 300 degrees and 360 degrees.
- the offset wave OW matches the sinusoidal waveform of one phase during the one-phase fixed period T2.
- the slope continuously changes or is constant in the entire switching period T1, the one-phase fixed period T2, and switching. Therefore, high-order harmonics contained in the output can be suppressed while reducing the number of switching times, and high-quality alternating current with less noise components can be output.
- the motor is driven by AC output, the motor operation can be stabilized.
- the period of the offset wave OW is 1/n of the period of the sine wave waveforms (sine wave waveform Vub, sine wave waveform Vvb, and sine wave waveform Vwb).
- n is the number of phases of AC output. Therefore, the waveform of the output voltage of each phase becomes the same, and the motor operation can be stabilized.
- the waveform of the offset wave OW has a minimum matching period T3 and a maximum calculation period T4.
- the minimum matching period T3 matches the minimum sinusoidal waveform of the sinusoidal waveforms of each phase.
- the maximum calculation period T4 is calculated from the maximum sinusoidal waveform of the sinusoidal waveforms of each phase. Therefore, it becomes easy to calculate the offset wave OW.
- the waveform of the offset wave OW described with reference to FIGS. 3, 4A and 4B is the minimum sine wave at the rotation angles of the electric machine of 60 degrees, 120 degrees, 180 degrees, 240 degrees, 300 degrees and 360 degrees. I was switching from a waveform to a maximum sine wave waveform. That is, in the motor drive circuit 100 with reference to FIGS. 1 to 4B, at the rotation angle of the electric machine at which the slope of the minimum sine wave waveform and the maximum sine wave waveform match, the maximum sine wave I switched to waveforms.
- the waveform of the offset wave OW is switched from the minimum sine wave waveform to the maximum sine wave waveform at different electric machine rotation angles of 60 degrees, 120 degrees, 180 degrees, 240 degrees, 300 degrees and 360 degrees. may
- FIG. 5 is a diagram showing the sinusoidal waveform Vub, the sinusoidal waveform Vvb, the sinusoidal waveform Vwb, and the offset wave OW.
- the slope of the minimum sinusoidal waveform Vvb is cos( ⁇ -2 ⁇ /3).
- the slope of the maximum sinusoidal waveform Vub is cos ⁇ .
- the slope of the minimum sinusoidal waveform Vvb differs from the slope of the maximum sinusoidal waveform Vub. Therefore, if the maximum sinusoidal waveform Vub is multiplied by K and then joined to the minimum sinusoidal waveform Vvb, the offset wave OW is smoothly connected.
- the slope of the minimum sinusoidal waveform Vvb is K of the slope of the maximum sinusoidal waveform Vub.
- the offset wave OW is switched from the minimum sinusoidal waveform Vvb to K times the maximum sinusoidal waveform Vub.
- Equation 1 the minimum sinusoidal waveform Vvb is switched to a waveform obtained by multiplying the maximum sinusoidal waveform Vub by K.
- K is a given value.
- the shift amount SH is represented by the following formula 2.
- K is a given value.
- K and sin ⁇ are predetermined design values, they can be stored in the memory of the controller. Therefore, only the amplitude A can be reflected in the control value to easily calculate the shift amount SH.
- the waveform of the offset wave OW has an angle ⁇ at which the minimum slope of the sinusoidal waveform of each phase is K times the slope of the maximum sinusoidal waveform of the sinusoidal waveform of each phase. , has a waveform that switches from the minimum sinusoidal waveform to a waveform obtained by shifting the maximum sinusoidal waveform multiplied by K in the amplitude direction. Therefore, it becomes easy to calculate the offset wave OW.
- the waveform of the offset wave OW has a predetermined value of K, It is calculated from the amplitude A of the sinusoidal waveform and the value of the maximum sinusoidal waveform. Therefore, it becomes easy to calculate the offset wave OW.
- the switching timing between the minimum matching period T3 and the maximum calculation period T4 is calculated from the predetermined value K, the maximum sinusoidal waveform value, and the minimum sinusoidal waveform value. Therefore, the switching timing between the minimum matching period T3 and the maximum calculation period T4 can be determined.
- 6A, 7A, 8A and 9A are diagrams showing sinusoidal waveform Vub, sinusoidal waveform Vvb, sinusoidal waveform Vwb and offset wave OW.
- 6B, 7B, 8B, and 9B are diagrams showing the output voltage Vu, the output voltage Vv, and the output voltage Vw after modulation.
- 6A and 6B show waveforms when K is 1 and the angle ⁇ is 60 degrees.
- the first semiconductor switching element (the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp) and the second semiconductor switching element
- the number of switching with the elements is the number of switching when the number of switching of the three-phase sinusoidal AC output voltage is 100%. is 83.3%.
- the first semiconductor switching element (the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp) and the second semiconductor switching element
- the number of switching with the elements is the number of switching when the number of switching of the three-phase sinusoidal AC output voltage is 100%. is 77.3%.
- the first semiconductor switching element (the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp) and the second semiconductor switching element
- the number of switching with the elements is the number of switching when the number of switching of the three-phase sinusoidal AC output voltage is 100%. is 74.4%.
- the first semiconductor switching element (the first semiconductor switching element Up, the first semiconductor switching element Vp, and the first semiconductor switching element Wp) and the second semiconductor switching element
- the number of switching with the elements is the number of switching when the number of switching of the three-phase sinusoidal AC output voltage is 100%. is 72.7%.
- K is preferably 1 or more.
- K is 1 or more, a voltage utilization factor equivalent to that of normal two-phase modulation can be obtained.
- the period during which one phase does not switch increases, and the number of times of switching can be reduced.
- K is preferably 1.
- K is 1, even-order harmonics are not included, and harmonics can be further suppressed. Therefore, torque unevenness can be suppressed.
- the output voltage waveform is such that the output voltage is continuously turned off during the one-phase fixed period T2, but the present invention is not limited to this.
- the output voltage waveform may be such that it is continuously on during the one-phase fixed period T2.
- FIG. 10 is a diagram showing output voltage Vu, output voltage Vv, and output voltage Vw. Descriptions of portions that overlap with the examples described with reference to FIGS. 1 to 9 will be omitted.
- one cycle of the AC output has a full switching period T1 and a one-phase fixed period T2.
- One phase is continuously turned on during the one-phase fixed period T2.
- FIG. 11A is a diagram showing a sinusoidal waveform Vub, a sinusoidal waveform Vvb, a sinusoidal waveform Vwb, and an offset wave OW.
- FIG. 11B is a diagram showing the output voltage Vu, the output voltage Vv, and the output voltage Vw after modulation.
- the offset wave OW matches a waveform obtained by shifting the sinusoidal waveform of one phase in the amplitude direction during the one-phase fixed period T2.
- the offset wave OW may not completely match the waveform obtained by shifting the sine wave waveform of one phase in the amplitude direction in the one-phase fixed period T2.
- the offset wave OW may be slightly deviated from a waveform obtained by shifting the sinusoidal waveform of one phase in the amplitude direction during the one-phase fixed period T2.
- the waveform of the offset wave OW has a minimum calculation period T5 and a maximum matching period T6.
- the waveform of the offset wave OW is calculated from the minimum sinusoidal waveform of the sinusoidal waveforms of each phase.
- the minimum calculation period T5 is for the electrical rotation angles of 15 degrees to 45 degrees, 135 degrees to 165 degrees and 255 degrees to 285 degrees.
- the minimum calculation period T5 is the same period as the total switching period T1.
- the offset wave OW is calculated from the minimum sinusoidal waveform Vvb of the sinusoidal waveforms of each phase. More specifically, when the electrical rotation angle is 15 degrees to 45 degrees, the offset wave OW is obtained by multiplying the minimum sine wave waveform Vvb of the sine wave waveforms of each phase by K, and shifting the waveform by 1 ⁇ A ⁇ (K 2 +K+1). waveform.
- A is the amplitude.
- K is a predetermined value.
- the offset wave OW is calculated from the minimum sinusoidal waveform Vwb of the sinusoidal waveforms of each phase. More specifically, when the electrical rotation angle is 135 degrees to 165 degrees, the offset wave OW is obtained by multiplying the minimum sine wave waveform Vwb of the sine wave waveforms of each phase by K, and shifting the waveform by 1 ⁇ A ⁇ (K 2 +K+1). waveform.
- A is the amplitude.
- K is a predetermined value.
- the offset wave OW is calculated from the minimum sinusoidal waveform Vub of the sinusoidal waveforms of each phase. More specifically, when the electrical rotation angle is 255 degrees to 285 degrees, the offset wave OW is obtained by multiplying the minimum sine wave waveform Vub of the sine wave waveforms of each phase by K, and shifting the waveform by 1 ⁇ A ⁇ (K 2 +K+1). waveform.
- A is the amplitude.
- K is a predetermined value.
- the waveform of the offset wave OW matches the waveform obtained by shifting the maximum sine wave waveform of the sine wave waveforms of each phase in the amplitude direction.
- the maximum match period T6 matches a waveform obtained by shifting the maximum sinusoidal waveform of each phase by one in the amplitude direction.
- the maximum coincidence period T6 is for electrical rotation angles of 0 to 15 degrees, 45 to 135 degrees, 165 to 255 degrees and 285 to 360 degrees.
- the maximum coincidence period T6 is the same period as the 1-phase fixed period T2. Specifically, when the electrical rotation angle is 0 degree to 15 degrees, the offset wave OW matches a waveform obtained by shifting the maximum sinusoidal waveform Vwb of each phase in the amplitude direction.
- the offset wave OW matches a waveform obtained by shifting the maximum sinusoidal waveform Vub of each phase in the amplitude direction.
- the offset wave OW matches a waveform obtained by shifting the maximum sinusoidal waveform Vvb of each phase in the amplitude direction.
- the offset wave OW matches a waveform obtained by shifting the maximum sinusoidal waveform Vwb of each phase in the amplitude direction.
- the waveform of the offset wave OW has the minimum calculation period T5 and the maximum matching period T6.
- the minimum calculation period T5 the waveform of the offset wave OW is calculated from the minimum sine wave waveform of the sine wave waveforms of each phase.
- the maximum matching period T6 the waveform of the offset wave OW matches the waveform obtained by shifting the maximum sinusoidal waveform of the sinusoidal waveforms of the respective phases in the amplitude direction. Therefore, it becomes easy to calculate the offset wave OW.
- the waveform of the offset wave OW has an angle ⁇ at which the slope of the maximum sinusoidal waveform of each phase is K times the slope of the minimum sinusoidal waveform of the sinusoidal waveform of each phase. It has a waveform that switches from a sinusoidal waveform shifted in the amplitude direction to a waveform obtained by shifting the minimum sinusoidal waveform multiplied by K in the amplitude direction. Therefore, it becomes easy to calculate the offset wave OW.
- the waveform of the offset wave OW is calculated from a predetermined value K, the amplitude of the sinusoidal waveform, and the minimum value of the sinusoidal waveform. Therefore, it becomes easy to calculate the offset wave OW.
- the switching timing between the maximum coincidence period T6 and the minimum calculation period T5 is calculated from a predetermined value K, the maximum sinusoidal waveform value, and the minimum sinusoidal waveform value. Specifically, the switching timing between the maximum matching period T6 and the minimum calculation period T5 can be calculated depending on whether (K+2)min+(2K+1) ⁇ max is positive or negative. If the maximum sinusoidal waveform value is max, the minimum sinusoidal waveform value is min, the predetermined value is K, and the amplitude is A, When (K+2)min+(2K+1) ⁇ max ⁇ 0, The offset wave OW is max-1 When (K+2)min+(2K+1) ⁇ max ⁇ 0, The offset wave OW is
- FIGS. 1 to 11B The embodiments of the present invention have been described above with reference to the drawings (FIGS. 1 to 11B).
- the present invention is not limited to the above-described embodiments, and can be implemented in various aspects without departing from the gist of the present invention.
- the drawings schematically show each component mainly, and the thickness, length, number, etc. of each component illustrated are different from the actual ones due to the convenience of drawing. .
- the material, shape, dimensions, etc. of each component shown in the above embodiment are examples and are not particularly limited, and various changes are possible within a range that does not substantially deviate from the effects of the present invention. be.
- the motor drive circuit 100 described with reference to FIGS. 1 to 11B outputs a three-phase AC output
- the present invention is not limited to this.
- the motor drive circuit 100 may output an AC output of four or more phases.
- the motor drive circuit 100 may drive the 5-phase motor M by outputting a 5-phase AC output.
- the present invention can be suitably used for inverter circuits and motor modules.
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- Control Of Motors That Do Not Use Commutators (AREA)
- Auxiliary Devices For And Details Of Packaging Control (AREA)
Abstract
Description
つまり、K・cosα=cos(α-2π/3)
SH=K×A・sinα‐A・sin(θ-2π/3)
したがって、
SH={2(K2+K+1)/(2K+1)}・Asinα
式1よりsinαを求めて、代入すると
正弦波波形の振幅Aと、最大の正弦波波形の値とから算出される。したがって、オフセット波OWの算出が容易となる。
max=A・sinα
min=A・sin(α-2π/3)
={(K+2)/(2K+1)}・Asinα
したがって、(K+2)max+(2K+1)・minが正か負かによって、最小一致期間T3と前記最大算出期間T4との切り替わりタイミングを算出することができる。
(K+2)max+(2K+1)・min≧0のとき、
オフセット波OWは、
オフセット波OWは、minとなる。
最大の正弦波波形の値をmax、最小の正弦波波形の値をmin、所定の値をK、振幅をAとした場合、
(K+2)min+(2K+1)・max≧0のとき、
オフセット波OWは、max-1
(K+2)min+(2K+1)・max<0のとき、
オフセット波OWは、
したがって、最大一致期間T6と最小算出期間T5との切り替わりタイミングを判定できる。
102、102u、102v、102w 出力端子
112、112u、112v、112w 直列体
114、114u、114v、114w 接続点
200 モータモジュール
A 振幅
Iu、Iv、Iw 出力電流
M モータ
N 第2入力端子
OW オフセット波
P 第1入力端子
T1 全スイッチング期間
T2 1相固定期間
T3 最小一致期間
T4 最大算出期間
T5 最小算出期間
T6 最大一致期間
Un 第2半導体スイッチング素子
Up 第1半導体スイッチング素子
V1 第1の電圧
V2 第2の電圧
Vn 第2半導体スイッチング素子
Vp 第1半導体スイッチング素子
Vu、Vv、Vw、 出力電圧
Vub、Vvb、Vwb 正弦波波形
Wn 第2半導体スイッチング素子
Wp 第1半導体スイッチング素子
α 角度
Claims (13)
- 3相以上の交流出力を出力するインバータ回路であって、
3相以上の出力電圧と3相以上の出力電流とを出力する少なくとも3つの出力端子と、
第1の電圧が印加される第1入力端子と、
前記第1の電圧よりも低い第2の電圧が印加される第2入力端子と、
2つの半導体スイッチング素子が直列に接続されている少なくとも3つの直列体と
を備え、
前記少なくとも3つの直列体は、互いに並列に接続されており、
前記少なくとも3つの直列体の各々は、一端が前記第1入力端子に接続されており、他端が前記第2入力端子に接続されており、
前記少なくとも3つの直列体の各々は、
前記第1入力端子に接続される第1半導体スイッチング素子と、
前記第2入力端子に接続される第2半導体スイッチング素子と
を有し、
前記第1半導体スイッチング素子と前記第2半導体スイッチング素子とは接続点において接続されており、
前記少なくとも3つの直列体の各々における前記接続点が、前記少なくとも3つの出力端子に接続されており、
前記第1半導体スイッチング素子は、前記交流出力の周波数よりも高い周波数でオンとオフとが切り替えられ、
前記第2半導体スイッチング素子は、前記交流出力の周波数よりも高い周波数でオンとオフとが切り替えられ、
前記交流出力の1周期の間に、
全ての相において、前記第1半導体スイッチング素子または前記第2半導体スイッチング素子の少なくとも一方がスイッチングする全スイッチング期間と、
1つの相の前記第1半導体スイッチング素子および前記第2半導体スイッチング素子のうち、一方がオフに固定されるとともに、もう一方がオンに固定されており、前記1つの相を除いた相において前記第1半導体スイッチング素子または前記第2半導体スイッチング素子の少なくとも一方がスイッチングする1相固定期間と
を有し、
各相の出力電圧の波形は、正弦波波形に対して共通のオフセット波を差し引いた波形であり、
前記オフセット波の波形は、
前記1相固定期間において、前記1つの相の正弦波波形に一致し、または、前記1つの相の正弦波波形を振幅方向にシフトした波形に一致し、
前記全スイッチング期間と前記1相固定期間との切り替わりにおいて、傾きが連続して変化する、または、傾きが一定である、インバータ回路。 - 前記オフセット波の周期は、前記正弦波波形の周期の1/nであり、nは、前記交流出力の相数である、請求項1に記載のインバータ回路。
- 前記オフセット波の波形は、
各相の正弦波波形の最小の正弦波波形に一致する最小一致期間と、
各相の正弦波波形の最大の正弦波波形から算出される最大算出期間と
を有する、請求項2に記載のインバータ回路。 - 前記オフセット波の波形は、
各相の前記正弦波波形の最小の正弦波波形の傾きが、
各相の前記正弦波波形の最大の正弦波波形の傾きのK倍になる角度αで、
最小の正弦波波形から、最大の正弦波波形をK倍した波形を振幅方向にシフトさせた波形に切り替わる波形を有する、請求項3に記載のインバータ回路。 - 前記最大算出期間において、前記オフセット波の波形は、
所定の値であるKと、正弦波波形の振幅と、最大の正弦波波形の値とから算出される、請求項4に記載のインバータ回路。 - 前記最小一致期間と前記最大算出期間との切り替わりタイミングは、
所定の値であるKと、最大の正弦波波形の値と、最小の正弦波波形の値とから算出される、請求項5に記載のインバータ回路。 - 前記オフセット波の波形は、
各相の正弦波波形の最小の正弦波波形から算出される最小算出期間と、
各相の正弦波波形の最大の正弦波波形を振幅方向にシフトした波形に一致する最大一致期間とを有する、請求項2に記載のインバータ回路。 - 前記オフセット波の波形は、
各相の前記正弦波波形の最大の正弦波波形の傾きが、
各相の前記正弦波波形の最小の正弦波波形の傾きのK倍になる角度αで、
最大の正弦波波形を振幅方向にシフトした波形から、最小の正弦波波形をK倍した波形を振幅方向にシフトさせた波形に切り替わる波形を有する、請求項7に記載のインバータ回路。 - 前記最小算出期間において、前記オフセット波の波形は、
所定の値であるKと、正弦波波形の振幅と、最小の正弦波波形の値とから算出される、請求項8に記載のインバータ回路。 - 前記最大一致期間と前記最小算出期間との切り替わりタイミングは、
所定の値であるKと、最大の正弦波波形の値と、最小の正弦波波形の値とから算出される、請求項9に記載のインバータ回路。 - 前記Kは1以上である、請求項4から請求項6または請求項8から請求項10のいずれか1項に記載のインバータ回路。
- 前記Kは1である、請求項11に記載のインバータ回路。
- 請求項1から請求項12のいずれか1項に記載のインバータ回路と、
前記インバータ回路によって駆動されるn相のモータと
を備える、モータモジュール。
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