WO2021249274A1 - 显示面板及其制作方法和显示装置 - Google Patents

显示面板及其制作方法和显示装置 Download PDF

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Publication number
WO2021249274A1
WO2021249274A1 PCT/CN2021/098115 CN2021098115W WO2021249274A1 WO 2021249274 A1 WO2021249274 A1 WO 2021249274A1 CN 2021098115 W CN2021098115 W CN 2021098115W WO 2021249274 A1 WO2021249274 A1 WO 2021249274A1
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Prior art keywords
area
layer
light
transparent conductive
display panel
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Application number
PCT/CN2021/098115
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English (en)
French (fr)
Inventor
黄炜赟
蔡建畅
肖星亮
黄耀
邱远游
陆忠
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US17/613,173 priority Critical patent/US20220320146A1/en
Priority to EP21802582.3A priority patent/EP3993060A4/en
Publication of WO2021249274A1 publication Critical patent/WO2021249274A1/zh
Priority to US17/645,335 priority patent/US20220115573A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display device.
  • Full screen is one of the important development trends of display panels in recent years.
  • the full screen of display products for example, mobile phones, etc.
  • the full screen of display products means that the front of the display product is all screens, and the four frame positions are frameless designs, pursuing close to 100% Screen-to-body ratio.
  • the full-screen mobile phone first enhances the appearance of the mobile phone and makes the mobile phone look more technological.
  • the area on the front of the fuselage can accommodate a larger screen, which significantly improves the visual experience.
  • an embodiment of the present disclosure provides a display panel, including a first area and a second area, the second area includes a driving circuit layer and a first light emitting unit on a base substrate, the first area It includes a plurality of second light-emitting units on the base substrate, the second light-emitting units are electrically connected to the drive circuit layer through a transparent conductive layer, and the transparent conductive layer includes at least two stacked and insulated from each other.
  • Conductive sub-layers, each of the conductive sub-layers includes at least one transparent conductive trace, and each of the transparent conductive traces is connected to the second light-emitting unit in a one-to-one correspondence.
  • the transparent conductive layer includes a first conductive sublayer and a second conductive sublayer
  • the display panel further includes a source and drain electrode layer, a first insulating layer, a second insulating layer, and a third insulating layer.
  • the first insulating layer is located on the side of the source and drain electrode layers away from the base substrate, and the first insulating layer, the first conductive sublayer, the second insulating layer, and the second conductive sublayer
  • the third insulating layer and the third insulating layer are sequentially stacked in a direction away from the base substrate.
  • the first conductive sublayer includes at least one first transparent conductive trace
  • the second conductive sublayer includes at least one second transparent conductive trace
  • the first transparent conductive trace and the first transparent conductive trace The orthographic projection of the two transparent conductive traces on the base substrate overlaps at least partially.
  • the second area includes a first display area and a second display area, the resolution of the first display area is greater than that of the second display area, and is used to drive the second light-emitting unit to emit light
  • the driving circuit is located in the second display area.
  • the second display area is located between the first display area and the first area.
  • the second display area is arranged around the first area.
  • the second display area is disposed at a lateral edge or a longitudinal edge of the first area, and is adjacent to the second display area.
  • the driving circuit layer includes a first driving circuit and a second driving circuit, the first driving circuit is electrically connected to the first light-emitting unit located in the second display area, and the second driving circuit It is electrically connected to the second light-emitting unit.
  • the signal line corresponding to the second light-emitting unit is arranged in the first area along the edge of the first area.
  • embodiments of the present disclosure also provide a display device, including the display panel described in any one of the above.
  • embodiments of the present disclosure also provide a method for manufacturing a display panel.
  • the display panel includes a first area and a second area, and the second area includes a driving circuit layer on a base substrate and a plurality of A first light-emitting unit, the first area includes a plurality of second light-emitting units located on the base substrate;
  • the manufacturing method includes forming a transparent conductive layer on the base substrate, wherein the second light-emitting unit is electrically connected to the driving circuit layer through the transparent conductive layer, and the transparent conductive layer includes laminated layers and insulated from each other. At least two conductive sub-layers are provided, each of the conductive sub-layers includes at least one transparent conductive trace, and each of the transparent conductive traces is connected to the second light-emitting unit in a one-to-one correspondence.
  • the method before the forming a transparent conductive layer on the base substrate, the method includes:
  • the forming a transparent conductive layer on the base substrate includes:
  • a first conductive sublayer, a second insulating layer, a second conductive sublayer, and a third insulating layer are sequentially formed on the side of the first insulating layer away from the base substrate.
  • the method further includes: sequentially forming an anode layer, a light-emitting layer, and a cathode layer on a side of the third insulating layer away from the base substrate.
  • FIG. 1 is a schematic diagram of the structure of a display panel in an embodiment of the present disclosure
  • FIG. 2 is another schematic diagram of the structure of the display panel in an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of a manufacturing process of a display panel in an embodiment of the present disclosure.
  • a full-screen display panel in the related art is realized by setting a camera under the screen.
  • These display panels only reserve light-emitting units in the camera area, and control the light-emitting units located in the camera area through a drive circuit that is in the same row or the same column as these light-emitting units. .
  • the number of light-emitting units that can be controlled is limited. Accordingly, the area size of the camera area is also limited. Therefore, it is difficult to meet the use requirements of larger-sized cameras.
  • the embodiment of the present disclosure provides a display panel.
  • the display panel includes a first area 110 and a second area 120.
  • the second area 120 includes a driving circuit layer and a first light-emitting unit 211 located on a base substrate
  • the first area 110 includes a plurality of second light-emitting units 212 located on a base substrate.
  • the first area 110 refers to the area used to set the under-screen camera.
  • the camera area No driving circuit layer is provided, but only the light-emitting unit, that is, the above-mentioned second light-emitting unit 212 remains.
  • the second light-emitting unit 212 is electrically connected to the drive circuit layer through a transparent conductive layer.
  • the transparent conductive layer includes at least two conductive sublayers stacked and insulated from each other. Each conductive sublayer includes at least one transparent conductive trace. The wires are connected to the second light-emitting unit 212 in a one-to-one correspondence.
  • the transparent conductive layer in this embodiment is made of a transparent and conductive material, such as indium tin oxide (ITO).
  • ITO indium tin oxide
  • the electrical connection between the driving circuit layer and the light-emitting unit is achieved by providing a transparent conductive layer, and the transparent conductive layer includes at least two conductive sublayers stacked and insulated from each other, and each conductive sublayer includes at least one Transparent conductive traces.
  • each transparent conductive trace has a certain width and the vertical size of the pixel is also certain, the number of pixels in each row of the first region 110 is also limited, and the transparent conductive layers in this embodiment include stacked and insulated from each other At least two conductive sub-layers are provided, and each conductive sub-layer includes at least one transparent conductive trace, which can provide more transparent conductive traces within a certain longitudinal size range to drive more light-emitting units, thereby providing more transparent conductive traces.
  • the large area of the first area 110 helps to adapt to a larger size camera.
  • the transparent conductive layer includes two conductive sublayers, specifically, a first conductive sublayer and a second conductive sublayer.
  • the display panel further includes a source and drain electrode layer 230 and a first insulating layer.
  • the second insulating layer and the third insulating layer, the first insulating layer is located on the side of the source and drain electrode layer 230 away from the base substrate, and the first insulating layer, the first conductive sublayer, the second insulating layer, and the second conductive sub
  • the layer and the third insulating layer are stacked in sequence along the direction away from the base substrate.
  • the first insulating layer is used to insulate the source and drain electrode layer 230 from the first conductive sublayer
  • the second insulating layer is used to insulate the first conductive sublayer and the second conductive sublayer
  • the third The insulating layer is used to insulate the second conductive sublayer from the electrode of the first light-emitting unit 211.
  • first insulating layer, the second insulating layer, and the third insulating layer may also undergo a planarization process to be multiplexed as a planar layer.
  • the third insulating layer can also be multiplexed as a flat layer. After the third insulating layer is completed, the light-emitting unit is further fabricated so that the anode of the light-emitting unit is formed on the substantially flat third insulating layer.
  • the first conductive sublayer includes at least one first transparent conductive trace 201
  • the second conductive sublayer includes at least one second transparent conductive trace 202
  • the first transparent conductive trace 201 and the second transparent conductive trace The orthographic projection of 202 on the base substrate overlaps at least partially.
  • the first transparent conductive trace 201 and the second transparent conductive trace 202 are overlapped, and at least part of the orthographic projection is overlapped to make full use of the space.
  • the number of transparent conductive traces provided can be up to twice the number of transparent conductive traces provided in a single layer. Accordingly, the number of second light-emitting units 212 that can be controlled also becomes Twice, thereby helping to increase the area of the first region 110.
  • more transparent conductive layers can be added as needed.
  • three, four or even more transparent conductive layers can be provided to control more second light-emitting units 212.
  • the second area 120 includes a first display area 122 and a second display area 121.
  • the resolution of the first display area 122 is greater than that of the second display area 121, and is used to drive the second light-emitting unit 212 to emit light.
  • the driving circuit is located in the second display area 121.
  • the first display area 122 is a conventional display area and has a relatively high resolution.
  • the related technology which is not further limited and described here.
  • the second display area is not only used for realizing the conventional display function, but also used for setting the driving circuit of the first area 110.
  • the first area 110 is only provided with the second light-emitting units 212, and the driving circuit for driving these light-emitting units is located in the second display area 121.
  • the second The resolution of the second display area 121 is smaller than the resolution of the first display area 122.
  • the second display area 121 is located between the first display area 122 and the first area 110.
  • the second display area 121 may surround the first area 110; the second display area 121 may also be disposed at the horizontal edge or the vertical edge of the first area 110, and is adjacent to the second display area 121, which helps Reduce the trace length of the transparent conductive layer.
  • the shape of the orthographic projection of the first region 110 on the base substrate may be a circle, a rectangle, an irregular shape, or the like.
  • the driving circuit layer includes a first driving circuit 221 and a second driving circuit 222.
  • the first driving circuit 221 is electrically connected to the first light emitting unit 211 located in the second display area 121
  • the second driving circuit 222 is electrically connected to the second driving circuit 222.
  • the light-emitting unit 212 is electrically connected.
  • the first driving circuit 221 is used to drive the first light emitting unit 211 in the second display area 121
  • the second driving circuit 222 is used to drive the second light emitting unit 212 in the first area 110.
  • area A represents that the area is provided with only light-emitting units
  • area D in the figure represents that the area is provided with only driving circuits
  • area P represents that the area is provided with both light-emitting units and drive circuits.
  • the P area in the second display area 121 is used to implement conventional display functions, and the D area in the second display area 121 is used to provide a second driving circuit for driving the second light-emitting unit 212 in the first area 110 222, wherein the second light-emitting unit 212 is located in the A area in the first area 110.
  • the signal line corresponding to the second light-emitting unit is arranged in the first area along the edge of the first area.
  • the source and drain electrode layers 230 corresponding to the second light-emitting unit 212 are disposed in the first region 110 along the edge of the first region 110.
  • the source and drain electrode layer 230 is made of a non-transparent material. Therefore, in this embodiment, the source and drain electrode layer 230 is controlled to bypass the first region 110.
  • the routing direction of the source and drain electrode layers 230 can refer to related technologies. For example, set along the vertical direction of the display panel. For the source/drain electrode layer 230 corresponding to the first area 110, the source/drain electrode layer 230 does not directly pass through the first area 110, but bypasses the first area via the wiring area 240 located at the edge of the first area 110 110 to reduce the impact on the transparency of the first region 110.
  • the embodiment of the present disclosure also provides a display device including any of the above display panels.
  • the display panel includes a first area and a second area, the second area includes a driving circuit layer and a first light emitting unit located on a base substrate, and the first area includes a plurality of Second light-emitting unit;
  • the method includes forming a transparent conductive layer on the base substrate, wherein the second light-emitting unit is electrically connected to the driving circuit layer through the transparent conductive layer, and the transparent conductive layer includes stacked layers and insulated from each other. At least two conductive sub-layers, each of the conductive sub-layers includes at least one transparent conductive trace, and each of the transparent conductive traces is electrically connected to the second light-emitting unit in a one-to-one correspondence.
  • the manufactured display panel is specifically the display panel in the above-mentioned display panel embodiment, and the process steps involved can refer to related technologies.
  • the manufacturing method of the display panel of this embodiment can manufacture the above-mentioned display panel.
  • the display panel in the panel embodiment can at least achieve all the above technical effects, which will not be repeated here.
  • the method before the forming a transparent conductive layer on the base substrate, the method includes:
  • the forming a transparent conductive layer on the base substrate includes:
  • a first conductive sublayer, a second insulating layer, a second conductive sublayer, and a third insulating layer are sequentially formed on the side of the first insulating layer away from the base substrate.
  • a first insulating layer for insulating the source and drain electrode layers 230 from the first conductive sublayer is fabricated, and then the first conductive sublayer is fabricated, Further, a second insulating layer that insulates the first conductive sublayer and the second conductive sublayer is fabricated, and after the second insulating layer is completed, the second conductive sublayer is fabricated, and then the third insulating layer is further fabricated .
  • first insulating layer, the second insulating layer, and the third insulating layer may also undergo a planarization process to be multiplexed as a planar layer. After the third insulating layer is completed, the light-emitting unit can be further manufactured.
  • the manufacturing method of the display panel in this embodiment can be summarized as follows: first, the driving circuit layer is performed. Specifically, the semiconductor layer, the first gate layer, and the second gate layer are sequentially manufactured, and then EBA and EBB are performed.
  • the EBA masking process is used to etch the part of the first gate insulating layer and the second gate insulating layer in the bending area; the EBB masking process is used to realize the buffer layer and the etching barrier layer are located in the bending area.
  • the part of the folded area is etched.
  • the interlayer dielectric layer and the source and drain electrode layers make the interlayer dielectric layer and the source and drain electrode layers. Further, make the above-mentioned transparent conductive layer, which specifically includes the first insulating layer, the first conductive sublayer, the second insulating layer, and the second conductive sublayer. Layer and the production of the third insulating layer.
  • the light-emitting unit may specifically include an anode layer, a light-emitting layer, and a cathode layer that are stacked.

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Abstract

本公开提供一种显示面板及其制作方法和显示装置。显示面板包括第一区域和第二区域，所述第二区域包括位于衬底基板上的驱动电路层和第一发光单元，所述第一区域包括位于所述衬底基板上的多个第二发光单元，所述第二发光单元通过透明导电层与所述驱动电路层电连接，所述透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一所述导电子层包括至少一个透明导电走线，各所述透明导电走线与第二发光单元一一对应连接。

Description

显示面板及其制作方法和显示装置
相关申请的交叉引用
本申请主张在2020年6月8日在中国提交的中国专利申请号No.202010511600.X的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，尤其涉及一种显示面板及其制作方法和显示装置。
背景技术
全面屏是近年来显示面板的重要发展趋势之一，显示产品(例如，手机等)全面屏是指显示产品的正面全部都是屏幕，四个边框位置都是采用无边框设计，追求接近100％的屏占比。全面屏手机首先是提升了手机的颜值，让手机的看上去更有科技感，另外同样机身正面的面积可以容纳更大的屏幕，对于视觉体验有着显著的提升。
发明内容
第一方面，本公开实施例提供了一种显示面板，包括第一区域和第二区域，所述第二区域包括位于衬底基板上的驱动电路层和第一发光单元，所述第一区域包括位于所述衬底基板上的多个第二发光单元，所述第二发光单元通过透明导电层与所述驱动电路层电连接，所述透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一所述导电子层包括至少一个透明导电走线，各所述透明导电走线与第二发光单元一一对应连接。
可选的，所述透明导电层包括第一导电子层和第二导电子层，所述显示面板还包括源漏电极层、第一绝缘层、第二绝缘层和第三绝缘层，所述第一绝缘层位于所述源漏电极层远离所述衬底基板的一侧，且所述第一绝缘层、所述第一导电子层、所述第二绝缘层、所述第二导电子层、所述第三绝缘层沿远离所述衬底基板的方向依次层叠设置。
可选的，所述第一导电子层包括至少一个第一透明导电走线，所述第二导电子层包括至少一个第二透明导电走线，所述第一透明导电走线和所述第二透明导电走线在所述衬底基板上的正投影的至少部分重叠。
可选的，所述第二区域包括第一显示区和第二显示区，所述第一显示区的分辨率大于所述第二显示区的分辨率，用于驱动所述第二发光单元发光的驱动电路位于所述第二显示区。
可选的，所述第二显示区位于所述第一显示区和所述第一区域之间。
可选地，所述第二显示区环绕所述第一区域设置。
可选地，所述第二显示区设置于所述第一区域的横向边缘处或纵向边缘处，且与所述第二显示区邻接。
可选的，所述驱动电路层包括第一驱动电路和第二驱动电路，所述第一驱动电路与位于所述第二显示区的所述第一发光单元电连接，所述第二驱动电路与所述第二发光单元电连接。
可选的，所述第二发光单元对应的信号线在所述第一区域沿所述第一区域的边缘设置。
第二方面，本公开实施例还提供了一种显示装置，包括以上任一项所述的显示面板。
第三方面，本公开实施例还提供了一种显示面板的制作方法，所述显示面板包括第一区域和第二区域，所述第二区域包括位于衬底基板上的驱动电路层和多个第一发光单元，所述第一区域包括位于所述衬底基板上的多个第二发光单元；
所述制作方法包括在所述衬底基板上形成透明导电层，其中，所述第二发光单元通过所述透明导电层与所述驱动电路层电连接，所述透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一所述导电子层包括至少一个透明导电走线，各所述透明导电走线与所述第二发光单元一一对应连接。
可选的，所述在所述衬底基板上形成透明导电层之前，所述方法包括：
在所述衬底基板上制作源漏电极层；
在所述源漏电极层远离所述衬底基板一侧制作第一绝缘层；
所述在所述衬底基板上形成透明导电层，包括：
在所述第一绝缘层远离所述衬底基板一侧依次形成第一导电子层、第二绝缘层、第二导电子层和第三绝缘层。
可选地，所述方法还包括：在所述第三绝缘层远离所述衬底基板的一侧依次形成阳极层、发光层和阴极层。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对本公开实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1是本公开一实施例中显示面板的结构示意图；
图2是本公开一实施例中显示面板的又一结构示意图；
图3是本公开一实施例中显示面板的制作流程示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
相关技术中的一种全面屏显示面板是通过在屏下设置摄像头实现的，这些显示面板在摄像头区域仅保留发光单元，并通过与这些发光单元同行或同列的驱动电路控制位于摄像头区域的发光单元。然而受到像素的尺寸及走线区域宽度的限制，所能控制的发光单元的数量是有限的，相应的，也限制了摄像头区域的面积大小，因此，难以满足较大尺寸的摄像头的使用需求。
本公开实施例提供了一种显示面板。
在一个实施例中，如图1、2所示，该显示面板包括第一区域110和第二区域120。其中，第二区域120包括位于衬底基板上的驱动电路层和第一发光单元211，第一区域110包括位于衬底基板上的多个第二发光单元212。
本实施例中，第一区域110指的是用于设置屏下摄像头的区域，为了提 高屏下摄像头所在的第一区域110的光透过率，保证屏下摄像头的拍照效果，在该摄像头区域未设置驱动电路层，而仅保留了发光单元，即上述第二发光单元212。
第二发光单元212通过透明导电层与驱动电路层电连接，透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一导电子层包括至少一个透明导电走线，各透明导电走线与第二发光单元212一一对应连接。
应当理解的是，本实施例中的透明导电层选用透明且可以导电的材料，例如氧化铟锡(ITO)，这样，既能够实现相第二发光单元212传递电信号，也能够避免使第一区域110的透明度降低过大，影响摄像头的成像效果。
这样，本公开实施例中，通过设置透明导电层实现驱动电路层和发光单元的电连接，且透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一导电子层包括至少一个透明导电走线。
由于每一透明导电走线具有一定的宽度，而像素纵向尺寸也是一定的，因此，第一区域110每一行像素的数量也受到了限制，而本实施例中的透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一导电子层包括至少一个透明导电走线，能够在一定纵向尺寸范围内提供更多的透明导电走线，以驱动更多的发光单元，从而能够提供更大面积的第一区域110，有助于适配更大尺寸的摄像头。
在一个可选的具体实施方式中，透明导电层包括两个导电子层，具体的，包括第一导电子层和第二导电子层，显示面板还包括源漏电极层230、第一绝缘层、第二绝缘层和第三绝缘层，第一绝缘层位于源漏电极层230远离衬底基板的一侧，且第一绝缘层、第一导电子层、第二绝缘层、第二导电子层、第三绝缘层沿远离衬底基板的方向依次层叠设置。
本实施例的技术方案中，第一绝缘层用于使源漏电极层230和第一导电子层绝缘，第二绝缘层用于使第一导电子层和第二导电子层绝缘，第三绝缘层用于使第二导电子层和第一发光单元211的电极相绝缘。
应当注意的是，第一绝缘层、第二绝缘层和第三绝缘层中的一项或多项还可以经过平坦化处理以复用为平坦层。
具体的，例如第三绝缘层还可以复用为平坦层，在完成第三绝缘层的制 作之后，进一步的制作发光单元，以使发光单元的阳极形成于基本平坦的第三绝缘层上。
可选的，第一导电子层包括至少一个第一透明导电走线201，第二导电子层包括至少一个第二透明导电走线202，第一透明导电走线201和第二透明导电走线202在衬底基板上的正投影的至少部分重叠。
本实施例中，第一透明导电走线201和第二透明导电走线202重叠设置，且正投影的至少部分重合以充分利用空间。
这样，在同样宽度的范围内，所设置的透明导电走线数量最多可以达到单层设置的透明导电走线的数量的两倍，相应的，可以控制的第二发光单元212的数量也变为了两倍，从而有助于提高第一区域110的面积。
实际实施时，还可以根据需要增加更多的透明导电层，例如，可以设置三层、四层甚至更多的透明导电层，以控制更多的第二发光单元212。
如图1所示，第二区域120包括第一显示区122和第二显示区121，第一显示区122的分辨率大于第二显示区121的分辨率，用于驱动第二发光单元212发光的驱动电路位于第二显示区121。
请继续参阅图1，本实施例中，第一显示区122为常规的显示区，具有较高的分辨率，具体可参考相关技术，此处不做进一步限定和描述。
第二显示区不仅用于实现常规的显示功能，则还用于设置第一区域110的驱动电路。换句话说，第一区域110仅设置有第二发光单元212，驱动这些发光单元的驱动电路位于第二显示区121。
这样，在单位面积内所能设置的驱动电路的数量一定的情况下，这些驱动电路驱动的发光单元的总数也是一定的，而这些发光单元中的一部分需要设置在第一区域110，所以该第二显示区121的分辨率小于第一显示区122的分辨率。
如图1所示，在一个具体实施方式中，第二显示区121位于第一显示区122和第一区域110之间。例如，第二显示区121可以环绕第一区域110；第二显示区121还可以设置于第一区域110的横向边缘处或纵向边缘处，且与第二显示区121邻接，这样，有助于减少透明导电层的走线长度。
在一些实施例中，所述第一区域110在衬底基板上的正投影的形状可以 为圆形、矩形或不规则形状等。
具体的，所述驱动电路层包括第一驱动电路221和第二驱动电路222，第一驱动电路221与位于第二显示区121的第一发光单元211电连接，第二驱动电路222与第二发光单元212电连接。
第一驱动电路221用于驱动第二显示区121内的第一发光单元211，而第二驱动电路222用于驱动第一区域110内的第二发光单元212。
请进一步参阅图2，图中区域A代表该区域仅设置有发光单元，图中区域D代表该区域仅设置有驱动电路，区域P代表该区域即设置有发光单元也设置有驱动电路。
可以理解为，第二显示区121内的P区域用于实现常规的显示功能，第二显示区121内的D区域用于提供驱动第一区域110内的第二发光单元212的第二驱动电路222，其中，第二发光单元212位于第一区域110内的A区域。
在一些实施例中，所述第二发光单元对应的信号线在所述第一区域沿所述第一区域的边缘设置。
可选的，第二发光单元212对应的源漏电极层230在第一区域110沿第一区域110的边缘设置。
一般来说，源漏电极层230为非透明材料，因此，本实施例中控制源漏电极层230绕过第一区域110。
如图2所示，在第二显示区121内，源漏电极层230的走线方向可参考相关技术。例如，沿显示面板的纵向设置。而在第一区域110对应的源漏电极层230来说，源漏电极层230不直接穿过该第一区域110，而是经由位于第一区域110边缘的走线区域240绕过第一区域110，以降低对第一区域110的透明度造成影响。
本公开实施例还提供了一种显示装置，包括以上任一项的显示面板。
由于本实施例的技术方案包括了上述显示基板实施例的全部技术方案，因此至少能实现上述全部技术效果，此处不再赘述。
本公开实施例还提供了一种显示面板的制作方法
所述显示面板包括第一区域和第二区域，所述第二区域包括位于衬底基 板上的驱动电路层和第一发光单元，所述第一区域包括位于所述衬底基板上的多个第二发光单元；
所述方法包括在所述衬底基板上形成透明导电层，其中，所述第二发光单元通过所述透明导电层与所述驱动电路层电连接，所述透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一所述导电子层包括至少一个透明导电走线，各所述透明导电走线与第二发光单元电一一对应连接。
本实施例中，所制作的显示面板具体为上述显示面板实施例中的显示面板，所涉及到的工艺步骤本身具体可参考相关技术，同时，本实施例的显示面板的制作方法能够制作上述显示面板实施例中的显示面板，因此至少能实现上述全部技术效果，此处不再赘述。
可选的，所述在所述衬底基板上形成透明导电层之前，所述方法包括：
在所述衬底基板上制作源漏电极层230；
在所述源漏电极层远离所述衬底基板一侧制作第一绝缘层；
所述在所述衬底基板上形成透明导电层，包括：
在所述第一绝缘层远离所述衬底基板一侧依次形成第一导电子层、第二绝缘层、第二导电子层和第三绝缘层。
本实施例的技术方案中，在制作完源漏电极层230之后，制作用于使源漏电极层230和第一导电子层绝缘的第一绝缘层，接下来，制作第一导电子层，进一步的，制作使第一导电子层和第二导电子层绝缘的第二绝缘层，在第二绝缘层制作完成之后，进行第二导电子层的制作，之后，进一步的制作第三绝缘层。
应当注意的是，第一绝缘层、第二绝缘层和第三绝缘层中的一项或多项还可以经过平坦化处理以复用为平坦层。在完成第三绝缘层的制作之后，进一步的制作发光单元即可。
如图3所示，本实施例中显示面板的制作方法可以概括为，首先进行驱动电路层，具体的，依次制作半导体层、第一栅极层、第二栅极层，然后进行EBA和EBB工艺，其中，EBA掩膜工艺用于实现对第一栅绝缘层和第二栅绝缘层位于弯折区域的部分进行刻蚀；EBB掩膜工艺用于实现对缓冲层和刻蚀阻挡层位于弯折区域的部分进行刻蚀。
接下来，进行层间介质层、源漏电极层的制作，进一步的，进行上述透明导电层的制作，其具体包括第一绝缘层、第一导电子层、第二绝缘层、第二导电子层、第三绝缘层的制作。
最后，进行发光单元的制作，发光单元具体可以包括层叠设置的阳极层、发光层和阴极层。
应当理解的是，图3中省略了一些可能涉及到的结构，例如缓冲层、阻挡层、平坦层等，各步骤中所涉及的工艺本身可参考相关技术，此处不再赘述。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以权利要求的保护范围为准。

Claims (13)

  1. 一种显示面板，包括第一区域和第二区域，所述第二区域包括位于衬底基板上的驱动电路层和第一发光单元，所述第一区域包括位于所述衬底基板上的多个第二发光单元，所述第二发光单元通过透明导电层与所述驱动电路层电连接，所述透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一所述导电子层包括至少一个透明导电走线，各所述透明导电走线与第二发光单元一一对应连接。
  2. 如权利要求1所述的显示面板，其中，所述透明导电层包括第一导电子层和第二导电子层，所述显示面板还包括源漏电极层、第一绝缘层、第二绝缘层和第三绝缘层，所述第一绝缘层位于所述源漏电极层远离所述衬底基板的一侧，且所述第一绝缘层、所述第一导电子层、所述第二绝缘层、所述第二导电子层、所述第三绝缘层沿远离所述衬底基板的方向依次层叠设置。
  3. 如权利要求2所述的显示面板，其中，所述第一导电子层包括至少一个第一透明导电走线，所述第二导电子层包括至少一个第二透明导电走线，所述第一透明导电走线和所述第二透明导电走线在所述衬底基板上的正投影的至少部分重叠。
  4. 如权利要求2所述的显示面板，其中，所述第二区域包括第一显示区和第二显示区，所述第一显示区的分辨率大于所述第二显示区的分辨率，用于驱动所述第二发光单元发光的驱动电路位于所述第二显示区。
  5. 如权利要求4所述的显示面板，其中，所述第二显示区位于所述第一显示区和所述第一区域之间。
  6. 如权利要求5所述的显示面板，其中，所述第二显示区环绕所述第一区域设置。
  7. 如权利要求5所述的显示面板，其中，所述第二显示区设置于所述第一区域的横向边缘处或纵向边缘处，且与所述第二显示区邻接。
  8. 如权利要求4-7任一项所述的显示面板，其中，所述驱动电路层包括第一驱动电路和第二驱动电路，所述第一驱动电路与位于所述第二显示区的所述第一发光单元电连接，所述第二驱动电路与所述第二发光单元电连接。
  9. 如权利要求2所述的显示面板，其中，所述第二发光单元对应的信号线在所述第一区域沿所述第一区域的边缘设置。
  10. 一种显示装置，包括权利要求1至9中任一项所述的显示面板。
  11. 一种显示面板的制作方法，所述显示面板包括第一区域和第二区域，所述第二区域包括位于衬底基板上的驱动电路层和第一发光单元，所述第一区域包括位于所述衬底基板上的多个第二发光单元；
    所述方法包括在所述衬底基板上形成透明导电层，其中，所述第二发光单元通过所述透明导电层与所述驱动电路层电连接，所述透明导电层包括层叠且互相绝缘设置的至少两个导电子层，每一所述导电子层包括至少一个透明导电走线，各所述透明导电走线与所述第二发光单元一一对应连接。
  12. 如权利要求11所述的显示面板的制作方法，其中，所述在所述衬底基板上形成透明导电层之前，所述方法包括：
    在所述衬底基板上制作源漏电极层；
    在所述源漏电极层远离所述衬底基板一侧制作第一绝缘层；
    所述在所述衬底基板上形成透明导电层，包括：
    在所述第一绝缘层远离所述衬底基板一侧依次形成第一导电子层、第二绝缘层、第二导电子层和第三绝缘层。
  13. 如权利要求12所述的显示面板的制作方法，还包括：
    在所述第三绝缘层远离所述衬底基板的一侧依次形成阳极层、发光层和阴极层。
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