WO2021233277A1 - 显示基板及其制造方法及触控显示面板、显示面板 - Google Patents

显示基板及其制造方法及触控显示面板、显示面板 Download PDF

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Publication number
WO2021233277A1
WO2021233277A1 PCT/CN2021/094307 CN2021094307W WO2021233277A1 WO 2021233277 A1 WO2021233277 A1 WO 2021233277A1 CN 2021094307 W CN2021094307 W CN 2021094307W WO 2021233277 A1 WO2021233277 A1 WO 2021233277A1
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Prior art keywords
signal line
conductive structure
direct current
substrate
current conductive
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PCT/CN2021/094307
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English (en)
French (fr)
Inventor
刘利宾
郑灿
史世明
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京东方科技集团股份有限公司
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Priority to US17/760,988 priority Critical patent/US11862646B2/en
Publication of WO2021233277A1 publication Critical patent/WO2021233277A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0443—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a single layer of sensing electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103—Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04107—Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds

Definitions

  • the present disclosure relates to the field of display technology. Specifically, the present disclosure relates to a display substrate, a manufacturing method thereof, a touch display panel, and a display panel.
  • a DC power supply line and different signal lines need to be laid in the display panel.
  • the DC power supply line is used to provide operating voltages to the internal devices of the display panel, and the different signal lines are used to send control signals to the internal devices of the display panel.
  • the DC power supply lines and different signal lines are gathered in the pin area (fanout area) of the display panel.
  • a display substrate which has a display area and a pin area located on one side of the display area.
  • the display substrate includes: a substrate; and at least one first signal line and at least one second signal line, the at least one first signal line and the at least one second signal line are both located on one side of the substrate, and All extend from the pin area to the display area.
  • the display substrate also includes a direct current conductive structure connected to a constant direct current voltage. The direct current conductive structure is located between the at least one first signal line and the at least one second signal line. Each of the at least one first signal line and the at least one second signal line is spaced apart from the direct current conductive structure.
  • the direct current conductive structure in the display area and/or the pin area, is located between the at least one first signal line and the at least one second signal line, and is insulated The layer is spaced apart from the at least one first signal line and the at least one second signal line.
  • the at least one first signal line, the direct current conductive structure, and the at least one second signal line are respectively located in three different layers stacked in a direction perpendicular to the substrate.
  • the orthographic projection of the at least one first signal line on the substrate, the orthographic projection of the DC conductive structure on the substrate, and the orthographic projection of the at least one second signal line on the substrate overlap with each other .
  • the at least one first signal line, the at least one second signal line, and the direct current conductive structure are all located in the same layer.
  • the direct current conductive structure includes a first direct current conductive structure and a second direct current conductive structure electrically connected through a via.
  • the first direct current conductive structure is located in the same layer as the at least one first signal line and the at least one second signal line and is located between the at least one first signal line and the at least one second signal line between.
  • the second direct current conductive structure is located on a side of the first direct current conductive structure away from the substrate.
  • the orthographic projection of the second direct current conductive structure on the substrate covers the orthographic projection of the first direct current conductive structure, the at least one first signal line, and the at least one second signal line on the substrate .
  • the extension direction of the direct current conductive structure, the extension direction of the at least one first signal line, and the extension direction of the at least one second signal line are parallel to each other.
  • the at least one first signal line and the at least one second signal line are two different types of signal lines.
  • the at least one first signal line includes at least one signal line of the same type that are parallel to each other; and/or the at least one second signal line includes at least one signal line of the same type that is parallel to each other.
  • one end of the direct current conductive structure is grounded.
  • the direct current conductive structure has a stacked metal structure of Ti/Al/Ti.
  • a touch display panel including: the above-mentioned display substrate.
  • the display substrate includes a gate layer, a source and drain layer, and a touch sensing layer laminated on the substrate.
  • the at least one first signal line is located in the gate layer
  • the at least one second signal line is located in the touch sensing layer
  • the direct current conductive structure is located in the source and drain layer.
  • the direct current conductive structure is connected to the VDD voltage of the touch display panel.
  • the at least one first signal line is a display data signal line
  • the at least one second signal line is a touch data signal line
  • the display data signal line contains molybdenum
  • the touch data signal line contains titanium aluminum titanium
  • a display panel including the above-mentioned display substrate.
  • the display substrate includes a buffer layer, an interlayer insulating layer, a source and drain layer, and a planarization layer laminated on the substrate.
  • the at least one first signal line, the at least one second signal line, and the direct current conductive structure are all located in the source drain layer.
  • the direct current conductive structure is connected to the VDD voltage of the display panel.
  • the at least one first signal line and the at least one second signal line are of any two different types selected from a gate signal line, an initialization signal line, a data line, and a reset signal line. Signal line.
  • a method of manufacturing a display substrate the display substrate having a display area and a pin area located on one side of the display area, and the method includes: At least one first signal line and at least one second signal line extending to the display area; a DC conductive structure is formed between the at least one first signal line and the at least one second signal line, so that the at least one Each of the one first signal line and the at least one second signal line is spaced apart from the direct current conductive structure, and the direct current conductive structure is connected to a constant direct current voltage.
  • forming a direct current conductive structure between the at least one first signal line and the at least one second signal line includes: connecting the at least one first signal line, the direct current conductive structure, and The at least one second signal line is respectively formed in three different layers stacked in a direction perpendicular to the substrate, so that the orthographic projection of the at least one first signal line on the substrate, the direct current The orthographic projection of the conductive structure on the substrate and the orthographic projection of the at least one second signal line on the substrate overlap with each other.
  • forming a direct current conductive structure between the at least one first signal line and the at least one second signal line includes: forming the at least one first signal line, the at least one first signal line, and the at least one signal line in the same layer. A second signal line and the direct current conductive structure.
  • the direct current conductive structure includes a first direct current conductive structure and a second direct current conductive structure electrically connected through a via.
  • Forming a direct current conductive structure between the at least one first signal line and the at least one second signal line includes: forming the first direct current conductive structure, the at least one first signal line, and the same layer in the same layer
  • the at least one second signal line is such that the first direct current conductive structure is located between the at least one first signal line and the at least one second signal line;
  • the second direct current conductive structure is formed on one side of the substrate, so that the orthographic projection of the second direct current conductive structure on the substrate covers the first direct current conductive structure, the at least one first signal line, and the The orthographic projection of the at least one second signal line on the substrate.
  • FIG. 1 is a schematic diagram of the structure of a display substrate according to an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a layout of a DC conductive structure and signal lines in a display substrate according to an embodiment of the present disclosure
  • FIG. 3 is a schematic diagram of the layout of a DC conductive structure and signal lines in a display substrate according to an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of the layout of the DC conductive structure and signal lines in the display substrate according to an embodiment of the present disclosure.
  • the inventors of the present disclosure have conducted research and found that the pin area of the display panel is usually smaller than the display area of the display panel, and the wiring in the pin area is relatively limited, and the distance between the signal lines is too small, or there are phenomena such as cross wiring. In this way, parasitic capacitance will be generated, and the control signal in each signal line will affect the accuracy of the signal due to noise and affect the performance of the display panel.
  • the substrate, touch display panel, and display panel provided by the present disclosure are intended to at least partially solve the above technical problems of related technologies.
  • FIG. 1 is a schematic diagram of the structure of a display substrate according to an embodiment of the present disclosure. As shown in FIG. 1, the display substrate 100 has a display area 100a and a pin area 100b.
  • the display substrate 100 includes a substrate 10, at least two signal lines 130 and a direct current conductive structure 120. At least two types of signal lines 130 extend from the pin area 100b to the display area 100a.
  • a DC conductive structure 120 is provided between any two signal lines 130, and each signal line 130 of any two signal lines 130 is spaced from the DC conductive structure 120.
  • a direct current conductive structure 120 is arranged between the first signal line 131 and the second signal line 132.
  • a constant DC voltage for example, VDD DC voltage
  • VDD DC voltage VDD DC voltage
  • the pulse signals in the first signal line 131 and the second signal line 132 separated by the direct current conductive structure 120 have a stable reference potential relative to the direct current, which can effectively reduce the difference between the first signal line 131 and the second signal line 132.
  • the parasitic influence between the two can shield the possible mutual interference between the first signal line 131 and the second signal line 132. In this way, the accuracy of signal transmission in the pin area 100b with a relatively limited space can be optimized, and the performance of the device can be improved.
  • the at least two types of signal lines 130 may include at least one first signal line 131, at least one second signal line 132... at least one Nth signal line, that is, signal lines 130 for transmitting different pulse signals.
  • the pulse signal may include a display data signal and a touch data signal. It can be understood that the signal line 130 for transmitting the display data signal is the display data signal line 130, and the signal line 130 for transmitting the touch data signal is the touch data signal line 130.
  • the inventor of the present disclosure considers that the signal interference in the display area 100a of the display substrate 100 cannot be ignored. To this end, the present disclosure provides the following implementation manner for the display substrate 100:
  • a DC conductive structure 120 is provided between two (any two) of the at least two signal lines 130, and two (any two) signals are provided. Any signal line 130 of the lines 130 is spaced apart from the DC conductive structure 120.
  • a direct current conductive structure 120 is arranged between the first signal line 131 and the second signal line 132, and a direct current voltage (for example, VDD direct current voltage) is applied to the direct current conductive structure 120.
  • VDD direct current voltage VDD direct current voltage
  • the pulse signals in the first signal line 131 and the second signal line 132 separated by the direct current conductive structure 120 have a stable reference potential relative to the direct current, which can effectively reduce the difference between the first signal line 131 and the second signal line 132.
  • the parasitic influence between the two can shield the possible mutual interference between the first signal line 131 and the second signal line 132. In this way, the accuracy of signal transmission in the display area 100a of the display substrate 100 can be optimized, and the performance of the device can be improved. It is especially suitable for devices with high wiring density in the display area 100a, such as small display screens and ultra-clear displays.
  • the display area 100a of the display substrate 100 corresponds to the display area of the display panel.
  • the display area 100a of the display substrate 100 corresponds to the touch display area of the touch display panel.
  • the inventor of the present disclosure considers that if the wiring method of the signal line 130 is relatively random, the phenomenon of cross wiring will occur, which increases the probability of mutual interference.
  • the first signal line 131 and the second signal line 132 may be the same kind of signal line, such as a data line. In other words, a direct current conductive structure is provided between the two data lines.
  • the first signal line 131 and the second signal line 132 may be two different types of signal lines, such as a data line and a gate line.
  • a direct current conductive structure is provided between one data line and one gate line.
  • the various signal lines 130 are wired in parallel, which can reduce the phenomenon of cross wiring and reduce the possible interaction between the two signal lines 130. Interference can also improve the utilization of wiring space.
  • the first signal line 131 of the at least two types of signal lines 130 is located on the first layer 111 of the display substrate 100
  • the second signal line 132 of the at least two types of signal lines 130 is located on the first layer 111 of the display substrate 100.
  • the third layer 113 of the display substrate 100 and the DC conductive structure 120 are located on the second layer 112 of the display substrate 100, wherein the first layer 111, the second layer 112, and the third layer 113 are three layers located in different layers.
  • the second layer 112 is located between the first layer 111 and the third layer 113.
  • the first signal line 131, the second signal line 132, and the DC conductive structure 120 are respectively located in three different layers stacked in a direction perpendicular to the substrate 10, and the DC conductive structure 120 is on the display substrate 100.
  • the first signal line 131 and the second signal line 132 are separated in the thickness direction to form a shield, which can be applied to devices with more film layers.
  • the at least one first signal line 131 may include at least one signal line of the same type
  • the at least one second signal line 132 may include at least one signal line of the same type.
  • Figures 2, 3, and 4. 2 shows that both the first signal line 131 and the second signal line 132 include 6 signal lines of the same type
  • FIG. 3 shows that the first signal line 131 includes 3 signal lines of the same type
  • the second signal line 132 includes 4 signal lines of the same type.
  • the direct current conductive structure 120 may be a planar conductive structure, so that the direct current is conductive.
  • the orthographic projection of the structure 120 on the substrate 10, the orthographic projection of the at least one first signal line 131 on the substrate 10, and the orthographic projection of the at least one second signal line 132 on the substrate 10 may overlap each other.
  • the width of the direct current conductive structure 120 may be equivalent to the distance from the first first signal line to the last first signal line among the plurality of first signal lines arranged in sequence.
  • the width of the direct current conductive structure 120 may be equivalent to the distance from the first second signal line to the last second signal line among the plurality of second signal lines arranged in sequence.
  • the number of signal lines is not limited to this, and at least one first signal line 131 or at least one second signal line 132 can also be only one signal line.
  • the extension direction of the first signal line 131, the extension direction of the second signal line 132, and the extension direction of the DC conductive structure 120 are parallel to each other.
  • a direct current conductive structure 120 is provided between the first and second signal lines 131 and 132.
  • the orthographic projection of the first signal line 131 on the substrate 10, the orthographic projection of the DC conductive structure 120 on the substrate 10, and the orthographic projection of the second signal line 132 on the substrate 10 overlap with each other.
  • the intersection area where the first signal line 131 and the second signal line 132 intersect between the first and second signal lines 131, 132 A direct current conductive structure 120 is provided.
  • the orthographic projection of the first signal line 131 on the substrate 10 overlaps with each other.
  • the first and second signal lines 131, 132 and the DC conductive structure 120 are all located in the same layer, that is, covered by the same insulating layer.
  • the first signal line 131, the second signal line 132, and the direct current conductive structure 120 are all located on the same layer.
  • the direct current conductive structure 120 connects the first signal line 131 and the second signal line 131 to the second signal line in a direction parallel to the display substrate 100.
  • the wires 132 are separated to form a shield, which is conducive to thinning the device.
  • the extension direction of the first signal line 131, the extension direction of the second signal line 132, and the extension direction of the DC conductive structure 120 are parallel to each other.
  • first signal line 131, the second signal line 132 and the DC conductive structure 120 are all insulated, for example, an insulating structure (insulating layer) is made to isolate each signal line 130 from the DC conductive structure 120.
  • the direct current conductive structure 120 includes a first direct current conductive structure 121 and a second direct current conductive structure 122.
  • a first direct current conductive structure is provided between any two signal lines.
  • the first and second signal lines 131, 132 and the first direct current conductive structure 121 are all located on the fourth layer 114 of the display substrate 100.
  • the second direct current conductive structure 122 is located on the fifth layer 115 of the display substrate 100.
  • the second direct current conductive structure 122 is located on a side of the first direct current conductive structure 121 and the first and second signal lines 131 and 132 away from the substrate 10.
  • the first direct current conductive structure 121 and the second direct current conductive structure 122 are electrically connected through a via 160.
  • the orthographic projection of the second direct current conductive structure 122 on the fourth layer 114 or the substrate 10 covers at least the first direct current conductive structure 121 and the first and second signal lines 131, 132 adjacent to the first direct current conductive structure 121. Orthographic projection on the substrate 10.
  • the first direct current conductive structure 121, the first signal line 131, and the second signal line 132 are all located on the fourth layer 114 of the display substrate 100, and the first direct current conductive structure 121 connects the first signal line 131 It is separated from the second signal line 132 and forms a shield.
  • the second direct current conductive structure 122 is located on the fifth layer 115 of the display substrate 100, and the first direct current conductive structure 121 and the second direct current conductive structure 122 are electrically connected through the via 160, that is, the first direct current conductive structure 121 and the second direct current conductive structure 121 are electrically connected to each other.
  • the two direct current conductive structures 122 have the same potential, and the second direct current conductive structure 122 extends in a direction parallel to the display substrate 100, thereby forming the first signal line 131 and the second signal line 132 together with the first direct current conductive structure 121
  • the certain wrapping posture strengthens the shielding effect of the first signal line 131 and the second signal line 132.
  • the orthographic projection of the second direct current conductive structure 122 on the substrate 10 covers the orthographic projection of the first direct current conductive structure 121 on the substrate 10, and covers the first and second The orthographic projection of the signal lines 131 and 132 on the substrate 10.
  • the extension direction of the first signal line 131, the extension direction of the second signal line 132, and the extension direction of the first direct current conductive structure 121 are parallel to each other.
  • one end of the direct current conductive structure 120 is used for grounding.
  • the direct current conductive structure 120 is grounded, which can lead external interference signals into the ground, thereby preventing interference signals from entering the signal line 130, causing interference or loss of control signals in the signal line 130.
  • the direct current conductive structure 120 is a metal structure made of titanium, aluminum, and titanium. That is, the direct current conductive structure 120 adopts a Ti (titanium)/Al (aluminum)/Ti laminated metal structure.
  • embodiments of the present disclosure provide a touch display panel, including: any of the display substrates 100 provided in the foregoing embodiments.
  • the display substrate 100 includes a gate layer, a source and drain layer, and a touch sensing layer laminated on the substrate 10.
  • the first signal line 131 of the at least two signal lines 130 of the display substrate 100 is located in the gate layer 111.
  • the second signal line 132 of the at least two signal lines 130 of the display substrate 100 is located in the touch sensitive layer 113.
  • the DC conductive structure 120 of the display substrate 100 is located in the source and drain layer 112.
  • the display device adopts the display panel provided in the foregoing embodiments.
  • the principle and technical effect please refer to the foregoing embodiments, and details are not repeated here.
  • the first signal line 131 of the at least two signal lines 130 of the display substrate 100 is a display data signal line
  • the second signal line 132 of the at least two signal lines 130 of the display substrate 100 is touch data. Signal line.
  • the direct current conductive structure 120 of the display substrate 100 is a power supply structure for supplying power to the touch display panel, and the direct current conductive structure 120 is connected to the constant direct current voltage VDD of the touch display panel.
  • the display data signal line 131 may be made of molybdenum metal
  • the touch data signal line 132 may be made of titanium aluminum titanium metal.
  • embodiments of the present disclosure provide a display panel, including: any of the display substrates 100 provided in the foregoing embodiments.
  • the display substrate 100 includes a buffer layer, an interlayer insulating layer, a source and drain layer, and a planarization layer laminated on the substrate 10.
  • the at least two signal lines 131 and 132 and the DC conductive structure 120 of the display substrate 100 are all located in the source and drain layer 111.
  • the display device adopts the display panel provided in the foregoing embodiments.
  • the principle and technical effect please refer to the foregoing embodiments, and details are not repeated here.
  • the at least two signal lines 130 of the display substrate 100 include a gate signal line 130, an initialization signal line 130 (which is the input signal line stv of the GOA driving circuit), a data signal line 130, and a reset signal line 130 At least two of them.
  • the direct current conductive structure 120 is a power supply structure of the display panel, and the direct current conductive structure 120 is connected to a constant direct current voltage VDD of the display panel.
  • a method of manufacturing a display substrate the display substrate having a display area 100a and a pin area 100b located on one side of the display area, and the method includes: on one side of the substrate 10 Form the first and second signal lines 131, 132 extending from the pin area 100b to the display area 100a; form a DC conductive structure 120 between the first and second signal lines 131, 132, so that the first, Each of the second signal lines 131, 132 is spaced apart from the direct current conductive structure 120, and the direct current conductive structure 120 is connected to a constant direct current voltage.
  • the first signal line 131, the second signal line 132, and the DC conductive structure 120 are respectively formed in three different layers stacked in a direction perpendicular to the substrate 10, so that the first signal line 131 is in the The orthographic projection on the substrate 10, the orthographic projection of the second signal line 132 on the substrate 10, and the orthographic projection of the DC conductive structure 120 on the substrate 10 overlap with each other.
  • first signal line 131, the second signal line 132 and the direct current conductive structure 120 are formed in the same layer.
  • the direct current conductive structure 120 includes a first direct current conductive structure 121 and a second direct current conductive structure 122 electrically connected through a via 160,
  • the first direct current conductive structure 121, the first signal line 131, and the second signal line 132 are formed in the same layer 114, so that the first direct current conductive structure 120 is located on the first and second signal lines 131 , 132 between.
  • the second direct current conductive structure 122 is formed on the side of the first direct current conductive structure 121 away from the substrate 10, so that the orthographic projection of the second direct current conductive structure 122 on the substrate 10 covers the The orthographic projection of the first direct current conductive structure 121 on the substrate 10 and covers the orthographic projection of the first and second signal lines 131 and 132 on the substrate 10.
  • the first signal line and the second signal line are two different types of signal lines.
  • the first signal line includes at least one signal line of the same type that are parallel to each other.
  • the second signal line includes at least one signal line of the same type that are parallel to each other.
  • the parallel wiring of each signal line 130 can reduce the phenomenon of cross wiring, reduce the possible mutual interference of the two signal lines 130, and also improve the utilization of the wiring space.
  • At least two signal lines 130 and the DC conductive structure 120 are located on different layers.
  • the DC conductive structure 120 separates the two signal lines 130 in the thickness direction of the display substrate 100 and forms a shield, which is suitable for more film layers. device of.
  • At least two signal lines 130 and the DC conductive structure 120 are located on the same layer.
  • the DC conductive structure 120 separates the two signal lines 130 in the plane direction of the display substrate 100 and forms a shield, which is beneficial to thinning the device.
  • the direct current conductive structure 120 is grounded, which can lead external interference signals into the ground, so as to prevent interference signals from entering the signal line 130, causing interference or loss of control signals in the signal line 130.

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Abstract

一种显示基板及触控显示面板、显示面板。该显示基板，具有显示区和位于所述显示区一侧的引脚区。所述显示基板包括：基板（10）；以及至少一个第一信号线（131）和至少一个第二信号线（132），所述至少一个第一信号线（131）和所述至少一个第二信号线（132）均位于所述基板（10）的一侧，并且均由所述引脚区延伸至所述显示区。所述显示基板还包括直流导电结构（120），所述直流导电结构（120）连接至恒定的直流电压。所述直流导电结构（120）位于所述至少一个第一信号线（131）和所述至少一个第二信号线（132）之间。所述至少一个第一信号线（131）和所述至少一个第二信号线（132）中的每一条信号线与所述直流导电结构（120）相间隔。

Description

显示基板及其制造方法及触控显示面板、显示面板
相关申请的交叉引用
本申请要求2020年05月20日提交给专利局的第202010432298.9号中国专利申请的优先权，其全部内容通过引用合并于此。
技术领域
本公开涉及显示技术领域，具体而言，本公开涉及一种显示基板及其制造方法及触控显示面板、显示面板。
背景技术
显示面板中需要布设直流供电线和不同的信号线，直流供电线用于实现对显示面板的内部器件提供工作电压，不同的信号线用于向显示面板的内部器件发送控制信号。直流供电线和不同的信号线都会汇集在显示面板的引脚区(fanout区域)。
发明内容
一方面，提供一种显示基板，具有显示区和位于所述显示区一侧的引脚区。所述显示基板包括：基板；以及至少一个第一信号线和至少一个第二信号线，所述至少一个第一信号线和所述至少一个第二信号线均位于所述基板的一侧，并且均由所述引脚区延伸至所述显示区。所述显示基板还包括直流导电结构，所述直流导电结构连接至恒定的直流电压。所述直流导电结构位于所述至少一个第一信号线和所述至少一个第二信号线之间。所述至少一个第一信号线和所述至少一个第二信号线中的每一条信号线与所述直流导电结构相间隔。
在一个实施例中，在所述显示区和/或所述引脚区内，所述直流导电结构位于所述至少一个第一信号线和所述至少一个第二信号线之间，并且 通过绝缘层与所述至少一个第一信号线和所述至少一个第二信号线间隔开。
在一个实施例中，所述至少一个第一信号线、所述直流导电结构和所述至少一个第二信号线分别位于沿垂直于所述基板的方向上层叠的三个不同的层中。所述至少一个第一信号线在所述基板上的正投影、所述直流导电结构在所述基板上的正投影、和所述至少一个第二信号线在所述基板上的正投影相互重叠。
在一个实施例中，所述至少一个第一信号线、所述至少一个第二信号线、和所述直流导电结构均位于同一层内。
在一个实施例中，所述直流导电结构包括通过过孔电连接的第一直流导电结构和第二直流导电结构。所述第一直流导电结构与所述至少一个第一信号线和所述至少一个第二信号线位于同一层中并且位于所述至少一个第一信号线和所述至少一个第二信号线之间。所述第二直流导电结构位于所述第一直流导电结构的远离所述基板的一侧。所述第二直流导电结构在所述基板上的正投影覆盖所述第一直流导电结构、所述至少一个第一信号线和所述至少一个第二信号线在所述基板上的正投影。
在一个实施例中，所述直流导电结构的延伸方向、所述至少一个第一信号线的延伸方向和所述至少一个第二信号线的延伸方向彼此平行。
在一个实施例中，所述至少一个第一信号线和所述至少一个第二信号线是两种不同类型的信号线。
在一个实施例中，所述至少一个第一信号线包括彼此平行的同一类型的至少一条信号线；和/或至少一个第二信号线包括彼此平行的同一类型的至少一条信号线。
在一个实施例中，所述直流导电结构的一端接地。
在一个实施例中，所述直流导电结构具有Ti/Al/Ti的层叠金属结构。
另一方面，提供一种触控显示面板，包括：上述显示基板。所述显示基板包括层叠在所述基板上的栅极层、源漏极层和触摸感应层。所述至少一个第一信号线位于所述栅极层内，所述至少一个第二信号线位于所述触 摸感应层内，直流导电结构位于所述源漏极层内。所述直流导电结构连接至所述触控显示面板的VDD电压。
在一个实施例中，所述至少一个第一信号线是显示数据信号线，所述至少一个第二信号线是触控数据信号线。
在一个实施例中，所述显示数据信号线含有钼，所述触控数据信号线含有钛铝钛。
又一方面，提供一种显示面板，包括上述显示基板。所述显示基板包括层叠在所述基板上的缓冲层、层间绝缘层、源漏极层和平坦层。所述至少一个第一信号线、所述至少一个第二信号线、和直流导电结构均位于所述源漏极层内。所述直流导电结构连接至所述显示面板的VDD电压。
在一个实施例中，所述至少一个第一信号线和所述至少一个第二信号线是选自栅极信号线、初始化信号线、数据线和重置信号线中的任意两种不同类型的信号线。
又一方面，提供一种制造显示基板的方法，所述显示基板具有显示区和位于所述显示区一侧的引脚区，所述方法包括：在基板的一侧形成从所述引脚区延伸至所述显示区的至少一个第一信号线和至少一个第二信号线；在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，使得所述至少一个第一信号线和所述至少一个第二信号线中的每一条信号线与所述直流导电结构相间隔，所述直流导电结构连接至恒定的直流电压。
在一个实施例中，在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，包括：将所述至少一个第一信号线、所述直流导电结构、和所述至少一个第二信号线分别形成在沿垂直于所述基板的方向上层叠的三个不同的层中，使得所述至少一个第一信号线在所述基板上的正投影、所述直流导电结构在所述基板上的正投影、和所述至少一个第二信号线在所述基板上的正投影相互重叠。
在一个实施例中，在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，包括：在同一层中形成所述至少一个第一信 号线、所述至少一个第二信号线、和所述直流导电结构。
在一个实施例中，所述直流导电结构包括通过过孔电连接的第一直流导电结构和第二直流导电结构。在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，包括：在同一层中形成所述第一直流导电结构、所述至少一个第一信号线和所述至少一个第二信号线，使得所述第一直流导电结构位于所述至少一个第一信号线和所述至少一个第二信号线之间；在所述第一直流导电结构的远离所述基板的一侧形成所述第二直流导电结构，使得所述第二直流导电结构在所述基板上的正投影覆盖所述第一直流导电结构、所述至少一个第一信号线和所述至少一个第二信号线在所述基板上的正投影。
附图说明
图1为根据本公开实施例的显示基板的结构的示意图；
图2为根据本公开实施例的显示基板中的直流导电结构与信号线的布局的示意图；
图3为根据本公开实施例的显示基板中直流导电结构与信号线的布局的示意图；
图4为根据本公开实施例的显示基板中直流导电结构与信号线的布局的示意图。
具体实施方式
为使本领域技术人员更好地理解本公开的技术方案，下面结合附图和具体实施方式对本公开作进一步详细描述。
本公开的发明人进行研究发现，通常显示面板的引脚区小于显示面板的显示区，引脚区内的布线较为局限，存在各信号线之间的距离过小，或是交叉走线等现象，这样会产生寄生电容，各信号线中的控制信号因为噪声而影响信号的精度，影响显示面板的性能。
本公开提供的基板及触控显示面板、显示面板，旨在至少部分地解决 相关技术的如上技术问题。
下面以具体地实施例对本公开的技术方案进行详细说明。
图1为根据本公开实施例的显示基板的结构的示意图。如图1所示，显示基板100具有显示区100a和引脚区100b。
显示基板100包括基板10、至少两种信号线130和直流导电结构120。至少两种信号线130均由引脚区100b延伸至显示区100a。
在一个实施例中，在引脚区100b内，任意两种信号线130之间设有直流导电结构120，任意两种信号线130中的每个信号线130与直流导电结构120相间隔。
在本实施例中，显示基板100的引脚区100b内，在第一信号线131与第二信号线132之间布设直流导电结构120。直流导电结构120内通入恒定的直流电压(例如，VDD直流电压)后，相当于参考电位，可以形成稳定的电场，而且直流电位很强，不易被扰动。因此，被直流导电结构120隔开的第一信号线131与第二信号线132中的脉冲信号都具备相对直流电的稳定的参考电位，可有效降低第一信号线131与第二信号线132之间的寄生影响，即可屏蔽第一信号线131与第二信号线132之间可能的相互干扰。这样能够优化空间较为局限的引脚区100b内信号传递的精度，提高设备的性能。
在一个实施例中，至少两种信号线130可以包括至少一个第一信号线131、至少一个第二信号线132……至少一个第N信号线，即用于传递不同脉冲信号的信号线130。脉冲信号可以包括显示数据信号和触控数据信号。可以理解的是，用于传递显示数据信号的信号线130即为显示数据信号线130，用于传递触控数据信号的信号线130即为触控数据信号线130。
本公开的发明人考虑到，位于显示基板100的显示区100a内的信号干扰也不容忽视。为此，本公开为显示基板100提供如下一种实现方式：
如图2-4所示，在显示区100a内，在至少两种信号线130中的两种(任意两种)信号线130之间设有直流导电结构120，两种(任意两种) 信号线130中的任一信号线130与直流导电结构120相间隔。
在本实施例中，显示基板100的显示区100a内，在第一信号线131与第二信号线132之间布设直流导电结构120，直流导电结构120内通入直流电压(例如，VDD直流电压)后，相当于参考电位，可以形成稳定的电场，而且直流电位很强，不易被扰动。因此，被直流导电结构120隔开的第一信号线131与第二信号线132中的脉冲信号都具备相对直流电的稳定的参考电位，可有效降低第一信号线131与第二信号线132之间的寄生影响，即可屏蔽第一信号线131与第二信号线132之间可能的相互干扰。这样能够优化显示基板100的显示区100a内信号传递的精度，提高设备的性能，尤其适用于小型显示屏、超清显示屏等在显示区100a布线密度较高的设备。
在一个实施例中，显示基板100的显示区100a对应显示面板的显示区。或者，显示基板100的显示区100a对应触控显示面板的触控显示区。
本公开的发明人考虑到，若信号线130的布线方式较为随意，则会出现交叉走线的现象，加大相互干扰的概率。
为此，在一个实施例中，如图2-4所示，本公开实施例的显示基板100中，至少两种信号线130并行布线。
第一信号线131和第二信号线132可以是相同种类的信号线，例如数据线。也就是说，在两条数据线之间设置直流导电结构。
在一个实施例中，第一信号线131和第二信号线132可以是两种不同种类的信号线，例如数据线和栅线。也就是说，在一条数据线和一条栅线之间设置直流导电结构。
在本实施例中，显示基板100的引脚区100b和/或显示区100a内，各种信号线130采用并行布线的方式，可以减少交叉走线的现象，降低两种信号线130可能的相互干扰，也可以提高布线空间的利用率。
在一种实施方式中，如图2所示，至少两种信号线130中的第一信号 线131位于显示基板100的第一层111，至少两种信号线130中的第二信号线132位于显示基板100的第三层113，直流导电结构120位于显示基板100的第二层112，其中，第一层111、第二层112和第三层113是三个位于不同层的层。
第二层112位于第一层111和第三层113之间。
在本实施例中，第一信号线131、第二信号线132以及直流导电结构120分别位于沿垂直于所述基板10的方向上层叠三个不同的层，直流导电结构120在显示基板100的厚度方向上将第一信号线131和第二信号线132隔开、形成屏蔽，可适用于膜层较多的设备。
在一个实施例中，至少一个第一信号线131可以包括同一类型的至少一条信号线，并且至少一个第二信号线132可以包括同一类型的至少一条信号线。如图2、3、4所示。图2中示出了第一信号线131和第二信号线132均包括同一类型的6条信号线，图3示出了第一信号线131包括同一类型的3条信号线，第二信号线132包括同一类型的4条信号线。在本实施例中，由于至少一个第一信号线包括多条第一信号线且至少一个第二信号线包括多条第二信号线，所以直流导电结构120可以是面状导电结构，使得直流导电结构120在基板10上的正投影、至少一个第一信号线131在基板10上的正投影、和至少一个第二信号线132在基板10上的正投影可以彼此重叠。
直流导电结构120的宽度可以与按顺序布置的多条第一信号线中的从第一个第一信号线至最后一个第一信号线的距离相当。直流导电结构120的宽度可以与按顺序布置的多条第二信号线中的从第一个第二信号线至最后一个第二信号线的距离相当。
但是信号线的数量不限于此，还可以至少一个第一信号线131或至少一个第二信号线132也可以采用仅一条信号线。
如图2所示，在显示区100a和/或引脚区100b中，第一信号线131的延伸方向、第二信号线132的延伸方向、直流导电结构120的延伸方向彼此平行。在第一和第二信号线131、132之间设置有直流导电结构120。 第一信号线131在基板10上的正投影、直流导电结构120在基板10上的正投影、以及第二信号线132在基板10上的正投相互重叠。
在一个实施例中，在显示区100a和/或引脚区100b内，在第一信号线131、第二信号线132交叉的交叉区域中，在第一、第二信号线131、132之间设置有直流导电结构120。在所述交叉区域中，第一信号线131在基板10上的正投影、直流导电结构120在基板10上的正投影、以及第二信号线132在基板10上的正投相互重叠。
在一种实施方式中，如图3所示，第一、第二信号线131、132与直流导电结构120均位于同一层内，即，被同一绝缘层覆盖。
在本实施例中，第一信号线131、第二信号线132以及直流导电结构120均位于同一层，直流导电结构120在平行于显示基板100的方向上将第一信号线131和第二信号线132隔开、形成屏蔽，有利于设备减薄。
如图3所示，在显示区100a和/或引脚区100b中，第一信号线131的延伸方向、第二信号线132的延伸方向和直流导电结构120的延伸方向彼此平行。
可以理解的是，第一信号线131、第二信号线132与直流导电结构120之间均进行绝缘处理，例如制作绝缘结构(绝缘层)将各信号线130与直流导电结构120绝缘隔开。
在一种实施方式中，如图4所示，直流导电结构120包括第一直流导电结构121和第二直流导电结构122。
任意两种信号线之间设有第一直流导电结构，第一、第二信号线131、132与第一直流导电结构121均位于显示基板100的第四层114，第二直流导电结构122位于显示基板100的第五层115。
所述第二直流导电结构122位于所述第一直流导电结构121和第一、第二信号线131、132的远离所述基板10的一侧。第一直流导电结构121与第二直流导电结构122通过过孔160电连接。
第二直流导电结构122在第四层114或基板10上的正投影至少覆盖第一直流导电结构121和与第一直流导电结构121相邻的第一、第二信号 线131、132在基板10上的正投影。
在本实施例中，第一直流导电结构121与第一信号线131、第二信号线132均位于显示基板100的第四层114，且第一直流导电结构121将第一信号线131与第二信号线132间隔开、形成屏蔽。第二直流导电结构122位于显示基板100的第五层115，并且第一直流导电结构121与第二直流导电结构122通过过孔160建立了电连接，即第一直流导电结构121与第二直流导电结构122具备相同的电位，第二直流导电结构122在平行于显示基板100的方向上延伸，从而与第一直流导电结构121一起对第一信号线131与第二信号线132形成一定的包裹姿势，强化了对第一信号线131、第二信号线132的屏蔽效果。
在一个实施例中，所述第二直流导电结构122在基板10上的正投影覆盖所述第一直流导电结构121在所述基板10上的正投影、并且覆盖所述第一、第二信号线131、132在所述基板10上的正投影。
第一信号线131的延伸方向、第二信号线132的延伸方向、第一直流导电结构121的延伸方向彼此平行。
在一种实施方式中，直流导电结构120的一端用于接地。
在本实施例中，直流导电结构120接地，可以将外来的干扰信号导入大地，从而避免干扰信号进入信号线130，对信号线130内的控制信号造成干扰、或造成损耗。
在一个实施例中，直流导电结构120为钛铝钛材质的金属结构。即，直流导电结构120采用Ti(钛)/Al(铝)/Ti层叠的金属结构。
基于同一发明构思，本公开实施例提供了一种触控显示面板，包括：如上述各实施例提供的任一种显示基板100。
显示基板100包括层叠在基板10上的栅极层、源漏极层和触摸感应层。
显示基板100的至少两种信号线130中的第一信号线131位于栅极层111内。
显示基板100的至少两种信号线130中的第二信号线132位于触摸感 应层113内。
显示基板100的直流导电结构120位于源漏极层112内。
在本实施例中，显示装置采用了前述各实施例提供的显示面板，其原理和技术效果请参阅前述各实施例，在此不再赘述。
在一个实施例中，显示基板100的至少两种信号线130中的第一信号线131是显示数据信号线，显示基板100的至少两种信号线130中的第二信号线132是触控数据信号线。
显示基板100的直流导电结构120是为触控显示面板供电的供电结构，直流导电结构120连接至触控显示面板的恒定直流电压VDD。
具体地，显示数据信号线131可以用钼金属制作，触控数据信号线132可以用钛铝钛金属制作。
基于同一发明构思，本公开实施例提供了一种显示面板，包括：如上述各实施例提供的任一种显示基板100。
显示基板100包括层叠在基板10上的缓冲层、层间绝缘层、源漏极层和平坦层。
显示基板100的至少两种信号线131、132和直流导电结构120均位于源漏极层111内。
在本实施例中，显示装置采用了前述各实施例提供的显示面板，其原理和技术效果请参阅前述各实施例，在此不再赘述。
在一个实施例中，显示基板100的至少两种信号线130包括栅极信号线130、初始化信号线130(其为GOA驱动电路的输入信号线stv)、数据信号线130和重置信号线130中的至少两种。
直流导电结构120为显示面板的供电结构，直流导电结构120连接至显示面板的恒定直流电压VDD。
根据本发明的一个实施例，提供一种制造显示基板的方法，所述显示基板具有显示区100a和位于所述显示区一侧的引脚区100b，所述方法包括：在基板10的一侧形成从所述引脚区100b延伸至所述显示区100a的第一、第二信号线131、132；在第一、第二信号线131、132之间形成直 流导电结构120，使得第一、第二信号线131、132中的每条信号线与所述直流导电结构120相间隔，所述直流导电结构120连接至恒定的直流电压。
将第一信号线131、第二信号线132和所述直流导电结构120分别形成在沿垂直于所述基板10的方向上层叠的三个不同的层中，使得第一信号线131在所述基板10上的正投影、第二信号线132在基板10上的正投影、与所述直流导电结构120在所述基板10上的正投影相互重叠。
可替换地，在同一层中形成所述第一信号线131、第二信号线132和所述直流导电结构120。
所述直流导电结构120包括通过过孔160电连接的第一直流导电结构121和第二直流导电结构122，
在同一层114中形成所述第一直流导电结构121、第一信号线131、和第二信号线132，使得所述第一直流导电结构120位于所述第一、第二信号线131、132之间。
在所述第一直流导电结构121的远离所述基板10的一侧形成所述第二直流导电结构122，使得所述第二直流导电结构122在所述基板10上的正投影覆盖所述第一直流导电结构121在所述基板10上的正投影、并且覆盖所述第一、第二信号线131、132在所述基板10上的正投影。
所述第一信号线和所述第二信号线是两种不同类型的信号线。
所述第一信号线包括彼此平行的同一类型的至少一条信号线。所述第二信号线包括彼此平行的同一类型的至少一条信号线。
应用本公开实施例，至少能够实现如下有益效果：
1、在任意两种信号线130之间布设直流导电结构120，直流导电结构120内通入直流电压后，可有效降低两种信号线130之间的寄生影响，即可屏蔽两种信号线130可能的相互干扰。
2、各信号线130采用并行布线的方式，可以减少交叉走线的现象，降低两种信号线130可能的相互干扰，也可以提高布线空间的利用率。
3、至少两种信号线130以及直流导电结构120分别位于不同的层，直流导电结构120在显示基板100的厚度方向上将两种信号线130隔开、形成屏蔽，可适用于膜层较多的设备。
4、至少两种信号线130以及直流导电结构120均位于同一层，直流导电结构120在显示基板100的平面方向上将两种信号线130隔开、形成屏蔽，有利于设备减薄。
5、直流导电结构120接地，可以将外来的干扰信号导入大地，从而避免干扰信号进入信号线130，对信号线130内的控制信号造成干扰、或造成损耗。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (19)

  1. 一种显示基板，具有显示区和位于所述显示区一侧的引脚区；所述显示基板包括：
    基板；以及
    至少一个第一信号线和至少一个第二信号线，所述至少一个第一信号线和所述至少一个第二信号线均位于所述基板的一侧，并且均由所述引脚区延伸至所述显示区；其中
    所述显示基板还包括直流导电结构，所述直流导电结构连接至恒定的直流电压，
    所述直流导电结构位于所述至少一个第一信号线和所述至少一个第二信号线之间、并且与所述至少一个第一信号线和所述至少一个第二信号线中的每一条信号线相间隔。
  2. 根据权利要求1所述的显示基板，其中，
    在所述显示区和/或所述引脚区内，所述直流导电结构位于所述至少一个第一信号线和所述至少一个第二信号线之间，并且通过绝缘层与所述至少一个第一信号线和所述至少一个第二信号线间隔开。
  3. 根据权利要求1或2所述的显示基板，其中，
    所述至少一个第一信号线、所述直流导电结构和所述至少一个第二信号线分别位于沿垂直于所述基板的方向上层叠的三个不同的层中，
    所述至少一个第一信号线在所述基板上的正投影、所述直流导电结构在所述基板上的正投影、和所述至少一个第二信号线在所述基板上的正投影相互重叠。
  4. 根据权利要求1或2所述的显示基板，其中，所述至少一个第一信号线、所述至少一个第二信号线、和所述直流导电结构均位于同一层内。
  5. 根据权利要求4所述的显示基板，其中，
    所述直流导电结构包括通过过孔电连接的第一直流导电结构和第二直流导电结构，
    所述第一直流导电结构与所述至少一个第一信号线和所述至少一个第二信号线位于同一层中并且位于所述至少一个第一信号线和所述至少一个第二信号线之间，
    所述第二直流导电结构位于所述第一直流导电结构的远离所述基板的一侧，
    所述第二直流导电结构在所述基板上的正投影覆盖所述第一直流导电结构、所述至少一个第一信号线和所述至少一个第二信号线在所述基板上的正投影。
  6. 根据权利要求2至4中任一项所述的显示基板，其中
    所述直流导电结构的延伸方向、所述至少一个第一信号线的延伸方向和所述至少一个第二信号线的延伸方向彼此平行。
  7. 根据权利要求1至6中任一项的显示基板，其中，
    所述至少一个第一信号线和所述至少一个第二信号线是两种不同类型的信号线。
  8. 根据权利要求7所述的显示面板，其中
    所述至少一个第一信号线包括彼此平行的同一类型的至少一条信号线；和/或
    所述至少一个第二信号线包括彼此平行的同一类型的至少一条信号线。
  9. 根据权利要求1至8中任一项所述的显示基板，其中，所述直流 导电结构的一端接地。
  10. 根据权利要求1至9中任一项所述的显示基板，其中，所述直流导电结构具有Ti/Al/Ti的层叠金属结构。
  11. 一种触控显示面板，包括：如上述权利要求1-10中任一项所述的显示基板；
    所述显示基板包括层叠在所述基板上的栅极层、源漏极层和触摸感应层；
    所述至少一个第一信号线位于所述栅极层内；
    所述至少一个第二信号线位于所述触摸感应层内；
    所述直流导电结构位于所述源漏极层内，
    所述直流导电结构连接至所述触控显示面板的VDD电压。
  12. 根据权利要求11所述的触控显示面板，其中，
    所述至少一个第一信号线是显示数据信号线，
    所述至少一个第二信号线是触控数据信号线。
  13. 根据权利要求12所述的触控显示面板，其中
    所述显示数据信号线含有钼，
    所述触控数据信号线含有钛铝钛。
  14. 一种显示面板，包括：如上述权利要求1-10中任一项所述的显示基板；
    所述显示基板包括层叠在所述基板上的缓冲层、层间绝缘层、源漏极层和平坦层；
    所述至少一个第一信号线、所述至少一个第二信号线、和直流导电结构均位于所述源漏极层内，
    所述直流导电结构连接至所述显示面板的VDD电压。
  15. 根据权利要求14所述的显示面板，其中，所述至少一个第一信号线和所述至少一个第二信号线是选自栅极信号线、初始化信号线、数据线和重置信号线中的任意两种不同类型的信号线。
  16. 一种制造显示基板的方法，所述显示基板具有显示区和位于所述显示区一侧的引脚区，所述方法包括：
    在基板的一侧形成从所述引脚区延伸至所述显示区的至少一个第一信号线和至少一个第二信号线；
    在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，使得所述至少一个第一信号线和所述至少一个第二信号线中的每一条信号线与所述直流导电结构相间隔，所述直流导电结构连接至恒定的直流电压。
  17. 根据权利要求16所述的方法，其中
    在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，包括：将所述至少一个第一信号线、所述直流导电结构、和所述至少一个第二信号线分别形成在沿垂直于所述基板的方向上层叠的三个不同的层中，使得所述至少一个第一信号线在所述基板上的正投影、所述直流导电结构在所述基板上的正投影、和所述至少一个第二信号线在所述基板上的正投影相互重叠。
  18. 根据权利要求16所述的方法，其中
    在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，包括：在同一层中形成所述至少一个第一信号线、所述至少一个第二信号线、和所述直流导电结构。
  19. 根据权利要求18所述的方法，其中，所述直流导电结构包括通过过孔电连接的第一直流导电结构和第二直流导电结构，
    在所述至少一个第一信号线和所述至少一个第二信号线之间形成直流导电结构，包括：
    在同一层中形成所述第一直流导电结构、所述至少一个第一信号线和所述至少一个第二信号线，使得所述第一直流导电结构位于所述至少一个第一信号线和所述至少一个第二信号线之间，
    在所述第一直流导电结构的远离所述基板的一侧形成所述第二直流导电结构，使得所述第二直流导电结构在所述基板上的正投影覆盖所述第一直流导电结构、所述至少一个第一信号线和所述至少一个第二信号线在所述基板上的正投影。
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