WO2024000793A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2024000793A1
WO2024000793A1 PCT/CN2022/116175 CN2022116175W WO2024000793A1 WO 2024000793 A1 WO2024000793 A1 WO 2024000793A1 CN 2022116175 W CN2022116175 W CN 2022116175W WO 2024000793 A1 WO2024000793 A1 WO 2024000793A1
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WIPO (PCT)
Prior art keywords
line
conversion
data
conversion line
display panel
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Application number
PCT/CN2022/116175
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English (en)
French (fr)
Inventor
李波
Original Assignee
武汉华星光电半导体显示技术有限公司
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Publication of WO2024000793A1 publication Critical patent/WO2024000793A1/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a display device.
  • FIG. 1 is a schematic structural diagram of a display panel 100 in the prior art.
  • the display panel has a display area AA and a non-display area NA.
  • the length of the display area AA is longer than the length of the driver chip 60 , resulting in close proximity to the display area AA.
  • the wiring connected to the data line 10 in the frame area of the display panel 100 needs to be wired diagonally in order to be electrically connected to the driver chip 60, such as the wiring in the rectangular dotted box in Figure 1. These wirings lead to the display area AA.
  • the distance from the driver chip 60 cannot be further compressed, and the lower frame of the display panel 100 cannot be narrowed.
  • Embodiments of the present application provide a display panel and a display device to solve the technical problem that existing display panels and display devices cannot narrow the lower frame of the display panel.
  • the present application provides a display panel, including a display area and a non-display area surrounding the display area;
  • the display panel also includes:
  • a plurality of data lines located in the display area and extending along the first direction and arranged along the second direction;
  • a plurality of conversion lines are located in the display area. Each of the conversion lines is connected to one of the data lines.
  • the plurality of conversion lines include a first type of conversion line and a second type of conversion line.
  • the first type of conversion line There is overlap with at least one of the data lines, the second type conversion line does not overlap with any of the data lines, and at least part of the data line close to the frame of the display panel is connected to the first type of conversion line; as well as
  • connection ports located in the non-display area and electrically connected to the driver chip
  • the conversion line is used to connect the data lines in a one-to-one correspondence with the connection ports having the same arrangement order according to the arrangement order of the data lines.
  • the plurality of data lines include a plurality of first data lines and a plurality of second data lines, and the first data lines extend between two adjacent sides of the display area.
  • the second data line extends to the side of the display area;
  • Each of the first data lines is connected to the first type conversion line, and the second type conversion line is connected to the second data line.
  • a part of the second data lines among the plurality of second data lines is connected to the first type conversion line; wherein, the first type conversion line connected to the first type conversion line Two data lines are located between the first data line and the second data line connected to the second type conversion line.
  • a part of the second data lines among the plurality of second data lines is not connected to the conversion line; wherein, the second data lines connected to the second type conversion line A line is located between the second data line not connected to the conversion line and the second data line connected to the first type conversion line.
  • each of the conversion lines includes a connected first conversion line sub-segment and a second conversion line sub-segment, and the first conversion line sub-segment extends along the second direction and along the Arranged in the first direction, the second conversion line sub-segment extends along the first direction and is arranged along the second direction;
  • the first conversion line sub-section is connected correspondingly to the data line, and an end of the second conversion line sub-section away from the connection port is connected to the first conversion line sub-section.
  • the first conversion line sub-segment of the first type conversion line connected to the first data line corresponds to part of the corner and part of the side, and is different from the first conversion line sub-segment.
  • the first conversion line sub-segment of the second type conversion line connected to the two data lines corresponds to the side portion.
  • the display panel further includes a plurality of high-level voltage signal lines extending along the first direction;
  • the orthographic projection of the second conversion line sub-segment is located in the area where the high-level voltage signal line is located.
  • the high-level voltage signal line is in the shape of a polygonal line
  • the second conversion line sub-section is in the shape of a polygonal line
  • the data line connected to the first type conversion line includes a first data sub-segment and a second data sub-segment, and the second data sub-segment is located in the first data sub-segment.
  • the first type conversion line is connected to the first data sub-segment; wherein, in the plane direction of the data line, the orthographic projection of the second conversion line sub-segment is located on the Within the area where the second data subsection is located.
  • the orthographic projection of the second conversion line sub-segment is located between two adjacent data lines.
  • the conversion line and the data line are located in different metal layers, and the conversion line is connected to the corresponding data line through a via hole.
  • the display panel further includes:
  • a driving circuit layer is provided on one side of the substrate, and the driving circuit layer includes:
  • a first passivation layer covering the side of the first source and drain metal layer away from the substrate
  • a second source and drain metal layer is provided on the side of the first passivation layer away from the substrate;
  • a third source and drain metal layer is provided on the side of the second passivation layer away from the substrate.
  • a third passivation layer covering the side of the third source and drain metal layer away from the substrate
  • the data line is located on the first source-drain metal layer or the second source-drain metal layer, and the first type conversion line and the second type conversion line are located on the third source-drain metal layer. metal layer.
  • the driving circuit layer further includes:
  • a fourth source and drain metal layer is provided on the side of the third passivation layer away from the substrate.
  • a fourth passivation layer covering the side of the fourth source and drain metal layer away from the substrate
  • the first conversion line sub-segment is located on the third source-drain metal layer
  • the second conversion line sub-segment is located on the fourth source-drain metal layer
  • the first conversion line sub-segment passes through the The via hole of the third passivation layer is connected to the second conversion line sub-segment.
  • the non-display area further includes a connection area located on one side of the display area, and the display area and the connection area are arranged along the first direction;
  • connection area is provided with a plurality of connection lines, and the connection lines are electrically connected to the conversion line or the data line.
  • connection lines extend along the first direction and are arranged along the second direction.
  • the non-display area further includes a bending area, a fan-out area and a binding area, the fan-out area is located between the bending area and the binding area, and the connection The area is located between the display area and the bending area.
  • the fan-out area includes a plurality of fan-out traces, one end of the fan-out trace is electrically connected to the connection line, and the other end of the fan-out trace is electrically connected to the connection port.
  • a plurality of the first type conversion lines are symmetrically distributed relative to the central axis of the display area, and a plurality of the second type conversion lines are symmetrically distributed relative to the central axis of the display area.
  • the present application provides a display device, including a display panel, the display panel including a display area and a non-display area surrounding the display area;
  • the display panel also includes:
  • a plurality of data lines located in the display area and extending along the first direction and arranged along the second direction;
  • a plurality of conversion lines are located in the display area. Each of the conversion lines is connected to one of the data lines.
  • the plurality of conversion lines include a first type of conversion line and a second type of conversion line.
  • the first type of conversion line There is overlap with at least one of the data lines, the second type conversion line does not overlap with any of the data lines, and at least part of the data line close to the frame of the display panel is connected to the first type of conversion line; as well as
  • connection ports located in the non-display area and electrically connected to the driver chip
  • the conversion line is used to connect the data lines in a one-to-one correspondence with the connection ports having the same arrangement order according to the arrangement order of the data lines.
  • the display panel and display device provided by this application, the display panel includes a plurality of data lines and a plurality of conversion lines located in the display area, each conversion line is connected to a data line, and the plurality of conversion lines include a first Class conversion lines and second class conversion lines.
  • the first class conversion line overlaps with at least one data line.
  • the second class conversion line does not overlap with any data line.
  • At least the data line in the area close to the display panel frame overlaps with the first class conversion line.
  • Conversion line connection The conversion line is used to electrically connect the data lines to the connection ports in the same order according to the arrangement order of the data lines.
  • Figure 1 is a schematic structural diagram of a display panel in the prior art
  • Figure 2 is a schematic diagram of a first planar structure of a display panel provided by an embodiment of the present application
  • Figure 3 is a schematic diagram of the second planar structure of the display panel provided by the embodiment of the present application.
  • Figure 4A is a schematic diagram of a partial wiring structure of a display panel provided by an embodiment of the present application.
  • Figure 4B is a schematic diagram of another local wiring structure of the display panel provided by the embodiment of the present application.
  • Figure 5A is a schematic cross-sectional structural diagram of a display panel provided by an embodiment of the present application.
  • Figure 5B is another schematic cross-sectional structural diagram of a display panel provided by an embodiment of the present application.
  • Figure 6 is a schematic diagram of a third planar structure of a display panel provided by an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a fourth planar structure of a display panel provided by an embodiment of the present application.
  • an embodiment of the present application provides a display panel 100 .
  • the display panel 100 includes a display area AA and a non-display area NA.
  • the display area AA is used to realize the display function of the display panel 100.
  • the display area AA is provided with a pixel drive circuit composed of thin film transistors and pixel units arranged in an array.
  • the pixel units are arranged in an array of multiple rows and columns.
  • the pixel driving circuit is used to drive the pixel unit to emit light to achieve picture display.
  • the non-display area is a frame of the display panel 100 , and the frame includes a lower frame.
  • the display panel 100 also includes a plurality of data lines 10, a plurality of conversion lines 11 and a plurality of connection ports.
  • a plurality of the data lines 10 and a plurality of conversion lines 11 are located in the display area AA, and a plurality of the connection ports are located in the non-display area NA.
  • the connection ports are electrically connected to the driving chip 60 , and the driving chip 60 Located in the non-display area NA, it is used to provide external signals.
  • the display panel 100 includes display panels of various sizes. According to the different sizes of the display panel 100 , the number of the driving chips 60 can be set to one or multiple, which is not the case here. Make limitations.
  • a plurality of the data lines 10 extend along the first direction and are arranged along the second direction.
  • the data lines 10 are used to provide data signals to the pixel units.
  • the display panel 100 also includes a plurality of other Signal lines, such as multiple scan lines used to provide scanning signals for pixel units, etc., are arranged to intersect with multiple data lines 10 , and extend along the second direction and along the The arrangement in the first direction is a prior art and will not be described in detail here.
  • the first direction and the second direction are different and may form a certain angle. In some examples, the first direction and the second direction are perpendicular to each other. In some examples, the first direction may be a column direction of the pixel units in the display area AA, and the second direction may be a row direction of the pixel units in the display area AA.
  • Each of the conversion lines 20 is connected to one of the data lines 10.
  • the plurality of conversion lines 20 include a first type of conversion line 21 and a second type of conversion line 22.
  • the first type of conversion line 21 is connected to at least one of the said data lines 10.
  • the data lines 10 overlap.
  • the second type conversion line 22 does not overlap with any of the data lines 10 .
  • At least part of the data line 10 in the area close to the frame of the display panel 100 overlaps with the first type conversion line. 21 connections.
  • the conversion line 20 is used to electrically connect the data lines 10 to the connection ports in the same arrangement order according to the arrangement order of the data lines 10 .
  • connection port is a pad of the display panel 100, and the connection port is electrically connected to an output pin on the driver chip 60, so as to transmit external signals through the output pin and the connection port in sequence.
  • the arrangement order of the connection ports is consistent with the arrangement order of the pins of the driver chip 60, in this application, by setting the first type conversion line 21 and the second type conversion line 22, The end of the first type conversion line 21 close to the lower frame is closer to the driver chip 60 in the second direction than the end of the connected data line 10 close to the lower frame, which is equivalent to being closer to the display.
  • One end of the data line 10 in the frame area of the panel 100 close to the lower frame moves toward the middle of the display area NA.
  • the The distance between the display area AA and the driver chip 60 is further compressed, which is beneficial to narrowing the lower border.
  • the distance d2 between the display area AA and the driver chip 60 in Figure 2 is smaller than that in Figure 1
  • the distance d1 between the display area AA and the driving chip 60 is beneficial to narrowing the lower border.
  • the first type of conversion line 21 and the second type of conversion line 22 are arranged so that the arrangement order of the data lines 10 is the same as the arrangement order of the connection ports and connected in a one-to-one correspondence, so that the data signal can be transmitted to the correct destination.
  • the above-mentioned data line 10 is conducive to avoiding poor display caused by disordered signal transmission. There is no need to change the arrangement of the original connection ports, and there is no need to develop and replace a new driver chip 60. This avoids the need for the array substrate, display panel and display The cost of the device increases and conventional wiring operations can be performed.
  • the second type conversion line 22 may be the data line 10 in an area close to the frame of the display panel 100, or may be the data line 10 in an area far away from the frame of the display panel 100 ( That is, the data line 10 located in the middle of the display panel 100). For example, as shown in FIG.
  • an corner A1 is provided between two adjacent sides A2 of the display area 100, and the plurality of data lines 10 include a plurality of first data lines. 11 and a plurality of second data lines 12.
  • the first data line 11 extends to the corner A1, and the second data line 12 extends to one of the two adjacent sides close to the lower frame.
  • the first data line 11 in the prior art needs to be directly connected to the corresponding connection port using oblique wiring, resulting in a gap between the display area AA and the driver chip 60 The distance cannot be further compressed and the lower border cannot be narrowed.
  • each of the first data lines 11 is connected to the first type conversion line 21.
  • the second type conversion line 22 is connected to the second data line 12 to ensure that the end of all the first data lines 11 close to the driver chip 60 moves from the corner A1 to the side A2, so that All the first data lines 11 do not need to be connected to the connection port in an oblique wiring manner, so that the distance between the display area NA and the driver chip 60 is further reduced, which is conducive to further narrowing the lower frame.
  • the distance d3 between the display area AA and the driving chip 60 in FIG. 3 is smaller than the distance d2 between the display area AA and the driving chip 60 in FIG. 2 .
  • the effective line segment of the first data line 11 does not need to extend to the corner A1, so that the total lengths of the first data line 11 and the second data line 12 tend to be consistent, which can improve the resistance of both.
  • the difference in capacitive load is beneficial to improving display uniformity.
  • the sum of the numbers of the first type conversion lines 21 and the second type conversion lines 22 is equal to the number of the first data lines 11 .
  • the first data line 11 in the prior art generally adopts a line-changing design, while the second data line 12 does not use
  • the wiring design specifically includes the following two methods.
  • the first is to adopt a single-layer wiring design for the conversion line used to connect the connection port and the first data line 11. Since the conversion lines overlap, It is easy to cause short circuits in the same layer wiring; the second is to adopt a multi-layer wiring design for the conversion line used to connect the connection port and the first data line 11, which will also lead to multi-layer wiring. Multi-layer capacitance is generated, resulting in poor signal transmission effect of the data line 10 and reducing the display effect.
  • the second data line 12 since at least part of the second data line 12 also adopts a line-switching design, the first type conversion lines 21 connected to the first data line 11 will not overlap, and routing on the same layer can be avoided. short circuit and multilayer capacitance conditions.
  • some of the second data lines 12 among the plurality of second data lines 12 are connected to the second type conversion lines 22 , and the remaining second data lines 12 are neither connected to the second type conversion lines 22 .
  • the first type conversion line 21 is not connected to the second type conversion line 22 .
  • some of the second data lines 12 among the plurality of second data lines 12 adopt the line switching method, and the remaining second data lines 12 do not adopt the line switching method.
  • the number of the first type conversion lines 21 is the same as the number of the first data lines 11
  • the number of the second type conversion lines 22 is smaller than the number of the second data lines 12 .
  • the number of the first data lines 11 and the second data lines 12 in the drawings is only for illustration. In actual situations, the first data lines 11 and the second data lines 12 are The number of lines 11 will be greater, and the number of second data lines 12 will be greater. As the resolution increases, the number of the data lines 10 in the display area AA also increases rapidly. For example, at a resolution of 1080*2340, the number of the first data lines 11 may be 720, and the number of the first data lines 11 may be 720. The number of the second data lines 12 may be 1440.
  • each of the conversion lines 20 includes a connected first conversion line sub-section 201 and a second conversion line sub-section 202.
  • the first conversion line sub-section 201 extends along the second direction and along the Arranged in the first direction
  • the second conversion line sub-section 202 extends along the first direction and is arranged along the second direction;
  • the first conversion line sub-section 201 is connected correspondingly to the data line 10
  • the One end of the second conversion line sub-section 202 away from the connection port is connected to the first conversion line sub-section 201 .
  • the first conversion line subsection 201 of the first type conversion line 21 overlaps with at least one of the data lines 10
  • the first conversion line subsection 20 of the second type conversion line 22 overlaps with at least one of the data lines 10 .
  • Segment 201 does not overlap with any of the data lines 10 .
  • the first conversion line sub-segment 201 of the first type conversion line 21 connected to the first data line 11 corresponds to part of the corner A1 and part of the side A2, and is in contact with the third
  • the first conversion line sub-section 201 of the second type conversion line 22 connected to the two data lines 12 corresponds to the side A2, that is, the first conversion line sub-segment 201 connected to the first data line 11
  • the first conversion line sub-segment 201 of the class conversion line 21 extends from the edge of the display area AA to the middle of the display area AA.
  • the first conversion line sub-section 201 of the first type conversion line 21 connected to the second data line 12 corresponds to the side A2.
  • the conversion line 20 can be bent once or multiple times in the display area AA.
  • the meaning of "bending once” means that, taking Figure 3 as an example, each of the conversion lines 20 can be bent once or multiple times.
  • the line 20 includes a horizontal part and a vertical part. Jumping from the horizontal part to the vertical part can be regarded as a bend.
  • the horizontal part and the vertical part may be located on the same metal layer, or they may be located on two different metal layers;
  • the meaning of “multiple bends” means that each conversion line 20 may include multiple horizontal parts and multiple vertical parts.
  • the conversion line 20 Since the resistance and capacitance of the conversion line 20 are positively correlated with its length, excessive resistance and capacitance will affect the display effect. In order to reduce the resistance and capacitance of the conversion line 20, it is necessary to minimize the number of conversion lines. The number of bends is 20 to shorten its length. Therefore, in the embodiment of the present application, the conversion line 20 is bent once in the display area AA.
  • the plurality of first-type conversion lines 21 are symmetrically distributed relative to the central axis of the display area AA
  • the plurality of second-type conversion lines 22 are symmetrically distributed relative to the central axis of the display area AA.
  • Ground the first conversion line sub-segments 201 of the plurality of first type conversion lines 21 are symmetrically distributed with respect to the central axis of the display area AA
  • the second conversion lines 201 of the plurality of first type conversion lines 21 are symmetrically distributed with respect to the central axis of the display area AA.
  • the conversion line sub-segments 202 are symmetrically distributed with respect to the central axis of the display area AA, and the first conversion line sub-segments 201 of the plurality of second conversion line sub-segments 202 are symmetrical with respect to the central axis of the display area AA. Distribution, the second conversion line sub-segments 202 of the plurality of second conversion line sub-segments 202 are symmetrically distributed relative to the central axis of the display area AA to ensure that the first data line 11 and the conversion line 20. The uniformity of the resistance, capacitance, etc. of the second data line 12 and the conversion line 20 ensures the display effect of the display panel 100 .
  • the second conversion line sub-segment 202 is located between two adjacent data lines 10 , and the second conversion line sub-segment 202 is located between the two adjacent data lines 10 .
  • the number of conversion line sub-segments can be one or multiple.
  • the display panel 100 further includes a plurality of high-level voltage signal lines 40 extending along the first direction, and the plurality of high-level voltage signal lines 40 extend along the second direction. arranged at intervals for transmitting external voltage signals to the pixel driving circuit of the display panel 100 .
  • the orthographic projection of the second conversion line sub-segment 202 is located in the area where the high-level voltage signal line 40 is located, which can avoid Capacitance is generated between the second conversion line sub-segment 202 and other metal traces in the display panel 100 .
  • the dotted frame portion in FIG. 4A represents the overlapping portion of the orthographic projection of the second conversion line sub-segment 202 and the high-level voltage signal line 40 .
  • the high-level voltage signal line 40 is in the shape of a polygonal line, so the second conversion line subsection 202 in this embodiment is also in the shape of a polygonal line.
  • the data line 10 connected to the first type conversion line 21 includes a first data sub-section 101 and a second data sub-section 102.
  • the second The data subsection 102 is located at one end of the first data subsection 101 close to the driver chip 60 , and the first type conversion line 21 is connected to the first data subsection 101 .
  • the first data sub-segment 101 is a portion of the data line 10 that has electrical properties
  • the second data sub-segment 102 is a portion of the data line that does not have electrical properties.
  • the orthographic projection of the second conversion sub-segment 22 is located in the area where the second data sub-segment 102 is located, which can avoid the second conversion line sub-segment 202 from contacting the display panel. Capacitance is created between other metal traces in 100.
  • the dotted box portion in FIG. 4B represents the overlapping portion of the orthographic projection of the second conversion sub-section 22 and the second data sub-section 102 .
  • the first type conversion line 21 and the data line 10 are located in different metal layers.
  • the first type conversion line 21 is connected to the corresponding data line 10 through a via hole.
  • the second type conversion line 22 and the data line 10 are located in different metal layers, and the second type conversion line 22 is connected to the corresponding data line 10 through a via hole.
  • the display panel 100 includes a substrate 101 and a driving circuit layer provided on one side of the substrate 101 .
  • the driving circuit layer includes a first source-drain metal layer 111, a first passivation layer 112, a second source-drain metal layer 113, a second passivation layer 114, a third source-drain metal layer 115 and a third passivation layer 115.
  • the first passivation layer 112 covers the side of the first source-drain metal layer 111 away from the substrate 101, and the second source-drain metal layer 113 is disposed on the first passivation layer 116.
  • the layer 112 is on the side away from the substrate 101, the second passivation layer 114 covers the side of the second source and drain metal layer 113 away from the substrate 101, and the third source and drain metal layer 115 is provided On the side of the second passivation layer 114 away from the substrate 101 , the third passivation layer 116 covers the side of the third source-drain metal layer 115 away from the substrate 101 .
  • the data line 10 is located in the first source-drain metal layer 111 or the second source-drain metal layer 113, and the conversion line 20 is located in the third source-drain metal layer 115.
  • FIG. 5A The data line 10 is located in the second source-drain metal layer 113, and the conversion line 20 is located in the third source-drain metal layer 115. This is explained as an example.
  • the conversion line in the embodiment of the present application adopts a single-bend design
  • the conversion line can adopt a double-layer wiring method.
  • the driving circuit layer also includes a third Four source-drain metal layers 117 and a fourth passivation layer 118.
  • the fourth source-drain metal layer 117 is provided on the side of the third passivation layer 116 away from the substrate 101.
  • the fourth passivation layer 118 Cover the fourth source and drain metal layer 117 on the side away from the substrate 101 .
  • the first conversion line sub-segment 201 is located in the third source-drain metal layer 115
  • the second conversion line sub-segment 202 is located in the fourth source-drain metal layer 118
  • the second conversion line The sub-segment 202 is connected to the first conversion line sub-segment 201 through a via hole penetrating the third passivation layer 116 .
  • the conversion line 20 may also adopt a multi-layer wiring method, which will not be described in detail here.
  • the driving circuit layer may further include at least one metal layer between the substrate 101 and the first source and drain metal layer 111.
  • the Three metal layers are provided between the substrate 101 and the first source and drain metal layer 111.
  • the three metal layers may include a light shielding layer 103, a first gate metal layer 107 and a second gate metal layer 109.
  • the conversion line 20 may be disposed in any one, two or three metal layers among the light shielding layer 103, the first gate metal layer 107 and the second gate metal layer 109.
  • one or two or even more metal layers can be added between the substrate 101 and the first source and drain metal layer 111 , and the conversion line 20 can be disposed on any layer or layer. Two metal layers or even more metal layers.
  • the display panel 100 also includes a buffer layer 102, a barrier layer 104, a semiconductor layer 105, a first gate insulating layer 106, a second gate insulating layer 108 and an interlayer dielectric layer 110.
  • the buffer layer 102 is provided On the side of the substrate 101, the light-shielding layer 103 is disposed on the side of the buffer layer 102 away from the substrate 101, and the barrier layer 104 covers the side of the light-shielding layer 103 away from the substrate 101,
  • the semiconductor layer 105 is disposed on the side of the barrier layer 104 away from the substrate 101.
  • the first gate insulating layer 106 covers the side of the semiconductor layer 105 away from the substrate 101.
  • the first gate The gate metal layer 107 is located on the side of the first gate insulating layer 106 away from the substrate 101 , and the second gate insulating layer 108 covers the side of the first gate metal layer 107 away from the substrate 101 , the second gate metal layer 109 is located on the side of the second gate insulating layer 108 away from the substrate, and the interlayer dielectric layer 110 covers the second gate insulating layer 108 away from the substrate.
  • the first source and drain metal layer 111 is located on the side of the interlayer dielectric layer 110 away from the substrate 101. Since this is an existing technology, it will not be described in detail here.
  • first type conversion lines 21 and the second type conversion lines 22 which will be described one by one below.
  • a part of the second data lines 12 among the plurality of second data lines 12 is connected to the first type conversion line 21 ; wherein, with the The second data line 12 connected to the first type conversion line 21 is located between the first data line 11 and the second data line 12 connected to the second type conversion line 22 .
  • the difference between Figure 6 and Figure 3 is that some of the second data lines 12 among the plurality of second data lines 12 are not connected to the conversion line 20; Wherein, the second data line 12 connected to the second type conversion line 22 is located between the second data line 12 not connected to the conversion line 20 and the first type conversion line 21 connected to the second data line 12 . between the second data lines 12.
  • part of the second data lines 12 does not adopt a line-switching design, and no conversion lines 20 are arranged between the two adjacent second data lines 12 in this part. , so space can be saved, and the saved space can be used to arrange other wiring.
  • the sum of the numbers of the first type conversion lines 21 and the second type conversion lines 22 is less than the sum of the numbers of the first data lines 11 and the second data lines 12 .
  • each of the first data line 11 and the second data line 12 adopts a line-changing design, which can improve the data line 10 and the conversion line of the display area AA. 20 resistance and capacitance uniformity.
  • all the second conversion line sub-sections 202 of the first type conversion lines 21 are disposed between two adjacent data lines 10 .
  • the non-display area NA also includes a connection area CA located on one side of the display area AA.
  • the display area AA and the connection area CA are along the Arranged in the first direction; the connection area CA is provided with a plurality of connection lines 30 , and the connection lines 30 are electrically connected to the conversion line 20 or the data line 10 .
  • connection line connected to the second conversion line sub-section 202 can also be Extending along the first direction and arranged in the second direction, that is, the extension direction of the plurality of connection lines 30 is consistent with the extension direction of the data line 10 , that is to say, the connection lines 30 pass through the
  • the connection area CA enters the display area AA, and the connection lines 30 do not need to be wired diagonally in the connection area CA, which can greatly reduce the width of the connection area CA, thereby reducing the width of the lower frame of the display panel 100. It is beneficial to achieve a narrow lower frame of the display panel 100 .
  • the non-display area NA also includes a bending area BA1, a fan-out area FA and a binding area BA2.
  • the fan-out area FA is located between the bending area BA1 and the binding area BA2, so
  • the connection area CA is located between the display area AA and the bending area BA1.
  • the fan-out area FA includes a plurality of fan-out traces 50 , one end of the fan-out trace 50 is electrically connected to the connection line 30 , and the other end of the fan-out trace 50 is electrically connected to the connection port.
  • the fan-out wiring 50 needs to be arranged in an oblique manner to be connected to the connection port correspondingly. Since the fan-out area FA is bent to the back of the display area AA, the width of the fan-out area FA will not affect the lower frame of the display panel 100 .
  • An embodiment of the present application also provides a display device.
  • the display device includes the display panel 100 in the above embodiment.
  • the display device may specifically be a mobile phone, computer, tablet computer, television, electronic paper, or other device with a display function, which is not limited here.
  • the display panel and display device provided by this application includes multiple data lines and multiple conversion lines located in the display area, each conversion line is connected to a data line,
  • the multiple conversion lines include a first type of conversion line and a second type of conversion line.
  • the first type of conversion line overlaps with at least one data line
  • the second type of conversion line does not overlap with any data line, at least in the area close to the display panel frame.
  • the data line is connected to the first type of conversion line, and the conversion line is used to electrically connect the data line to the connection port with the same arrangement order through the conversion line according to the arrangement order of the data lines.

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Abstract

本申请公开了一种显示面板及显示装置,显示面板包括多条数据线和多条转换线,每一条转换线连接一条数据线,第一类转换线与至少一条数据线重叠,第二类转换线与任意一条数据线不重叠,至少靠近边框的数据线与第一类转换线连接,转换线用于使数据线按照数据线的排列顺序与具有同样排列顺序的连接端口电连接,可缩窄下边框。

Description

显示面板及显示装置 技术领域
本申请涉及显示技术领域,尤其涉及一种显示面板及显示装置。
背景技术
随着显示技术的发展,用户对显示装置的屏占比要求越来越高,窄边框设计已经成为了显示装置的一大发展趋势。
请参阅图1,图1为现有技术中的显示面板100的结构示意图,显示面板具有显示区AA和非显示区NA,一般地,显示区AA的长度大于驱动芯片60的长度,导致与靠近显示面板100边框的区域的数据线10连接的走线需要采用斜向布线的方式才能与驱动芯片60电连接,如图1中的矩形虚线方框内的走线,这些走线导致显示区AA与驱动芯片60之间的距离无法进一步压缩,无法缩窄显示面板100的下边框。
技术问题
本申请实施例提供一种显示面板及显示装置,以解决现有的显示面板及显示装置无法缩窄显示面板的下边框的技术问题。
技术解决方案
为解决上述问题,本申请提供的技术方案如下:
本申请提供一种显示面板,包括显示区和围绕所述显示区的非显示区;
所述显示面板还包括:
多条数据线,位于所述显示区并沿所述第一方向延伸并沿所述第二方向排列;
多条转换线,位于所述显示区,每一条所述转换线连接一条所述数据线,多条所述转换线包括第一类转换线和第二类转换线,所述第一类转换线与至少一条所述数据线存在重叠,所述第二类转换线与任意一条所述数据线不重叠,至少部分靠近所述显示面板边框的所述数据线与所述第一类转换线连接;以及
多个连接端口,位于所述非显示区并与驱动芯片电连接;
其中,所述转换线用于使所述数据线按照所述数据线的排列顺序与具有同样排列顺序的所述连接端口一一对应连接。
根据本申请提供的显示面板,多条所述数据线包括多条第一数据线和多条第二数据线,所述第一数据线延伸至所述显示区的相邻两个侧边之间的角部,所述第二数据线延伸至所述显示区的所述侧边;
每一条所述第一数据线均与所述第一类转换线连接,所述第二类转换线与所述第二数据线连接。
根据本申请提供的显示面板,多条所述第二数据线中的一部分所述第二数据线与所述第一类转换线连接;其中,与所述第一类转换线连接的所述第二数据线位于所述第一数据线和与所述第二类转换线连接的所述第二数据线之间。
根据本申请提供的显示面板,多条所述第二数据线中的一部分所述第二数据线未与所述转换线连接;其中,与所述第二类转换线连接的所述第二数据线位于未与所述转换线连接的所述第二数据线和与所述第一类转换线连接的所述第二数据线之间。
根据本申请提供的显示面板,每一条所述转换线包括相连接的第一转换线子段和第二转换线子段,所述第一转换线子段沿所述第二方向延伸并沿所述第一方向排列,所述第二转换线子段沿所述第一方向延伸并沿所述第二方向排列;
所述第一转换线子段与所述数据线对应连接,所述第二转换线子段远离所述连接端口的一端与所述第一转换线子段连接。
根据本申请提供的显示面板,与所述第一数据线连接的所述第一类转换线的所述第一转换线子段对应部分所述角部和部分所述侧边,与所述第二数据线连接的所述第二类转换线的所述第一转换线子段对应部分所述侧边。
根据本申请提供的显示面板,所述显示面板还包括沿所述第一方向延伸的多条高电平电压信号线;
在所述高电平电压信号线所在平面上,所述第二转换线子段的正投影位于所述高电平电压信号线所在区域内。
根据本申请提供的显示面板,所述高电平电压信号线呈折线状,所述第二转换线子段呈折线状。
根据本申请提供的显示面板,与所述第一类转换线连接的所述数据线包括第一数据子段和第二数据子段,所述第二数据子段位于所述第一数据子段靠近所述驱动芯片的一端,所述第一类转换线与所述第一数据子段连接;其中,在所述数据线平面方向上,所述第二转换线子段的正投影位于所述第二数据子段所在区域内。
根据本申请提供的显示面板,在所述数据线所在平面上,所述第二转换线子段的正投影位于相邻两条所述数据线之间。
根据本申请提供的显示面板,所述转换线与所述数据线位于不同金属层,所述转换线通过过孔与对应的所述数据线连接。
根据本申请提供的显示面板,所述显示面板还包括:
衬底;
驱动电路层,设置于所述衬底一侧,所述驱动电路层包括:
第一源漏极金属层;
第一钝化层,覆盖所述第一源漏极金属层远离所述衬底一侧;
第二源漏极金属层,设置于所述第一钝化层远离所述衬底一侧;
第二钝化层,覆盖所述第二源漏极金属层远离所述衬底一侧;
第三源漏极金属层,设置于所述第二钝化层远离所述衬底一侧;以及
第三钝化层,覆盖所述第三源漏极金属层远离所述衬底一侧;
其中,所述数据线位于所述第一源漏极金属层或所述第二源漏极金属层,所述第一类转换线和所述第二类转换线位于所述第三源漏极金属层。
根据本申请提供的显示面板,所述驱动电路层还包括:
第四源漏极金属层,设置于所述第三钝化层远离所述衬底一侧;以及
第四钝化层,覆盖所述第四源漏极金属层远离所述衬底一侧;
所述第一转换线子段位于所述第三源漏极金属层,所述第二转换线子段位于所述第四源漏极金属层,所述第一转换线子段通过贯穿所述第三钝化层的过孔与所述第二转换线子段连接。
根据本申请提供的显示面板,所述非显示区还包括位于所述显示区一侧的连接区,所述显示区和所述连接区沿所述第一方向排列;
所述连接区设置有多条连接线,所述连接线与所述转换线或所述数据线电连接。
根据本申请提供的显示面板,所述连接线沿所述第一方向延伸并沿所述第二方向排列。
根据本申请提供的显示面板,所述非显示区还包括弯折区、扇出区和绑定区,所述扇出区位于所述弯折区和所述绑定区之间,所述连接区位于所述显示区和所述弯折区之间。
根据本申请提供的显示面板,所述扇出区包括多条扇出走线,所述扇出走线的一端与所述连接线电连接,所述扇出走线的另一端与所述连接端口电连接。
根据本申请提供的显示面板,多条所述第一类转换线相对于所述显示区的中轴线对称分布,多条所述第二类转换线相对与所述显示区的中轴线对称分布。
本申请提供一种显示装置,包括显示面板,所述显示面板包括显示区和围绕所述显示区的非显示区;
所述显示面板还包括:
多条数据线,位于所述显示区并沿所述第一方向延伸并沿所述第二方向排列;
多条转换线,位于所述显示区,每一条所述转换线连接一条所述数据线,多条所述转换线包括第一类转换线和第二类转换线,所述第一类转换线与至少一条所述数据线存在重叠,所述第二类转换线与任意一条所述数据线不重叠,至少部分靠近所述显示面板边框的所述数据线与所述第一类转换线连接;以及
多个连接端口,位于所述非显示区并与驱动芯片电连接;
其中,所述转换线用于使所述数据线按照所述数据线的排列顺序与具有同样排列顺序的所述连接端口一一对应连接。
有益效果
本申请的有益效果为:本申请提供的显示面板及显示装置,显示面板包括位于显示区的多条数据线和多条转换线,每一条转换线连接一条数据线,多条转换线包括第一类转换线和第二类转换线,第一类转换线与至少一条数据线存在重叠,第二类转换线与任意一条数据线不重叠,至少靠近显示面板边框的区域的数据线与第一类转换线连接,转换线用于使数据线按照数据线的排列顺序与具有同样排列顺序的连接端口电连接,如此,在保证数据线与连接端口一一对应连接的前提下,由于第一类转换线靠近下边框的一端相较于数据线靠近下边框的一端在第二方向上更靠近所述驱动芯片,相当于靠近下边框的一端向显示区的中部移动,使得显示区与驱动芯片之间的距离进一步压缩,有利于缩窄下边框。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是现有技术中的显示面板的结构示意图;
图2是本申请实施例提供的显示面板的第一种平面结构示意图;
图3是本申请实施例提供的显示面板的第二种平面结构示意图;
图4A是本申请实施例提供的显示面板的一种局部布线结构示意图;
图4B是本申请实施例提供的显示面板的另一种局部布线结构示意图;
图5A是本申请实施例提供的显示面板的一种截面结构示意图;
图5B是本申请实施例提供的显示面板的另一种截面结构示意图;
图6是本申请实施例提供的显示面板的第三种平面结构示意图;
图7是本申请实施例提供的显示面板的第四种平面结构示意图。
本发明的实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。此外,应当理解的是,此处所描述的具体实施方式仅用于说明和解释本申请,并不用于限制本申请。在本申请中,在未作相反说明的情况下,使用的方位词如“上”和“下”通常是指装置实际使用或工作状态下的上和下,具体为附图中的图面方向;而“内”和“外”则是针对装置的轮廓而言的。
请参阅图2,本申请实施例提供一种显示面板100,所述显示面板100包括显示区AA和非显示区NA。
所述显示区AA用于实现显示面板100的显示功能,在所述显示区AA内设置有薄膜晶体管构成的像素驱动电路和呈阵列排布的像素单元,像素单元呈多行多列阵列排布,像素驱动电路用于驱动像素单元发光以实现画面显示。所述非显示区为所述显示面板100的边框,所述边框包括下边框。
所述显示面板100还包括多条数据线10、多条转换线11和多个连接端口。多条所述数据线10和多条转换线11位于所述显示区AA,多个所述连接端口位于所述非显示区NA,所述连接端口与驱动芯片60电连接,所述驱动芯片60位于所述非显示区NA,用于提供外部信号。
需要说明的是,所述显示面板100包括各种尺寸的显示面板,根据所述显示面板100的不同尺寸,所述驱动芯片60的数量可以设置为一个,也可设置为多个,在此不做限定。
多条所述数据线10沿所述第一方向延伸并沿所述第二方向排列,所述数据线10用于为像素单元提供数据信号,当然地,所述显示面板100还包括多条其它信号走线,例如用于为像素单元提供扫描信号的多条扫描线等,多条扫描线与多条所述数据线10交叉设置,多条所述扫描线沿所述第二方向延伸并沿所述第一方向排列,此为现有技术,在此不再详述。
所述第一方向和所述第二方向不同,可呈一定角度。在一些示例中,所述第一方向与所述第二方向相互垂直。在一些示例中,所述第一方向可为所述显示区AA中像素单元的列方向,所述第二方向可为所述显示区AA中像素单元的行方向。
每一条所述转换线20连接一条所述数据线10,多条所述转换线20包括第一类转换线21和第二类转换线22,所述第一类转换线21与至少一条所述数据线10存在重叠,所述第二类转换线22与任意一条所述数据线10不重叠,至少部分靠近所述显示面板100边框的区域的所述数据线10与所述第一类转换线21连接。其中,所述转换线20用于使所述数据线10按照所述数据线10的排列顺序与具有同样排列顺序的所述连接端口电连接。
所述连接端口为所述显示面板100的焊盘,所述连接端口与所述驱动芯片60上的输出引脚电连接,以将外部信号依次通过所述输出引脚、所述连接端口传递至所述数据线10。
可以理解的是,由于所述连接端口的排列顺序与所述驱动芯片60的引脚的排列顺序一致,本申请通过设置所述第一类转换线21和所述第二类转换线22,所述第一类转换线21靠近下边框的一端相较于其连接的所述数据线10靠近下边框的一端在所述第二方向上更靠近所述驱动芯片60,相当于将靠近所述显示面板100边框的区域的所述数据线10靠近下边框的一端向所述显示区NA的中部移动,在保证所述数据线10与所述连接端口一一对应连接的前提下,能够使得所述显示区AA与所述驱动芯片60之间的距离进一步压缩,有利于缩窄下边框,例如,图2中的所述显示区AA与所述驱动芯片60之间的距离d2小于图1中的所述显示区AA与所述驱动芯片60之间的距离d1。
所述第一类转换线21和所述第二类转换线22的设置使得所述数据线10的排列顺序与连接端口的排列顺序相同并一一对应连接,使得数据信号能够传输至正确的所述数据线10,有利于避免信号传递发生错乱而引起的显示不良,不需要更改原有的连接端口的排列顺序,也不需要研发更换新的驱动芯片60,避免了阵列基板、显示面板和显示装置成本的增加,可进行常规的布线操作。
在本申请中,所述第二类转换线22可以为靠近所述显示面板100边框的区域的所述数据线10,也可为远离所述显示面板100边框的区域的所述数据线10(即位于所述显示面板100中部的所述数据线10),示例性地,如图2所示,一部分靠近所述显示面板100边框的区域的所述数据线10与所述第一类转换线21连接,另一部分靠近所述显示面板100边框的区域的所述数据线10与所述第二类转换线22连接,其中,与所述第一类转换线21或所述第二类转换线22连接的所述数据线10相邻设置,所述第二类转换线22相较于所述第一类转换线21更远离所述显示面板100的左右边框。
进一步地,在一种实施例中,请参阅图3,所述显示区100的两个相邻侧边A2之间设置有角部A1,多条所述数据线10包括多条第一数据线11和多条第二数据线12,所述第一数据线11延伸至所述角部A1,所述第二数据线12延伸至两个相邻所述侧边中靠近所述下边框的一个所述侧边A2。如背景技术所述,现有技术中的所述第一数据线11需采用斜向布线的方式直接与对应的所述连接端口连接,导致所述显示区AA与所述驱动芯片60之间的距离无法进一步压缩,无法缩窄下边框。
而不同的是,本申请通过设置所述第一类转换线21和所述第二类转换线22,每一条所述第一数据线11均与所述第一类转换线21连接,所述第二类转换线22与所述第二数据线12连接,能够保证所有所述第一数据线11靠近所述驱动芯片60的一端均从所述角部A1移动至所述侧边A2,使得所有所述第一数据线11均无需采用斜向布线的方式与所述连接端口连接,使得所述显示区NA与所述驱动芯片60之间的距离进一步压缩,有利于进一步缩窄下边框,例如,图3中的所述显示区AA与所述驱动芯片60之间的距离d3小于图2中的所述显示区AA与所述驱动芯片60之间的距离d2。而且,所述第一数据线11的有效线段无需延伸至所述角部A1,使得所述第一数据线11和所述第二数据线12的总长度趋于一致,能够改善两者的电阻电容负载差异,有利于提升显示均一性。
此时,所述第一类转换线21和所述第二类转换线22的数量之和等于所述第一数据线11的数量。
此外,为了保证多条所述数据线10均与所述连接端口按照正确顺序连接,现有技术中的所述第一数据线11一般采用换线设计,而所述第二数据线12不采用换线设计,具体包括以下两种方式,第一种为,将用于连接所述连接端口和所述第一数据线11的转换线采用单层走线设计,则由于转换线发生交叠,容易导致同层走线短路情况;第二种为,将用于连接所述连接端口和所述第一数据线11的转换线采用多层走线设计,则又会导致多层走线之间产生多层电容,从而导致所述数据线10的信号传输效果较差,降低了显示效果。
而本申请由于至少部分所述第二数据线12也采用换线设计,则使得连接所述第一数据线11的所述第一类转换线21不会产生交叠,可避免同层走线短路和产生多层电容情况。
具体地,在图3中,多条所述第二数据线12中的一部分所述第二数据线12与所述第二类转换线22连接,其余所述第二数据线12既不与所述第一类转换线21连接,也不与所述第二类转换线22连接。简单地说,多条所述第二数据线12中的一部分所述第二数据线12采用换线方式,其余所述第二数据线12不采用换线方式。此时,所述第一类转换线21的数量与所述第一数据线11的数量相同,所述第二类转换线22的数量小于所述第二数据线12的数量。
需要说明的是,为了方便描述本申请提供的技术方案,附图中的所述第一数据线11和所述第二数据线12的数量只是作为示意,在实际情况中,所述第一数据线11的数量会更多,所述第二数据线12的数量会更多。随着分辨率的提高,所述显示区AA的所述数据线10的数量也急速增加,例如,1080*2340分辨率下,所述第一数据线11的数量可为720条,所述第二数据线12的数量可为1440条。
具体地,每一条所述转换线20包括相连接的第一转换线子段201和第二转换线子段202,所述第一转换线子段201沿所述第二方向延伸并沿所述第一方向排列,所述第二转换线子段202沿所述第一方向延伸并沿所述第二方向排列;所述第一转换线子段201与所述数据线10对应连接,所述第二转换线子段202远离所述连接端口的一端与所述第一转换线子段201连接。
在本申请中,所述第一类转换线21的所述第一转换线子段201与至少一条所述数据线10存在重叠,所述第二类转换线22的所述第一转换线子段201与任意一条所述数据线10不重叠。
具体地,与所述第一数据线11连接的所述第一类转换线21的所述第一转换线子段201对应部分所述角部A1和部分所述侧边A2,与所述第二数据线12连接的所述第二类转换线22的所述第一转换线子段201对应部分所述侧边A2,也就是说,与所述第一数据线11连接的所述第一类转换线21的所述第一转换线子段201从所述显示区AA的边缘延伸至所述显示区AA的中部。
同样地,与所述第二数据线12连接的所述第一类转换线21的所述第一转换线子段201对应部分所述侧边A2。
需要说明的是,所述转换线20在所述显示区AA中可一次弯折,也可多次弯折,“一次弯折”的含义是指,以图3为例,每一条所述转换线20包括一个水平部分和一个竖直部分,从水平部分跳转到竖直部分可看作一次弯折,水平部分和竖直部分可位于同一金属层,也可位于两个不同的金属层;“多次弯折”的含义是指每一条所述转换线20可以包括多个水平部分和多个竖直部分。
由于所述转换线20的阻值及容值等与其长度呈正相关,阻值及容值过大影响显示效果,为了降低所述转换线20的阻值及容值,需尽量减少所述转换线20的弯折次数,以缩短其长度,故在本申请实施例中,所述转换线20在所述显示区AA中一次弯折。
具体地,多条所述第一类转换线21相对于所述显示区AA的中轴线对称分布,多条所述第二类转换线22相对与所述显示区AA的中轴线对称分布,具体地,多条所述第一类转换线21的所述第一转换线子段201相对于所述显示区AA的中轴线对称分布,多条所述第一类转换线21的所述第二转换线子段202相对于所述显示区AA的中轴线对称分布,多条所述第二转换线子段202的所述第一转换线子段201相对于所述显示区AA的中轴线对称分布,多条所述第二转换线子段202的所述第二转换线子段202相对于所述显示区AA的中轴线对称分布,以保证所述第一数据线11和所述转换线20、以及所述第二数据线12和所述转换线20的阻值、容值等的均一性,保证包括显示面板100的显示效果。
在所述数据线10所在平面上,所述第二转换线子段202位于相邻两条所述数据线10之间,位于所述相邻两条所述数据线之间的所述第二转换线子段的数量可以为1条,也可以为多条。
进一步地,请参阅图4A,所述显示面板100还包括沿所述第一方向延伸的多条高电平电压信号线40,多条所述高电平电压信号线40沿所述第二方向间隔排列,用于将外部电压信号传递至显示面板100的像素驱动电路。在一种实施例中,在所述高电平电压信号线40所在平面上,所述第二转换线子段202的正投影位于所述高电平电压信号线40所在区域内,能够避免所述第二转换线子段202与显示面板100中的其它金属走线之间产生电容。其中,图4A中的虚线框部分表示所述第二转换线子段202的正投影与所述高电平电压信号线40的重叠部分。
具体地,所述高电平电压信号线40呈折线状,故本实施例中的所述第二转换线子段202也呈折线状。
在一种实施例中,请参阅图2和图4B,与所述第一类转换线21连接的所述数据线10包括第一数据子段101和第二数据子段102,所述第二数据子段102位于所述第一数据子段101靠近所述驱动芯片60的一端,所述第一类转换线21与所述第一数据子段101连接。所述第一数据子段101为所述数据线10存在电性的部分,所述第二数据子段102为所述数据线没有电性的部分。其中,在所述数据线10平面方向上,所述第二转换子段22的正投影位于所述第二数据子段102所在区域内,能够避免所述第二转换线子段202与显示面板100中的其它金属走线之间产生电容。其中,图4B中的虚线框部分表示所述第二转换子段22的正投影与所述第二数据子段102的重叠部分。
具体地,请参阅图5A和图5B,所述第一类转换线21与所述数据线10位于不同金属层,所述第一类转换线21通过过孔与对应的所述数据线10连接;所述第二类转换线22与所述数据线10位于不同金属层,所述第二类转换线22通过过孔与对应的所述数据线10连接。
在本申请实施例中,如图5A所示,所述显示面板100包括衬底101和设置于所述衬底101一侧的驱动电路层。所述驱动电路层包括第一源漏极金属层111、第一钝化层112、第二源漏极金属层113、第二钝化层114、第三源漏极金属层115和第三钝化层116,所述第一钝化层112覆盖所述第一源漏极金属层111远离所述衬底101一侧,所述第二源漏极金属层113设置于所述第一钝化层112远离所述衬底101一侧,所述第二钝化层114覆盖所述第二源漏极金属层113远离所述衬底101一侧,所述第三源漏极金属层115设置于所述第二钝化层114远离所述衬底101一侧,所述第三钝化层116覆盖所述第三源漏极金属层115远离所述衬底101一侧。其中,所述数据线10位于所述第一源漏极金属层111或所述第二源漏极金属层113,所述转换线20位于所述第三源漏极金属层115,图5A以所述数据线10位于所述第二源漏极金属层113,所述转换线20位于所述第三源漏极金属层115为例进行阐述说明。
进一步地,由于本申请实施例中的所述转换线采用一次弯折的设计,故所述转换线可采用双层布线方式,具体地,如图5B所示,所述驱动电路层还包括第四源漏极金属层117和第四钝化层118,所述第四源漏极金属层117设置于所述第三钝化层116远离所述衬底101一侧,第四钝化层118覆盖所述第四源漏极金属层117远离所述衬底101一侧。其中,所述第一转换线子段201位于所述第三源漏极金属层115,所述第二转换线子段202位于所述第四源漏极金属层118,所述第二转换线子段202通过贯穿所述第三钝化层116的过孔与所述第一转换线子段201连接。
当然地,若所述转换线20采用多次弯折的设计,则相应地,所述转换线20还可采用多层布线方式,在此不再详述。
进一步地,所述驱动电路层在所述衬底101和所述第一源漏极金属层111之间还可包括至少一层金属层,以图5A和图5B中的显示面板为例,所述衬底101和所述第一源漏极金属层111之间设置有三层金属层,三层金属层可以包括遮光层103、第一栅极金属层107和第二栅极金属层109,所述转换线20可设置于所述遮光层103、所述第一栅极金属层107和所述第二栅极金属层109中的任意一层、两层或三层金属层中。当然地,在所述衬底101和所述第一源漏极金属层111之间还可另外增设一层或两层甚至更多层金属层,所述转换线20可设置于任意一层或两层金属层甚至更多层金属层中。
具体地,所述显示面板100还包括缓冲层102、阻隔层104、半导体层105、第一栅极绝缘层106、第二栅极绝缘层108和层间介质层110,所述缓冲层102设置于所述衬底101一侧,所述遮光层103设置于所述缓冲层102远离所述衬底101一侧,所述阻隔层104覆盖所述遮光层103远离所述衬底101一侧,所述半导体层105设置于所述阻隔层104远离所述衬底101一侧,所述第一栅极绝缘层106覆盖所述半导体层105远离所述衬底101一侧,所述第一栅极金属层107位于所述第一栅极绝缘层106远离所述衬底101一侧,所述第二栅极绝缘层108覆盖所述第一栅极金属层107远离所述衬底101一侧,所述第二栅极金属层109位于所述第二栅极绝缘层108远离所述衬底一侧,所述层间介质层110覆盖所述第二栅极绝缘层108远离所述衬底101一侧,所述第一源漏极金属层111位于所述层间介质层110远离所述衬底101一侧,由于此为现有技术,故在此不再进行详述。
进一步地,所述第一类转换线21和所述第二类转换线22存在多种排布方式,以下将进行一一阐述。
在一种实施例中,请参阅图6和图7,多条所述第二数据线12中的一部分所述第二数据线12与所述第一类转换线21连接;其中,与所述第一类转换线21连接的所述第二数据线12位于所述第一数据线11和与所述第二类转换线22连接的所述第二数据线12之间。
第一种情况,如图6所示,图6与图3的不同之处在于,多条所述第二数据线12中的一部分所述第二数据线12未与所述转换线20连接;其中,与所述第二类转换线22连接的所述第二数据线12位于未与所述转换线20连接的所述第二数据线12和与所述第一类转换线21连接的所述第二数据线12之间。简单地说,此种情况下,部分所述第二数据线12未采用换线设计,且此部分的相邻两条所述第二数据线12之间也未排布任何所述转换线20,故可节省空间,节省出的空间可用于排布其它走线。
此时,所述第一类转换线21和所述第二类转换线22的数量之和小于所述第一数据线11和所述第二数据线12的数量之和。
第二种情况,如图7所示,图7与图6的不同之处在于,多条所述第二数据线12中的一部分所述第二数据线12与所述第一类转换线21连接,其余所述第二数据线12与所述第二类转换线22连接。简单地说,此种情况下,每一条所述第一数据线11和所述第二数据线12均采用换线设计,能够提升所述显示区AA的所述数据线10和所述转换线20的阻值、容值的均一性。在本实施例中,全部所述第一类转换线21的所述第二转换线子段202设置于相邻两条所述数据线10之间。
请继续参阅图2-图3、图6-图7,所述非显示区NA还包括位于所述显示区AA一侧的连接区CA,所述显示区AA和所述连接区CA沿所述第一方向排列;所述连接区CA设置有多条连接线30,所述连接线30与所述转换线20或所述数据线10电连接。
进一步地,如图3、图6和图7,由于所述第二转换线子段202沿所述第一方向延伸,则与所述第二转换线子段202连接的所述连接线也可以沿所述第一方向延伸且所述第二方向排列,也即多条所述连接线30的延伸方向与所述数据线10的延伸方向一致,也就是说,所述连接线30经所述连接区CA进入所述显示区AA,所述连接线30无需在所述连接区CA采用斜向布线方式,能够大大降低所述连接区CA的宽度,从而减小显示面板100下边框的宽度,有利于实现显示面板100的下窄边框。
进一步地,所述非显示区NA还包括弯折区BA1、扇出区FA和绑定区BA2,所述扇出区FA位于所述弯折区BA1和所述绑定区BA2之间,所述连接区CA位于所述显示区AA和所述弯折区BA1之间,通过将所述扇出区FA设置在所述弯折区BA1和所述绑定区BA2之间,所述弯折区BA1设置在所述连接区CA和所述显示区AA之间,通过将所述扇出区FA设置于所述显示区AA的背面,可以进一步减少下边框,有利于实现极窄边框。
所述扇出区FA包括多条扇出走线50,所述扇出走线50的一端与所述连接线30电连接,所述扇出走线50的另一端与所述连接端口电连接。当多条所述转换线排布较为密集时,例如图7中的所述转换线20,所述扇出走线50需采用斜向布线方式,以与所述连接端口对应连接。由于所述扇出区FA弯折至所述显示区AA背部,因此,所述扇出区FA的宽度大小不会影响所述显示面板100的下边框。
本申请实施例还提供一种显示装置。该显示装置包括上述实施例中的显示面板100。所述显示装置具体可为手机、计算机、平板电脑、电视、电子纸等具有显示功能的装置,在此并不限定。
有益效果为:本申请提供的显示面板及显示装置,本申请提供的显示面板及显示装置,显示面板包括位于显示区的多条数据线和多条转换线,每一条转换线连接一条数据线,多条转换线包括第一类转换线和第二类转换线,第一类转换线与至少一条数据线存在重叠,第二类转换线与任意一条数据线不重叠,至少靠近显示面板边框的区域的数据线与第一类转换线连接,转换线用于使数据线通过所述转换线按照数据线的排列顺序与具有同样排列顺序的连接端口电连接,如此,在保证数据线与连接端口一一对应连接的前提下,由于第一类转换线靠近下边框的一端相较于数据线靠近下边框的一端在第二方向上更靠近所述驱动芯片,相当于靠近下边框的一端向显示区的中部移动,使得显示区与驱动芯片之间的距离进一步压缩,有利于缩窄下边框。
综上所述,虽然本申请已以优选实施例揭露如上,但上述优选实施例并非用以限制本申请,本领域的普通技术人员,在不脱离本申请的精神和范围内,均可作各种更动与润饰,因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板,包括显示区和围绕所述显示区的非显示区;
    所述显示面板还包括:
    多条数据线,位于所述显示区并沿所述第一方向延伸并沿所述第二方向排列;
    多条转换线,位于所述显示区,每一条所述转换线连接一条所述数据线,多条所述转换线包括第一类转换线和第二类转换线,所述第一类转换线与至少一条所述数据线存在重叠,所述第二类转换线与任意一条所述数据线不重叠,至少部分靠近所述显示面板边框的所述数据线与所述第一类转换线连接;以及
    多个连接端口,位于所述非显示区并与驱动芯片电连接;
    其中,所述转换线用于使所述数据线按照所述数据线的排列顺序与具有同样排列顺序的所述连接端口一一对应连接。
  2. 根据权利要求1所述的显示面板,其中,多条所述数据线包括多条第一数据线和多条第二数据线,所述第一数据线延伸至所述显示区的相邻两个侧边之间的角部,所述第二数据线延伸至所述显示区的所述侧边;
    每一条所述第一数据线均与所述第一类转换线连接,所述第二类转换线与所述第二数据线连接。
  3. 根据权利要求2所述的显示面板,其中,多条所述第二数据线中的一部分所述第二数据线与所述第一类转换线连接;其中,与所述第一类转换线连接的所述第二数据线位于所述第一数据线和与所述第二类转换线连接的所述第二数据线之间。
  4. 根据权利要求3所述的显示面板,其中,多条所述第二数据线中的一部分所述第二数据线未与所述转换线连接;其中,与所述第二类转换线连接的所述第二数据线位于未与所述转换线连接的所述第二数据线和与所述第一类转换线连接的所述第二数据线之间。
  5. 根据权利要求3所述的显示面板,其中,多条所述第二数据线中的一部分所述第二数据线与所述第一类转换线连接,其余所述第二数据线与所述第二类转换线连接。
  6. 根据权利要求1所述的显示面板,其中,每一条所述转换线包括相连接的第一转换线子段和第二转换线子段,所述第一转换线子段沿所述第二方向延伸并沿所述第一方向排列,所述第二转换线子段沿所述第一方向延伸并沿所述第二方向排列;
    所述第一转换线子段与所述数据线对应连接,所述第二转换线子段远离所述连接端口的一端与所述第一转换线子段连接。
  7. 根据权利要求6所述的显示面板,其中,与所述第一数据线连接的所述第一类转换线的所述第一转换线子段对应部分所述角部和部分所述侧边,与所述第二数据线连接的所述第二类转换线的所述第一转换线子段对应部分所述侧边。
  8. 根据权利要求6所述的显示面板,其中,所述显示面板还包括沿所述第一方向延伸的多条高电平电压信号线;
    在所述高电平电压信号线所在平面上,所述第二转换线子段的正投影位于所述高电平电压信号线所在区域内。
  9. 根据权利要求8所述的显示面板,其中,所述高电平电压信号线呈折线状,所述第二转换线子段呈折线状。
  10. 根据权利要求6所述的显示面板,其中,与所述第一类转换线连接的所述数据线包括第一数据子段和第二数据子段,所述第二数据子段位于所述第一数据子段靠近所述驱动芯片的一端,所述第一类转换线与所述第一数据子段连接;其中,在所述数据线平面方向上,所述第二转换线子段的正投影位于所述第二数据子段所在区域内。
  11. 根据权利要求6所述的显示面板,其中,在所述数据线所在平面上,所述第二转换线子段的正投影位于相邻两条所述数据线之间。
  12. 根据权利要求6所述的显示面板,其中,所述转换线与所述数据线位于不同金属层,所述转换线通过过孔与对应的所述数据线连接。
  13. 根据权利要求12所述的显示面板,其中,所述显示面板还包括:
    衬底;
    驱动电路层,设置于所述衬底一侧,所述驱动电路层包括:
    第一源漏极金属层;
    第一钝化层,覆盖所述第一源漏极金属层远离所述衬底一侧;
    第二源漏极金属层,设置于所述第一钝化层远离所述衬底一侧;
    第二钝化层,覆盖所述第二源漏极金属层远离所述衬底一侧;
    第三源漏极金属层,设置于所述第二钝化层远离所述衬底一侧;以及
    第三钝化层,覆盖所述第三源漏极金属层远离所述衬底一侧;
    其中,所述数据线位于所述第一源漏极金属层或所述第二源漏极金属层,所述第一类转换线和所述第二类转换线位于所述第三源漏极金属层。
  14. 根据权利要求13所述的显示面板,其中,所述驱动电路层还包括:
    第四源漏极金属层,设置于所述第三钝化层远离所述衬底一侧;以及
    第四钝化层,覆盖所述第四源漏极金属层远离所述衬底一侧;
    所述第一转换线子段位于所述第三源漏极金属层,所述第二转换线子段位于所述第四源漏极金属层,所述第一转换线子段通过贯穿所述第三钝化层的过孔与所述第二转换线子段连接。
  15. 根据权利要求1所述的显示面板,其中,所述非显示区还包括位于所述显示区一侧的连接区,所述显示区和所述连接区沿所述第一方向排列;
    所述连接区设置有多条连接线,所述连接线与所述转换线或所述数据线电连接。
  16. 根据权利要求15所述的显示面板,其中,所述连接线沿所述第一方向延伸并沿所述第二方向排列。
  17. 根据权利要求15所述的显示面板,其中,所述非显示区还包括弯折区、扇出区和绑定区,所述扇出区位于所述弯折区和所述绑定区之间,所述连接区位于所述显示区和所述弯折区之间。
  18. 根据权利要求17所述的显示面板,其中,所述扇出区包括多条扇出走线,所述扇出走线的一端与所述连接线电连接,所述扇出走线的另一端与所述连接端口电连接。
  19. 根据权利要求1所述的显示面板,其中,多条所述第一类转换线相对于所述显示区的中轴线对称分布,多条所述第二类转换线相对与所述显示区的中轴线对称分布。
  20. 一种显示装置,包括显示面板,所述显示面板包括显示区和围绕所述显示区的非显示区;
    所述显示面板还包括:
    多条数据线,位于所述显示区并沿所述第一方向延伸并沿所述第二方向排列;
    多条转换线,位于所述显示区,每一条所述转换线连接一条所述数据线,多条所述转换线包括第一类转换线和第二类转换线,所述第一类转换线与至少一条所述数据线存在重叠,所述第二类转换线与任意一条所述数据线不重叠,至少部分靠近所述显示面板边框的所述数据线与所述第一类转换线连接;以及
    多个连接端口,位于所述非显示区并与驱动芯片电连接;
    其中,所述转换线用于使所述数据线按照所述数据线的排列顺序与具有同样排列顺序的所述连接端口一一对应连接。
PCT/CN2022/116175 2022-06-30 2022-08-31 显示面板及显示装置 WO2024000793A1 (zh)

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