WO2021227192A1 - 一种显示面板及拼接屏 - Google Patents

一种显示面板及拼接屏 Download PDF

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Publication number
WO2021227192A1
WO2021227192A1 PCT/CN2020/096507 CN2020096507W WO2021227192A1 WO 2021227192 A1 WO2021227192 A1 WO 2021227192A1 CN 2020096507 W CN2020096507 W CN 2020096507W WO 2021227192 A1 WO2021227192 A1 WO 2021227192A1
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Prior art keywords
electrode
layer
pixel definition
display panel
emitting device
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PCT/CN2020/096507
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English (en)
French (fr)
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卢马才
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2021227192A1 publication Critical patent/WO2021227192A1/zh

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/127Active-matrix OLED [AMOLED] displays comprising two substrates, e.g. display comprising OLED array and TFT driving circuitry on different substrates
    • H10K59/1275Electrical connections of the two substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/18Tiled displays

Definitions

  • the present invention relates to the field of display technology, in particular to a display panel and a splicing screen.
  • welding leads are usually arranged below the display area, and the welding leads are used to connect with an external driving chip.
  • the area where the welding leads are located cannot be used for display, so that the display panel inevitably has a frame, which reduces the area of the display area.
  • the object of the present invention is to provide a display panel and a splicing screen, which can increase the area of the display area and reduce the frame of the display panel.
  • the present invention provides a display panel, including:
  • a drive substrate which includes a thin film transistor
  • the display part is arranged on the drive substrate, the display part includes a light-emitting device; the light-emitting device is connected to the thin film transistor;
  • Welding leads are arranged on the display part
  • the flexible connector is connected with the welding lead.
  • the present invention also provides a splicing screen, which includes at least two display panels spliced together.
  • the display panel and the splicing screen of the present invention include a drive substrate, which includes a thin film transistor; a display portion, which is provided on the drive substrate, the display portion includes a light emitting device; the light emitting device is connected to the thin film transistor; and welding leads , Arranged on the display part; a flexible connector connected with the welding lead; since the welding lead is made above the light emitting device, the welding lead is located in the display area, so the area of the display area can be increased.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • FIG. 2 is a top view of the display panel in FIG. 1;
  • FIG. 3 is a schematic structural diagram of the first step and the second step of a manufacturing method of a display panel according to an embodiment of the present invention
  • FIG. 4 is a schematic structural diagram of the third step of a manufacturing method of a display panel according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of the fourth and fifth steps of the manufacturing method of the display panel according to an embodiment of the present invention.
  • FIG. 6 is a top view of the display panel in FIG. 5.
  • the display panel of the present invention includes: a driving substrate, a display portion, soldering leads, and a flexible connector.
  • the driving substrate includes thin film transistors.
  • the display part is arranged on the driving substrate, and the display part includes a light-emitting device; the light-emitting device is connected to the thin film transistor.
  • the welding lead is arranged on the display part, and the flexible connector is connected with the welding lead.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • the display panel of this embodiment includes: a driving substrate 10, a pixel defining layer 23, a display portion (not shown in the figure), and soldering leads 30.
  • the driving substrate 10 includes a thin film transistor, and a first electrode 191, a second electrode 192, and a connecting portion 193 provided on the thin film transistor; the first electrode 191 is connected to the drain electrode 182 of the thin film transistor.
  • the cross-sectional structure of the driving substrate 10 may further include a base substrate 11, and a buffer layer 13, a semiconductor layer 14, a gate insulating layer 15, a gate 16, and a first insulating layer 17 which are sequentially disposed on the base substrate 11. ,
  • the material of the semiconductor layer 14 is a metal oxide, such as at least one of IZO, IGO, IGTO, and IGZTO.
  • the base substrate 11 may also be provided with a light-shielding layer 12, and the light-shielding layer 12 covers the semiconductor layer 14.
  • the material of the light-shielding layer 12 may be a metal material, for example, including at least one of Mo, Al, and Cu.
  • the light-shielding layer 12 may have a single-layer structure or a multilayer structure.
  • the second metal layer 18 includes a source electrode 181, a drain electrode 182 and an auxiliary line 183, and the auxiliary line 183 is connected to the connection part 193.
  • the first electrode 191, the second electrode 192, and the connecting portion 193 are located on the same layer, that is, all are located on the conductive layer 19.
  • the display part includes a light emitting device 20.
  • the pixel defining layer 23 is provided on the driving substrate 10, and the pixel defining layer 23 is provided with a first opening area and a second opening area (none of which are shown in the figure); the position and the position of the first electrode 191 are The position of the second electrode 192 corresponds to the position of the first opening area, and the position of the connecting portion 193 corresponds to the position of the second opening area;
  • the light emitting device 20 is located in the first opening area, the third electrode 21 of the light emitting device 20 is connected to the first electrode 191, and the fourth electrode 22 of the light emitting device 20 is connected to the second electrode 192 .
  • the light-emitting device 20 includes a miniature light-emitting diode, and may also include an organic light-emitting diode.
  • the light-emitting device 20 is a miniature light-emitting diode.
  • the bonding wire 30 is provided on the pixel defining layer 23 and the connecting portion 193.
  • the material of the welding lead 30 includes at least one of a metal material and a transparent metal oxide.
  • the bonding wire 30 may be a laminated structure of Al/ITO or a laminated structure of Cu/ITO.
  • the display panel may further include a flexible connector 40 which is connected to the soldering leads 30 provided on the pixel definition layer 23.
  • the end of the flexible connector 40 is connected to the driving chip 50.
  • the height of the pixel definition layer 23 is greater than the height of the light emitting device 20.
  • the display panel further includes an encapsulation layer 24, the encapsulation layer 24 is located on the light-emitting device 20, and the encapsulation layer 24 The height of is smaller than the height of the pixel definition layer 23.
  • the difference between the height of the encapsulation layer 24 and the height of the pixel definition layer 23 is within a preset range, so as to avoid the welding lead from being broken during the manufacturing process.
  • the bonding wire 30 is provided on the pixel defining layer 23, the packaging layer 24 and the connecting portion 193.
  • flexible connectors 40 may be provided on both the upper side and the right side of the display panel.
  • the present invention also provides a manufacturing method of a display panel, which includes the following steps:
  • the material of the buffer layer 13 may be a stack of SiOx, SiNx/SiOx, or a stack of AlOx/SiOx.
  • a whole layer of semiconductor material is deposited on the buffer layer 13 and patterned to form the semiconductor layer 14.
  • the material of the gate insulating layer 15 may be a stack of SiOx, SiNx, AlOx, and SiNx/SiOx.
  • the material of the first metal layer can be a stack of Cu/Mo, a stack of Cu/Mo/Ti, a stack of Cu/Ti, a stack of Al/Mo, Cu, Nb alloys, etc., through the first metal layer
  • the gate electrode 16 is formed by patterning.
  • the material of the first insulating layer 17 is SiOx, a stack of SiOx/SiNx, or the like.
  • the first insulating layer 17 is provided with a via hole connecting the source electrode and the drain electrode.
  • the material of the second metal layer 18 can be a Cu/Mo laminate, Cu/Mo/Ti laminate, Cu/Ti laminate, Al/Mo laminate, Cu, Nb alloy, etc., and the second metal
  • the layer 18 is patterned to form a source electrode 181, a drain electrode 182 and an auxiliary line 183, and the auxiliary line 183 is connected to the connecting portion 193.
  • the material of the second insulating layer 19' may be at least one of SiOx, SiNx, and SiONx.
  • a connection hole is provided on the second insulating layer 19'.
  • the material of the conductive layer 19 may be metals such as Mo/Cu, Cu, or transparent metal oxides, such as ITO.
  • the first electrode 191, the second electrode 192, and the connecting portion 193 are formed by patterning the conductive layer.
  • the auxiliary wire 183 is connected to the connecting portion 193 through a connecting hole.
  • the drain 182 is connected to the first electrode 191 through a connection hole.
  • an entire pixel definition layer is fabricated on the conductive layer, and then patterned to form a first opening area and a second opening area.
  • the third electrode 21 of the light emitting device 20 is connected to the first electrode 191, and the fourth electrode 22 of the light emitting device 20 is connected to the second electrode 192.
  • the third electrode 21 can be an anode
  • the fourth electrode 22 can be a cathode.
  • the first electrode 191 is an anode
  • the second electrode 192 is a cathode.
  • an encapsulation layer 24 is fabricated on the light-emitting device 20, and solder leads 30 are fabricated on the pixel definition layer 23, the encapsulation layer 24 and the connecting portion 193.
  • the welding lead 30 can be manufactured by an evaporation process.
  • the welding leads 30 can be located on one or both sides of the display panel, for example, the welding leads 30 are located on the upper side and the right side, so the area of the display area can be increased.
  • the arrangement of the welding leads is not limited to this. Since the bonding wire 30 is located on the top of the display panel, and the display panel has a bottom emission structure, the display panel can display normally. In addition, since the width of the welding lead 30 is small, the influence on the aperture ratio is negligible.
  • flexible connectors 40 may be provided on both the upper side and the right side of the display panel. Then, the end of the flexible connector 40 is connected to the driving chip 50, and then the flexible connector 40 is bent to the back of the display panel.
  • the binding position of the flexible connector is not limited to this, and the number is not limited to this. In one embodiment,
  • the welding leads are fabricated above the light emitting device, the welding leads are located in the display area, so the area of the display area can be increased.
  • the present invention also provides a splicing screen, which is formed by splicing at least two display panels, and the display panel is any of the above-mentioned display panels.
  • the super-large area splicing screen is formed by splicing several small display panels together to reduce the cost.
  • the splicing screen of the present invention is formed by splicing display panels without borders, the size of the splicing seams of the splicing screen can be smaller, avoiding several dark areas in the display area, and improving the display quality.
  • the display panel and the splicing screen of the present invention include a drive substrate, which includes a thin film transistor; a display portion, which is provided on the drive substrate, the display portion includes a light emitting device; the light emitting device is connected to the thin film transistor; and welding leads , Arranged on the display part; a flexible connector connected with the welding lead; since the welding lead is made above the light emitting device, the welding lead is located in the display area, so the area of the display area can be increased.

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Abstract

一种显示面板及拼接屏,该显示面板包括:驱动基板(10),其包括薄膜晶体管;显示部,设于所述驱动基板(10)上,所述显示部包括发光器件(20);所述发光器件(20)与所述薄膜晶体管连接;焊接引线(30),设于所述显示部上;柔性连接器(40),与所述焊接引线(30)连接。

Description

一种显示面板及拼接屏 技术领域
本发明涉及显示技术领域,特别是涉及一种显示面板及拼接屏。
背景技术
在显示领域里,如LCD、OLED、LED显示面板等,通常都是在显示区域的下方设置有焊接引线,该焊接引线用于与外部的驱动芯片连接。
技术问题
焊接引线所在的区域无法用于显示,从而使得显示面板无可避免地存在边框,降低了显示区域的面积。
技术解决方案
本发明的目的在于提供一种显示面板及拼接屏,能够增大显示区域的面积和减小显示面板的边框。
为解决上述技术问题,本发明提供一种显示面板,包括:
驱动基板,其包括薄膜晶体管;
显示部,设于所述驱动基板上,所述显示部包括发光器件;所述发光器件与所述薄膜晶体管连接;
焊接引线,设于所述显示部上;
柔性连接器,与所述焊接引线连接。
本发明还提供一种拼接屏,其包括上述至少两个显示面板拼接而成。
有益效果
本发明的显示面板及拼接屏,包括驱动基板,其包括薄膜晶体管;显示部,设于所述驱动基板上,所述显示部包括发光器件;所述发光器件与所述薄膜晶体管连接;焊接引线,设于所述显示部上;柔性连接器,与所述焊接引线连接;由于将焊接引线制作在发光器件上方,使得焊接引线位于显示区域内,因此可以增大显示区域的面积。
附图说明
图1为本发明一实施方式的显示面板的结构示意图;
图2为图1中的显示面板的俯视图;
图3为本发明一实施方式的显示面板的制作方法的第一步和第二步的结构示意图;
图4为本发明一实施方式的显示面板的制作方法的第三步的结构示意图;
图5为本发明一实施方式的显示面板的制作方法的第四步和第五步的结构示意图;
图6为图5中的显示面板的俯视图。
本发明的实施方式
以下各实施例的说明是参考附加的图式,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是以相同标号表示。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别不同对象,而不是用于描述特定顺序。此外,术语“包括”和“具有”以及它们任何变形,意图在于覆盖不排他的包含。
在一实施例中,本发明的显示面板包括:驱动基板、显示部、焊接引线以及柔性连接器。驱动基板包括薄膜晶体管。显示部设于所述驱动基板上,所述显示部包括发光器件;所述发光器件与所述薄膜晶体管连接。焊接引线设于所述显示部上,柔性连接器与所述焊接引线连接。
请参照图1,图1为本发明一实施方式的显示面板的结构示意图。
本实施例的显示面板,包括:驱动基板10、像素定义层23、显示部(图中未标出)以及焊接引线30。
驱动基板10其包括薄膜晶体管以及设于薄膜晶体管上的第一电极191、第二电极192以及连接部193;所述第一电极191与所述薄膜晶体管的漏极182连接。
所述驱动基板10的截面结构还可包括衬底基板11、以及依次设于所述衬底基板11上的缓冲层13、半导体层14、栅绝缘层15、栅极16、第一绝缘层17、第二金属层18、第二绝缘层19'以及导电层19。在一实施方式中,该半导体层14的材料为金属氧化物,比如包括IZO、IGO、IGTO以及IGZTO中的至少一种。其中衬底基板11上还可设置有遮光层12,所述遮光层12覆盖半导体层14。遮光层12的材料可以为金属材料,比如包括Mo、Al、Cu中的至少一种,遮光层12可以为单层结构,也可为多层结构。
为了减小连接部的电阻,在一实施方式中,所述第二金属层18包括源极181、漏极182以及辅助线183,所述辅助线183与所述连接部193连接。
在一实施方式中,第一电极191、第二电极192以及连接部193位于同一层,也即都位于导电层19。
显示部包括发光器件20。
像素定义层23设于所述驱动基板10上,所述像素定义层23上设置有第一开口区域和第二开口区域(图中均未标出);所述第一电极191的位置和所述第二电极192的位置均与所述第一开口区域的位置对应,所述连接部193的位置与所述第二开口区域的位置对应;
发光器件20位于所述第一开口区域内,且所述发光器件20的第三电极21与所述第一电极191连接,所述发光器件20的第四电极22与所述第二电极192连接。所述发光器件20包括微型发光二极管,此外还可包括有机发光二极管。优选地,为了提高显示效果,所述发光器件20为微型发光二极管。
焊接引线30设于所述像素定义层23和所述连接部193上。在一实施方式中,为了减小走线的阻抗,所述焊接引线30的材料包括金属材料和透明金属氧化物中至少的一种。焊接引线30可以为Al/ITO的叠层结构或者Cu/ITO的叠层结构。
在一实施方式中,所述显示面板还可包括柔性连接器40,所述柔性连接器40与设于所述像素定义层23上的焊接引线30连接。其中在一实施方式中,柔性连接器40的端部与驱动芯片50连接。在一实施方式中,为了避免在绑定柔性连接器的过程中损坏发光器件,所述像素定义层23的高度大于所述发光器件20的高度。在另一实施格式中,了避免在绑定柔性连接器的过程中损坏发光器件,所述显示面板还包括封装层24,所述封装层24位于所述发光器件20上,所述封装层24的高度小于所述像素定义层23的高度。优选地,所述封装层24的高度与所述像素定义层23的高度之间的差值位于预设范围内,从而避免焊接引线在制作过程中出现断裂。此时,所述焊接引线30设于所述像素定义层23、所述封装层24以及所述连接部193上。
柔性连接器的数量不限于此。如图2所示,在一实施方式中,可在显示面板的上侧和右侧均设置柔性连接器40。
本发明还提供一种显示面板的制作方法,其包括以下步骤:
S101、制作驱动基板10;
如图3所示,在衬底基板11上依次制作遮光层12、缓冲层13、半导体层14、栅绝缘层15、第一金属层、第一绝缘层17、第二金属层18、第二绝缘层19'以及导电层19。
缓冲层13的材料可以为SiOx、SiNx/SiOx的叠层,AlOx/SiOx的叠层。
在缓冲层13上沉积整层半导体材料,并对其图案化形成半导体层14。
栅绝缘层15的材料可为SiOx、SiNx、AlOx以及SiNx/SiOx的叠层。
第一金属层的材料可以为Cu/Mo的叠层、Cu/Mo/Ti的叠层、Cu/Ti的叠层、Al/Mo的叠层,Cu、Nb合金等,通过对第一金属层进行图案化形成栅极16。
第一绝缘层17的材料为SiOx、SiOx/SiNx的叠层等。第一绝缘层17设置有连接源极和漏极的过孔。
第二金属层18的材料可以为Cu/Mo的叠层、Cu/Mo/Ti的叠层、Cu/Ti的叠层、Al/Mo的叠层以及Cu、Nb合金等,通过对第二金属层18进行图案化形成源极181、漏极182以及辅助线183,所述辅助线183与所述连接部193连接。
第二绝缘层19'的材料可以为SiOx、SiNx、SiONx之中的至少一种。第二绝缘层19'上设置有连接孔。
导电层19的材料可以为Mo/Cu、Cu等金属或者透明金属氧化物,比如ITO等。通过对导电层进行图案化处理形成第一电极191、第二电极192以及连接部193。所述辅助线183通过连接孔与所述连接部193连接。所述漏极182通过连接孔与所述第一电极191连接。
S102、在所述导电层19上制作像素定义层23;
如图3所示,在导电层上制作整层像素定义层,之后对其进行图案化处理,形成第一开口区域和第二开口区域。
S103、在第一开口区域内绑定发光器件。
如图4所示,比如将发光器件20的第三电极21与第一电极191进行连接,将发光器件20的第四电极22与第二电极192进行连接,在一实施方式中,第三电极21可阳极,第四电极22可为阴极。第一电极191为阳极,第二电极192为阴极。
S104、在发光器件上制作封装层,并在所述像素定义层、所述封装层以及所述连接部上制作焊接引线。
如图5所示,在发光器件20上制作封装层24,并在所述像素定义层23、所述封装层24以及所述连接部193上制作焊接引线30。
焊接引线30可以通过蒸镀工艺制作。在俯视图下,如图6所示,焊接引线30可位于显示面板的其中一侧或者两侧,比如焊接引线30位于上侧和右侧,因此可以增大显示区域的面积。当然焊接引线的设置方式不限于此。由于焊接引线30位于显示面板的顶部,且显示面板为底发射结构,因此显示面板是可以正常显示的。且由于焊接引线30的宽度较小,因此对开口率的影响可忽略不计。
S105、将焊接引线与柔性连接器进行连接。
返回图1,例如将柔性连接器40与焊接引线30进行绑定。在一实施方式中,如图2所示,可在显示面板的上侧和右侧均设置柔性连接器40。之后将柔性连接器40的端部与驱动芯片50连接,之后将柔性连接器40弯折至显示面板的背面。当然,柔性连接器的绑定位置不限于此,数量也不限于此。其中在一实施方式中,
由于将焊接引线制作在发光器件上方,因此使得焊接引线位于显示区域内,因此可以增大显示区域的面积。
本发明还提供一种拼接屏,其由至少两个显示面板拼接而成,该显示面板为上述任意一种显示面板。
由于单个拼接屏的面积越大,制作成本越高,因此超大面积的拼接屏采用若干块小的显示面板拼接在一起形成,以降低成本。且由于本发明的拼接屏采用无边框的显示面板拼接而成,因此可以较小拼接屏的拼接缝的尺寸,避免显示区域出现若干条暗区,提高了显示品质。
本发明的显示面板及拼接屏,包括驱动基板,其包括薄膜晶体管;显示部,设于所述驱动基板上,所述显示部包括发光器件;所述发光器件与所述薄膜晶体管连接;焊接引线,设于所述显示部上;柔性连接器,与所述焊接引线连接;由于将焊接引线制作在发光器件上方,使得焊接引线位于显示区域内,因此可以增大显示区域的面积。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板,其包括:
    驱动基板,其包括薄膜晶体管;
    显示部,设于所述驱动基板上,所述显示部包括发光器件;所述发光器件与所述薄膜晶体管连接;
    焊接引线,设于所述显示部上;以及
    柔性连接器,与所述焊接引线连接。
  2. 根据权利要求1所述的显示面板,其中所述显示面板还包括像素定义层,所述像素定义层设于所述驱动基板与所述显示部之间;
    所述驱动基板上还设置有第一电极和第二电极,所述第一电极与所述薄膜晶体管的漏极连接;
    所述像素定义层上设置有第一开口区域;所述第一电极的位置和所述第二电极的位置均与所述第一开口区域的位置对应;
    所述发光器件位于所述第一开口区域内,且所述发光器件的第三电极与所述第一电极连接,所述发光器件的第四电极与所述第二电极连接;
    所述焊接引线设于所述像素定义层和所述连接部上。
  3. 根据权利要求2所述的显示面板,其中
    所述像素定义层的高度大于所述发光器件的高度。
  4. 根据权利要求2所述的显示面板,其中
    所述柔性连接器与设于所述像素定义层上的焊接引线连接。
  5. 根据权利要求2所述的显示面板,其中
    所述显示面板还包括封装层,所述封装层位于所述发光器件上,所述封装层的高度小于所述像素定义层的高度。
  6. 根据权利要求5所述的显示面板,其中
    所述焊接引线设于所述像素定义层、所述封装层以及所述连接部上。
  7. 根据权利要求6所述的显示面板,其中
    所述封装层的高度与所述像素定义层的高度之间的差值位于预设范围内。
  8. 根据权利要求2所述的显示面板,其中
    所述驱动基板上还设置有连接部;所述像素定义层上还设置有第二开口区域;所述连接部的位置与所述第二开口区域的位置对应;
    所述驱动基板的截面结构包括第二金属层,所述第二金属层包括源极、漏极以及辅助线,所辅助线与所述连接部连接。
  9. 根据权利要求1所述的显示面板,其中
    所述焊接引线的材料包括金属材料和透明金属氧化物中至少的一种。
  10. 根据权利要求9所述的显示面板,其中
    所述焊接引线为Al/ITO的叠层结构或者Cu/ITO的叠层结构。
  11. 一种拼接屏,其由至少两个显示面板拼接而成,其包括:
    驱动基板,其包括薄膜晶体管;
    显示部,设于所述驱动基板上,所述显示部包括发光器件;所述发光器件与所述薄膜晶体管连接;
    焊接引线,设于所述显示部上;以及
    柔性连接器,与所述焊接引线连接。
  12. 根据权利要求11所述的拼接屏,其中所述显示面板还包括像素定义层,所述像素定义层设于所述驱动基板与所述显示部之间;
    所述驱动基板上还设置有第一电极和第二电极,所述第一电极与所述薄膜晶体管的漏极连接;
    所述像素定义层上设置有第一开口区域;所述第一电极的位置和所述第二电极的位置均与所述第一开口区域的位置对应;
    所述发光器件位于所述第一开口区域内,且所述发光器件的第三电极与所述第一电极连接,所述发光器件的第四电极与所述第二电极连接;
    所述焊接引线设于所述像素定义层和所述连接部上。
  13. 根据权利要求12所述的拼接屏,其中
    所述像素定义层的高度大于所述发光器件的高度。
  14. 根据权利要求12所述的拼接屏,其中
    所述柔性连接器与设于所述像素定义层上的焊接引线连接。
  15. 根据权利要求12所述的拼接屏,其中
    所述显示面板还包括封装层,所述封装层位于所述发光器件上,所述封装层的高度小于所述像素定义层的高度。
  16. 根据权利要求15所述的拼接屏,其中
    所述焊接引线设于所述像素定义层、所述封装层以及所述连接部上。
  17. 根据权利要求16所述的拼接屏,其中
    所述封装层的高度与所述像素定义层的高度之间的差值位于预设范围内。
  18. 根据权利要求12所述的拼接屏,其中
    所述驱动基板上还设置有连接部;所述像素定义层上还设置有第二开口区域;所述连接部的位置与所述第二开口区域的位置对应;
    所述驱动基板的截面结构包括第二金属层,所述第二金属层包括源极、漏极以及辅助线,所辅助线与所述连接部连接。
  19. 根据权利要求11所述的拼接屏,其中
    所述焊接引线的材料包括金属材料和透明金属氧化物中至少的一种。
  20. 根据权利要求19所述的拼接屏,其中
    所述焊接引线为Al/ITO的叠层结构或者Cu/ITO的叠层结构。
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