WO2021226750A1 - 显示基板、显示面板、显示装置及显示面板的制造方法 - Google Patents

显示基板、显示面板、显示装置及显示面板的制造方法 Download PDF

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Publication number
WO2021226750A1
WO2021226750A1 PCT/CN2020/089413 CN2020089413W WO2021226750A1 WO 2021226750 A1 WO2021226750 A1 WO 2021226750A1 CN 2020089413 W CN2020089413 W CN 2020089413W WO 2021226750 A1 WO2021226750 A1 WO 2021226750A1
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WIPO (PCT)
Prior art keywords
display
layer
groove
substrate
opening
Prior art date
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Ceased
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PCT/CN2020/089413
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English (en)
French (fr)
Chinese (zh)
Inventor
侯瑞
王玉林
鲍建东
李振
赵鹏程
常乐
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202080000697.6A priority Critical patent/CN113950712B/zh
Priority to US17/267,146 priority patent/US12563896B2/en
Priority to EP20897666.2A priority patent/EP4148710A4/en
Priority to PCT/CN2020/089413 priority patent/WO2021226750A1/zh
Priority to JP2021572620A priority patent/JP7722193B2/ja
Priority to PCT/CN2021/076057 priority patent/WO2021227581A1/zh
Priority to US17/425,300 priority patent/US20220320465A1/en
Priority to EP21758036.4A priority patent/EP4148800A4/en
Priority to CN202180000191.XA priority patent/CN113924654B/zh
Publication of WO2021226750A1 publication Critical patent/WO2021226750A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/871—Self-supporting sealing arrangements
    • H10K59/8722—Peripheral sealing arrangements, e.g. adhesives, sealants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H10K59/873—Encapsulations
    • H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/80—Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells

Definitions

  • the present disclosure relates to the field of display, and in particular to a manufacturing method of a display substrate, a display panel, a display device, and a display panel.
  • OLED Organic Light-Emitting Diode
  • OLED has an organic compound film that emits light in response to current, in which an organic material is sandwiched between two electrodes, and at least one electrode is a light-transmitting electrode.
  • OLED has better light-emitting performance and efficiency, and requires a lower driving voltage, so it is a good candidate for use as a display screen.
  • a display substrate including: a display area, the display area including: a plurality of sides, adjacent sides of the plurality of sides intersect to form a plurality of corners; A first display area with a pixel density; and a second display area with a second pixel density, the second pixel density is lower than the first pixel density, wherein the second display area is located at the plurality of corners At least one of the department.
  • the second display area includes: a stretchable substrate, including a plurality of opening patterns distributed along the surface of the stretchable substrate, wherein each of the plurality of opening patterns
  • An opening pattern includes a plurality of first openings, and a plurality of bridge regions capable of enclosing an island region are formed between at least a part of the plurality of first openings adjacent to the first opening; a plurality of display units, respectively Are arranged on the island area formed by each opening pattern; and a plurality of wiring units are respectively connected between the plurality of display units and are respectively arranged in the plurality of bridge areas.
  • At least one of the plurality of display units includes: a first planarization layer located on the front side of the stretchable substrate along the light emitting direction of the display substrate; and supporting spacers located on the front side of the stretchable substrate.
  • the first planarization layer is on a side away from the stretchable substrate and has a first groove; the first electrode layer is located on the side of the first planarization layer away from the stretchable substrate, And cover the support spacer; a first inorganic encapsulation layer, located on the side of the first electrode layer away from the stretchable substrate, and covering the first electrode layer; and a first organic encapsulation layer, covering The portion of the first inorganic encapsulation layer located at the first groove and the portion on the side of the first groove away from the first opening are not covered by the first inorganic encapsulation layer. The part between the first groove and the first opening.
  • the first groove includes a continuous groove extending along the length of the first opening.
  • the groove width of the continuous groove is about 5-15 ⁇ m, and the groove height is about 1.5-2.5 ⁇ m.
  • the first groove includes at least one row of discrete grooves arranged in a direction perpendicular to the length direction of the first opening, and each row of discrete grooves includes a row of discrete grooves along the first opening. A plurality of discrete grooves arranged at intervals in the length direction.
  • the groove width of the plurality of discrete grooves is about 5-10 ⁇ m, and the groove height is about 1.5-2.5 ⁇ m.
  • the at least one row of discrete grooves includes multiple rows of discrete grooves, and the distance between adjacent rows of discrete grooves in the multiple rows of discrete grooves is about 2-7 ⁇ m.
  • the distance between the first groove and the first opening is about less than 30 ⁇ m.
  • At least one of the plurality of display units further includes: a first isolation structure, located between the first groove and the first opening, configured to isolate the first The first electrode layers on both sides of the structure are disconnected, wherein the first electrode layer covers the first isolation structure and is located on the side of the first isolation structure adjacent to the first groove and adjacent to the One side of the first opening.
  • At least one of the plurality of display units further includes: a first passivation layer located between the support spacer and the first opening, and the first passivation layer At least partly located on the side of the first planarization layer away from the stretchable substrate; wherein, the first isolation structure includes at least one of the first passivation layer and the first planarization layer In the second groove, the first electrode layer covered on the bottom of the at least one second groove and the first electrode layer covered on the surface of the first passivation layer are disconnected from each other.
  • the groove width of the at least one second groove is about 3-10 ⁇ m, and the groove height is about 1000-3000 nm.
  • At least one of the plurality of display units further includes: an interlayer insulating layer located on the front side of the stretchable substrate along the light emitting direction of the display substrate; wherein, the first The isolation structure includes at least one first bump on the surface of the interlayer insulating layer away from the stretchable substrate, and the first electrode layer covers the top of the at least one first bump and the On part of the surface of the interlayer insulating layer, the first electrode layer located on the top of the at least one first bump and the first electrode layer located on the surface of the interlayer insulating layer are disconnected from each other.
  • the protrusion width of the at least one first bump is about 3-10 ⁇ m, and the protrusion height is about 400-800 nm.
  • At least one of the plurality of wiring units includes: a second planarization layer located on the front side of the stretchable substrate along the light emitting direction of the display substrate; and a pixel definition layer located on The second planarization layer is far away from the stretchable substrate, covers a part of the surface of the second planarization layer, and has at least one third groove; and a third electrode layer covering the at least The bottom of a third groove, the surface of the pixel definition layer, and the part of the surface of the second planarization layer that is not covered by the pixel definition layer; wherein, the bottom of the at least one third groove covers the first The three electrode layer and the third electrode layer covering the surface of the pixel definition layer are disconnected from each other.
  • the number of third grooves in the at least one third groove is the same as the number of second grooves in the at least one second groove.
  • At least one second groove communicates with each other to form a closed ring around the first opening.
  • At least one of the plurality of wiring units includes: a gate insulating layer located on the front side of the stretchable substrate along the light emitting direction of the display substrate; at least one second bump , Located on the surface of the gate insulating layer away from the stretchable substrate; a third electrode layer, covering the top of the at least one second bump and the gate insulating layer is not covered by the at least one Part of the surface covered by the second bump; wherein the third electrode layer covered on the top of the at least one second bump and the third electrode layer covered on the surface of the gate insulating layer are disconnected from each other.
  • the number of second bumps in the at least one second bump is the same as the number of first bumps in the at least one first bump, and the at least one second bump and the At least one first protrusion communicates with each other to form a closed ring around the first opening.
  • the opening width of at least one of the plurality of first openings gradually decreases along the light emitting direction of the display substrate, and at least part of the sidewalls of the openings and the stretchable liner The surface of the bottom away from the plurality of display units and the side of the plurality of wiring units forms an angle.
  • the included angle is about 50° to 80°.
  • At least one of the plurality of wiring units includes: at least one inorganic encapsulation layer located on the front side of the stretchable substrate along the light emitting direction of the display substrate; and an organic coating, It is located at the front side of the inorganic encapsulation layer farthest from the stretchable substrate in the at least one inorganic encapsulation layer along the light emission direction of the display substrate, and has a coating pattern.
  • the coating pattern includes at least one second opening, and the length direction of the at least one second opening is parallel to the length direction of the adjacent first opening.
  • a display panel including: the aforementioned display substrate; and a cover plate, which is located on the light-emitting side of the display substrate and is packaged with the display substrate.
  • a display device including: the aforementioned display panel.
  • a method for manufacturing a display panel including: providing a display substrate, wherein the display substrate has a display area, the display area includes a plurality of sides, and Adjacent sides intersect to form a plurality of corners.
  • the display area includes a first display area with a first pixel density and a second display area with a second pixel density.
  • the second pixel density is lower than the first pixel density.
  • Pixel density, the second display area is located at at least one of the corners; and a cover plate is provided, and the cover plate and the display substrate are packaged on the light emitting side of the display substrate.
  • FIG. 1 is a schematic structural diagram of an embodiment of a display panel according to the present disclosure
  • FIG. 2 is a schematic diagram of the layout of a display substrate in an embodiment of a display panel according to the present disclosure
  • FIG. 3 is a schematic diagram of a plurality of opening patterns distributed on the surface of a stretchable substrate in an embodiment of a display panel according to the present disclosure
  • FIG. 4 is a schematic structural diagram of a portion of a display substrate corresponding to a second display area formed on a glass substrate in an embodiment of a display panel according to the present disclosure
  • FIG. 5 is a schematic structural diagram of a portion of the display substrate corresponding to the second display area separated from the glass substrate in an embodiment of the display panel according to the present disclosure
  • FIGS. 6 and 7 are respectively structural schematic diagrams in which a portion of the display substrate corresponding to the second display area is formed on the glass substrate in some embodiments of the display panel according to the present disclosure
  • FIGS 8 and 9 are respectively schematic diagrams of the arrangement of the island area, the first opening and the bridge area in some embodiments of the display panel according to the present disclosure
  • FIGS. 10 and 11 are respectively schematic cross-sectional views of the first groove in some embodiments of the display panel according to the present disclosure.
  • FIG. 12 is a schematic flowchart of an embodiment of a method for manufacturing a display panel according to the present disclosure.
  • a specific device when it is described that a specific device is located between the first device and the second device, there may or may not be an intermediate device between the specific device and the first device or the second device.
  • the specific device When it is described that a specific device is connected to another device, the specific device may be directly connected to the other device without an intervening device, or may not be directly connected to the other device but with an intervening device.
  • flexible OLEDs use polymer materials as protective cover plates, and the formed OLED devices are not fragile.
  • the inventor found through research that some OLED flexible display devices have black edges at the four corners, which affects the user's visual experience.
  • the embodiments of the present disclosure provide a display substrate, a display panel, a display device, and a manufacturing method of the display panel, which can improve the visual experience of the user.
  • FIG. 1 is a schematic structural diagram of an embodiment of a display panel according to the present disclosure.
  • FIG. 2 is a schematic diagram of the layout of a display substrate in an embodiment of a display panel according to the present disclosure.
  • the display panel includes: a display substrate A and a cover plate B.
  • the cover plate B is located on the front side of the display substrate A along the light emitting direction of the display substrate A, that is, on the light emitting side of the display substrate A.
  • the display substrate A and the cover plate B can be encapsulated by an encapsulant C (for example, optical adhesive OCA, etc.).
  • the display substrate A has a display area A1 and a non-display area A2 surrounding the display area A1.
  • the display substrate A can be packaged with the cover plate B in the non-display area A2.
  • the material of the cover plate B can be a rigid or flexible material, such as glass or a colorless polyimide (CPI) film.
  • CPI colorless polyimide
  • the display area A1 includes a plurality of sides A11, and adjacent sides A11 of the plurality of sides A11 intersect to form a plurality of corners A12.
  • the display area A1 has two sets of opposite sides A11, and the adjacent sides A11 are perpendicular to each other. Accordingly, the display area A1 has four corners A12.
  • the display area A1 includes a first display area A13 having a first pixel density and a second display area A14 having a second pixel density. The second pixel density is lower than the first pixel density.
  • the pixel density of the transition area A15 between the first display area A13 and the second display area A14 may be equal to the first pixel density or the second pixel density, or located between the first pixel density and the second pixel density.
  • the pixel density here refers to the number of pixels per unit area.
  • the second display area A14 is located at at least one of the corners A12.
  • a second display area A14 is provided in each of the four corners A12.
  • the pixel density in the corners of this embodiment is higher than that of the first display area.
  • the low second display area on the one hand, can realize the image display of the corners, thereby increasing the screen-to-body ratio, reducing the display frame, and enabling users to obtain a better visual experience. On the other hand, it can also reduce the processing technology of the corners. Difficulty.
  • FIG. 3 is a schematic diagram of a plurality of opening patterns distributed on the surface of a stretchable substrate in an embodiment of a display panel according to the present disclosure.
  • FIG. 4 is a schematic structural view of a portion of the display substrate corresponding to the second display area formed on the glass substrate in an embodiment of the display panel according to the present disclosure.
  • FIG. 5 is a schematic structural diagram of a portion of the display substrate corresponding to the second display area separated from the glass substrate in an embodiment of the display panel according to the present disclosure.
  • the second display area A14 includes: a stretchable substrate 1, a plurality of display units 2 and a plurality of wiring units 3.
  • the stretchable substrate 1 can be made of a flexible material, such as polyimide PI or the like.
  • the stretchable substrate 1 includes a plurality of opening patterns 10 distributed along the surface of the stretchable substrate 1 (for example, the opening pattern formed by a plurality of openings in a dashed frame in FIG. 3 ).
  • Each opening pattern 10 in the plurality of opening patterns 10 includes a plurality of first openings 11, and at least a part of the plurality of first openings 11 is formed between adjacent first openings 11 to be able to enclose an island Area 13 of multiple bridge areas 12.
  • the stretched display of the second display area A14 can be realized.
  • the corners of the display area of the display substrate can be more closely attached to the cover plate, reducing or avoiding the situation that affects the adhesion between the corners and the cover plate during packaging, such as air bubbles. Wait.
  • three first openings 11 are respectively provided around the island region 13 of the opening pattern 10, and two bridge regions 12 can be formed between adjacent first openings 11 of the three first openings 11.
  • the width of the first opening 11 may be about 15-25 ⁇ m.
  • a plurality of display units 2 are respectively disposed on the island area 13 formed by each opening pattern 10, and a plurality of wiring units 3 are respectively connected between the plurality of display units 2, and They are respectively arranged in the plurality of bridge areas 12.
  • the display unit 2 has display sub-pixels (for example, RGB sub-pixels) and driving circuits, and can realize image display.
  • the multiple display units 2 are respectively connected by multiple wiring units 3.
  • the display substrate A is formed on the glass substrate 4 first, and then the display substrate A is peeled from the glass substrate 4 after the formation.
  • the entire film layer is dug at the corresponding position of the first opening 11, and the entire surface is coated at the corresponding position of the island area 13, the bridge area 12 and the first opening 11 (for example, the display substrate Electrode layer and inorganic encapsulation layer, etc.).
  • the opening width of at least one of the plurality of first openings 11 gradually decreases along the light emitting direction of the display substrate A. That is, a first opening shape with a narrow top and a wide bottom is formed. At least a part of the side wall of the first opening 11 and the surface of the stretchable substrate 1 away from the plurality of display units and the plurality of wiring units form an angle ⁇ . For example, part or all of the side wall of the first opening 11 on the side of the opening away from the cover plate B forms an angle ⁇ with the bottom surface of the stretchable substrate 1.
  • the included angle ⁇ is about 50° to 80°.
  • such an opening shape can make the hole wall on the side adjacent to the island area 13 and the hole wall on the side adjacent to the bridge area 12 in the first opening 11 form a relatively flat section during peeling, thereby effectively improving the process .
  • the film layer 15 at the bottom of the first opening 11 remains on the peeling substrate 4.
  • the flat section here means that the disconnected part between the hole walls on both sides of the first opening 11 and the film layer 15 is relatively flat, and the section is not uneven due to local film peeling or irregular film breakage.
  • FIG. 6 and FIG. 7 are respectively structural schematic diagrams in which a portion of the display substrate corresponding to the second display area is formed on the glass substrate in some embodiments of the display panel according to the present disclosure.
  • 8 and 9 are respectively schematic diagrams of the arrangement of the island area, the first opening and the bridge area in some embodiments of the display panel according to the present disclosure.
  • 10 and 11 are respectively schematic cross-sectional views of the first groove in some embodiments of the display panel according to the present disclosure.
  • At least one of the plurality of display units 2 includes: a thin film transistor 22, a first planarization layer 241, a second electrode layer 243, a support spacer (Post Spacer, PS for short) ) 26, the first organic light emitting layer 245, the first electrode layer 244, the first inorganic encapsulation layer 251, the first organic encapsulation layer 252, and the second inorganic encapsulation layer 253.
  • a thin film transistor 22 includes: a thin film transistor 22, a first planarization layer 241, a second electrode layer 243, a support spacer (Post Spacer, PS for short) ) 26, the first organic light emitting layer 245, the first electrode layer 244, the first inorganic encapsulation layer 251, the first organic encapsulation layer 252, and the second inorganic encapsulation layer 253.
  • the thin film transistor 22 is provided on the stretchable substrate 1.
  • the thin film transistor 22 includes an active layer 221, a gate 222, a first source 223, a first drain 224, a second source 225, and a second drain 226.
  • the first source electrode 223 and the first drain electrode 224 are electrically connected to the active layer 221 through the via hole, and the second source electrode 225 and the second drain electrode 226 are respectively connected to the first source electrode 223 and the first drain electrode through the via hole. 224 electrical connection.
  • the thin film transistor 22 is not limited to the structure shown in FIG. 6 and FIG. 7. In other embodiments, other structure forms may also be used.
  • the thin film transistor includes a single-layer source and drain.
  • the first planarization layer 241 is located on the front side of the stretchable substrate 1 along the light emitting direction of the display substrate, that is, on the side of the stretchable substrate 1 adjacent to the cover plate B. Specifically, the first planarization layer 241 is located on the side of the thin film transistor 22 away from the stretchable substrate 1 and covers the thin film transistor 22. The first planarization layer 241 may be used to provide a flat surface for the formation of the upper film layer.
  • the supporting spacer 26 is located on a side of the first planarization layer 241 away from the stretchable substrate 1 and has a first groove 27.
  • the second electrode layer 243 is located on a side of the first planarization layer 241 away from the stretchable substrate 1 and is electrically connected to the thin film transistor 22 through a via hole.
  • the first organic light emitting layer 245 is located on the side of the second electrode layer 243 away from the stretchable substrate 1.
  • the first electrode layer 244 is located on a side of the first organic light emitting layer 245 away from the stretchable substrate 1 and covers the supporting spacer 26.
  • the first electrode layer 244 also covers the first organic light emitting layer 245.
  • the second electrode layer 243 is an anode layer
  • the first electrode layer 244 is a cathode layer.
  • the second electrode layer 242, the first organic light emitting layer 245, and the first electrode layer 244 may form a light emitting element driven by the thin film transistor 22.
  • the island region according to different materials used in the first organic light-emitting layer 245, sub-pixels of different colors can be realized.
  • the first inorganic encapsulation layer 251 is located on the side of the first electrode layer 244 away from the stretchable substrate 1 and covers the first electrode layer 244.
  • the first organic encapsulation layer 252 is located on the side of the first inorganic encapsulation layer 251 away from the stretchable substrate 1.
  • the second inorganic encapsulation layer 253 is located on a side of the first organic encapsulation layer 252 away from the stretchable substrate 1 and covers the first organic encapsulation layer 252 and the first inorganic encapsulation layer 251.
  • the first inorganic encapsulation layer 251 and the second inorganic encapsulation layer 253 can be formed by plasma enhanced chemical vapor deposition, and the first organic encapsulation layer 252 can be formed by printing.
  • the organic material for example, organic ink
  • the water and oxygen erosion path is formed between the outside and the first organic light-emitting layer 245 and the first electrode layer 244. Risk, the first groove 27 provided on the support spacer 26 can realize edge position control of the organic material.
  • the first groove 27 is provided on the side of the supporting spacer 26 away from the stretchable substrate 1 to prevent the organic material forming the first organic encapsulation layer 252 from overflowing.
  • the first organic encapsulation layer 252 can cover the part of the first inorganic encapsulation layer 251 at the first groove 27 and the part of the first groove 27 away from the first opening 11, instead of covering the first inorganic encapsulation layer.
  • 251 is the part between the first groove 27 and the first opening 11.
  • the location of the first groove 27 can be determined according to the pitch and arrangement of the sub-pixels in the island area. In some embodiments, the distance between the first groove and the first opening 11 is less than about 30 ⁇ m.
  • the first groove 27 can be completed through an exposure and development process.
  • the organic materials after the organic materials flow to the first groove 27, it is not easy to continue to overflow to the side of the first groove 27 adjacent to the first opening.
  • the first groove 27 includes a continuous groove 27 a extending along the length of the first opening 11. 8 and 10, the groove width w1 of the continuous groove 27a is about 5-15 ⁇ m, and the groove height h1 is about 1.5-2.5 ⁇ m.
  • the groove width w1 here refers to the dimension of the continuous groove 27a on the support spacer 26 along the direction perpendicular to the first opening 11, and the groove height h1 refers to the continuous groove 27a on the support spacer 26 perpendicular to the stretchable Dimension in the direction in which the substrate 1 is stretched.
  • the first groove 27 includes at least one row of discrete grooves 27b arranged in a direction perpendicular to the length direction of the first opening 11, and each row of discrete grooves 27b includes at least one row of discrete grooves 27b.
  • a plurality of discrete grooves 27b are arranged at intervals in the longitudinal direction of the first opening 11. 9 and 11, the groove width w2 of the plurality of discrete grooves 27b is about 5-10 ⁇ m, and the groove height h2 is about 1.5-2.5 ⁇ m.
  • the groove width w2 here refers to the size of each discrete groove 27b on the support spacer 26 along the direction perpendicular to the first opening 11, and the groove height h2 refers to the size of each discrete groove 27b on the support spacer 26 perpendicular to the The dimension in the direction of the substrate 1 can be stretched.
  • At least one row of discrete grooves 27b includes multiple rows of discrete grooves 27b (for example, two rows of discrete grooves).
  • the distance d of the discrete grooves 27b in adjacent rows among the plurality of rows of discrete grooves 27b is about 2-7 ⁇ m.
  • the spacing d here refers to the distance between the adjacent rows of discrete grooves 27b on the support spacer 26 along the direction perpendicular to the first opening 11.
  • some film layers are formed by coating the entire surface in the second display area.
  • some film layers for example, the organic light-emitting layer or the electrode layer
  • the first isolation structure realizes the isolation effect of the film layer.
  • At least one of the plurality of display units 2 further includes a first isolation structure 28, 28'.
  • the first isolation structure 28, 28' is located between the first groove 27 and the first opening 11, and is configured to break the first electrode layer 244 on both sides of the first isolation structure 28, 28' Open to increase the lateral effective packaging distance.
  • the first electrode layer 244 covers the first isolation structure 28, 28', and is located on the side of the first isolation structure 28, 28' adjacent to the first groove and adjacent to the first opening 11 One side.
  • At least one of the plurality of display units 2 further includes: a first passivation layer 235.
  • the first passivation layer 235 is located between the support spacer 26 and the first opening 11, and at least part of the first passivation layer 235 is located on the first planarization layer 241 away from the stretchable One side of the substrate 1.
  • at least one of the plurality of display units 2 may further include a first buffer layer 21, a first gate insulating layer 231, a second gate insulating layer 232, an interlayer insulating layer 233, and a second passivation layer 234.
  • the lateral film layer that is, the first inorganic encapsulation layer
  • the encapsulation layer and the part of the second inorganic encapsulation layer located on the sidewall of the first opening are relatively thin due to the large step difference, and the water vapor from the side of the first opening 11 may pass from the thinner side to the first film layer.
  • a planarization layer enters the thin film transistor and other devices, causing the device to fail.
  • the first passivation layer 235 includes a first portion located on a side of the first planarization layer 241 away from the stretchable substrate 1, and a first portion located on the first planarization layer 241 adjacent to the first opening 11
  • the second part on one side.
  • the second part is connected to the surface of the second passivation layer 234 to form the isolation protection of the first passivation layer 235 on the surface of the first planarization layer 241 adjacent to the first opening 11, reducing or avoiding There is a risk that water vapor on one side of the opening 11 enters the thin film transistor and other devices through the first planarization layer.
  • the material of the first passivation layer 235 and the second passivation layer 234 are the same so as to achieve a tighter bond between the two.
  • the first buffer layer 21 is located on the side of the stretchable substrate 1 adjacent to the first planarization layer 241.
  • the first gate insulating layer 231 is located on the side of the first buffer layer 21 away from the stretchable substrate 1 and covers the active layer 221 of the thin film transistor 22.
  • the second gate insulating layer 232 is located on the side of the first gate insulating layer 231 away from the stretchable substrate 1 and covers the gate 222 of the thin film transistor 22.
  • the interlayer insulating layer 233 is located on the side of the second gate insulating layer 232 away from the stretchable substrate 1.
  • the second passivation layer 234 is located between the interlayer insulating layer 233 and the first planarization layer 241.
  • the first passivation layer 235 is located on a side of the first planarization layer 241 away from the stretchable substrate 1 and between the supporting spacer 26 and the first opening 11.
  • the gate 222 of the thin film transistor 22 is located on the surface of the first gate insulating layer 231 away from the stretchable substrate 1.
  • the first source 223 and the first drain 224 of the thin film transistor 22 are located on the surface of the interlayer insulating layer 233 away from the stretchable substrate 1, and pass through the first gate insulating layer 231 and the second gate insulating layer.
  • the via holes of 232 and the interlayer insulating layer 233 are electrically connected to the active layer 221.
  • the second source electrode 225 and the second drain electrode 226 of the thin film transistor 22 are located on the surface of the second passivation layer 234 away from the stretchable substrate 1, and pass through the active layer and the via hole penetrating the second passivation layer 234 221 electrical connection.
  • the display unit 2 only includes the first gate insulating layer 231 and does not include the second gate insulating layer 232.
  • the thin film transistor 22 includes a single-layer source and drain.
  • the first isolation structure 28 includes at least one second groove 281 located in the first passivation layer 235.
  • the first electrode layer 244 covering the bottom of the at least one second groove 281 and the first electrode layer 244 covering the surface of the first passivation layer 235 are disconnected from each other.
  • the groove width w3 of the at least one second groove 281 is about 3-10 ⁇ m, and the groove height h3 is about 1000-3000 nm.
  • the groove width w3 here refers to the size of each second groove 281 in the direction perpendicular to the first opening 11, and the groove height h3 refers to the dimension of each second groove 281 in the direction perpendicular to the stretchable substrate 1. size.
  • At least one of the plurality of wiring units 3 includes: a second planarization layer 331, a pixel definition layer 332, and a third electrode layer 333.
  • the second planarization layer 331 is located on the front side of the stretchable substrate 1 along the light emitting direction of the display substrate, that is, on the side of the stretchable substrate 1 adjacent to the cover plate B.
  • the pixel definition layer 332 is located on a side of the second planarization layer 331 away from the stretchable substrate 1, covers a part of the surface of the second planarization layer 331, and has at least one third groove 361.
  • At least one of the plurality of wiring units 3 further includes: a second buffer layer 31, a first conductive wiring 371, a gate insulating layer 32 and a second conductive wiring 372.
  • the second buffer layer 31 is located on the surface of the stretchable substrate 1.
  • the first conductive trace 371 is located on the surface of the second buffer layer 31 away from the stretchable substrate 1.
  • the gate insulating layer 32 is located on the side of the second buffer layer 31 away from the stretchable substrate 1 and covers the first conductive trace 371.
  • the second conductive trace 372 is located on the surface of the gate insulating layer 32 away from the stretchable substrate 1.
  • the second planarization layer 331 is located on the side of the second conductive trace 372 away from the stretchable substrate 1 and covers the second conductive trace 372.
  • At least one third groove 361 is provided adjacent to the first opening 11.
  • the third electrode layer 333 covers the bottom of the at least one third groove 361, the surface of the pixel definition layer 332, and a part of the surface of the second planarization layer 331 that is not covered by the pixel definition layer 332 .
  • the third electrode layer 333 covering the bottom of the at least one third groove 361 and the third electrode layer 333 covering the surface of the pixel defining layer 332 are disconnected from each other, so that the third electrode layer 333 located in the bridge region is connected to the first opening 11
  • the corresponding third electrode layer 333 is cut off to prevent the film layer corresponding to the first opening from communicating with the film layer corresponding to the island region via the film layer corresponding to the bridge region.
  • the display substrate is formed on the glass substrate 4, and then peeled off by laser.
  • the corresponding film layers respectively provided in the island region and the bridge region may be located in the same layer and have the same material to simplify the process.
  • the same layer and the same material here and later can be a layer structure formed by using the same film forming process to form a film layer for forming a specific pattern, and then using the same mask plate to pattern the film layer through a patterning process.
  • a patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. These specific graphics may also be at different heights or have different thicknesses.
  • the second buffer layer 31 and the first buffer layer 21 are located in the same layer and have the same material.
  • the first conductive trace 371 and part of the source and drain of the thin film transistor 22 are located in the same layer and have the same material, so that the second conductive trace 372 is connected to the Part of the source and drain of the thin film transistor 22 (for example, the second source 225 and the second drain 226) are located in the same layer and have the same material, so that the second planarization layer 331 and the first planarization layer 241 are located in the same layer And the material is the same, so that the third electrode layer 333 and the first electrode layer 244 are located in the same layer and have the same material.
  • the number of third grooves 361 in the at least one third groove 361 is the same as the number of second grooves 281 in the at least one second groove 281.
  • the at least one third groove 361 and the at least one second groove 281 communicate with each other to form a closed ring around the first opening 11.
  • the first opening 11 is adjacent to the two second grooves 281 (281a, 281b) on the side of the sub-pixel in the island region, respectively, and the first opening 12 is adjacent to the two third grooves 281 (281a, 281b) on the side of the bridge region.
  • the grooves 361 (361a, 361b) communicate with each other.
  • the first isolation structure 28' includes at least one first bump located on the surface of the interlayer insulating layer 233 away from the stretchable substrate 1. 282.
  • the first electrode layer 244 covers the top of the at least one first bump 282 and the surface of the interlayer insulating layer 233.
  • the first electrode layer 244 on the top of the at least one first bump 282 and the first electrode layer 244 on the surface of the interlayer insulating layer 233 are disconnected from each other.
  • the protrusion width w4 of the at least one first bump is about 3-10 ⁇ m, and the protrusion height h4 is about 400-800 nm.
  • the protrusion width w4 here refers to the size of each first protrusion 282 in a direction perpendicular to the first opening 11, and the protrusion height h4 refers to each first protrusion 282 in a direction perpendicular to the stretchable substrate 1.
  • the material of the first bump 282 may be a Ti-Al-Ti three-layer structure.
  • At least one of the plurality of wiring units 3 includes: a gate insulating layer 32, at least one second bump 362 and a third electrode layer 333.
  • the gate insulating layer 32 is located on the front side of the stretchable substrate 1 along the light emitting direction of the display substrate, that is, on the side of the stretchable substrate 1 adjacent to the cover plate B.
  • At least one second bump 362 is located on the surface of the gate insulating layer 32 away from the stretchable substrate 1.
  • At least one of the plurality of wiring units 3 may further include: a second buffer layer 31, a first conductive wiring 371, a second conductive wiring 372, a second planarization layer 331, and a pixel definition layer 332 .
  • the second buffer layer 31 is located on the surface of the stretchable substrate 1.
  • the first conductive trace 371 is located on the surface of the second buffer layer 31 away from the stretchable substrate 1.
  • the third gate insulating layer 32 is located on the side of the second buffer layer 31 away from the stretchable substrate 1 and covers the first conductive trace 371.
  • the second conductive trace 372 is located on the surface of the third gate insulating layer 32 away from the stretchable substrate 1.
  • the second planarization layer 331 is located on a side of the second conductive trace 372 away from the stretchable substrate 1 and covers the second conductive trace 372.
  • the pixel definition layer 332 is located on a side of the second planarization layer 331 away from the stretchable substrate 1 and covers a part of the surface of the second planarization layer 331.
  • At least one second bump 362 may be disposed adjacent to the first opening 11.
  • the third electrode layer 333 covers the top of the at least one second bump 362 and a part of the surface of the third gate insulating layer 32 that is not covered by the third gate insulating layer 32.
  • the third electrode layer 333 covered on the top of the at least one second bump 362 and the third electrode layer 333 covered on the surface of the third gate insulating layer 32 are disconnected from each other, so that the third electrode layer 333 located in the bridge area is connected to the first
  • the third electrode layer 333 corresponding to the opening 11 is cut off to prevent the film layer corresponding to the first opening from communicating with the film layer corresponding to the island region via the film layer corresponding to the bridge region.
  • the corresponding film layers respectively provided in the island region and the bridge region may be located in the same layer and have the same material.
  • the second buffer layer 31 and the first buffer layer 21 are located in the same layer and have the same material.
  • the first conductive trace 371 and part of the source and drain of the thin film transistor 22 are located in the same layer and have the same material, so that the second conductive trace 372 is connected to the Part of the source and drain of the thin film transistor 22 (for example, the second source 225 and the second drain 226) are located in the same layer and have the same material, so that the second planarization layer 331 and the first planarization layer 241 are located in the same layer And the material is the same, so that the third electrode layer 333 and the first electrode layer 244 are located in the same layer and have the same material.
  • the number of second bumps 362 in the at least one second bump 362 is the same as the number of first bumps 282 in the at least one first bump 282, and respectively They communicate with each other to form a closed ring around the first opening 11.
  • the second bump 362 and the first bump 282 can be formed in the same patterning process.
  • At least one of the plurality of wiring units 3 may include: at least one inorganic encapsulation layer and an organic coating 343.
  • At least one inorganic encapsulation layer is located on the front side of the stretchable substrate 1 along the light emitting direction of the display substrate, that is, on the side of the stretchable substrate 1 adjacent to the cover B.
  • the organic coating 343 is located on the front side of the inorganic encapsulation layer farthest from the stretchable substrate among the at least one inorganic encapsulation layer along the light emission direction of the display substrate A, and has a coating pattern. In the case of meeting product reliability requirements, no other film layer may be provided between the organic coating 343 and the cover plate B, so that the display substrate can be flexibly attached to the cover plate at a position corresponding to the bridge area.
  • At least one inorganic encapsulation layer may include: a third inorganic encapsulation layer 341 and a fourth inorganic encapsulation layer 342.
  • the third inorganic encapsulation layer 341 is located on the side of the third electrode layer 333 away from the stretchable substrate 1.
  • the fourth inorganic encapsulation layer 342 is located on a side of the third inorganic encapsulation layer 341 away from the third inorganic encapsulation layer 341.
  • the organic coating 343 is located on a side of the fourth inorganic encapsulation layer 342 away from the fourth inorganic encapsulation layer 342.
  • the third inorganic encapsulation layer 341 and the fourth inorganic encapsulation layer 342 may be formed by plasma enhanced chemical vapor deposition, and the organic coating 343 may be formed by coating.
  • the material of the organic coating 343 can be acetic acid-1-methoxy-2-propyl ester, acrylic resin and the like.
  • the third electrode layer 333 and the first electrode layer 244 are located in the same layer and have the same material.
  • the third inorganic encapsulation layer 341 may be located in the same layer and the same material as the first inorganic encapsulation layer 251.
  • the encapsulation layer 342 and the second inorganic encapsulation layer 253 may be located in the same layer and have the same material to simplify the process.
  • the coating pattern on the organic coating 343 includes at least one second opening 39, and the length direction of the at least one second opening 39 is the same as the length direction of the adjacent first opening 11 parallel.
  • the coating pattern includes a plurality of second openings 39 parallel to each other.
  • the second opening 39 of the coating pattern can be formed by an exposure and development process. Through the second opening of the organic coating in the bridge area, the tensile properties of the bridge area can be effectively improved.
  • the above-mentioned display panel embodiments of the present disclosure can be applied to various display devices. Therefore, the present disclosure also provides a display device including the aforementioned display panel.
  • the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and so on.
  • FIG. 12 is a schematic flowchart of an embodiment of a method for manufacturing a display panel according to the present disclosure.
  • a method of manufacturing a display panel includes: step 100 and step 200.
  • a display substrate A is provided.
  • the display substrate has a display area A1 and a non-display area A2 surrounding the display area A1.
  • the display area A1 includes a plurality of sides A11, and adjacent sides A11 of the plurality of sides A11 intersect to form a plurality of In the corner A12, the display area A1 includes a first display area A13 with a first pixel density and a second display area A14 with a second pixel density.
  • the second pixel density is lower than the first pixel density, so The second display area A14 is located at at least one of the corners A12.
  • a cover plate B is provided, and on the light emitting side of the display substrate A, the cover plate and the display substrate A are packaged.

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PCT/CN2020/089413 2020-05-09 2020-05-09 显示基板、显示面板、显示装置及显示面板的制造方法 Ceased WO2021226750A1 (zh)

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CN202080000697.6A CN113950712B (zh) 2020-05-09 2020-05-09 显示基板、显示面板、显示装置及显示面板的制造方法
US17/267,146 US12563896B2 (en) 2020-05-09 2020-05-09 Display substrate, display panel, display device and manufacturing method of display panel
EP20897666.2A EP4148710A4 (en) 2020-05-09 2020-05-09 DISPLAY SUBSTRATE, DISPLAY PANEL, DISPLAY DEVICE AND METHOD OF MANUFACTURING A DISPLAY PANEL
PCT/CN2020/089413 WO2021226750A1 (zh) 2020-05-09 2020-05-09 显示基板、显示面板、显示装置及显示面板的制造方法
JP2021572620A JP7722193B2 (ja) 2020-05-09 2021-02-08 表示基板、表示パネル、表示装置及び表示基板の製造方法
PCT/CN2021/076057 WO2021227581A1 (zh) 2020-05-09 2021-02-08 显示基板、显示基板、显示装置及显示基板的制造方法
US17/425,300 US20220320465A1 (en) 2020-05-09 2021-02-08 Display substrate, display panel, display device, and method for manufacturing display substrate
EP21758036.4A EP4148800A4 (en) 2020-05-09 2021-02-08 Display substrate, display panel, display device and method for manufacturing display substrate
CN202180000191.XA CN113924654B (zh) 2020-05-09 2021-02-08 显示基板、显示基板、显示装置及显示基板的制造方法

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