WO2021147284A1 - 柔性衬底金属氧化物薄膜晶体管及其钝化层的制备方法 - Google Patents

柔性衬底金属氧化物薄膜晶体管及其钝化层的制备方法 Download PDF

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WO2021147284A1
WO2021147284A1 PCT/CN2020/104578 CN2020104578W WO2021147284A1 WO 2021147284 A1 WO2021147284 A1 WO 2021147284A1 CN 2020104578 W CN2020104578 W CN 2020104578W WO 2021147284 A1 WO2021147284 A1 WO 2021147284A1
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thin film
film transistor
flexible substrate
layer
metal oxide
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PCT/CN2020/104578
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English (en)
French (fr)
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陈荣盛
李荣媛
康良云
钟伟
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华南理工大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous

Definitions

  • the invention relates to the field of semiconductors, in particular to a method for preparing a flexible substrate metal oxide thin film transistor and a passivation layer thereof.
  • Thin Film Transistor is mainly used to control and drive the sub-pixels of Liquid Crystal Display (LCD) and Organic Light-Emitting Diode (OLED, Organic Light-Emitting Diode) displays. It is the most important in the flat panel display field.
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • One of the electronic devices With the development of next-generation active matrix flat panel display technology toward large-size, ultra-high-definition, high frame rate, and full integration of peripheral circuits, thin-film transistors, as a component of the display panel, must provide sufficient electrical driving capabilities. Inorganic metal oxide thin film transistors have recently attracted more and more attention and research due to their low cost, low preparation temperature, high visible light transmittance and moderate electrical properties.
  • amorphous indium gallium zinc oxide such as a-InGaZnO, etc.
  • a-InGaZnO is the most representative bottom-gate thin film transistor as the active layer.
  • the field-effect mobility of the amorphous indium gallium zinc oxide TFT in actual use is usually limited to about 10 cm 2 /Vs, which cannot meet the requirements for high-resolution display.
  • flexible substrates are mostly organic polymers, which have poor barrier ability to external environments such as water molecules and adsorbed oxygen, which makes the electrical stability of oxide thin film transistors poor.
  • the purpose of the present invention is to provide a method for preparing a flexible substrate metal oxide thin film transistor and a passivation layer thereof, which can improve the carrier mobility and electrical properties of the thin film transistor. stability.
  • the embodiments of the present invention provide:
  • a method for preparing a passivation layer of a flexible substrate metal oxide thin film transistor which includes the following steps:
  • the concentration of the stearyl phosphate solution is 1 mM to 3 mM, and the set time is 12 hours to 36 hours.
  • the solution in the beaker can be set as a mixed solution of one or more of n-octadecyl phosphate, alkyl phosphonate, alkyl mercaptan, alkyl fatty acid and alkyl silane.
  • a gate layer, a gate dielectric layer, an active layer, a source electrode and a drain electrode with a predetermined thickness on a flexible substrate to obtain a thin film transistor which specifically includes:
  • An active layer is prepared on the patterned gate dielectric layer, and the active layer is patterned;
  • a source electrode and a drain electrode are prepared on the patterned active layer, and the source electrode and the drain electrode are patterned and then subjected to annealing treatment.
  • the temperature of the annealing treatment is 350° C.
  • the annealing atmosphere is air
  • the annealing time is 180 minutes.
  • the active layer is an inorganic metal oxide film, and the active layer is prepared on the patterned gate dielectric layer, which is specifically:
  • At least one metal oxide target is deposited by magnetron sputtering method or evaporation method on the flexible substrate on which the gate electrode and the gate dielectric layer have been formed, and the obtained metal oxide semiconductor film with a predetermined thickness is used as the active layer .
  • the flexible substrate is an organic material polyimide.
  • the embodiments of the present invention provide:
  • a metal oxide thin film transistor with a flexible substrate includes a passivation layer prepared by the above-mentioned method for preparing a passivation layer of a metal oxide thin film transistor with a flexible substrate.
  • it also includes a flexible substrate, a gate layer, a gate dielectric layer, an active layer, a source electrode, and a drain electrode.
  • the gate layer is disposed above the flexible substrate, and the gate dielectric layer covers the gate.
  • the active layer is arranged above the gate dielectric layer, the source electrode and the drain electrode are both arranged above the active layer, and the passivation layer covers the active layer, source electrode and Above the drain electrode.
  • the beneficial effect of the present invention is that the present invention uses the self-assembled monolayer obtained on the surface of the thin film transistor as the passivation layer by immersing the thin film transistor in the n-octadecyl phosphate solution to isolate the flexible substrate of the thin film transistor and the metal oxidation.
  • the direct contact between the back surface of the channel layer and the atmosphere prevents the flexible substrate from adsorbing water molecules and adsorbed oxygen, as well as the erosion of the channel layer by excessive moisture and oxygen and other sensitive elements in the air, thereby improving the thin film transistor
  • FIG. 1 is a flowchart of a method for preparing a passivation layer of a metal oxide thin film transistor with a flexible substrate according to a specific embodiment of the present invention
  • FIG. 2 is an AFM diagram of a self-assembled monolayer of n-octadecyl phosphate deposited on an indium tin zinc oxide film according to a specific embodiment of the present invention
  • FIG. 3 is a water contact angle test diagram of a metal oxide film without self-assembly treatment in a specific embodiment
  • Figure 4 is a test diagram of the water contact angle of a metal oxide film with a set time of 12h and a solution concentration of 1mM;
  • Figure 5 is a water contact angle test diagram of a metal oxide film with a set time of 12h and a solution concentration of 2mM;
  • Figure 6 is a water contact angle test diagram of a metal oxide film with a set time of 12h and a solution concentration of 3mM;
  • Figure 7 is a test diagram of the water contact angle of a metal oxide film with a set time of 24h and a solution concentration of 1mM;
  • Figure 8 is a water contact angle test diagram of a metal oxide film with a set time of 24h and a solution concentration of 2mM;
  • Figure 9 is a water contact angle test diagram of a metal oxide film with a set time of 24h and a solution concentration of 3mM;
  • Figure 10 is a test diagram of the water contact angle of a metal oxide film with a set time of 36h and a solution concentration of 1mM;
  • Figure 11 is a water contact angle test diagram of a metal oxide film with a set time of 36h and a solution concentration of 2mM;
  • Figure 12 is a test diagram of the water contact angle of a metal oxide film with a set time of 36h and a solution concentration of 3mM;
  • FIG. 13 is a comparison diagram of the transfer characteristic curve of a metal oxide thin film transistor with a setting time of 24 hours and a solution concentration of 2 mM and a metal oxide thin film transistor without self-assembly;
  • Figure 14 is a comparison diagram of the transfer characteristic curves of metal oxide thin film transistors with solution concentrations of 1 mM, 2 mM and 3 mM when the set time is fixed at 12 hours;
  • Figure 15 is a comparison diagram of the transfer characteristic curves of metal oxide thin film transistors with solution concentrations of 1 mM, 2 mM and 3 mM when the set time is fixed at 24 h;
  • Figure 16 is a comparison diagram of the transfer characteristic curves of metal oxide thin film transistors with solution concentrations of 1 mM, 2 mM and 3 mM when the set time is fixed at 36 hours;
  • Figure 17 is a graph showing the transfer characteristics of a flexible substrate indium tin zinc oxide thin film transistor with a set time of 24 hours and a solution concentration of 2 mM under a certain bending radius;
  • FIG. 18 is a graph showing the transfer characteristics of a flexible substrate indium tin zinc oxide thin film transistor with a setting time of 24 h and a solution concentration of 2 mM after a positive gate bias stress is applied under certain air humidity conditions;
  • FIG. 19 is a graph showing the transfer characteristics of a flexible substrate indium tin zinc oxide thin film transistor with a setting time of 24 hours and a solution concentration of 2 mM after a negative gate bias stress is applied under certain air humidity conditions;
  • FIG. 20 is a flow chart of a method for manufacturing a metal oxide thin film transistor with a flexible substrate according to a specific embodiment of the present invention
  • FIG. 21 is a schematic diagram of a structure of a metal oxide thin film transistor with a flexible substrate according to a specific embodiment of the present invention.
  • an embodiment of the present invention provides a method for preparing a passivation layer of a metal oxide thin film transistor with a flexible substrate, which includes steps S110-S130:
  • S110 Depositing a gate layer, a gate dielectric layer, an active layer, a source electrode and a drain electrode with a predetermined thickness on a flexible substrate to obtain a thin film transistor; the specific structure of the thin film transistor needs to be prepared according to different types.
  • step S120 is performed.
  • the concentration of the n-octadecyl phosphate solution is 1 mM to 3 mM, and the set time is 12 hours to 36 hours.
  • the concentration of the n-octadecyl phosphate solution is 2 mM and the set time is 24 h.
  • the surface morphology of the film through the atomic force microscope model AFM-SEIKO-sweep, as shown in Figure 2, by observing the surface morphology, it can be found that the self-assembled monolayer of phosphate n-octadecyl ester is used as the metal oxidation of the passivation layer.
  • the material film has good film uniformity.
  • the root mean square roughness RMS of the surface film is calculated by the software to be 0.99nm. Therefore, the self-assembled monomolecule prepared by the octadecyl phosphate solution with a concentration of 2mM and a set time of 24h
  • the metal oxide thin film transistor with the layer as the passivation layer has good smoothness.
  • the concentration of the solution in this example is 1 mM to 3 mM
  • the ventilation setting time is within 12 hours to 36 hours
  • the metal oxide thin film transistor with a self-assembled monolayer as the passivation layer has good hydrophobic properties
  • the metal oxide film that has not undergone self-assembly processing is selected for testing, and a test chart as shown in FIG. 3 is obtained;
  • a metal oxide film with a set time of 36 h and a concentration of 3 mM octadecyl phosphate solution was selected for testing, and a test chart as shown in FIG. 12 was obtained.
  • the self-assembled monolayer prepared by the octadecyl phosphate solution with a concentration of 1mM-3mM and a set time of 12h-36h as the passivation layer of metal oxide thin film transistors has better hydrophobicity, so ,
  • the self-assembled monolayer prepared by the solution method can effectively modify the oxide surface without damaging the oxide semiconductor layer, so as to reduce the surface oxidation ability of the oxide semiconductor, reduce the adsorption and desorption of water and oxygen, thereby improving The stability of the device.
  • the self-assembled monolayer can fill the dangling bonds and some structural defects on the oxide semiconductor, thereby improving the mobility of carriers and reducing the adsorption of water and oxygen by the flexible substrate.
  • the prepared octadecyl phosphate self-assembled monolayer is used as a flexible substrate metal oxide film for the passivation layer
  • the transistor exhibits superior electrical performance and stability.
  • the flexible substrate indium tin zinc oxide thin-film transistor with the n-octadecyl phosphate self-assembled monolayer as the passivation layer in this example was tested.
  • the test process used Agilent 4155C semiconductor parameters The analyzer proceeded.
  • the transfer characteristic curve of a metal oxide thin film transistor without self-assembly processing is compared with a flexible substrate indium tin zinc oxide thin film transistor using a self-assembled monolayer of n-octadecyl phosphate as the passivation layer.
  • the comparison of the transfer characteristic curves shows that the flexible substrate indium tin zinc oxide thin film transistor with the self-assembled monolayer of n-octadecyl phosphate as the passivation layer has superior electrical performance.
  • the field-effect mobility of the self-assembled thin-film transistor can reach 16.8cm 2 /Vs, the subthreshold swing is lower than 0.06V/decade, and the switching current ratio is above 108, indicating that the octadecyl phosphate self-assembled monomer
  • the flexible substrate indium tin zinc oxide thin film transistor with molecular layer as the passivation layer has high carrier mobility, fewer defect states, low off-state current, and there is a gap between the self-assembled monolayer and the metal oxide thin film. Very high-quality interface.
  • the transfer characteristic curve of the flexible substrate indium tin zinc oxide thin film transistor is shown in FIG. 16.
  • the oxide thin film transistors were respectively placed on a curved substrate with a radius of curvature of 30mm for testing.
  • the test results are shown in Figure 17.
  • the flexible substrate indium tin zinc oxide with the octadecyl phosphate self-assembled monolayer as the passivation layer
  • the transfer characteristic curve of the thin film transistor has a certain negative drift, it still has good field effect characteristics.
  • a flexible substrate metal oxide thin film transistor with a self-assembled monolayer as a passivation layer with a concentration of n-octadecyl phosphate solution of 2mM and a set time of 24h was tested in the air with a relative humidity of 60%.
  • the test results of gate bias stress are shown in Figure 18 at different time nodes in the one-hour test period, and the test results of negative gate bias stress are shown in Figure 18. 19 shown. It can be seen from Figure 18 and Figure 19 that multiple test curves basically overlap, indicating that the flexible substrate metal oxide thin film transistor has no obvious degradation in the air with a relative humidity of 60%, so it shows that the octadecyl phosphate is self-contained.
  • the bias stress stability of flexible substrate metal oxide thin film transistors assembled with a monolayer as a passivation layer is also very good.
  • the thin film transistor is immersed in the octadecyl phosphate solution, and the self-assembled monolayer obtained on the surface of the thin film transistor is used as the passivation layer to isolate the flexible substrate and the metal oxide channel of the thin film transistor.
  • the direct contact between the back surface of the layer and the atmosphere prevents the flexible substrate from adsorbing water molecules and adsorbed oxygen, as well as the erosion of the channel layer by excessive moisture and oxygen and other sensitive elements in the air, thereby increasing the carriers on the thin film transistor
  • the mobility and electrical stability of thin film transistors are examples of thin film transistors.
  • the solution in the beaker can be set as a mixed solution of one or more of n-octadecyl phosphate, alkyl phosphonate, alkyl mercaptan, alkyl fatty acid and alkyl silane.
  • the organic matter in the solution of this embodiment can eliminate the -OH groups on the surface of the oxide semiconductor to form a stable and strong Si-OM structure on the surface to form a self-assembled monolayer, thereby reducing water and oxygen adsorption and desorption This phenomenon improves the stability of the device and reduces the absorption of water and oxygen by the flexible substrate.
  • the step S110 specifically includes steps S111-S115:
  • a gate layer on the flexible substrate and pattern the gate layer to form a gate; specifically, it selects a glass substrate deposited with a polyimide coating with a thickness of 0.7mm, and then uses it in sequence. Ionized water and isopropanol are used to clean the glass substrate in an ultrasonic cleaning machine. Each cleaning agent is cleaned for 20 minutes. After cleaning, the glass substrate is placed in a thermostat to dry for 5 hours, and the temperature of the thermostat is set to At 80°C, a 300nm Al:Nd alloy film was sputtered on the cleaned glass substrate using DC magnetron sputtering as a gate layer, and the gate was patterned by photolithography to form a gate.
  • S113 Prepare a gate dielectric layer on the flexible substrate and the gate, and pattern the gate dielectric layer; it specifically uses anodizing method to form a 200nm thick aluminum oxide neodymium gate dielectric layer on the aluminum neodymium alloy surface, and then use it for
  • the electrolyte solution for anodic oxidation is a mixture of ammonium tartrate and ethylene glycol. Put the prepared grid substrate and stainless steel plate into the electrolyte solution as anode and cathode respectively. First, a constant current is applied between the anode and the cathode.
  • the surface layer of aluminum neodymium will be formed A layer of aluminum oxide and neodymium with a thickness of 200 nm.
  • An active layer is prepared on the patterned gate dielectric layer, and the active layer is patterned; this step is to prepare the active layer by magnetron sputtering co-sputtering method, and the gate and the gate dielectric will be prepared
  • the flexible substrate of the layer is fixed in the patterned metal mask, and the polycrystalline indium tin oxide target controlled by DC power magnetron sputtering and the polycrystalline zinc oxide target controlled by RF power magnetron sputtering are used at the same time. In this way, a 40nm thick indium tin zinc oxide film is deposited as the active layer.
  • the power density when sputtering the polycrystalline indium tin oxide target is about 5.4 W/cm 2
  • the power density of the polycrystalline zinc oxide target is about 7.4W/cm 2 .
  • the pressure of the sputtering chamber is set to 0.8pa
  • the gas atmosphere used is oxygen and argon
  • the flow is set to 6sccm and 9sccm
  • the sputtering temperature is set to 25°C
  • the sputtering of polycrystalline indium tin oxide target material The power is set to 95W
  • the sputtering power of the polycrystalline zinc oxide target is set to 120W
  • the sputtering time is set to 4 minutes.
  • S115 Prepare a source electrode and a drain electrode on the patterned active layer, and perform annealing treatment after patterning the source electrode and the drain electrode.
  • the source electrode and the drain electrode are prepared by the DC magnetron sputtering method.
  • the glass substrate with the active layer prepared above is placed in a patterned metal mask and fixed, and the formed electrode makes the channel
  • the width and length are 300 ⁇ m and 300 ⁇ m respectively, that is, the aspect ratio is 1:1; then by using a DC power supply magnetron sputtering controlled polycrystalline indium tin oxide target, a 120nm thick indium tin oxide film is deposited as the source electrode and leakage
  • the power density of the sputtering in this step is about 5.4W/cm 2
  • the pressure of the sputtering chamber is set to 0.45pa
  • the used gas atmosphere is argon
  • the flow rate is set to 9sccm
  • the sputtering temperature is set to 25°C
  • the sputtering power of the polycrystalline indium tin oxide target is set to 70W
  • the sputtering time is set to
  • the active layer is an inorganic metal oxide film
  • the inorganic metal oxide film includes indium zinc oxide, tin zinc oxide, indium tin zinc oxide, indium gallium zinc oxide, and tin fluoride. Zinc oxide.
  • the preparation of the active layer on the patterned gate dielectric layer is specifically as follows:
  • At least one metal oxide target is deposited by magnetron sputtering method or evaporation method on the flexible substrate on which the gate electrode and the gate dielectric layer have been formed, and the obtained metal oxide semiconductor film with a predetermined thickness is used as the active layer .
  • one or more metal oxide films can be magnetron sputtered or evaporated on the flexible substrate at the same time.
  • the flexible substrate is an organic material polyimide.
  • the organic material polyimide has good flexibility, stability and heat resistance, and is convenient for processing transistors.
  • an embodiment of the present invention also provides a flexible substrate metal oxide thin film transistor, which includes a passivation layer 260, and the passivation layer 260 adopts the above flexible substrate metal oxide thin film transistor.
  • the passivation layer is prepared by the preparation method.
  • the passivation layer 260 is a self-assembled monolayer of n-octadecyl phosphate, which can effectively modify the oxide surface without damaging the oxide semiconductor layer, so as to reduce the surface oxidation ability of the oxide semiconductor and reduce water, Oxygen adsorption and desorption phenomena, thereby improving the stability of the device.
  • the self-assembled monolayer can fill the dangling bonds and some structural defects on the oxide semiconductor, thereby increasing the mobility of carriers and reducing the adsorption of water and oxygen by the flexible substrate.
  • the flexible substrate metal oxide thin film transistor further includes a flexible substrate 210, a gate layer 220, a gate dielectric layer 230, an active layer 240, a source electrode 251, and a drain electrode. 252.
  • the gate layer 220 is disposed above the flexible substrate 210
  • the gate dielectric layer 230 covers the gate layer 220
  • the active layer 240 is disposed above the gate dielectric layer 230
  • the The source electrode 251 and the drain electrode 252 are both disposed above the active layer 240
  • the passivation layer 260 covers the active layer 240, the source electrode 251 and the drain electrode 252.
  • the flexible substrate is a glass substrate deposited with a polyimide coating.
  • the gate layer is a 300nm Al:Nd alloy thin film using DC magnetron sputtering.
  • the gate dielectric layer is an alumina neodymium gate dielectric layer with a thickness of 200 nm formed on the surface of the aluminum neodymium alloy by anodic oxidation.
  • the active layer is prepared by using a magnetron sputtering co-sputtering method, which specifically is to place a flexible substrate prepared with a gate electrode and a gate dielectric layer into a patterned metal mask and fix it by At the same time, using DC power magnetron sputtering control polycrystalline indium tin oxide target material and radio frequency power magnetron sputtering control polycrystalline zinc oxide target material at the same time, deposit 40nm thick indium tin zinc oxide film.
  • a magnetron sputtering co-sputtering method specifically is to place a flexible substrate prepared with a gate electrode and a gate dielectric layer into a patterned metal mask and fix it by At the same time, using DC power magnetron sputtering control polycrystalline indium tin oxide target material and radio frequency power magnetron sputtering control polycrystalline zinc oxide target material at the same time, deposit 40nm thick indium tin zinc oxide film.
  • the source electrode and the drain electrode are prepared by a DC magnetron sputtering method, which specifically is to place a glass substrate with an active layer prepared into a patterned metal mask for fixing, and the formed electrode is such that The width and length of the channel are respectively 300 ⁇ m and 300 ⁇ m, that is, the aspect ratio is 1:1; by using a polycrystalline indium tin oxide target controlled by DC power magnetron sputtering, a 120nm thick indium tin oxide film is deposited as the source electrode And drain electrode.
  • the thin film transistor prepared in this embodiment also needs to be annealed.
  • the annealing process is to place the prepared thin film transistor on a temperature-adjustable hot stage, set the temperature to 350° C., and anneal in the air for 180 minutes.
  • the thin film transistor prepared in this embodiment covers the active layer, source electrode and drain electrode with a passivation layer to isolate the flexible substrate of the thin film transistor and the back surface of the metal oxide channel layer from the atmosphere. Direct contact to avoid the adsorption of water molecules and adsorbed oxygen by the flexible substrate, as well as the erosion of the channel layer by the sensitive elements in the air such as excessive moisture and oxygen, thereby improving the carrier mobility on the thin film transistor and the thin film transistor Electrical stability.
  • step numbers in the above method embodiments they are set only for ease of elaboration and description, and the order between the steps is not limited in any way.
  • the execution order of the steps in the embodiments can be performed according to the understanding of those skilled in the art. Adaptive adjustment.

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Abstract

本发明公开了一种柔性衬底金属氧化物薄膜晶体管及其钝化层的制备方法，所述钝化层的制备方法包括以下步骤：在柔性衬底上沉积设定厚度的栅极层、栅介质层、有源层、源电极和漏电极，得到薄膜晶体管；将薄膜晶体管浸入烧杯内的磷酸正十八酯溶液内，将烧杯密封；将密封好的烧杯置于通风橱设定时间，将在薄膜晶体管表面得到的自组装单分子层作为钝化层。本发明能隔绝薄膜晶体管的柔性衬底以及金属氧化物沟道层的背表面与大气的直接接触，避免柔性衬底对水分子、吸附氧的吸附，以及过量的水分和氧气等空气中的敏感元素对沟道层的侵蚀作用，提高薄膜晶体管上载流子的迁移率以及薄膜晶体管的电学稳定性。本发明可广泛应用于半导体领域。

Description

柔性衬底金属氧化物薄膜晶体管及其钝化层的制备方法 技术领域
本发明涉及半导体领域，尤其是一种柔性衬底金属氧化物薄膜晶体管及其钝化层的制备方法。
背景技术
薄膜晶体管(TFT，Thin Film Transistor)主要应用于控制和驱动液晶显示(LCD，Liquid Crystal Display)、有机发光二极管(即OLED，Organic Light-Emitting Diode)显示器的子像素，是平板显示领域中最重要的电子器件之一。随着下一代有源矩阵平板显示技术朝着大尺寸、超高清、高帧率及外围电路全集成等方向发展，薄膜晶体管作为显示面板的构成要素，要求其必须提供足够的电学驱动能力。无机金属氧化物薄膜晶体管因其成本低廉、制备温度低、可见光透过率高和电学性能适中等特点，近来愈发受到关注与研究。其中，以非晶型铟镓锌氧化物，如a-InGaZnO等，作为有源层的底栅型薄膜晶体管最具代表性。然而，非晶型铟镓锌氧化物TFT在实际使用中的场效应迁移率通常限制在约10cm 2/Vs，不能满足高分辨率显示的要求。且柔性衬底多为有机聚合物，对外界环境诸如水分子，吸附氧等的阻隔能力差，从而使得氧化物薄膜晶体管的电学稳定性差。
发明内容
为解决上述技术问题的至少之一，本发明的目的在于：提供一种柔性衬底金属氧化物薄膜晶体管及其钝化层的制备方法，其能提高薄膜晶体管的载流子的迁移率和电学稳定性。
第一方面，本发明实施例提供了：
一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其包括以下步骤：
在柔性衬底上沉积设定厚度的栅极层、栅介质层、有源层、源电极和漏电极，得到薄膜晶体管；
将薄膜晶体管浸入烧杯内的磷酸正十八酯溶液内，将烧杯密封；
将密封好的烧杯置于通风橱设定时间，将在薄膜晶体管表面得到的自组装单分子层作为钝化层。
进一步地，所述磷酸正十八酯溶液的浓度为1mM至3mM，所述设定时间为12小时至36小时。
进一步地，还包括以下步骤：
取出制备好钝化层的薄膜晶体管，使用异丙醇和去离子水冲洗后，放入烘箱中烘干。
进一步地，所述烧杯内的溶液可设置为磷酸正十八酯、烷基膦酸盐、烷基硫醇、烷基脂肪酸和烷基硅烷中的一种或者多种的混合溶液。
进一步地，所述在柔性衬底上沉积设定厚度的栅极层、栅介质层、有源层、源电极和漏电极，得到薄膜晶体管，其具体包括：
在刚性玻璃衬底上制备柔性涂层，形成柔性衬底；
在柔性衬底上制备栅极层，对栅极层进行图形化形成栅极；
在柔性衬底和栅极上制备栅介质层，对栅介质层进行图形化；
在图形化后的栅介质层上制备有源层，对有源层进行图形化；
在图形化后的有源层上制备源电极和漏电极，并在对源电极和漏电极进行图形化后进行退火处理。
进一步地，所述退火处理的温度为350℃，退火气氛为空气，退火时间为180分钟。
进一步地，所述有源层为无机金属氧化物薄膜，所述在图形化后的栅介质层上制备有源层，其具体为：
通过磁控溅射法或者蒸发法将至少一种金属氧化物靶材沉积在已经形成栅极和栅介质层的柔性衬底上，将得到的设定厚度的金属氧化物半导体薄膜作为有源层。
进一步地，所述柔性衬底为有机材料聚酰亚胺。
第二方面，本发明实施例提供了：
一种柔性衬底金属氧化物薄膜晶体管，其包括钝化层，所述钝化层采用上述的柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法制备得到。
进一步地，还包括柔性衬底、栅极层、栅介质层、有源层、源电极和漏电极，所述栅极层设置于所述柔性衬底上方，所述栅介质层覆盖所述栅极层，所述有源层设置于所述栅介质层上方，所述源电极和漏电极均设置于所述有源层上方，所述钝化层覆盖在所述有源层、源电极和漏电极的上方。
本发明的有益效果是：本发明通过将薄膜晶体管浸入磷酸正十八酯溶液内，将在薄膜晶体管表面得到的自组装单分子层作为钝化层，以隔绝薄膜晶体管的柔性衬底以及金属氧化物沟道层的背表面与大气的直接接触，避免柔性衬底对水分子、吸附氧的吸附，以及过量的水分和氧气等空气中的敏感元素对沟道层的侵蚀作用，从而提高薄膜晶体管上载流子的迁移率以及薄膜晶体管的电学稳定性。
附图说明
图1为本发明一种具体实施例的柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法的流程图；
图2为本发明一种具体实施例的磷酸正十八酯自组装单分子层沉积在铟锡锌氧化物薄膜上的AFM图；
图3为一种具体实施例的没有经过自组装处理的金属氧化物薄膜水接触角测试图；
图4为设定时间为12h、溶液浓度为1mM的金属氧化物薄膜水接触角测试图；
图5为设定时间为12h、溶液浓度为2mM的金属氧化物薄膜水接触角测试图；
图6为设定时间为12h、溶液浓度为3mM的金属氧化物薄膜水接触角测试图；
图7为设定时间为24h、溶液浓度为1mM的金属氧化物薄膜水接触角测试图；
图8为设定时间为24h、溶液浓度为2mM的金属氧化物薄膜水接触角测试图；
图9为设定时间为24h、溶液浓度为3mM的金属氧化物薄膜水接触角测试图；
图10为设定时间为36h、溶液浓度为1mM的金属氧化物薄膜水接触角测试图；
图11为设定时间为36h、溶液浓度为2mM的金属氧化物薄膜水接触角测试图；
图12为设定时间为36h、溶液浓度为3mM的金属氧化物薄膜水接触角测试图；
图13为设定时间为24h、溶液浓度为2mM的金属氧化物薄膜晶体管与没有经过自组装的金属氧化物薄膜晶体管的转移特性曲线比较图；
图14为设定时间固定为12h时，溶液浓度分别为1mM、2mM和3mM的金属氧化物薄膜晶体管的转移特性曲线比较图；
图15为设定时间固定为24h时，溶液浓度分别为1mM、2mM和3mM的金属氧化物薄膜晶体管的转移特性曲线比较图；
图16为设定时间固定为36h时，溶液浓度分别为1mM、2mM和3mM的金属氧化物薄膜晶体管的转移特性曲线比较图；
图17为设定时间为24h、溶液浓度为2mM的柔性衬底铟锡锌氧化物薄膜晶体管在一定弯曲半径下的转移特性曲线图；
图18为设定时间为24h、溶液浓度为2mM的柔性衬底铟锡锌氧化物薄膜晶体管在一定空气湿度条件下施加正栅极偏压应力后的转移特性曲线图；
图19为设定时间为24h、溶液浓度为2mM的柔性衬底铟锡锌氧化物薄膜晶体管在一定空气湿度条件下施加负栅极偏压应力后的转移特性曲线图；
图20为本发明一种具体实施例的柔性衬底金属氧化物薄膜晶体管的制备方法的流程图；
图21为本发明一种具体实施例的柔性衬底金属氧化物薄膜晶体管的结构示意图。
具体实施方式
下面结合说明书附图和具体的实施例对本发明进行进一步的说明。
参照图1，本发明实施例提供了一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其包括步骤S110-S130：
S110、在柔性衬底上沉积设定厚度的栅极层、栅介质层、有源层、源电极和漏电极，得到薄膜晶体管；所述薄膜晶体管的具体结构需要根据不同类型进行制备。
在制备好薄膜晶体管后，配置设定浓度的磷酸正十八酯溶液，接着进行步骤S120。
S120、将薄膜晶体管浸入烧杯内的磷酸正十八酯溶液内，将烧杯密封；
S130、将密封好的烧杯置于通风橱设定时间，将在薄膜晶体管表面得到的自组装单分子层作为钝化层。
具体地，所述磷酸正十八酯溶液的浓度为1mM至3mM，所述设定时间为12小时至36小时。
在一些实施例中，当所述磷酸正十八酯溶液浓度为2mM，所述设定时间为24h时。通过型号为AFM-SEIKO-sweep的原子力显微镜观察薄膜的表面形貌，如图2所示，通过观察表面形貌可以发现，采用磷酸正十八酯自组装单分子层作为钝化层的金属氧化物薄膜具有较好的薄膜均匀性，利用软件计算出表面薄膜均方根粗糙度RMS为0.99nm，因此，采用磷酸正十八酯溶液浓度为2mM、设定时间为24h制备的自组装单分子层作为钝化层的金属氧化物薄膜晶体管具备较好的光滑度。
为了进一步验证本实施例的溶液浓度在1mM至3mM，通风设定时间在12小时至36小时内，自组装单分子层作为钝化层的金属氧化物薄膜晶体管具有良好的疏水性能，分别选取以下溶液浓度数值和通风设定时间数据进行测试：
选取没有经过自组装处理的金属氧化物薄膜进行测试，得到如图3所示的测试图；
选取设定时间为12h，磷酸正十八酯溶液的浓度为1mM的金属氧化物薄膜进行测试，得到如图4所示的测试图；
选取设定时间为12h，磷酸正十八酯溶液的浓度为2mM的金属氧化物薄膜进行测试，得到如图5所示的测试图；
选取设定时间为12h，磷酸正十八酯溶液的浓度为3mM的金属氧化物薄膜进行测试，得到如图6所示的测试图；
选取设定时间为24h，磷酸正十八酯溶液的浓度为1mM的金属氧化物薄膜进行测试，得到如图7所示的测试图；
选取设定时间为24h，磷酸正十八酯溶液的浓度为2mM的金属氧化物薄膜进行测试，得到如图8所示的测试图；
选取设定时间为24h，磷酸正十八酯溶液的浓度为3mM的金属氧化物薄膜进行测试，得到如图9所示的测试图；
选取设定时间为36h，磷酸正十八酯溶液的浓度为1mM的金属氧化物薄膜进行测试，得到如图10所示的测试图；
选取设定时间为36h，磷酸正十八酯溶液的浓度为2mM的金属氧化物薄膜进行测试，得到如图11所示的测试图；
选取设定时间为36h，磷酸正十八酯溶液的浓度为3mM的金属氧化物薄膜进行测试，得到如图12所示的测试图。
通过将图3分别与图4、图5、图6、图7、图8、图9、图10和图11进行比较可知，通过自组装单分子层的金属氧化物薄膜上的水滴具有更大的接触角，因此采用磷酸正十八酯溶液浓度为1mM-3mM、设定时间为12h-36h制备的自组装单分子层作为钝化层的金属氧化物薄膜晶体管具有更好的疏水性，所以，通过溶液法制备的自组装单分子层能在不损伤氧化物半导体层的前提下，有效修饰氧化物表面，以降低氧化物半导体的表面氧化能力，减少水、氧吸附和解吸附现象，从而提高器件的稳定性。同时，自组装单分子层能填充氧化物半导体上的悬挂键和一些结构缺陷，从而提高载流子的迁移率，以及减少柔性衬底对水氧的吸附。
而为了验证当所述磷酸正十八酯溶液浓度为2mM，所述设定时间为24h时，所制备的磷酸正十八酯自组装单分子层作为钝化层的柔性衬底金属氧化物薄膜晶体管表现出优越的电学性能与稳定性，对本实施例中磷酸正十八酯自组装单分子层作为钝化层的柔性衬底铟锡锌氧化物薄膜晶体管进行测试，测试过程使用Agilent 4155C半导体参数分析仪进行。如图13所示，通过将没有经过自组装处理的金属氧化物薄膜晶体管的转移特性曲线与采用磷酸正十八酯自组装单分子层作为钝化层的柔性衬底铟锡锌氧化物薄膜晶体管的转移特性曲线进行比较可知，采用磷酸正十八酯自组装单分子层作为钝化层的柔性衬底铟锡锌氧化物薄膜晶体管的电学性能较为优越。此外，由于经过自组装处理的薄膜晶体管的场效应迁移率可达16.8cm 2/Vs，亚阈值摆幅低于0.06V/decade，开关电流比达到108以上，说明磷酸正十八酯自组装单分子层作为钝化层的柔性衬底铟锡锌氧化物薄膜晶体管的载流子迁移率较高，缺陷态较少，关态电流小，并且自组装单分子层与金属氧化物薄膜之间具有极高质量的界面。
同时，为了进一步验证不同通风设定时间采用不同磷酸正十八酯溶液浓度时，所得到柔性衬底铟锡锌氧化物薄膜晶体管的电学性能和稳定性，分别进行以下测试：
当通风时间为12h时，磷酸正十八酯溶液浓度分别为1mM、2mM和3mM时，柔性衬底铟锡锌氧化物薄膜晶体管的转移特性曲线如图14所示；
当通风时间为24h时，磷酸正十八酯溶液浓度分别为1mM、2mM和3mM时，柔性衬底铟锡锌氧化物薄膜晶体管的转移特性曲线如图15所示；
当通风时间为36h时，磷酸正十八酯溶液浓度分别为1mM、2mM和3mM时，柔性衬底铟锡锌氧化物薄膜晶体管的转移特性曲线如图16所示。
通过比较图13、图14、图15和图16可知，随着通风时间的增加，虽然在低电流和低电压的情况下，转移特定曲线有所波动，但是，随着电流和电压的增加，柔性衬底铟锡锌氧化物薄膜晶体管的特定曲线均趋于稳定。因此，采用溶液浓度在1mM-3mM之间的磷酸正十八酯，通风时间在12h-36h之间制备的自组装单分子层作为钝化层的柔性衬底铟锡锌氧化物薄膜晶体管的电学性能相对于没有经过自组装处理的金属氧化物薄膜晶体管较为优越。
此外，将磷酸正十八酯溶液浓度为2mM、设定时间为24h的自组装单分子层作为钝化层的柔性衬底铟锡锌氧化物薄膜晶体管和未经处理的柔性衬底铟锡锌氧化物薄膜晶体管分别置于曲率半径为30mm的弯曲基板上进行测试，测试结果如图17所示，以磷酸正十八酯自组装单分子层作为钝化层的柔性衬底铟锡锌氧化物薄膜晶体管的转移特性曲线虽然出现一定负漂，但仍具有较好的场效应特性。
接着，将磷酸正十八酯溶液浓度为2mM、设定时间为24h的自组装单分子层作为钝化层的柔性衬底金属氧化物薄膜晶体管在相对湿度为60％的空气中测试正栅极偏压应力和负栅极偏压应力，在一个小时的测试时间段内的不同时间节点下，栅极偏压应力的测试结果如图18所示，负栅极偏压应力的测试结果如图19所示。从图18和图19可知，多条测试曲线基本重叠，说明柔性衬底金属氧化物薄膜晶体管在相对湿度为60％的空气中并无发生明显的退化现象，所以表明由磷酸正十八酯自组装单分子层作为钝化层的柔性衬底金属氧化物薄膜晶体管偏压应力稳定性也很好。
综上，本实施例通过将薄膜晶体管浸入磷酸正十八酯溶液内，将在薄膜晶体管表面得到的自组装单分子层作为钝化层，以隔绝薄膜晶体管的柔性衬底以及金属氧化物沟道层的背表面与大气的直接接触，避免柔性衬底对水分子、吸附氧的吸附，以及过量的水分和氧气等空气中的敏感元素对沟道层的侵蚀作用，从而提高薄膜晶体管上载流子的迁移率和薄膜晶体管的电学稳定性。
作为优选的实施方式，还包括以下步骤：
取出制备好钝化层的薄膜晶体管，使用异丙醇和去离子水冲洗，以对金属氧化物薄膜的 表面进行清洗，放入烘箱中烘干，便于后续自组装过程的实施。
作为优选的实施方式，所述烧杯内的溶液可设置为磷酸正十八酯、烷基膦酸盐、烷基硫醇、烷基脂肪酸和烷基硅烷中的一种或者多种的混合溶液。本实施例的溶液内的有机物能通过消除氧化物半导体表面的-OH基团，以在表面形成稳定且牢固的Si-O-M建，形成自组装的单分子层，从而减少水、氧吸附和解吸附现象，提高器件的稳定性，以及减少柔性衬底对水氧的吸附。
作为优选的实施方式，如图20所示，所述步骤S110，其具体包括步骤S111-S115：
S111、在刚性玻璃衬底上制备柔性涂层，形成柔性衬底；本步骤具体为在刚性玻璃衬底上沉积聚酰亚胺涂层。
S112、在柔性衬底上制备栅极层，对栅极层进行图形化形成栅极；其具体是选取沉积有聚酰亚胺涂层的玻璃基片，其厚度为0.7mm，接着依次使用去离子水和异丙醇将玻璃基片置于超声清洗机中清洗，每种清洗剂均清洗20分钟，清洗完后将玻璃基片放入恒温箱中烘干5小时，恒温箱的温度设为80℃，然后，在清洗好的玻璃基片上利用直流磁控溅射300nm的Al：Nd合金薄膜作为栅极层，并通过光刻对栅极进行图形化形成栅极。
S113、在柔性衬底和栅极上制备栅介质层，对栅介质层进行图形化；其具体是利用阳极氧化法在铝钕合金表面形成厚度为200nm的氧化铝钕栅介质层，接着用于阳极氧化的电解质溶液是酒石酸铵和乙二醇的混合物，将制备好栅极的基片和不锈钢板放入电解质溶液中分别作为阳极和阴极，先在阳极和阴极之间加恒定的电流，阳极和阴极之间的电压将随时间线性升高，当电压达到100V时保持电压恒定，直至阳极和阴极之间的电流减小至约为0.001mA/cm 2时，铝钕合金表面便形成一层厚度200nm的氧化铝钕层。
S114、在图形化后的栅介质层上制备有源层，对有源层进行图形化；本步骤是采用磁控溅射共溅射的方法制备有源层，将制备有栅极和栅介质层的柔性衬底放入图形化的金属掩膜版中固定，同时使用直流电源磁控溅射控制的多晶氧化铟锡靶材和射频电源磁控溅射控制的多晶氧化锌靶材的方式，沉积40nm厚的铟锡锌氧化物薄膜作为有源层。
其中，溅射多晶氧化铟锡靶材时的功率密度约为5.4W/cm 2，所述多晶氧化铟锡靶材的成分为In 2O 3:SnO 2＝90:10wt％；溅射多晶氧化锌靶材时的功率密度约为7.4W/cm 2。其中，溅射舱室气压被设定为0.8pa,使用的气体氛围为氧气和氩气，流量分别设定为6sccm和9sccm，溅射温度设定25℃，多晶氧化铟锡靶材的溅射功率设定为95W，多晶氧化锌靶材的溅射功率设定为120W，溅射时间设定为4分钟。
S115、在图形化后的有源层上制备源电极和漏电极，并在对源电极和漏电极进行图形化 后进行退火处理。本步骤采用直流磁控溅射的方法制备源电极和漏电极，具体是将上述已经制备好有源层的玻璃基片放入图形化的金属掩膜版中固定，形成的电极使得沟道的宽度和长度分别为300μm和300μm，即宽长比为1:1；接着通过使用直流电源磁控溅射控制的多晶氧化铟锡靶材，沉积120nm厚的氧化铟锡薄膜作为源电极和漏电极，其中，本步骤溅射的功率密度约为5.4W/cm 2，多晶氧化铟锡靶材的成分为In 2O 3:SnO 2＝90:10wt％，溅射舱室气压被设定为0.45pa,使用的气体氛围为氩气，流量设定为9sccm，溅射温度设定25℃，多晶氧化铟锡靶材的溅射功率设定为70W，溅射时间设定为20分钟。最后，将制备好的薄膜晶体管放置在温度可调节的热台上进行加热处理，其中，温度设置为350℃，在空气中退火180分钟。
作为优选的实施方式，所述有源层为无机金属氧化物薄膜，所述无机金属氧化物薄膜包括铟锌氧化物、锡锌氧化物、铟锡锌氧化物、铟镓锌氧化物和氟锡锌氧化物。所述在图形化后的栅介质层上制备有源层，其具体为：
通过磁控溅射法或者蒸发法将至少一种金属氧化物靶材沉积在已经形成栅极和栅介质层的柔性衬底上，将得到的设定厚度的金属氧化物半导体薄膜作为有源层。本实施例中，可以同时在柔性衬底上磁控溅射或者蒸发一种或者两种以上的金属氧化薄膜。
作为优选的实施方式，所述柔性衬底为有机材料聚酰亚胺。所述有机材料聚酰亚胺具有良好柔韧性、稳定性和耐热性，便于对晶体管的处理。
此外，如图21所示，本发明实施例还提供了一种柔性衬底金属氧化物薄膜晶体管，其包括钝化层260，所述钝化层260采用上述的柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法制备得到。所述钝化层260为磷酸正十八酯自组装单分子层，其能在不损伤氧化物半导体层的前提下，有效修饰氧化物表面，以降低氧化物半导体的表面氧化能力，减少水、氧吸附和解吸附现象，从而提高器件的稳定性。同时，自组装单分子层能填充氧化物半导体上的悬挂键和一些结构缺陷，从而提高载流子的迁移率，以及减少柔性衬底对水氧的吸附。
作为优选的实施方式，如图21所示，所述柔性衬底金属氧化物薄膜晶体管还包括柔性衬底210、栅极层220、栅介质层230、有源层240、源电极251和漏电极252，所述栅极层220设置于所述柔性衬底210上方，所述栅介质层230覆盖所述栅极层220，所述有源层240设置于所述栅介质层230上方，所述源电极251和漏电极252均设置于所述有源层240上方，所述钝化层260覆盖在所述有源层240、源电极251和漏电极252的上方。
本实施例中，所述柔性衬底为沉积有聚酰亚胺涂层的玻璃基片。所述栅极层为利用直流磁控溅射300nm的Al：Nd合金薄膜。所述栅介质层为利用阳极氧化法在铝钕合金表面形成厚度为200nm的氧化铝钕栅介质层。所述有源层为采用磁控溅射共溅射的方法制备有源层， 其具体是将制备有栅电极和栅介质层的柔性衬底放入图形化的金属掩膜版中固定，通过同时使用直流电源磁控溅射控制的多晶氧化铟锡靶材和射频电源磁控溅射控制的多晶氧化锌靶材的方式，沉积40nm厚的铟锡锌氧化物薄膜。所述源电极和漏电极是采用直流磁控溅射的方法制备得到的，其具体是将已经制备好有源层的玻璃基片放入图形化的金属掩膜版中固定，形成的电极使得沟道的宽度和长度分别为300μm和300μm，即宽长比为1:1；通过使用直流电源磁控溅射控制的多晶氧化铟锡靶材，沉积120nm厚的氧化铟锡薄膜作为源电极和漏电极。
本实施例制备好的薄膜晶体管还需要进行退火处理，所述退火过程为将制备好的薄膜晶体管放置在温度可调节的热台上，将温度设置为350℃，在空气中退火180分钟。
本实施例制备得到的薄膜晶体管通过将钝化层覆盖在所述有源层、源电极和漏电极的上方，以隔绝薄膜晶体管的柔性衬底以及金属氧化物沟道层的背表面与大气的直接接触，避免柔性衬底对水分子、吸附氧的吸附，以及过量的水分和氧气等空气中的敏感元素对沟道层的侵蚀作用，从而提高薄膜晶体管上载流子的迁移率和薄膜晶体管的电学稳定性。
对于上述方法实施例中的步骤编号，其仅为了便于阐述说明而设置，对步骤之间的顺序不做任何限定，实施例中的各步骤的执行顺序均可根据本领域技术人员的理解来进行适应性调整。
以上是对本发明的较佳实施进行了具体说明，但本发明并不限于所述实施例，熟悉本领域的技术人员在不违背本发明精神的前提下还可做作出种种的等同变形或替换，这些等同的变形或替换均包含在本申请权利要求所限定的范围内。

Claims (10)

  1. 一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：包括以下步骤：
    在柔性衬底上沉积设定厚度的栅极层、栅介质层、有源层、源电极和漏电极，得到薄膜晶体管；
    将薄膜晶体管浸入烧杯内的磷酸正十八酯溶液内，将烧杯密封；
    将密封好的烧杯置于通风橱设定时间，将在薄膜晶体管表面得到的自组装单分子层作为钝化层。
  2. 根据权利要求1所述的一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：所述磷酸正十八酯溶液的浓度为1mM至3mM，所述设定时间为12小时至36小时。
  3. 根据权利要求1所述的一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：还包括以下步骤：
    取出制备好钝化层的薄膜晶体管，使用异丙醇和去离子水冲洗后，放入烘箱中烘干。
  4. 根据权利要求1所述的一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：所述烧杯内的溶液可设置为磷酸正十八酯、烷基膦酸盐、烷基硫醇、烷基脂肪酸和烷基硅烷中的一种或者多种的混合溶液。
  5. 根据权利要求1所述的一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：所述在柔性衬底上沉积设定厚度的栅极层、栅介质层、有源层、源电极和漏电极，得到薄膜晶体管，其具体包括：
    在刚性玻璃衬底上制备柔性涂层，形成柔性衬底；
    在柔性衬底上制备栅极层，对栅极层进行图形化形成栅极；
    在柔性衬底和栅极上制备栅介质层，对栅介质层进行图形化；
    在图形化后的栅介质层上制备有源层，对有源层进行图形化；
    在图形化后的有源层上制备源电极和漏电极，并在对源电极和漏电极进行图形化后进行退火处理。
  6. 根据权利要求5所述的一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：所述退火处理的温度为350℃，退火气氛为空气，退火时间为180分钟。
  7. 根据权利要求5所述的一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：所述有源层为无机金属氧化物薄膜，所述在图形化后的栅介质层上制备有源层，其具体为：
    通过磁控溅射法或者蒸发法将至少一种金属氧化物靶材沉积在已经形成栅极和栅介质层的柔性衬底上，将得到的设定厚度的金属氧化物半导体薄膜作为有源层。
  8. 根据权利要求5所述的一种柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法，其特征在于：所述柔性衬底为有机材料聚酰亚胺。
  9. 一种柔性衬底金属氧化物薄膜晶体管，其特征在于：包括钝化层，所述钝化层采用如权利要求1-8任一项所述的柔性衬底金属氧化物薄膜晶体管的钝化层的制备方法制备得到。
  10. 根据权利要求9所述的一种柔性衬底金属氧化物薄膜晶体管，其特征在于：还包括柔性衬底、栅极层、栅介质层、有源层、源电极和漏电极，所述栅极层设置于所述柔性衬底上方，所述栅介质层覆盖所述栅极层，所述有源层设置于所述栅介质层上方，所述源电极和漏电极均设置于所述有源层上方，所述钝化层覆盖在所述有源层、源电极和漏电极的上方。
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