WO2021128547A1 - Goa电路及显示面板 - Google Patents

Goa电路及显示面板 Download PDF

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Publication number
WO2021128547A1
WO2021128547A1 PCT/CN2020/075860 CN2020075860W WO2021128547A1 WO 2021128547 A1 WO2021128547 A1 WO 2021128547A1 CN 2020075860 W CN2020075860 W CN 2020075860W WO 2021128547 A1 WO2021128547 A1 WO 2021128547A1
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WO
WIPO (PCT)
Prior art keywords
twenty
switch tube
switch
signal
tube
Prior art date
Application number
PCT/CN2020/075860
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English (en)
French (fr)
Inventor
奚苏萍
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/645,474 priority Critical patent/US11380277B2/en
Publication of WO2021128547A1 publication Critical patent/WO2021128547A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0257—Reduction of after-image effects

Definitions

  • the present invention relates to the field of display driving technology, in particular to a GOA circuit and a display panel with the GOA circuit.
  • the GOA circuit that is, the Gate Driver on Array technology, is to use the existing liquid crystal display panel Array process to fabricate the gate driving circuit on the base substrate to realize the driving mode of scanning lines progressively.
  • the present invention provides a GOA circuit and a display panel, which can release the residual electric charge in the inverter in time, and prevent the transistor device in the inverter from being damaged due to the residual electric charge, thereby affecting the stability of the inverter.
  • the present invention provides a GOA circuit and a display panel, which can release the residual charge in the inverter in time to solve the problem of the existing GOA circuit. Because the relevant nodes in the inverter will have residual charge, the device will be damaged and the inverter will be affected. Stability, which in turn affects the technical issues of the display.
  • the present invention provides a GOA circuit.
  • the GOA circuit includes a plurality of cascaded GOA units, wherein the n-th GOA unit includes a pull-up control module, a pull-up module, a stage transfer module, a pull-down module, a pull-down maintenance module, and a self Lift the capacitance, and n is a positive integer;
  • the pull-down maintenance module is used to maintain the potential of the control signal of the current stage, and the pull-down maintenance module includes a first inverter;
  • the first inverter includes an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, a fourteenth switch tube, a fifteenth switch tube, and a sixteenth switch tube, wherein the tenth switch tube
  • the source and gate of a switching tube, the source of the thirteenth switching tube are all connected to the first potential signal, the drain of the eleventh switching tube, the drain of the twelfth switching tube, and the The gate of the thirteenth switch and the drain of the sixteenth switch are both connected to the first node, the drain of the thirteenth switch, the drain of the fourteenth switch, and the first node
  • the drains of the fifteenth switching tube are all connected to the second node, the gate of the twelfth switching tube and the gate of the fourteenth switching tube are both connected to the control signal of this stage, and the twelfth switching tube is
  • the source of the fourteenth switch tube, the source of the fifteenth switch tube, and the source of the sixteenth switch tube are all connected to a low-
  • phase of the first potential signal is opposite to the phase of the second potential signal.
  • the pull-down maintenance module further includes a second inverter, and the second inverter includes a twenty-first switch tube, a twenty-second switch tube, a twenty-third switch tube, The twenty-fourth switch tube, the twenty-fifth switch tube, and the twenty-sixth switch tube;
  • the source and gate of the twenty-first switching tube, and the source of the twenty-third switching tube are all connected to the second potential signal
  • the drain and the gate of the twenty-first switching tube are The drain of the twenty-second switch transistor, the gate of the twenty-third switch transistor, and the drain of the twenty-six switch transistor are all connected to the third node, and the drain of the twenty-third switch transistor
  • the drain of the twenty-fourth switch tube and the drain of the twenty-fifth switch tube are both connected to the fourth node, the gate of the twenty-second switch tube and the twenty-fourth switch tube
  • the gates of are all connected to the control signal of the current level, the source of the twenty-second switching tube, the source of the twenty-fourth switching tube, the source of the twenty-fifth switching tube, and the The sources of the twenty-sixth switch tube are both connected to the low potential signal, and the gates of the twenty-fifth switch tube and the gates of the twenty-sixth switch tube are both connected to the first potential signal.
  • the pull-down maintenance module further includes a seventeenth switch tube and a twenty-seventh switch tube;
  • the gate of the seventeenth switch tube is connected to the second node, the source and drain of the seventeenth switch tube are respectively connected to the low potential signal and the control signal of the current stage, and the The gate of the twenty-seventh switch tube is connected to the fourth node, and the source and drain of the twenty-seventh switch tube are respectively connected to the low-potential signal and the current-level control signal.
  • the GOA unit further includes a reset module for resetting the potential of the control signal of the current level
  • the reset module includes a reset switch tube, the gate of the reset switch tube The electrode of the reset switch is connected to the reset signal, the source of the reset switch is connected to the low potential signal, and the drain of the reset switch is connected to the control signal of the current stage.
  • the pull-up control module receives the n-4th level transmission signal, and outputs the current level control signal according to the control of the n-4th level scan signal.
  • the pull-up module is electrically connected to the pull-up control module, and the pull-up module receives a clock signal and outputs a scan signal of the current level according to the control of the control signal of the current level.
  • one end of the bootstrap capacitor is connected to the control signal of the current stage, and the other end is connected to the scan signal of the current stage.
  • the stage transmission module includes a thirty-first switching tube, and the source of the thirty-first switching tube is connected to the clock signal, and the gate of the thirty-first switching tube is connected to For the control signal of the current stage, the drain of the thirty-first switch tube outputs the transmission signal of the current stage.
  • the pull-down module receives the low-level signal, and pulls the current-level control signal and the current-level scan signal to a low level according to the control of the n+4th level scan signal.
  • a display panel includes a GOA circuit, the GOA circuit includes a plurality of cascaded GOA units, wherein the nth-stage GOA unit includes a pull-up control module and a pull-up module , Stage pass module, pull-down module, pull-down maintenance module and bootstrap capacitor, and n is a positive integer;
  • the pull-down maintenance module is used to maintain the potential of the control signal of the current stage, and the pull-down maintenance module includes a first inverter;
  • the first inverter includes an eleventh switch tube, a twelfth switch tube, a thirteenth switch tube, a fourteenth switch tube, a fifteenth switch tube, and a sixteenth switch tube, wherein the tenth switch tube
  • the source and gate of a switching tube, the source of the thirteenth switching tube are all connected to the first potential signal, the drain of the eleventh switching tube, the drain of the twelfth switching tube, and the The gate of the thirteenth switch and the drain of the sixteenth switch are both connected to the first node, the drain of the thirteenth switch, the drain of the fourteenth switch, and the first node
  • the drains of the fifteenth switching tube are all connected to the second node, the gate of the twelfth switching tube and the gate of the fourteenth switching tube are both connected to the control signal of this stage, and the twelfth switching tube is
  • the source of the fourteenth switch tube, the source of the fifteenth switch tube, and the source of the sixteenth switch tube are all connected to a low-
  • phase of the first potential signal is opposite to the phase of the second potential signal.
  • the pull-down maintenance module further includes a second inverter, and the second inverter includes a twenty-first switch tube, a twenty-second switch tube, a twenty-third switch tube, The twenty-fourth switch tube, the twenty-fifth switch tube, and the twenty-sixth switch tube;
  • the source and gate of the twenty-first switching tube, and the source of the twenty-third switching tube are all connected to the second potential signal
  • the drain and the gate of the twenty-first switching tube are The drain of the twenty-second switch transistor, the gate of the twenty-third switch transistor, and the drain of the twenty-six switch transistor are all connected to the third node, and the drain of the twenty-third switch transistor
  • the drain of the twenty-fourth switch tube and the drain of the twenty-fifth switch tube are both connected to the fourth node, the gate of the twenty-second switch tube and the twenty-fourth switch tube
  • the gates of are all connected to the control signal of the current level, the source of the twenty-second switching tube, the source of the twenty-fourth switching tube, the source of the twenty-fifth switching tube, and the The sources of the twenty-sixth switch tube are both connected to the low potential signal, and the gates of the twenty-fifth switch tube and the gates of the twenty-sixth switch tube are both connected to the first potential signal.
  • the pull-down maintenance module further includes a seventeenth switch tube and a twenty-seventh switch tube;
  • the gate of the seventeenth switch tube is connected to the second node, the source and drain of the seventeenth switch tube are respectively connected to the low potential signal and the control signal of the current stage, and the The gate of the twenty-seventh switch tube is connected to the fourth node, and the source and drain of the twenty-seventh switch tube are respectively connected to the low-potential signal and the current-level control signal.
  • the GOA unit further includes a reset module for resetting the potential of the control signal of the current level
  • the reset module includes a reset switch tube, the gate of the reset switch tube The electrode of the reset switch is connected to the reset signal, the source of the reset switch is connected to the low potential signal, and the drain of the reset switch is connected to the control signal of the current stage.
  • the pull-up control module receives the n-4th level transmission signal, and outputs the current level control signal according to the control of the n-4th level scan signal.
  • the pull-up module is electrically connected to the pull-up control module, and the pull-up module receives a clock signal and outputs a scan signal of the current level according to the control of the control signal of the current level.
  • one end of the bootstrap capacitor is connected to the control signal of the current stage, and the other end is connected to the scan signal of the current stage.
  • the stage transmission module includes a thirty-first switching tube, and the source of the thirty-first switching tube is connected to the clock signal, and the gate of the thirty-first switching tube is connected to For the control signal of the current stage, the drain of the thirty-first switch tube outputs the transmission signal of the current stage.
  • the pull-down module receives the low-level signal, and pulls the current-level control signal and the current-level scan signal to a low level according to the control of the n+4th level scan signal.
  • the potential of the relevant node in the inverter is pulled down to a low potential in time, and the residual charge of the relevant node in the inverter is released, effectively reducing the reaction.
  • the current stress on the switch tube device in the phaser improves the life of the switch tube device and increases the stability of the GOA circuit.
  • FIG. 1 is a circuit diagram of a GOA unit provided by an embodiment of the present invention.
  • FIG. 2 is a circuit diagram of another GOA unit provided by an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a display panel provided by an embodiment of the present invention.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the present invention, “plurality” means two or more than two, unless otherwise specifically defined.
  • the "above” or “below” of the first feature of the second feature may include direct contact between the first and second features, or may include the first and second features Not in direct contact but through other features between them.
  • “above”, “above” and “above” the second feature of the first feature include the first feature being directly above and obliquely above the second feature, or it simply means that the level of the first feature is higher than that of the second feature.
  • the “below”, “below” and “below” the first feature of the second feature include the first feature directly below and obliquely below the second feature, or it simply means that the level of the first feature is smaller than the second feature.
  • the present invention is aimed at the technical problem of the existing GOA circuit and display panel, because the relevant nodes in the inverter will have residual charges, which will cause accelerated aging of the device, affect the stability of the inverter, and further affect the display technical problem.
  • This embodiment can solve this defect.
  • embodiments of the present invention provide a GOA circuit and a display panel having the GOA circuit.
  • the GOA circuit includes a plurality of cascaded GOA units. As shown in FIG. 1, the n-th GOA unit includes a pull-up control module 110, a pull-up module 120, a stage transfer module 130, a pull-down module 140, and a pull-down maintenance module. 150 and the bootstrap capacitor Cbt, and n is a positive integer;
  • the pull-down maintenance module 150 is used to maintain the potential of the control signal Qn of the current stage, and the pull-down maintenance module 150 includes a first inverter;
  • the first inverter includes an eleventh switching tube T11, a twelfth switching tube T12, a thirteenth switching tube T13, a fourteenth switching tube T14, a fifteenth switching tube T15, and a sixteenth switching tube T16,
  • the source and gate of the eleventh switching tube T11 and the source of the thirteenth switching tube T13 are both connected to the first potential signal LC1
  • the drain and the gate of the eleventh switching tube T11 are
  • the drain of the twelfth switch transistor T12, the gate of the thirteenth switch transistor T13, and the drain of the sixteenth switch transistor T16 are all connected to the first node Sn, and the drain of the thirteenth switch transistor T13
  • the drain of the fourteenth switching tube T14 and the drain of the fifteenth switching tube T15 are both connected to the second node Kn
  • the gates of T14 are all connected to the control signal Qn of the current stage, the source of the
  • phase of the first potential signal LC1 is opposite to the phase of the second potential signal LC2.
  • the circuit adds the fifteenth switch tube T15 and the sixteenth switch tube T16 to connect the second node Kn and the first node Sn respectively, and when the first inverter is not working , The first node Sn and the second node Kn are pulled down to a low potential, and the residual charges in the two nodes are released in time, which effectively reduces the current stress on the device in the inverter, thereby improving the device
  • the life span increases the stability of the GOA circuit.
  • switch tubes mentioned in the embodiments of the present invention can all be thin film electrical transistor devices, and the type of the thin film electrical transistor devices is not limited here.
  • the pull-down maintenance module 150 further includes a second inverter, and the second inverter includes a twenty-first switching tube T21, a twenty-second switching tube T22, and a second inverter.
  • the source and gate of the twenty-first switching tube T21, and the source of the twenty-third switching tube T23 are all connected to the second potential signal LC2, and the power of the twenty-first switching tube T21
  • the drain, the drain of the twenty-second switching tube T22, the gate of the twenty-third switching tube T23, and the drain of the twenty-sixth switching tube T26 are all connected to the third node Tn
  • the The drain of the twenty-third switch tube T23, the drain of the twenty-fourth switch tube T24, and the drain of the twenty-fifth switch tube T25 are all connected to the fourth node Pn
  • the gate of T22 and the gate of the twenty-fourth switching tube T24 are both connected to the control signal Qn of the current stage, the source of the twenty-second switching tube T22 and the gate of the twenty-fourth switching tube T24
  • the source, the source of the twenty-fifth switching tube T25, and the source of the twenty-sixth switching tube T26 are all
  • phase of the first potential signal LC1 is opposite to the phase of the second potential signal LC2.
  • the pull-down maintenance module 150 further includes a seventeenth switch tube T17 and a twenty-seventh switch tube T27, wherein the gate of the seventeenth switch tube T17 is connected to the second node Kn, and the The source and drain of the seventeenth switch tube T17 are respectively connected to the low potential signal VSS and the control signal Qn of the current stage, and the gate of the twenty-seventh switch tube T27 is connected to the fourth node Pn, so The source and drain of the twenty-seventh switch tube T27 are respectively connected to the low potential signal VSS and the current level control signal Qn.
  • the n-th GOA unit further includes a pull-up control module 110, a pull-up module 120, a stage transfer module 130, a pull-down module 140, and a bootstrap capacitor Cbt.
  • the pull-up control module 110 receives the n-4th level transmission signal Sn-4, and outputs the current level control signal Qn according to the control of the n-4th level scan signal Gn-4.
  • the pull-up module 120 is electrically connected to the pull-up control module 110, that is, one end of the pull-up module 120 receives the control signal Qn of the current level output by the pull-up control module 110, and the pull-up module 110 The other end of the device receives the clock signal CKn, and outputs the scan signal Gn of the current level according to the control of the control signal Qn of the current level.
  • One end of the bootstrap capacitor Cbt is connected to the current level control signal Qn, and the other end is connected to the current level scan signal Gn.
  • the stage transmission module 130 includes a thirty-first switching tube T31, and the source of the thirty-first switching tube T31 is connected to the clock signal CKn, and the gate of the thirty-first switching tube T31 is connected to the clock signal CKn.
  • the current stage control signal Qn, the drain of the thirty-first switch tube T31 outputs the current stage transmission signal STn.
  • One end of the pull-down module 140 receives the low level signal VSS, and the other end receives the n+4th level scan signal Gn+4, and controls the low level signal Gn+4 according to the n+4th level scan signal Gn+4.
  • the signal VSS is output to the current level control signal Qn and the current level scan signal Gn, that is, the current level control signal Qn and the current level scan signal Gn are pulled down to a low level.
  • the nth-stage GOA unit further includes a reset module 160 for resetting the potential of the control signal Qn of the current stage, and the reset module 160 includes a reset switch Tr.
  • the gate is connected to the reset signal Reset, the source of the reset switch Tr is connected to the low potential signal VSS, and the drain of the reset switch Tr is connected to the control signal Qn of the current stage.
  • the pull-up circuit 110 outputs the n-4th stage transmission signal Sn-4 to the current stage control signal Qn according to the control of the n-4th stage scan signal Gn-4, and transfers the current stage transmission signal Sn-4 to the current stage control signal Qn.
  • the level control signal Qn is pulled up to a high level.
  • the control terminal of the thirty-first switch tube T31 and the pull-up module 120 receives the current stage control signal Qn, and outputs the clock signal CKn to the current stage transmission signal STn and the current stage scan Signal Gn.
  • Both ends of the bootstrap capacitor Cbt are respectively connected to the current-level control signal Qn and the current-level scanning signal Gn, so that the current-level control signal Qn reaches a higher potential.
  • the control terminal of the pull-down circuit 140 receives the n+4th level scan signal Gn+4, and outputs the low level signal VSS to the current level control signal Qn and the current level scan signal Gn, namely Both the current level control signal Qn and the current level scan signal Gn are pulled down to a low level.
  • the pull-down sustain circuit 150 includes the first inverter and the second inverter.
  • the first potential signal LC1 is at a high potential at this time.
  • the second potential signal LC2 is at a low potential.
  • the fifteenth switch tube T15 and the sixteenth switch tube T16 are both in the off state, and the first potential signal LC1 is at a high potential.
  • the eleventh switch tube T11 is turned on and outputs a high potential, the first node Sn is at a high potential, and the thirteenth switch tube T13 is turned on, and the thirteenth switch tube T13 outputs a high potential, so that all The second node Kn is at a high potential, and the gate of the seventeenth switch transistor T17 is connected to the second node Kn, so the seventeenth switch transistor T17 is turned on, and the low potential signal VSS is output to the
  • the current level control signal Qn is used to maintain the current level control signal Qn at a low level.
  • the first inverter When the first inverter is not working, then the first potential signal LC1 is at a low potential, and the second potential signal LC2 is at a high potential.
  • the fifteenth switch tube T15 and the The sixteenth switch tube T16 is in the on state, and when the current level control signal Qn is at a low level, the eleventh switch tube T11, the twelfth switch tube T12, and the thirteenth switch tube
  • the transistor T13 and the fourteenth switch transistor T14 are both in the off state, and the sixteenth switch transistor T16 and the fifteenth switch transistor T15 output the low potential signal VSS to the first node Sn and the
  • the second node Kn pulls the first node Sn and the second node Kn down to a low potential, that is, releases the remaining electric charge at the first node Sn and the second node Kn, which can effectively avoid The remaining electric charge causes damage to the transistor device in the first inverter.
  • the eleventh switch tube T11 and the The twelfth switching tube T13 is in the off state
  • the twelfth switching tube T12 and the fourteenth switching tube T14 are in the on state
  • the twelfth switching tube T12 and the fourteenth switching tube T14 are respectively
  • the low potential signal VSS is output to the first node Sn and the second node Kn.
  • the sixteenth switch transistor T16 and the fifteenth switch transistor T15 are both in the on state, which can be advanced Pulling down the first node Sn and the second node Kn to a low potential also effectively reduces the leakage of the control signal Qn of the current stage.
  • the first inverter and the second inverter work alternately.
  • the first inverter is not working, that is, the first potential signal LC1 is at a low potential, and the second potential signal LC2 is at a high potential, that is, the second inverter is working.
  • the twenty-fifth switch tube T25 and the twenty-sixth switch tube T26 are both in the off state, and the second potential signal LC2 is at a high potential, the twenty-first switch tube T21 is turned on and outputs a high potential, then If the third node Tn is at a high potential, and the twenty-third switch tube T23 is turned on, the twenty-third switch tube T23 outputs a high potential, so that the fourth node Pn is at a high potential, and the The gate of the twenty-seventh switch transistor T27 is connected to the fourth node Pn, so the twenty-seventh switch transistor T27 is turned on and outputs the low potential signal VSS to the control signal Qn of the current stage to The current level control signal Qn is maintained at a low level.
  • the first inverter When the first inverter is working, that is, when the second inverter is not working, at this time, the first potential signal LC1 is a high potential, the second potential signal LC2 is a low potential, and the first potential signal LC2 is a low potential.
  • the twenty-fifth switch transistor T25 and the twenty-sixth switch transistor T26 are both in the on state.
  • the control signal Qn of the current level is at a low level
  • the twenty-first switch transistor T21, the twenty-first switch transistor T21 and the twenty-sixth switch transistor T26 are both in the on state.
  • the second switching tube T22, the twenty-third switching tube T23, and the twenty-fourth switching tube T24 are all in the off state, and the twenty-sixth switching tube T26 and the twenty-fifth switching tube T25 are
  • the low potential signal VSS is output to the third node Tn and the fourth node Pn, and the third node Tn and the fourth node Pn are pulled down to a low potential, that is, the third node Tn and the fourth node Pn
  • the residual charge at the fourth node Pn is released, which can effectively prevent the residual charge from causing damage to the transistor in the second inverter.
  • the current level control signal Qn When the current level control signal Qn is at a high potential, and at this time, the first potential signal LC1 is at a high potential, the second potential signal LC2 is at a low potential, and the twenty-first switch tube T21 and the The twenty-third switch tube T23 is in the off state, the twenty-second switch tube T22 and the twenty-fourth switch tube T24 are in the on state, and the twenty-second switch tube T22 and the twentieth switch tube T24 are in the on state.
  • the four switch transistors T24 respectively output the low potential signal VSS to the third node Tn and the fourth node Pn.
  • the twenty-sixth switch transistor T26 and the twenty-fifth switch transistor T25 When both are in the on state, the third node Tn and the fourth node Pn can be pulled down to a low potential in advance, which also effectively reduces the leakage of the control signal Qn of the current stage.
  • the nth-stage GOA unit further includes a reset module 160 for resetting the potential of the current-stage control signal Qn in the nth-stage GOA unit.
  • the switch tube Tr receives the reset signal Reset, it outputs the low-level signal VSS to the current-level control signal Qn, and pulls the current-level control signal Qn to a low level.
  • the eleventh switch transistor T11 and the thirteenth switch transistor T13 are in the off state for a long time, and the charge is likely to remain.
  • the transistor T15 and the sixteenth switch transistor T16 are turned on, the charge can be released, which can effectively reduce the current stress of the first inverter during operation, that is, improve the performance of the first inverter. Life, and when the first potential signal LC1 is at a high potential, the second potential signal LC2 is at a low potential, and the fifteenth switch transistor T15 and the sixteenth switch transistor T16 are in the off state and will not Affect the operation of the first inverter.
  • the twenty-first switch transistor T21 and the twenty-third switch transistor T23 are in the off state for a long time, and the charge is likely to remain.
  • the fifteenth switch transistor T25 and the twenty-sixth switch transistor T26 are turned on to release the charge, which can effectively reduce the current stress on the second inverter during operation, that is, increase the second The lifetime of the inverter, and when the first potential signal LC1 is at a low potential, the second potential signal LC2 is at a high potential, and the twenty-fifth switch tube T25 and the twenty-sixth switch tube T26 In the off state, the operation of the second inverter will not be affected.
  • the pull-up control module 110, the pull-up module 120, and the pull-up control module 110, the pull-up module 120, and the pull-up control module 110 are added to the nth-level GOA unit in the foregoing embodiment.
  • the setting method of the switch tube in the pull-down module 140 is only an embodiment provided by the present invention, and no other limitation is imposed.
  • the pull-up control module 110 includes a forty-first switch tube T41, and the gate of the forty-first switch tube T41 is connected to the n-4th level scan signal Gn-4, so The source of the forty-first switch tube T41 is connected to the n-4th stage transmission signal Sn-4, and according to the control of the n-4th stage scanning signal Gn-4, the n-4th stage The level-level transmission signal Sn-4 is output to the current level control signal Qn.
  • the pull-up module 120 includes a fifty-first switching tube T51, and the gate of the fifty-first switching tube T51 is connected to the control signal Qn of the current stage, and the source of the fifty-first switching tube T51 is connected to The clock signal CKn is output to the scan signal Gn of the current level according to the control of the control signal Qn of the current level.
  • the pull-down module 140 includes a 61st switching tube T61 and the 62nd switching tube T62, wherein the gate of the 61st switching tube T61 and the gate of the 62nd switching tube T62
  • the poles are all connected to the n+4th level scan signal Gn+4
  • the source of the 61st switching tube T61 and the source of the 62nd switching tube T62 are both connected to the low potential signal VSS
  • the drain of the 61st switching tube T61 is connected to the control signal Qn of the current stage
  • the drain of the 62nd switching tube T62 is connected to the scanning signal Gn of the current stage, and according to the n+4th
  • the control of the level scan signal Gn+4 pulls down the current level control signal Qn and the current level scan signal Gn to a low level respectively.
  • two switch devices are added to the first inverter and the second inverter respectively to release the remaining electric charge in the first inverter and the second inverter, which is effective This reduces the current stress on the transistor device in the inverter, thereby improving the life of the transistor device and increasing the stability of the GOA circuit.
  • an embodiment of the present invention also provides a display panel, as shown in FIG. 3, which is a schematic structural diagram of the display panel provided by the embodiment of the present invention.
  • the display panel includes a display area 100 and a GOA circuit 200 disposed on one side of the display area 100, wherein the GOA circuit 200 has the same structure and principle as the GOA circuit in the foregoing embodiment, and will not be repeated here.
  • FIG. 3 is only a schematic structural diagram of a display panel provided by an embodiment of the present invention, but it is not limited thereto.

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Abstract

公开了一种GOA电路及显示面板，GOA电路包括多个级联的GOA单元，且GOA单元的反相器中增加开关管器件，及时将低电位信号输出至反相器中的相关节点，以将相关节点残存的电荷释放掉。

Description

GOA电路及显示面板 技术领域
本发明涉及显示驱动技术领域，尤其涉及一种GOA电路及具有该GOA电路的显示面板。
 背景技术
GOA电路，即Gate Driver on Array技术，也就是利用现有液晶显示面板Array制程将栅极驱动电路制作在衬底基板上，实现对扫描线逐行扫描的驱动方式。
目前GOA技术已经广泛的运用于面板设计当中，因此不断优化GOA电路，使GOA电路性能更加稳定，显得尤为必要，现有设计中，由于反相器设计的原因，相关节点会残存电荷，容易加速器件的恶化，进而影响反相器的稳定，从而破坏了GOA电路的稳定性。
 技术问题
本发明提供一种GOA电路及显示面板，能够及时释放反相器中残留的电荷，防止反相器中的晶体管器件由于残存电荷而损坏，进而影响反相器的稳定性。
 技术解决方案
本发明提供一种GOA电路及显示面板，能够及时释放反相器中残留的电荷，以解决现有的GOA电路，由于反相器中相关节点会残留电荷，导致器件损坏，影响反相器的稳定，进而影响显示的技术问题。
为解决上述问题，本发明提供的技术方案如下：
本发明提供一种GOA电路，所述GOA电路包括多个级联的GOA单元，其中，第n级GOA单元包括上拉控制模块、上拉模块、级传模块、下拉模块、下拉维持模块以及自举电容，且n为正整数；
所述下拉维持模块用于维持本级控制信号的电位，且所述下拉维持模块包括第一反相器；
所述第一反相器包括第十一开关管、第十二开关管、第十三开关管、第十四开关管、第十五开关管以及第十六开关管，其中，所述第十一开关管的源极和栅极、所述第十三开关管的源极均连接第一电位信号，所述第十一开关管的漏极、所述第十二开关管的漏极、所述第十三开关管的栅极以及所述十六开关管的漏极均连接第一节点，所述第十三开关管的漏极、所述第十四开关管的漏极以及所述第十五开关管的漏极均连接第二节点，所述第十二开关管的栅极以及所述第十四开关管的栅极均连接所述本级控制信号，所述第十二开关管的源极、所述第十四开关管的源极、所述第十五开关管的源极以及所述第十六开关管的源极均连接低电位信号，以及所述第十五开关管的栅极和所述第十六开关管的栅极均连接第二电位信号；
其中，所述第一电位信号的相位和所述第二电位信号的相位相反。
根据本发明一实施例，所述下拉维持模块还包括第二反相器，且所述第二反相器包括第二十一开关管、第二十二开关管、第二十三开关管、第二十四开关管、第二十五开关管以及第二十六开关管；
其中，所述第二十一开关管的源极和栅极、所述第二十三开关管的源极均连接所述第二电位信号，所述第二十一开关管的漏极、所述第二十二开关管的漏极、所述第二十三开关管的栅极以及所述二十六开关管的漏极均连接第三节点，所述第二十三开关管的漏极、所述第二十四开关管的漏极以及所述第二十五开关管的漏极均连接第四节点，所述第二十二开关管的栅极以及所述第二十四开关管的栅极均连接所述本级控制信号，所述第二十二开关管的源极、所述第二十四开关管的源极、所述第二十五开关管的源极以及所述第二十六开关管的源极均连接所述低电位信号，以及所述第二十五开关管的栅极和所述第二十六开关管的栅极均连接所述第一电位信号。
根据本发明一实施例，所述下拉维持模块还包括第十七开关管和第二十七开关管；
其中，所述第十七开关管的栅极连接所述第二节点，所述第十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号，所述第二十七开关管的栅极连接所述第四节点，所述第二十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号。
根据本发明一实施例，所述GOA单元还包括重置模块，用于重置所述本级控制信号的电位，且所述重置模块包括重置开关管，所述重置开关管的栅极连接重置信号，所述重置开关管的源极连接所述低电位信号，所述重置开关管的漏极连接所述本级控制信号。
根据本发明一实施例，所述上拉控制模块接收第n-4级级传信号，并根据第n-4级扫描信号的控制输出所述本级控制信号。
根据本发明一实施例，所述上拉模块与所述上拉控制模块电连接，所述上拉模块接收时钟信号，并根据所述本级控制信号的控制输出本级扫描信号。
根据本发明一实施例，所述自举电容的一端连接所述本级控制信号，另一端连接所述本级扫描信号。
根据本发明一实施例，所述级传模块包括第三十一开关管，且所述第三十一开关管的源极连接所述时钟信号，所述第三十一开关管的栅极连接所述本级控制信号，所述第三十一开关管的漏极输出本级级传信号。
根据本发明一实施例，所述下拉模块接收所述低电位信号，并根据第n+4级扫描信号的控制将所述本级控制信号以及所述本级扫描信号下拉为低电位。
根据本发明的上述目的，提供一种显示面板，所述显示面板包括GOA电路，所述GOA电路包括多个级联的GOA单元，其中，第n级GOA单元包括上拉控制模块、上拉模块、级传模块、下拉模块、下拉维持模块以及自举电容，且n为正整数；
所述下拉维持模块用于维持本级控制信号的电位，且所述下拉维持模块包括第一反相器；
所述第一反相器包括第十一开关管、第十二开关管、第十三开关管、第十四开关管、第十五开关管以及第十六开关管，其中，所述第十一开关管的源极和栅极、所述第十三开关管的源极均连接第一电位信号，所述第十一开关管的漏极、所述第十二开关管的漏极、所述第十三开关管的栅极以及所述十六开关管的漏极均连接第一节点，所述第十三开关管的漏极、所述第十四开关管的漏极以及所述第十五开关管的漏极均连接第二节点，所述第十二开关管的栅极以及所述第十四开关管的栅极均连接所述本级控制信号，所述第十二开关管的源极、所述第十四开关管的源极、所述第十五开关管的源极以及所述第十六开关管的源极均连接低电位信号，以及所述第十五开关管的栅极和所述第十六开关管的栅极均连接第二电位信号；
其中，所述第一电位信号的相位和所述第二电位信号的相位相反。
根据本发明一实施例，所述下拉维持模块还包括第二反相器，且所述第二反相器包括第二十一开关管、第二十二开关管、第二十三开关管、第二十四开关管、第二十五开关管以及第二十六开关管；
其中，所述第二十一开关管的源极和栅极、所述第二十三开关管的源极均连接所述第二电位信号，所述第二十一开关管的漏极、所述第二十二开关管的漏极、所述第二十三开关管的栅极以及所述二十六开关管的漏极均连接第三节点，所述第二十三开关管的漏极、所述第二十四开关管的漏极以及所述第二十五开关管的漏极均连接第四节点，所述第二十二开关管的栅极以及所述第二十四开关管的栅极均连接所述本级控制信号，所述第二十二开关管的源极、所述第二十四开关管的源极、所述第二十五开关管的源极以及所述第二十六开关管的源极均连接所述低电位信号，以及所述第二十五开关管的栅极和所述第二十六开关管的栅极均连接所述第一电位信号。
根据本发明一实施例，所述下拉维持模块还包括第十七开关管和第二十七开关管；
其中，所述第十七开关管的栅极连接所述第二节点，所述第十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号，所述第二十七开关管的栅极连接所述第四节点，所述第二十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号。
根据本发明一实施例，所述GOA单元还包括重置模块，用于重置所述本级控制信号的电位，且所述重置模块包括重置开关管，所述重置开关管的栅极连接重置信号，所述重置开关管的源极连接所述低电位信号，所述重置开关管的漏极连接所述本级控制信号。
根据本发明一实施例，所述上拉控制模块接收第n-4级级传信号，并根据第n-4级扫描信号的控制输出所述本级控制信号。
根据本发明一实施例，所述上拉模块与所述上拉控制模块电连接，所述上拉模块接收时钟信号，并根据所述本级控制信号的控制输出本级扫描信号。
根据本发明一实施例，所述自举电容的一端连接所述本级控制信号，另一端连接所述本级扫描信号。
根据本发明一实施例，所述级传模块包括第三十一开关管，且所述第三十一开关管的源极连接所述时钟信号，所述第三十一开关管的栅极连接所述本级控制信号，所述第三十一开关管的漏极输出本级级传信号。
根据本发明一实施例，所述下拉模块接收所述低电位信号，并根据第n+4级扫描信号的控制将所述本级控制信号以及所述本级扫描信号下拉为低电位。
 有益效果
本发明通过在GOA电路的反相器中新增开关管器件，及时将反相器中的相关节点的电位下拉为低电位，释放反相器中相关节点残留的电荷，有效的减小了反相器内开关管器件受到的电流应力，从而提高了开关管器件的寿命，增加了GOA电路的稳定性。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的一种GOA单元电路图。
图2为本发明实施例提供的另一种GOA单元电路图。
图3为本发明实施例提供的一种显示面板结构示意图。
 本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本发明的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本发明和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本发明的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本发明的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通讯；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本发明中的具体含义。
在本发明中，除非另有明确的规定和限定，第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触，也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且，第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方，或仅仅表示第一特征水平高度小于第二特征。
下文的公开提供了许多不同的实施方式或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本发明。此外，本发明可以在不同例子中重复参考数字和/或参考字母，这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本发明提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
本发明针对现有的GOA电路及显示面板，由于反相器中相关节点会残留电荷，导致器件加速老化，影响反相器的稳定，进而影响显示的技术问题，本实施例能够解决该缺陷。
为解决上述技术问题，本发明实施例提供一种GOA电路及具有该GOA电路的显示面板。
所述GOA电路包括多个级联的GOA单元，其中，第n级GOA单元如图1所示，包括上拉控制模块110、上拉模块120、级传模块130、下拉模块140、下拉维持模块150以及自举电容Cbt，且n为正整数；
所述下拉维持模块150用于维持本级控制信号Qn的电位，且所述下拉维持模块150包括第一反相器；
所述第一反相器包括第十一开关管T11、第十二开关管T12、第十三开关管T13、第十四开关管T14、第十五开关管T15以及第十六开关管T16，其中，所述第十一开关管T11的源极和栅极、所述第十三开关管T13的源极均连接第一电位信号LC1，所述第十一开关管T11的漏极、所述第十二开关管T12的漏极、所述第十三开关管T13的栅极以及所述十六开关管T16的漏极均连接第一节点Sn，所述第十三开关管T13的漏极、所述第十四开关管T14的漏极以及所述第十五开关管T15的漏极均连接第二节点Kn，所述第十二开关管T12的栅极以及所述第十四开关管T14的栅极均连接所述本级控制信号Qn，所述第十二开关管T12的源极、所述第十四开关管T14的源极、所述第十五开关管T15的源极以及所述第十六开关管T16的源极均连接低电位信号VSS，以及所述第十五开关管T15的栅极和所述第十六开关管T16的栅极均连接第二电位信号LC2；
其中，所述第一电位信号LC1的相位和所述第二电位信号LC2的相位相反。
在实施应用过程中，在GOA电路的反相器的相关节点会残存电荷，容易加速器件的恶化，进而影响反相器的稳定，从而破坏了GOA电路的稳定性，而本实施例提供的GOA电路通过新增加所述第十五开关管T15以及所述第十六开关管T16，分别连接所述第二节点Kn和所述第一节点Sn，并在所述第一反相器不工作时，将所述第一节点Sn和所述第二节点Kn下拉为低电位，及时释放两个节点中残存的电荷，有效的减小了反相器内的器件受到的电流应力，从而提高了器件的寿命，增加了GOA电路的稳定性。
需要说明的是，本发明实施例中提及的开关管均可以为薄膜电晶体管器件，且所述薄膜电晶体管器件的类型在此不作限定。
具体地，如图1所示，所述下拉维持模块150还包括第二反相器，且所述第二反相器包括第二十一开关管T21、第二十二开关管T22、第二十三开关管T23、第二十四开关管T24、第二十五开关管T25以及第二十六开关管T26；
其中，所述第二十一开关管T21的源极和栅极、所述第二十三开关管T23的源极均连接所述第二电位信号LC2，所述第二十一开关管T21的漏极、所述第二十二开关管T22的漏极、所述第二十三开关管T23的栅极以及所述二十六开关管T26的漏极均连接第三节点Tn，所述第二十三开关管T23的漏极、所述第二十四开关管T24的漏极以及所述第二十五开关管T25的漏极均连接第四节点Pn，所述第二十二开关管T22的栅极以及所述第二十四开关管T24的栅极均连接所述本级控制信号Qn，所述第二十二开关管T22的源极、所述第二十四开关管T24的源极、所述第二十五开关管T25的源极以及所述第二十六开关管T26的源极均连接所述低电位信号VSS，以及所述第二十五开关管T25的栅极和所述第二十六开关管T26的栅极均连接所述第一电位信号LC1。
且所述第一电位信号LC1的相位和所述第二电位信号LC2的相位相反。
更进一步地，所述下拉维持模块150还包括第十七开关管T17和第二十七开关管T27，其中，所述第十七开关管T17的栅极连接所述第二节点Kn，所述第十七开关管T17的源极和漏极分别连接所述低电位信号VSS和所述本级控制信号Qn，所述第二十七开关管T27的栅极连接所述第四节点Pn，所述第二十七开关管T27的源极和漏极分别连接所述低电位信号VSS和所述本级控制信号Qn。
另外，在本实施例中，如图1所示，所述第n级GOA单元还包括上拉控制模块110、上拉模块120、级传模块130、下拉模块140、以及自举电容Cbt。
其中，所述上拉控制模块110接收第n-4级级传信号Sn-4，并根据第n-4级扫描信号Gn-4的控制输出所述本级控制信号Qn。
所述上拉模块120与所述上拉控制模块110电连接，即所述上拉模块120的一端接收所述上拉控制模块110输出的所述本级控制信号Qn，所述上拉模块110的另一端接收时钟信号CKn，并根据所述本级控制信号Qn的控制输出本级扫描信号Gn。
所述自举电容Cbt的一端连接所述本级控制信号Qn，另一端连接所述本级扫描信号Gn。
所述级传模块130包括第三十一开关管T31，且所述第三十一开关管T31的源极连接所述时钟信号CKn，所述第三十一开关管T31的栅极连接所述本级控制信号Qn，所述第三十一开关管T31的漏极输出本级级传信号STn。
所述下拉模块140的一端接收所述低电位信号VSS，另一端接收第n+4级扫描信号Gn+4，并根据所述第n+4级扫描信号Gn+4的控制将所述低电位信号VSS输出至所述本级控制信号Qn以及所述本级扫描信号Gn，即将所述本级控制信号Qn以及所述本级扫描信号Gn下拉为低电位。
所述第n级GOA单元还包括重置模块160，用于重置所述本级控制信号Qn的电位，且所述重置模块160包括重置开关管Tr，所述重置开关管Tr的栅极连接重置信号Reset，所述重置开关管Tr的源极连接所述低电位信号VSS，所述重置开关管Tr的漏极连接所述本级控制信号Qn。
下面对本实施例中的所述第n级GOA单元的运行原理进行描述。
所述上拉电路110根据所述第n-4级扫描信号Gn-4的控制，将所述第n-4级级传信号Sn-4输出至所述本级控制信号Qn，将所述本级控制信号Qn上拉为高电位。
所述第三十一开关管T31和所述上拉模块120的控制端接收所述本级控制信号Qn，并输出所述时钟信号CKn至所述本级级传信号STn以及所述本级扫描信号Gn。
所述自举电容Cbt的两端分别连接所述本级控制信号Qn以及所述本级扫描信号Gn，使得所述本级控制信号Qn达到更高电位。
所述下拉电路140的控制端接收所述第n+4级扫描信号Gn+4，并将所述低电位信号VSS输出至所述本级控制信号Qn以及所述本级扫描信号Gn，即将所述本级控制信号Qn以及所述本级扫描信号Gn均下拉为低电位。
所述下拉维持电路150包括所述第一反相器和所述第二反相器，其中，当所述第一反相器工作时，则此时所述第一电位信号LC1为高电位，所述第二电位信号LC2为低电位，此时，所述第十五开关管T15和所述第十六开关管T16均处于关闭状态，所述第一电位信号LC1为高电位，则所述第十一开关管T11开启，并输出高电位，则所述第一节点Sn为高电位，所述第十三开关管T13开启，则所述第十三开关管T13输出高电位，以使所述第二节点Kn为高电位，且所述第十七开关管T17的栅极连接第二节点Kn，所以所述第十七开关管T17开启，并将所述低电位信号VSS输出至所述本级控制信号Qn，以将所述本级控制信号Qn维持在低电位。
当所述第一反相器不工作时，则此时所述第一电位信号LC1为低电位，所述第二电位信号LC2为高电位，此时，所述第十五开关管T15和所述第十六开关管T16均处于开启状态，当所述本级控制信号Qn为低电位时，则所述第十一开关管T11、所述第十二开关管T12、所述第十三开关管T13以及所述第十四开关管T14均处于关闭状态，所述第十六开关管T16和所述第十五开关管T15将所述低电位信号VSS输出至所述第一节点Sn以及所述第二节点Kn，将所述第一节点Sn以及所述第二节点Kn拉低至低电位，即将所述第一节点Sn和所述第二节点Kn处残存的电荷释放掉，可以有效避免残存电荷对所述第一反相器中的电晶体器件造成破坏。
当所述本级控制信号Qn为高电位时，且此时所述第一电位信号LC1为低电位，所述第二电位信号LC2为高电位，则所述第十一开关管T11和所述第十二开关管T13均处于关闭状态，所述第十二开关管T12和所述第十四开关管T14处于开启状态，所述第十二开关管T12和所述第十四开关管T14分别将所述低电位信号VSS输出至所述第一节点Sn以及所述第二节点Kn，此时，所述第十六开关管T16和所述第十五开关管T15均处于开启状态，可提前将所述第一节点Sn和所述第二节点Kn下拉为低电位，同样有效减小所述本级控制信号Qn的漏电。
在本发明实施例中，因为所述第一电位信号LC1的相位和所述第二电位信号LC2的相位相反，则所述第一反相器和所述第二反相器交替工作，当所述第一反相器不工作时，即所述第一电位信号LC1处于低电位，则所述第二电位信号LC2处于高电位，即所述第二反相器工作，此时，所述第二十五开关管T25和所述第二十六开关管T26均处于关闭状态，所述第二电位信号LC2为高电位，则所述第二十一开关管T21开启，并输出高电位，则所述第三节点Tn为高电位，所述第二十三开关管T23开启，则所述第二十三开关管T23输出高电位，以使所述第四节点Pn为高电位，且所述第二十七开关管T27的栅极连接所述第四节点Pn，所以所述第二十七开关管T27开启，并将所述低电位信号VSS输出至所述本级控制信号Qn，以将所述本级控制信号Qn维持在低电位。
当所述第一反相工作时，即所述第二反相器不工作时，此时，所述第一电位信号LC1为高电位，所述第二电位信号LC2为低电位，所述第二十五开关管T25和所述第二十六开关管T26均处于开启状态，当所述本级控制信号Qn为低电位时，则所述第二十一开关管T21、所述第二十二开关管T22、所述第二十三开关管T23以及所述第二十四开关管T24均处于关闭状态，所述第二十六开关管T26和所述第二十五开关管T25将所述低电位信号VSS输出至所述第三节点Tn以及所述第四节点Pn，将所述第三节点Tn以及所述第四节点Pn拉低至低电位，即将所述第三节点Tn以及所述第四节点Pn处残存的电荷释放掉，可以有效避免残存电荷对所述第二反相器中的电晶体器件造成破坏。
当所述本级控制信号Qn为高电位时，且此时所述第一电位信号LC1处于高电位，所述第二电位信号LC2处于低电位，所述第二十一开关管T21和所述第二十三开关管T23均处于关闭状态，所述第二十二开关管T22和所述第二十四开关管T24处于开启状态，所述第二十二开关管T22和所述第二十四开关管T24分别将所述低电位信号VSS输出至所述第三节点Tn以及所述第四节点Pn，此时，所述第二十六开关管T26和所述第二十五开关管T25均处于开启状态，可提前将所述第三节点Tn以及所述第四节点Pn下拉为低电位，同样有效减小所述本级控制信号Qn漏电。
另外，在本实施例中，所述第n级GOA单元还包括重置模块160，用于重置所述第n级GOA单元中的所述本级控制信号Qn的电位，当所述重置开关管Tr接收到所述重置信号Reset时，即将所述低电位信号VSS输出至所述本级控制信号Qn，将所述本级控制信号Qn下拉为低电位。
综上，当所述第一电位信号LC1为低电位时，所述第十一开关管T11和所述第十三开关管T13长时间处于关闭状态，容易残存电荷，则此时第十五开关管T15和所述第十六开关管T16开启，便可将电荷释放掉，可有效减小所述第一反相器在工作时受到的电流应力，即提高了所述第一反相器的寿命，而当所述第一电位信号LC1为高电位时，所述第二电位信号LC2为低电位，所述第十五开关管T15和所述第十六开关管T16处于关闭状态，不会影响所述第一反相器的工作。
同理，当所述第二电位信号LC2为低电位时，所述第二十一开关管T21和所述第二十三开关管T23长时间处于关闭状态，容易残存电荷，则此时第二十五开关管T25和所述第二十六开关管T26开启，便可将电荷释放掉，可有效减小所述第二反相器在工作时受到的电流应力，即提高了所述第二反相器的寿命，而当所述第一电位信号LC1为低电位时，所述第二电位信号LC2为高电位，所述第二十五开关管T25和所述第二十六开关管T26处于关闭状态，不会影响所述第二反相器的工作。
在本发明的另一实施例中，如图2所示，即在上述实施例中的所述第n级GOA单元中增加一种所述上拉控制模块110、所述上拉模块120以及所述下拉模块140中开关管的设置方式，且仅为本发明提供的一种实施例，不做其他限定。
在本实施例中，所述上拉控制模块110包括第四十一开关管T41，且所述第四十一开关管T41的栅极连接所述第n-4级扫描信号Gn-4，所述第四十一开关管T41的源极连接所述第n-4级级传信号Sn-4，并根据所述第n-4级扫描信号Gn-4的控制，将所述第n-4级级传信号Sn-4输出至所述本级控制信号Qn。
所述上拉模块120包括第五十一开关管T51，且所述第五十一开关管T51的栅极连接所述本级控制信号Qn，所述第五十一开关管T51的源极连接所述时钟信号CKn，并根据所述本级控制信号Qn的控制将所述时钟信号CKn输出至所述本级扫描信号Gn。
所述下拉模块140包括第六十一开关管T61和所述第六十二开关管T62，其中，所述第六十一开关管T61的栅极和所述第六十二开关管T62的栅极均连接所述第n+4级扫描信号Gn+4，所述第六十一开关管T61的源极和所述第六十二开关管T62的源极均连接所述低电位信号VSS，所述第六十一开关管T61的漏极连接所述本级控制信号Qn，所述第六十二开关管T62的漏极连接所述本级扫描信号Gn，并根据所述第n+4级扫描信号Gn+4的控制分别将所述本级控制信号Qn和所述本级扫描信号Gn下拉为低电位。
综上，本发明实施例通过在第一反相器和第二反相器中分别新增两个开关管器件，以将第一反相器和第二反相器中残存的电荷释放，有效的减小了反相器内的晶体管器件受到的电流应力，从而提高了晶体管器件的寿命，增加了GOA电路的稳定性。
另外，本发明实施例还提供一种显示面板，如图3所示，为本发明实施例提供的显示面板的结构示意图。
所述显示面板包括显示区100以及设置于所述显示区域100一侧的GOA电路200，其中，所述GOA电路200与上述实施例中的GOA电路的结构和原理相同，这里不再赘述。
需要说明的是，图3中仅为本发明实施例提供的一种显示面板结构示意图，但不限于此。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本发明实施例所提供的一种GOA电路及显示面板进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例的技术方案的范围。

Claims (18)

  1. 一种GOA电路，所述GOA电路包括多个级联的GOA单元，其中，第n级GOA单元包括上拉控制模块、上拉模块、级传模块、下拉模块、下拉维持模块以及自举电容，且n为正整数；
    所述下拉维持模块用于维持本级控制信号的电位，且所述下拉维持模块包括第一反相器；
    所述第一反相器包括第十一开关管、第十二开关管、第十三开关管、第十四开关管、第十五开关管以及第十六开关管，其中，所述第十一开关管的源极和栅极、所述第十三开关管的源极均连接第一电位信号，所述第十一开关管的漏极、所述第十二开关管的漏极、所述第十三开关管的栅极以及所述十六开关管的漏极均连接第一节点，所述第十三开关管的漏极、所述第十四开关管的漏极以及所述第十五开关管的漏极均连接第二节点，所述第十二开关管的栅极以及所述第十四开关管的栅极均连接所述本级控制信号，所述第十二开关管的源极、所述第十四开关管的源极、所述第十五开关管的源极以及所述第十六开关管的源极均连接低电位信号，以及所述第十五开关管的栅极和所述第十六开关管的栅极均连接第二电位信号；
    其中，所述第一电位信号的相位和所述第二电位信号的相位相反。
  2. 根据权利要求1所述的GOA电路，其中，所述下拉维持模块还包括第二反相器，且所述第二反相器包括第二十一开关管、第二十二开关管、第二十三开关管、第二十四开关管、第二十五开关管以及第二十六开关管；
    其中，所述第二十一开关管的源极和栅极、所述第二十三开关管的源极均连接所述第二电位信号，所述第二十一开关管的漏极、所述第二十二开关管的漏极、所述第二十三开关管的栅极以及所述二十六开关管的漏极均连接第三节点，所述第二十三开关管的漏极、所述第二十四开关管的漏极以及所述第二十五开关管的漏极均连接第四节点，所述第二十二开关管的栅极以及所述第二十四开关管的栅极均连接所述本级控制信号，所述第二十二开关管的源极、所述第二十四开关管的源极、所述第二十五开关管的源极以及所述第二十六开关管的源极均连接所述低电位信号，以及所述第二十五开关管的栅极和所述第二十六开关管的栅极均连接所述第一电位信号。
  3. 根据权利要求2所述的GOA电路，其中，所述下拉维持模块还包括第十七开关管和第二十七开关管；
    其中，所述第十七开关管的栅极连接所述第二节点，所述第十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号，所述第二十七开关管的栅极连接所述第四节点，所述第二十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号。
  4. 根据权利要求1所述的GOA电路，其中，所述GOA单元还包括重置模块，用于重置所述本级控制信号的电位，且所述重置模块包括重置开关管，所述重置开关管的栅极连接重置信号，所述重置开关管的源极连接所述低电位信号，所述重置开关管的漏极连接所述本级控制信号。
  5. 根据权利要求1所述的GOA电路，其中，所述上拉控制模块接收第n-4级级传信号，并根据第n-4级扫描信号的控制输出所述本级控制信号。
  6. 根据权利要求5所述的GOA电路，其中，所述上拉模块与所述上拉控制模块电连接，所述上拉模块接收时钟信号，并根据所述本级控制信号的控制输出本级扫描信号。
  7. 根据权利要求6所述的GOA电路，其中，所述自举电容的一端连接所述本级控制信号，另一端连接所述本级扫描信号。
  8. 根据权利要求6所述的GOA电路，其中，所述级传模块包括第三十一开关管，且所述第三十一开关管的源极连接所述时钟信号，所述第三十一开关管的栅极连接所述本级控制信号，所述第三十一开关管的漏极输出本级级传信号。
  9. 根据权利要求6所述的GOA电路，其中，所述下拉模块接收所述低电位信号，并根据第n+4级扫描信号的控制将所述本级控制信号以及所述本级扫描信号下拉为低电位。
  10. 一种显示面板，所述显示面板包括GOA电路，所述GOA电路包括多个级联的GOA单元，其中，第n级GOA单元包括上拉控制模块、上拉模块、级传模块、下拉模块、下拉维持模块以及自举电容，且n为正整数；
    所述下拉维持模块用于维持本级控制信号的电位，且所述下拉维持模块包括第一反相器；
    所述第一反相器包括第十一开关管、第十二开关管、第十三开关管、第十四开关管、第十五开关管以及第十六开关管，其中，所述第十一开关管的源极和栅极、所述第十三开关管的源极均连接第一电位信号，所述第十一开关管的漏极、所述第十二开关管的漏极、所述第十三开关管的栅极以及所述十六开关管的漏极均连接第一节点，所述第十三开关管的漏极、所述第十四开关管的漏极以及所述第十五开关管的漏极均连接第二节点，所述第十二开关管的栅极以及所述第十四开关管的栅极均连接所述本级控制信号，所述第十二开关管的源极、所述第十四开关管的源极、所述第十五开关管的源极以及所述第十六开关管的源极均连接低电位信号，以及所述第十五开关管的栅极和所述第十六开关管的栅极均连接第二电位信号；
    其中，所述第一电位信号的相位和所述第二电位信号的相位相反。
  11. 根据权利要求10所述的显示面板，其中，所述下拉维持模块还包括第二反相器，且所述第二反相器包括第二十一开关管、第二十二开关管、第二十三开关管、第二十四开关管、第二十五开关管以及第二十六开关管；
    其中，所述第二十一开关管的源极和栅极、所述第二十三开关管的源极均连接所述第二电位信号，所述第二十一开关管的漏极、所述第二十二开关管的漏极、所述第二十三开关管的栅极以及所述二十六开关管的漏极均连接第三节点，所述第二十三开关管的漏极、所述第二十四开关管的漏极以及所述第二十五开关管的漏极均连接第四节点，所述第二十二开关管的栅极以及所述第二十四开关管的栅极均连接所述本级控制信号，所述第二十二开关管的源极、所述第二十四开关管的源极、所述第二十五开关管的源极以及所述第二十六开关管的源极均连接所述低电位信号，以及所述第二十五开关管的栅极和所述第二十六开关管的栅极均连接所述第一电位信号。
  12. 根据权利要求11所述的显示面板，其中，所述下拉维持模块还包括第十七开关管和第二十七开关管；
    其中，所述第十七开关管的栅极连接所述第二节点，所述第十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号，所述第二十七开关管的栅极连接所述第四节点，所述第二十七开关管的源极和漏极分别连接所述低电位信号和所述本级控制信号。
  13. 根据权利要求10所述的显示面板，其中，所述GOA单元还包括重置模块，用于重置所述本级控制信号的电位，且所述重置模块包括重置开关管，所述重置开关管的栅极连接重置信号，所述重置开关管的源极连接所述低电位信号，所述重置开关管的漏极连接所述本级控制信号。
  14. 根据权利要求10所述的显示面板，其中，所述上拉控制模块接收第n-4级级传信号，并根据第n-4级扫描信号的控制输出所述本级控制信号。
  15. 根据权利要求14所述的显示面板，其中，所述上拉模块与所述上拉控制模块电连接，所述上拉模块接收时钟信号，并根据所述本级控制信号的控制输出本级扫描信号。
  16. 根据权利要求15所述的显示面板，其中，所述自举电容的一端连接所述本级控制信号，另一端连接所述本级扫描信号。
  17. 根据权利要求15所述的显示面板，其中，所述级传模块包括第三十一开关管，且所述第三十一开关管的源极连接所述时钟信号，所述第三十一开关管的栅极连接所述本级控制信号，所述第三十一开关管的漏极输出本级级传信号。
  18. 根据权利要求15所述的显示面板，其中，所述下拉模块接收所述低电位信号，并根据第n+4级扫描信号的控制将所述本级控制信号以及所述本级扫描信号下拉为低电位。
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