WO2020259199A1 - 转移结构及其制备方法、转移装置及其制备方法 - Google Patents

转移结构及其制备方法、转移装置及其制备方法 Download PDF

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WO2020259199A1
WO2020259199A1 PCT/CN2020/093140 CN2020093140W WO2020259199A1 WO 2020259199 A1 WO2020259199 A1 WO 2020259199A1 CN 2020093140 W CN2020093140 W CN 2020093140W WO 2020259199 A1 WO2020259199 A1 WO 2020259199A1
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layer
substrate
electrode
cavity
transfer structure
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PCT/CN2020/093140
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English (en)
French (fr)
Inventor
岳阳
杨桐
舒适
于勇
黄海涛
李翔
姚琪
蒋学
袁广才
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京东方科技集团股份有限公司
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Priority to US17/264,902 priority Critical patent/US20210305073A1/en
Publication of WO2020259199A1 publication Critical patent/WO2020259199A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B65—CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
    • B65G—TRANSPORT OR STORAGE DEVICES, e.g. CONVEYORS FOR LOADING OR TIPPING, SHOP CONVEYOR SYSTEMS OR PNEUMATIC TUBE CONVEYORS
    • B65G47/00—Article or material-handling devices associated with conveyors; Methods employing such devices
    • B65G47/74—Feeding, transfer, or discharging devices of particular kinds or types
    • B65G47/90—Devices for picking-up and depositing articles or materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/20—Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
    • H10N30/206—Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators using only longitudinal or thickness displacement, e.g. d33 or d31 type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/704—Piezoelectric or electrostrictive devices based on piezoelectric or electrostrictive films or coatings
    • H10N30/706—Piezoelectric or electrostrictive devices based on piezoelectric or electrostrictive films or coatings characterised by the underlying bases, e.g. substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N39/00—Integrated devices, or assemblies of multiple devices, comprising at least one piezoelectric, electrostrictive or magnetostrictive element covered by groups H10N30/00 – H10N35/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Definitions

  • the present disclosure relates to a transfer structure and a preparation method thereof, a transfer device and a preparation method thereof.
  • Micro LED (Micro Light-Emitting Diode) displays have low power consumption, high brightness, ultra-high resolution and color saturation, fast response speed, and ultra-power-saving.
  • the power consumption of Micro LED displays is LCD 10% of the power consumption, which is 50% of the power consumption of the organic electroluminescent display), long life, high efficiency, adaptability to various sizes, seamless splicing and other advantages, thus becoming the most promising next-generation new display technology at present .
  • Micro LED displays there are many problems to be solved in the production process of Micro LED displays. For example, how to transfer millions or even tens of millions of micron-level Micro LED dies (also called ⁇ LED dies) to the circuit substrate correctly and efficiently.
  • micron-level Micro LED dies also called ⁇ LED dies
  • the embodiments of the present disclosure provide a transfer structure and a preparation method thereof, a transfer device and a preparation method thereof.
  • the transfer structure and transfer device can be used to transfer Micro LED dies.
  • At least one embodiment of the present disclosure provides a transfer structure that includes: a first electrode, a piezoelectric layer, a second electrode, and an adhesion layer that are sequentially stacked on a substrate; the first electrode and the second electrode The electrodes are insulated from each other; the transfer structure further includes: a limiting layer, the limiting layer includes a cavity; the piezoelectric layer and at least part of the adhesion layer are located in the cavity of the limiting layer; And in the direction perpendicular to the substrate, the distance between the surface of the limiting layer away from the substrate and the substrate is greater than the distance between the surface of the adhesion layer away from the substrate and the substrate.
  • the transfer structure further includes: a protrusion structure provided on a sidewall of the cavity of the limiting layer.
  • the protruding structure in a direction perpendicular to the substrate, is located on the side of the adhesion layer away from the substrate.
  • the surface of the protruding structure away from the substrate and the surface of the limiting layer away from the substrate are in the same plane.
  • the limiting layer and the convex structure are integrally formed.
  • the cavity in a direction perpendicular to the substrate, has an opening facing at least a side away from the substrate.
  • the transfer structure further includes a protective layer disposed between the second electrode and the adhesion layer.
  • the transfer structure further includes: an elastic layer disposed on a side of the first electrode away from the piezoelectric layer.
  • At least one embodiment of the present disclosure further provides a transfer device including a substrate and a plurality of transfer structures provided by any one of the above provided on the substrate.
  • the base includes a first substrate and a plurality of gate lines arranged on the first substrate extending along a first direction and sequentially arranged along a second direction, extending along the second direction and extending along the The plurality of data lines arranged in sequence in the first direction;
  • the substrate further includes a plurality of thin film transistors arranged on the first substrate; the gates of the plurality of thin film transistors arranged in the same row and arranged along the first direction Are electrically connected to the same gate line; the sources of a plurality of thin film transistors located in the same row and arranged along the second direction are electrically connected to the same data line; a first electrode in the transfer structure is electrically connected to a The drain of the thin film transistor is electrically connected.
  • At least one embodiment of the present disclosure further provides a method for preparing a transfer structure, including: forming a limiting layer on a second substrate, the limiting layer including a cavity; in the cavity of the limiting layer Forming a first sacrificial layer; at least forming an adhesion layer in the cavity of the limit layer; sequentially forming a second electrode and a piezoelectric layer on the adhesion layer, the piezoelectric layer located in the limit In the cavity of the bit layer; forming a first electrode on the piezoelectric layer; removing the first sacrificial layer and the second substrate.
  • the cavity in a direction perpendicular to the second substrate, has an opening at least toward the second substrate.
  • the forming a limiting layer on the second substrate includes: forming a limiting layer film on the second substrate; and patterning the limiting layer film to form a limiting layer on the second substrate.
  • a limit layer is formed on the substrate, and a convex structure is formed on the sidewall of the cavity of the limit layer.
  • the preparation method of the transfer structure further includes: forming a protective layer on the adhesion layer before sequentially forming the second electrode and the piezoelectric layer on the adhesion layer.
  • the preparation method of the transfer structure further includes: forming an elastic layer on the first electrode after forming the first electrode on the piezoelectric layer.
  • At least one embodiment of the present disclosure further provides a method for preparing a transfer device, including: sequentially forming a laminated first electrode, a piezoelectric layer, and a second electrode on a substrate; forming an adhesion layer on the second electrode, and A limit layer is formed on the substrate; the limit layer includes a cavity; wherein the piezoelectric layer and at least part of the adhesion layer are located in the cavity of the limit layer; The distance between the surface of the bit layer away from the substrate and the substrate is greater than the distance between the surface of the adhesive layer away from the substrate and the substrate.
  • FIG. 1 is a schematic structural diagram of a transfer device provided by an embodiment of the disclosure
  • FIG. 2 is a structural schematic diagram 1 of a transfer structure provided by an embodiment of the disclosure.
  • FIG. 3 is a second structural diagram of a transfer structure provided by an embodiment of the disclosure.
  • FIG. 4 is a third structural diagram of a transfer structure provided by an embodiment of the disclosure.
  • FIG. 5 is a fourth structural diagram of a transfer structure provided by an embodiment of the disclosure.
  • FIG. 6 is a schematic structural diagram of using a transfer structure to adhere a component to be transferred according to an embodiment of the disclosure
  • FIG. 7 is a schematic structural diagram of a transfer structure separated from a component to be transferred according to an embodiment of the disclosure.
  • FIG. 8 is a schematic structural diagram of a transfer structure in a transfer device provided by an embodiment of the disclosure and the Micro LED die on the carrier substrate are directly opposite;
  • FIG. 9 is a schematic structural diagram of a part of the transfer structure in the transfer device provided by an embodiment of the disclosure adhered to the Micro LED die;
  • FIG. 10 is a schematic structural diagram of a Micro LED die adhered on a transfer device according to an embodiment of the present disclosure and a position where the Micro LED die is to be provided on the circuit substrate are directly opposite;
  • FIG. 11 is a schematic structural diagram of a Micro LED die transferred to a circuit substrate according to an embodiment of the disclosure.
  • FIG. 12 is a fifth structural schematic diagram of a transfer structure provided by an embodiment of the disclosure.
  • FIG. 13A is a sixth structural diagram of a transfer structure provided by an embodiment of the disclosure.
  • FIG. 13B is a seventh structural schematic diagram of a transfer structure provided by an embodiment of the disclosure.
  • FIG. 14 is a schematic structural diagram of a substrate provided by an embodiment of the disclosure.
  • 15 is a schematic flowchart of a method for preparing a transfer structure provided by an embodiment of the disclosure.
  • FIG. 16A is a schematic structural diagram of forming a limit layer on a second substrate according to an embodiment of the present disclosure
  • 16B is a schematic structural diagram of forming a second sacrificial layer on a second substrate according to an embodiment of the disclosure
  • FIG. 17 is a schematic structural diagram of forming a first sacrificial layer in a cavity of a limiting layer according to an embodiment of the disclosure
  • 18 is a schematic structural diagram of forming an adhesion layer on the first sacrificial layer according to an embodiment of the disclosure
  • 19 is a schematic diagram of another structure of forming an adhesion layer on the first sacrificial layer according to an embodiment of the disclosure.
  • 20 is a schematic diagram of a structure in which a second electrode and a piezoelectric layer are sequentially formed in a cavity of a limiting layer according to an embodiment of the disclosure
  • FIG. 21 is a schematic structural diagram of forming a first electrode on a piezoelectric layer according to an embodiment of the disclosure.
  • FIG. 22 is a schematic diagram of a structure of forming a substrate on a first electrode according to an embodiment of the disclosure.
  • FIG. 23 is a schematic structural diagram of forming a limiting layer film on a second substrate according to an embodiment of the disclosure.
  • FIG. 24 is a schematic structural diagram of a protrusion structure formed on a second substrate with a confinement layer and a side wall of a cavity located on the confinement layer according to an embodiment of the disclosure;
  • FIG. 25 is a schematic flowchart of a method for preparing a transfer device provided by an embodiment of the disclosure.
  • FIG. 26 is a schematic diagram of a structure of forming a first electrode, a piezoelectric layer, and a second electrode on a substrate according to an embodiment of the disclosure.
  • the Micro LED display includes a circuit substrate and a plurality of Micro LED dies arranged on the circuit substrate. Each Micro LED dies can independently drive to emit light, and each one serves as an independent sub-pixel. The size of each Micro LED die is on the micron level, and the volume of each Micro LED die is about 1% of the volume of an ordinary LED die. A Micro LED display includes millions or even tens of millions of Micro LED dies. The manufacturing process of the Micro LED display is: first forming a plurality of Micro LED dies on a carrier substrate, and then using a transfer device to transfer the plurality of Micro LED dies on the carrier substrate to the circuit substrate.
  • the transfer device includes a substrate 10 and a plurality of transfer structures 20 arranged on the substrate 10.
  • the transfer device includes, but is not limited to, used to transfer a plurality of Micro LED dies on a carrier substrate to a circuit substrate, and can also be used to transfer other parts to be transferred.
  • the transfer structure 20 includes: a first electrode 201, a piezoelectric layer 202, a second electrode 203, and an adhesion layer 204 which are sequentially stacked on the substrate 10;
  • the electrode 201 and the second electrode 203 are insulated from each other;
  • the transfer structure 20 further includes: a limiting layer 205, and the limiting layer 205 includes a cavity.
  • the piezoelectric layer 202 and at least part of the adhesion layer 204 are located in the cavity of the limiting layer 205; and in the direction perpendicular to the substrate 10, the limiting layer 205 is away from the surface of the substrate 10 (ie, the limiting layer 205 in FIG. 2-5
  • the distance between the lower surface of the bit layer 205 and the substrate 10 is greater than the distance between the surface of the adhesion layer 204 away from the substrate 10 and the substrate 10.
  • the piezoelectric layer 202 has a positive piezoelectric effect and an inverse piezoelectric effect.
  • the positive piezoelectric effect means that when the piezoelectric layer 202 is deformed by an external force in a certain direction, a polarization phenomenon will occur in the piezoelectric layer 202, and at the same time, positive and negative charges will appear on its two opposite surfaces. When the external force is removed, it will return to an uncharged state. This phenomenon is called the positive voltage effect. When the direction of the force changes, the polarity of the charge also changes.
  • the inverse piezoelectric effect means that when an electric field is applied in the polarization direction of the piezoelectric layer 202, the piezoelectric layer 202 will deform.
  • the deformation of the piezoelectric layer 202 under the action of an electric field includes a thickness deformation type, a volume deformation type, and the like.
  • the transfer structure 20 in the embodiment of the present disclosure uses the inverse piezoelectric effect of the piezoelectric layer 202.
  • a voltage is applied to the first electrode 201 and the second electrode 203
  • the first electrode 201 and the second electrode 203 will generate an electric field.
  • the piezoelectric layer 202 is deformed under the action of an electric field.
  • the voltage applied to the first electrode 201 and the second electrode 203 is cut off, the electric field generated by the first electrode 201 and the second electrode 203 disappears, and the piezoelectric layer 202 returns to its original shape.
  • the principle that the transfer structure 20 is used to transfer the parts to be transferred, such as Micro LED dies, is: when a voltage is applied to the first electrode 201 and the second electrode 203, as shown in FIG. 6, the piezoelectric layer 202 will be deformed, thereby The adhesive layer 204 in the cavity of the limiting layer 205 is extruded out of the cavity of the limiting layer 205, so that the adhesive layer 204 can pick up the parts to be transferred. After the transfer structure 20 adhered to the part to be transferred moves the part to be transferred to a predetermined position, as shown in FIG. 7, the voltage applied to the first electrode 201 and the second electrode 203 is cut off, and the piezoelectric layer 202 will return to its original shape.
  • the adhesive layer 204 squeezed out of the cavity of the limiting layer 205 will shrink back into the cavity of the limiting layer 205.
  • the limiting layer 205 will block the part to be transferred from entering the cavity of the limiting layer 205, so that the adhesive layer 204 will be separated from the part to be transferred, thereby realizing the part to be transferred Transfer.
  • the size of the cavity of the limit layer 205 can be set as required, so that the limit layer 205 can block the part 30 to be transferred from entering the limit position during the shrinking process of the adhesive layer 204
  • the cavity of layer 205 shall prevail.
  • the cavity in a direction perpendicular to the substrate 10, the cavity has an opening at least toward the side away from the substrate 10, that is, the cavity has an opening at least toward the lower side in the figure. In this way, it is convenient to extrude the adhesive layer 204 from the lower opening.
  • the cavity may also have openings in the upper and lower sides of the figure, that is, the cavity penetrates the limiting layer 205 in a direction perpendicular to the substrate 10.
  • the adhesion layer 204 is all located in the cavity of the limiting layer 205; it can also be as shown in Figures 3 and 4, the adhesion layer 204 is partially located on the limiting layer 205 Part of the cavity is located on the side of the limiting layer 205 close to the substrate 10.
  • the boundary of the orthographic projection of the first electrode 201 on the substrate 10 surrounds the boundary of the orthographic projection of the cavity of the limiting layer 205 on the substrate 10.
  • the boundary of the orthographic projection of the cavity of the limiting layer 205 on the substrate 10 surrounds the boundary of the orthographic projection of the first electrode 201 on the substrate 10.
  • the first electrode 201 is located in the cavity of the limiting layer 205.
  • all the second electrodes 203 are located in the cavity of the limiting layer 205. In other embodiments, the second electrode 203 is partially located in the cavity of the confinement layer 205 and partially located outside the cavity of the confinement layer 205.
  • the material of the limit layer 205 is not limited, and may be resin or metal, for example. When the material of the limiting layer 205 is metal, the limiting layer 205 cannot contact the first electrode 201 and the second electrode 203 at the same time.
  • the surface of the limiting layer 205 away from the substrate 10 and the substrate 10 is greater than the distance between the surface of the adhesive layer 204 away from the substrate 10 and the substrate 10, the surface of the limiting layer 205 away from the substrate 10 and the adhesive layer 204 can be set as needed.
  • the distance between the surface of the substrate 10 is far away to ensure that when the first electrode 201 and the second electrode 203 are applied with voltage, the piezoelectric layer 202 can deform the adhesion layer located in the cavity of the limit layer 205 204 is extruded out of the cavity of the limiting layer 205 as a criterion.
  • Micro LED dies as the component to be transferred as an example, the process of transferring a plurality of Micro LED dies on the carrier substrate to the circuit substrate using the transfer device will be described in detail below.
  • the transfer device is moved above the carrier substrate 40, and a transfer structure 20 in the transfer device is directly opposed to a Micro LED die 30 on the carrier substrate 40.
  • a voltage is applied to the first electrode 201 and the second electrode 203 of the transfer structure 20 facing the Micro LED die 30 to be transferred.
  • the piezoelectric layer 202 will be deformed.
  • the adhesion layer 204 is squeezed out of the cavity of the limiting layer 205.
  • FIG. 9 by moving the transfer device in a direction close to the carrier substrate 40, the adhesive layer 204 squeezed out of the cavity of the limiting layer 205 can adhere to the Micro LED die 30.
  • FIG. 9 by moving the transfer device in a direction close to the carrier substrate 40, the adhesive layer 204 squeezed out of the cavity of the limiting layer 205 can adhere to the Micro LED die 30.
  • the transfer device with the Micro LED die 30 attached is moved above the circuit substrate 50, and the Micro LED die 30 is aligned with the position on the circuit substrate 50 where the Micro LED die 30 is to be provided.
  • the voltage applied to the first electrode 201 and the second electrode 203 is cut off, the piezoelectric layer 202 returns to its original shape, and the adhesive layer 204 is squeezed out of the cavity of the limiting layer 205 into the cavity of the limiting layer 205 When the adhesive layer 204 shrinks, the Micro LED die 30 is blocked by the limit layer 205. In this way, the Micro LED die 30 will be separated from the adhesive layer 204.
  • the Micro LED die 30 is separated from the adhesive layer 204.
  • the pellets 30 are transferred to the circuit board 50.
  • the above-mentioned process of "moving the transfer device above the carrier substrate 40 and aligning a transfer structure 20 in the transfer device with a Micro LED die 30 on the carrier substrate 40" may be, for example, that the substrate 10 is provided with a Alignment mark pattern, the carrier substrate 40 is provided with a second alignment mark pattern, and the first alignment mark pattern and the second alignment mark pattern are aligned, so as to realize the precision of the transfer structure 20 and the Micro LED die 30 Counterpoint.
  • the first of the transfer structure 20 that is directly opposed to the Micro LED die 30 to be transferred is The electrodes 201 and the second electrode 203 are applied with voltage, and no voltage is applied to the first electrode 201 and the second electrode 203 of the transfer structure 20 that are opposite to the Micro LED die 30 that does not need to be transferred.
  • the adhesion layer 204 in the transfer structure 20 facing the die 30 will not adhere to the Micro LED die 30.
  • the embodiments of the present disclosure can use the above steps to transfer all the Micro LED dies 30 that need to be transferred on the carrier substrate 40 to the circuit substrate 50 at one time, or the above steps can be repeated twice or more to remove The multiple Micro LED dies 30 on the carrier substrate 40 are transferred to the circuit substrate 50.
  • the multiple Micro LED dies 30 on the carrier substrate 40 include red-emitting Micro LED dies, green-emitting Micro LED dies, and blue-emitting Micro LED dies
  • the embodiments of the present disclosure can be used to provide The transfer device uses the above-mentioned transfer method to transfer red-emitting Micro LED dies, green-emitting Micro LED dies, and blue-emitting Micro LED dies, respectively.
  • the transfer device includes a substrate 10 and a plurality of transfer structures 20 disposed on the substrate 10.
  • the transfer structure 20 includes: a first electrode 201 and a piezoelectric layer 202 which are sequentially stacked on the substrate 10 , The second electrode 203 and the adhesion layer 204; the transfer structure 20 further includes: a limiting layer 205, and the limiting layer 205 includes a cavity.
  • the piezoelectric layer 202 and at least part of the adhesion layer 204 are located in the cavity of the limiting layer 205; and in the direction perpendicular to the substrate 10, the distance between the surface of the limiting layer 205 and the substrate 10 is greater than that of the adhesion layer 204.
  • the adhesive layer 204 located in the cavity of the limiting layer 205 can be squeezed to the cavity of the limiting layer 205
  • the adhesive layer 204 can adhere to the part to be transferred 30 such as Micro LED die, and the transfer structure 20 to which the part to be transferred is adhered moves the part to be transferred to a predetermined position and cuts off the first electrode 201 and The voltage applied to the second electrode 203 will restore the piezoelectric layer 202 to its original shape.
  • the adhesive layer 204 squeezed out of the cavity of the limit layer 205 will shrink back into the cavity of the limit layer 205 .
  • the limiting layer 205 blocks the part 30 to be transferred from entering the cavity of the limiting layer 205, so that the adhesive layer 204 is separated from the part to be transferred, thereby realizing the transfer of the part 30 to be transferred .
  • the principle of separating the transfer structure 20 from the part to be transferred 30 is: cut off the voltage applied to the first electrode 201 and the second electrode 203, and press The electrical layer 202 will return to its original shape.
  • the adhesion layer 204 squeezed out of the cavity of the limiting layer 205 will shrink back into the cavity of the limiting layer 205.
  • the part 30 to be transferred will be separated from the adhesive layer 204, thereby making the part 30 to be transferred and the transferred part 30 separated from the adhesive layer 204.
  • the size of the Micro LED die is small, generally less than 50 ⁇ m.
  • the size of the cavity of the limit layer 205 should be smaller than the size of the Micro LED die.
  • the size of the cavity of the limiting layer 205 is small, which increases the process difficulty of manufacturing the limiting layer 205.
  • the transfer structure 20 further includes: a protrusion structure 206 disposed on the sidewall of the cavity of the limiting layer 205. In the direction perpendicular to the substrate 10, the protruding structure 206 is located on the side of the adhesion layer 204 away from the substrate 10.
  • the protrusion structure 206 is equivalent to a limiting member.
  • the transfer structure 20 of the embodiment of the present disclosure further includes the convex structure 206 provided on the sidewall of the cavity of the limit layer 205, the voltage applied on the first electrode 201 and the second electrode 203 is cut off, and the piezoelectric layer 202
  • the adhesive layer 204 extruded out of the cavity of the limiting layer 205 shrinks back to the cavity of the limiting layer 205, the protruding structure 206 can block the part 30 to be transferred from entering the limiting layer 205 In the cavity, it is thus possible to ensure that the adhesion layer 204 and the part 30 to be transferred are separated.
  • the size of the cavity of the limiting layer 205 can be made larger and reduced when the limiting layer 205 is fabricated.
  • the difficulty of making the limit layer 205 since the component 30 to be transferred can be blocked from entering the cavity of the limiting layer 205 by the protrusion structure 206, the size of the cavity of the limiting layer 205 can be made larger and reduced when the limiting layer 205 is fabricated. The difficulty of making the limit layer 205.
  • the distance between the surface of the convex structure 206 away from the substrate 10 and the substrate 10 is smaller than the distance between the surface of the limiting layer 205 away from the substrate 10 and the substrate 10.
  • the convex structure 206 in a direction perpendicular to the substrate 10, is away from the surface of the substrate 10 and the limiting layer 205 is away from the surface of the substrate 10 (ie, the limiting layer 205 in FIG. The lower surface) is in the same plane.
  • the convex structure 206 is away from the surface of the substrate 10 and the limiting layer 205 is away from the surface of the substrate 10.
  • the protruding structure 206 can more effectively block the part 30 to be transferred from entering the cavity of the limiting layer 205, which is more conducive to the separation of the adhesion layer 204 and the part 30 to be transferred.
  • the limiting layer 205 and the protrusion structure 206 are integrally formed. In other embodiments, the limiting layer 205 and the raised structure 206 may be formed separately, and then the limiting layer 205 and the raised structure 206 are fixed together.
  • the confinement layer 205 and the convex structure 206 when the confinement layer 205 and the convex structure 206 are integrally formed, the confinement layer 205 and the convex structure 206 can be simultaneously formed by a patterning process, thereby simplifying the manufacturing process of the transfer structure 20.
  • the transfer structure 20 further includes a protective layer 207 disposed between the second electrode 203 and the adhesion layer 204.
  • the transfer structure 20 further includes a protective layer 207 disposed between the second electrode 203 and the adhesion layer 204, the protective layer 207 can protect the second electrode 203, the piezoelectric layer 202, and the first electrode 201. Protect it.
  • the transfer structure 20 further includes an elastic layer 211 disposed on the side of the first electrode 201 away from the piezoelectric layer 202.
  • the elastic layer 211 is used to connect the transfer structure 20 with the substrate 10 and play a role of supporting the transfer structure 20.
  • the elastic layer 211 has elasticity, which is beneficial to reduce the interference of the substrate 10 to the deformation of the piezoelectric layer 202.
  • the base 10 includes a first substrate 100 and a plurality of gate lines 101 arranged on the first substrate 100 extending along the first direction and sequentially arranged along the second direction.
  • a plurality of data lines 102 extending and sequentially arranged along the first direction;
  • the base 10 also includes a plurality of thin film transistors (TFT) 103 arranged on the first substrate 100; located in the same row and along the first direction
  • TFT thin film transistors
  • the gates of the arranged plurality of thin film transistors 103 are electrically connected to the same gate line 101; the sources of the plurality of thin film transistors 103 arranged in the same row and arranged along the second direction are electrically connected to the same data line 102; a transfer structure 20
  • the first electrode 201 is electrically connected to the drain of a thin film transistor 103.
  • the thin film transistor 103 includes a source electrode, a drain electrode, an active layer, a gate electrode, and a gate insulating layer.
  • the first substrate 100 is a glass substrate or a silicon substrate.
  • the second electrodes 203 of the plurality of transfer structures 20 on the substrate 10 may be electrically connected to the common electrode line.
  • the base 10 includes a first substrate 100 and a gate line 101, a data line 102, and a thin film transistor 103 disposed on the first substrate 100. Because the first electrode 201 and a thin film transistor 103 in a transfer structure 20 The drain of 103 is electrically connected, so that the gate 101, the data line 102, and the thin film transistor 103 can be individually controlled to apply voltage to the first electrode 201 in each transfer structure 20, so that multiple transfer structures 20 can be individually controlled. In this way, it is possible to individually control whether the multiple transfer structures 20 in the transfer device adhere to the parts 30 to be transferred.
  • the embodiments of the present disclosure provide a method for preparing a transfer structure, which can be used to prepare the above-mentioned transfer structure.
  • the preparation method of the transfer structure includes:
  • a limiting layer 205 is formed on the second substrate 60; the limiting layer 205 includes a cavity.
  • the second substrate 60 may be glass, for example.
  • the cavity In a direction perpendicular to the second substrate 60, the cavity has an opening facing at least the second substrate 60. Of course, in the direction perpendicular to the second substrate 60, the cavity may also penetrate the limiting layer 205.
  • the process of forming the limiting layer 205 on the second substrate 60 may be, for example, forming a limiting layer film on the second substrate 60 and patterning the limiting layer film to form the limiting layer 205.
  • the patterning includes mask exposure, development, and etching processes.
  • a second sacrificial layer 209 is formed on the second substrate 60.
  • a first sacrificial layer 208 is formed in the cavity of the limiting layer 205.
  • At least an adhesion layer 204 is formed in the cavity of the limiting layer 205.
  • the adhesion layer 204 is formed only in the cavity of the limit layer 205; or as shown in FIG. 19, the adhesion layer is not only formed in the cavity of the limit layer 205 204, and the adhesion layer 204 also extends to the side of the limiting layer 205 away from the second substrate 60.
  • a second electrode 203 and a piezoelectric layer 202 are sequentially formed on the adhesion layer 204; the piezoelectric layer 202 is located in the cavity of the limit layer 205.
  • the second electrode 203 is all located in the cavity of the limiting layer 205; it can also be partially located in the cavity of the limiting layer 205, and partially extended to the limiting layer 205 away from the second liner. Bottom 60 side.
  • a protective layer 207 may also be formed on the adhesion layer 204 to separate the adhesion layer 204 and the second electrode 203 for protection.
  • a first electrode 201 is formed on the piezoelectric layer 202.
  • the orthographic projection on the 60 and the orthographic projection of the limiting layer 205 on the second substrate 60 have an overlapping area.
  • an elastic layer 211 may also be formed on the first electrode 201, and the elastic layer 211 functions as a bearing transfer structure 20.
  • first sacrificial layer 208 and the second substrate 60 may be removed by laser.
  • the method for preparing the transfer structure 20 described above further includes removing the second sacrificial layer 209 while removing the first sacrificial layer 208 and the second substrate 60.
  • the second sacrificial layer 209 is formed on the second substrate 60 first, and then the limiting layer 205 is formed, which is beneficial to removing the second substrate At 60 o'clock, the second substrate 60 is separated from the limiting layer 205.
  • the embodiments of the present disclosure provide a method for preparing the transfer structure 20.
  • the method for preparing the transfer structure 20 has the same structure and beneficial effects as the above-mentioned transfer structure 20.
  • the above-mentioned embodiments have already performed the structure and beneficial effects of the transfer structure 20. Detailed description, so I won't repeat it here.
  • S100 includes:
  • a limit layer film 210 is formed on the second substrate 60.
  • the limiting layer 205 and the protruding structure 206 can be formed simultaneously through a patterning process, which simplifies the manufacturing process of the transfer structure 20.
  • a protruding structure 206 is formed on the sidewall of the cavity of the limiting layer 205, and the protruding structure 206 can prevent the component 30 to be transferred from entering the limiting while the adhesive layer 204 shrinks back to the cavity of the limiting layer 205 In the cavity of the layer 205, it is ensured that the adhesion layer 204 is separated from the part 30 to be transferred.
  • An embodiment of the present disclosure also provides a manufacturing method of a transfer device. As shown in FIG. 22, the manufacturing method includes forming a plurality of prepared transfer structures 20 on the substrate 10. It should be noted that, in order to simplify the figure, FIG. 22 only shows that one transfer structure 20 is formed on the substrate 10.
  • the embodiment of the present disclosure also provides another method for preparing the transfer device, which can be used to prepare the above-mentioned transfer device.
  • the preparation method of the transfer device as shown in FIG. 25, includes:
  • a first electrode 201, a piezoelectric layer 202, and a second electrode 203 are stacked on the substrate 10 in sequence.
  • an adhesion layer 204 is formed on the second electrode 203, and a limiting layer 205 is formed on the substrate 10; the limiting layer 205 includes a cavity.
  • the piezoelectric layer 202 and at least part of the adhesion layer 204 are located in the cavity of the limiting layer 205; the distance between the surface of the limiting layer 205 away from the substrate 10 and the substrate 10 is greater than the surface of the adhesive layer 204 away from the substrate 10 and the substrate 10 the distance.
  • the adhesion layer 204 can be formed on the second electrode 203 first, and then the limiting layer 205 can be formed on the substrate 10; or the limiting layer 205 can be formed on the substrate 10 first, and then the adhesion layer 205 can be formed on the second electrode 203. Attached layer 204.
  • the adhesion layer 204 formed on the second electrode 203 may only be located in the space of the limiting layer 205 formed later. In the cavity; it can also be partially located in the cavity of the limiting layer 205 formed later, and partially located between the limiting layer 205 and the substrate 10.
  • the limiting layer 205 is formed on the substrate 10 first, and then the adhesion layer 204 is formed on the second electrode 203.
  • the adhesion layer 204 is all located in the cavity of the limiting layer 205.
  • the embodiments of the present disclosure provide a method for preparing the transfer structure 20.
  • the method for preparing the transfer structure 20 has the same structure and beneficial effects as the above-mentioned transfer structure 20.
  • the above-mentioned embodiments have already performed the structure and beneficial effects of the transfer structure 20. Detailed description, so I won't repeat it here.

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Abstract

本公开实施例提供一种转移结构及其制备方法、转移装置及其制备方法。该转移结构包括：依次层叠设置在基底上的第一电极、压电层、第二电极以及粘附层；第一电极和第二电极相互绝缘；转移结构还包括：限位层，限位层包括空腔；压电层以及至少部分粘附层位于限位层的空腔内；并且在垂直于基底的方向，限位层远离基底的表面与基底的距离大于粘附层远离基底的表面与基底的距离。该转移结构可以用于转移Micro LED晶粒。

Description

转移结构及其制备方法、转移装置及其制备方法
本申请要求于2019年6月26日递交的第201910560425.0号中国专利申请的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开涉及一种转移结构及其制备方法、转移装置及其制备方法。
背景技术
Micro LED(Micro Light-Emitting Diode，微型发光二极管)显示器由于具有低功耗、高亮度、超高解析度与色彩饱和度、反应速度快、超省电(Micro LED显示器的耗电量为液晶显示器耗电量的10％，为有机电致发光显示器耗电量的50％)、长寿命、高效率、适应各种尺寸、无缝拼接等优势，因而成为目前最具有潜力的下一代新型显示技术。
目前，Micro LED显示器在制作过程中存在很多亟待解决的难题。例如，如何将数百万甚至数千万颗微米级的Micro LED晶粒(也称μLED晶粒)正确且有效率地转移到电路基板上。
发明内容
本公开的实施例提供一种转移结构及其制备方法、转移装置及其制备方法。该转移结构和转移装置可以用于转移Micro LED晶粒。
本公开至少一实施例提供一种转移结构，该转移结构包括：依次层叠设置在基底上的第一电极、压电层、第二电极以及粘附层；所述第一电极和所述第二电极相互绝缘；所述转移结构还包括：限位层，所述限位层包括空腔；所述压电层以及至少部分所述粘附层位于所述限位层的所述空腔内；并且在垂直于所述基底的方向，所述限位层远离所述基底的表面与所述基底的距离大于所述粘附层远离所述基底的表面与所述基底的距离。
在一些示例中，所述转移结构还包括：设置在所述限位层的所述空腔的侧壁的凸起结构。
在一些示例中，在垂直于所述基底的方向，所述凸起结构位于所述粘附层 远离所述基底的一侧。
在一些示例中，在垂直于所述基底的方向，所述凸起结构远离所述基底的表面与所述限位层远离所述基底的表面在同一平面内。
在一些示例中，所述限位层与所述凸起结构一体成型。
在一些示例中，在垂直于所述基底的方向，所述空腔具有至少朝向远离所述基底一侧的开口。
在一些示例中，所述转移结构还包括：设置在所述第二电极和所述粘附层之间的保护层。
在一些示例中，所述转移结构还包括：设置在所述第一电极远离所述压电层一侧的弹性层。
本公开至少一实施例还提供一种转移装置，包括基底以及设置在所述基底上的多个上述任一项提供的转移结构。
在一些示例中，所述基底包括第一衬底以及设置在所述第一衬底上沿第一方向延伸且沿第二方向依次排列的多条栅线、沿所述第二方向延伸且沿所述第一方向依次排列的多条数据线；所述基底还包括设置在所述第一衬底上的多个薄膜晶体管；位于同一排且沿第一方向排列的多个薄膜晶体管的栅极与同一条所述栅线电连接；位于同一排且沿第二方向排列的多个薄膜晶体管的源极与同一条所述数据线电连接；一个所述转移结构中的第一电极与一个所述薄膜晶体管的漏极电连接。
本公开至少一实施例还提供一种转移结构的制备方法，包括：在第二衬底上形成限位层，所述限位层包括空腔；在所述限位层的所述空腔内形成第一牺牲层；至少在所述限位层的所述空腔内形成粘附层；在所述粘附层上依次形成第二电极和压电层，所述压电层位于所述限位层的所述空腔内；在所述压电层上形成第一电极；去除所述第一牺牲层和所述第二衬底。
在一些示例中，在垂直于所述第二衬底的方向，所述空腔具有至少朝向所述第二衬底的开口。
在一些示例中，所述在第二衬底上形成限位层，包括：在所述第二衬底上形成限位层薄膜；对所述限位层薄膜进行构图，以在所述第二衬底上形成限位层，同时在所述限位层的所述空腔的侧壁形成凸起结构。
在一些示例中，所述转移结构的制备方法还包括：在所述粘附层上依次形成第二电极和压电层之前，在所述粘附层上形成保护层。
在一些示例中，所述转移结构的制备方法还包括：在所述压电层上形成第一电极之后，在所述第一电极上形成弹性层。
本公开至少一实施例还提供一种转移装置的制备方法，包括：在基底上依次形成层叠的第一电极、压电层和第二电极；在所述第二电极上形成粘附层，并在所述基底上形成限位层；所述限位层包括空腔；其中，所述压电层以及至少部分所述粘附层位于所述限位层的所述空腔内；所述限位层远离所述基底的表面与所述基底的距离大于所述粘附层远离所述基底的表面与所述基底的距离。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为本公开实施例提供的一种转移装置的结构示意图；
图2为本公开实施例提供的一种转移结构的结构示意图一；
图3为本公开实施例提供的一种转移结构的结构示意图二；
图4为本公开实施例提供的一种转移结构的结构示意图三；
图5为本公开实施例提供的一种转移结构的结构示意图四；
图6为本公开实施例提供的一种利用转移结构粘附待转移部件的结构示意图；
图7为本公开实施例提供的一种转移结构与待转移部件分离的结构示意图；
图8为本公开实施例提供的一种转移装置中的转移结构与承载基板上的Micro LED晶粒正对的结构示意图；
图9为本公开实施例提供的一种转移装置中的部分转移结构粘附Micro LED晶粒的结构示意图；
图10为本公开实施例提供的一种转移装置上粘附的Micro LED晶粒与电路基板上待设置Micro LED晶粒的位置正对的结构示意图；
图11为本公开实施例提供的一种Micro LED晶粒转移至电路基板上的结构示意图；
图12为本公开实施例提供的一种转移结构的结构示意图五；
图13A为本公开实施例提供的一种转移结构的结构示意图六；
图13B为本公开实施例提供的一种转移结构的结构示意图七；
图14为本公开实施例提供的一种基底的结构示意图；
图15为本公开实施例提供的一种转移结构的制备方法的流程示意图；
图16A为本公开实施例提供的一种在第二衬底上形成限位层的结构示意图；
图16B为本公开实施例提供的一种在第二衬底上形成第二牺牲层的结构示意图；
图17为本公开实施例提供的一种在限位层的空腔内形成第一牺牲层的结构示意图；
图18为本公开实施例提供的一种在第一牺牲层上形成粘附层的结构示意图；
图19为本公开实施例提供的另一种在第一牺牲层上形成粘附层的结构示意图；
图20为本公开实施例提供的一种在限位层的空腔内依次形成第二电极和压电层的结构示意图；
图21为本公开实施例提供的一种在压电层上形成第一电极的结构示意图；
图22为本公开实施例提供的一种在第一电极上形成基底的结构示意图；
图23为本公开实施例提供的一种在第二衬底上形成限位层薄膜的结构示意图；
图24为本公开实施例提供的一种在第二衬底上形成限位层和位于限位层的空腔的侧壁的凸起结构的结构示意图；
图25为本公开实施例提供的一种转移装置的制备方法的流程示意图；以及
图26为本公开实施例提供的一种在基底上形成第一电极、压电层以及第二电极的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的 本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
Micro LED显示器包括电路基板以及设置在电路基板上的多个Micro LED晶粒，每颗Micro LED晶粒能独立驱动发光，每一颗作为一个独立的子像素点。每颗Micro LED晶粒的尺寸为微米级，每颗Micro LED晶粒的体积约为普通LED晶粒体积的1％。一个Micro LED显示器包括数百万颗甚至数千万颗Micro LED晶粒。Micro LED显示器的制作过程为：先在承载基板上形成多个Micro LED晶粒，再利用转移装置将承载基板上的多个Micro LED晶粒转移到电路基板。
本公开实施例提供一种转移装置，如图1所示，转移装置包括基底10以及设置在基底10上的多个转移结构20。
本公开实施例提供的转移装置包括但不限于用于将承载基板上的多个Micro LED晶粒转移到电路基板，还可以用于转移其它的待转移部件。
以下对基底10上的一个转移结构20进行详细介绍。
如图2、图3、图4以及图5所示，转移结构20包括：依次层叠设置在基底10上的第一电极201、压电层202、第二电极203以及粘附层204；第一电极201和第二电极203相互绝缘；转移结构20还包括：限位层205，限位层205包括空腔。其中，压电层202以及至少部分粘附层204位于限位层205的空腔内；并且在垂直于基底10的方向，限位层205远离基底10的表面(即，图2-5中限位层205的下表面)与基底10的距离大于粘附层204远离基底10的表面与基底10的距离。
本领域技术人员应该明白，压电层202具有正压电效应和逆压电效应。正压电效应指的是压电层202在沿一定方向上受到外力的作用而变形时，其内部会产生极化现象，同时在它的两个相对表面上出现正负相反的电荷。当外力去掉后，它又会恢复到不带电的状态，这种现象称为正电压效应。当作用力的方向改变时，电荷的极性也随之改变。逆压电效应指的是当在压电层202的极化方向上施加电场时，压电层202会发生变形，电场去除后，压电层202的变形随之消失，这种现象称为逆压电效应。压电层202在电场的作用下发生的变形包括厚度变形型、体积变形型等。
本公开实施例中的转移结构20利用的是压电层202的逆压电效应，当给第一电极201和第二电极203施加电压时，第一电极201和第二电极203会产 生电场，压电层202在电场的作用下会发生变形。当切断第一电极201和第二电极203上施加的电压时，第一电极201和第二电极203产生的电场消失，压电层202又会恢复到初始的形状。
转移结构20用于转移待转移部件例如Micro LED晶粒的原理为：当给第一电极201和第二电极203施加电压时，如图6所示，压电层202会发生变形，从而可以将位于限位层205的空腔内的粘附层204挤压到限位层205的空腔外，这样一来，粘附层204便可以粘附住(pick up)待转移部件。粘附有待转移部件的转移结构20将待转移部件移动至预定位置后，如图7所示，切断第一电极201和第二电极203上施加的电压，压电层202会恢复到初始形状，此时被挤压到限位层205的空腔外的粘附层204便会收缩回限位层205的空腔内。粘附层204在收缩过程中，限位层205会阻挡待转移部件进入限位层205的空腔内，这样粘附层204便会与待转移部件分离(place)，从而实现了待转移部件的转移。
基于上述转移结构20转移待转移部件30的原理，可以根据需要设置限位层205的空腔的大小，以粘附层204在收缩过程中，限位层205能阻挡待转移部件30进入限位层205的空腔为准。
例如，如图2-5所示，在垂直于基底10的方向，空腔具有至少朝向远离基底10一侧的开口，即，空腔具有至少朝向图中下侧方向的开口。如此，便于将粘附层204从下方的开口挤出。又例如，如图2-5所示，空腔也可以具有真向图中上下两侧方向的开口，即，空腔在垂直于基底10的方向贯穿限位层205。
此处，可以是如图2和图5所示，粘附层204全部位于限位层205的空腔内；也可以是如图3和图4，粘附层204部分位于限位层205的空腔内，部分位于限位层205靠近基底10的一侧。
在一些实施例中，如图2和图3所示，第一电极201在基底10上的正投影的边界包围限位层205的空腔在基底10上的正投影的边界。在另一些实施例中，如图4和图5所示，限位层205的空腔在基底10上的正投影的边界包围第一电极201在基底10上的正投影的边界。在限位层205的空腔在基底10上的正投影的边界包围第一电极201在基底10上的正投影的边界的情况下，在一些实施例中，如图5所示，第一电极201位于限位层205的空腔内。
在一些实施例中，第二电极203全部位于限位层205的空腔内。在另一些 实施例中，第二电极203部分位于限位层205的空腔内，部分位于限位层205的空腔外。
对于限位层205的材料不进行限定，例如可以为树脂或金属等。在限位层205的材料为金属的情况下，限位层205不能与第一电极201和第二电极203同时接触。
由于限位层205远离基底10的表面与基底10的距离大于粘附层204远离基底10的表面与基底10的距离，因此可以根据需要设置限位层205远离基底10的表面与粘附层204远离基底10的表面之间的间距，以确保在第一电极201和第二电极203施加电压的情况下，压电层202发生变形后可以将位于限位层205的空腔内的粘附层204挤压到限位层205的空腔外为准。
以待转移部件为Micro LED晶粒为例，以下详细说明利用转移装置将承载基板上的多个Micro LED晶粒转移至电路基板的过程。
如图8所示，将转移装置移动至承载基板40的上方，并使转移装置中的一个转移结构20与承载基板40上的一个Micro LED晶粒30正对。对与需要转移的Micro LED晶粒30正对的转移结构20的第一电极201和第二电极203施加电压，第一电极201和第二电极203施加电压后，压电层202会发生变形，将粘附层204挤压到限位层205的空腔外。如图9所示，向靠近承载基板40的方向移动转移装置，挤压到限位层205的空腔外的粘附层204便可以粘附住Micro LED晶粒30。如图10所示，将粘附有Micro LED晶粒30的转移装置移动至电路基板50的上方，并使Micro LED晶粒30与电路基板50上待设置Micro LED晶粒30的位置正对。切断第一电极201和第二电极203上施加的电压，压电层202恢复原始的形状，被挤压到限位层205的空腔外的粘附层204向限位层205的空腔内收缩，粘附层204在收缩过程中，Micro LED晶粒30被限位层205阻挡，这样一来，Micro LED晶粒30便会与粘附层204分离，如图11所示，Micro LED晶粒30便转移至电路基板50上。
上述“将转移装置移动至承载基板40的上方，并使转移装置中的一个转移结构20与承载基板40上的一个Micro LED晶粒30正对”的过程例如可以为：基底10上设置有第一对位标记图案，承载基板40上设置有第二对位标记图案，将第一对位标记图案和第二对位标记图案进行对位，从而实现转移结构20与Micro LED晶粒30的精准对位。
本领域技术人员应该明白，转移装置中的一个转移结构20与承载基板40 上的一个Micro LED晶粒30正对后，对与需要转移的Micro LED晶粒30正对的转移结构20的第一电极201和第二电极203施加电压，对与不需要转移的Micro LED晶粒30正对的转移结构20的第一电极201和第二电极203不施加电压，这样与不需要转移的Micro LED晶粒30正对的转移结构20中的粘附层204就不会粘附Micro LED晶粒30。
需要说明的是，本公开实施例可以采用上述步骤一次性将承载基板40上需要转移的Micro LED晶粒30全部转移至电路基板50上，也可以重复两次或两次以上上述步骤，以将承载基板40上的多个Micro LED晶粒30转移至电路基板50上。在承载基板40上的多个Micro LED晶粒30包括发红光的Micro LED晶粒、发绿光的Micro LED晶粒以及发蓝光的Micro LED晶粒的情况下，可以利用本公开实施例提供的转移装置采用上述的转移方法分别转移发红光的Micro LED晶粒、发绿光的Micro LED晶粒以及发蓝光的Micro LED晶粒。
本公开实施例提供一种转移装置，转移装置包括基底10以及设置在基底10上的多个转移结构20，转移结构20包括：依次层叠设置在基底10上的第一电极201、压电层202、第二电极203以及粘附层204；转移结构20还包括：限位层205，限位层205包括空腔。压电层202以及至少部分粘附层204位于限位层205的空腔内；并且在垂直于基底10的方向，限位层205远离基底10的表面与基底10的距离大于粘附层204远离基底10的表面与基底10的距离。由于给第一电极201和第二电极203施加电压时，压电层202会发生变形，从而可以将位于限位层205的空腔内的粘附层204挤压到限位层205的空腔外，这样一来，粘附层204便可以粘附住待转移部件30例如Micro LED晶粒，粘附有待转移部件的转移结构20将待转移部件移动至预定位置后，切断第一电极201和第二电极203上施加的电压，压电层202会恢复到初始形状，此时被挤压到限位层205的空腔外的粘附层204便会收缩回限位层205的空腔内。粘附层204在收缩过程中，限位层205阻挡待转移部件30进入限位层205的空腔内，这样粘附层204便会与待转移部件分离，从而实现了待转移部件30的转移。
粘附有待转移部件的转移结构20将待转移部件30移动至预定位置后，转移结构20与待转移部件30的分离的原理为：切断第一电极201和第二电极203上施加的电压，压电层202会恢复到初始形状，此时被挤压到限位层205的空腔外的粘附层204便会收缩回限位层205的空腔内。粘附层204在收缩过程中， 由于限位层205阻挡待转移部件30进入限位层205的空腔内，因而待转移部件30会与粘附层204分离，从而使得待转移部件30与转移结构20分离。考虑到若利用限位层205阻挡待转移部件30进入限位层205的空腔内，在待转移部件30为Micro LED晶粒的情况下，Micro LED晶粒的尺寸较小，一般小于50μm，为了确保粘附层204在收缩过程中，Micro LED晶粒被限位层205阻挡，因而制作限位层205时，限位层205的空腔的尺寸应小于Micro LED晶粒的尺寸。而限位层205的空腔的尺寸较小，会增加了制作限位层205的工艺难度。
基于上述，可选的，如图12所示，转移结构20还包括：设置在限位层205的空腔的侧壁的凸起结构206。在垂直于基底10的方向，凸起结构206位于粘附层204远离基底10的一侧。
此处，凸起结构206相当于限位部件。
由于本公开实施例的转移结构20还包括设置在限位层205的空腔的侧壁的凸起结构206，因而在切断第一电极201和第二电极203上施加的电压，压电层202恢复初始形状，被挤压到限位层205的空腔外的粘附层204收缩回限位层205的空腔的过程中，凸起结构206可以阻挡待转移部件30进入限位层205的空腔内，从而可以确保粘附层204和待转移部件30分离。在此基础上，由于可以通过凸起结构206阻挡待转移部件30进入限位层205的空腔内，因而在制作限位层205时，可以使限位层205空腔的尺寸较大，降低限位层205的制作难度。
在一些实施例中，在垂直于基底10的方向，凸起结构206远离基底10的表面与基底10的距离小于限位层205远离基底10的表面与基底10的距离。在另一些实施例中，如图12所示，在垂直于基底10的方向，凸起结构206远离基底10的表面与限位层205远离基底10的表面(即，图12中限位层205的下表面)在同一平面内。
本公开实施例，压电层202恢复初始的形状，粘附层204收缩回限位层205的空腔内时，由于凸起结构206远离基底10的表面与限位层205远离基底10的表面在同一平面内，因而凸起结构206可以更有效地阻挡待转移部件30进入限位层205的空腔内，更有利于粘附层204和待转移部件30分离。
在一些实施例中，限位层205和凸起结构206一体成型。在另一些实施例中，可以分别形成限位层205和凸起结构206，再将限位层205和凸起结构206 固定在一起。
本公开实施例，当限位层205和凸起结构206一体成型时，可以通过一次构图工艺同时形成限位层205和凸起结构206，从而简化了转移结构20的制作工艺。
可选的，如图13A所示，转移结构20还包括设置在第二电极203和粘附层204之间的保护层207。
本公开实施例中，由于转移结构20还包括设置在第二电极203和粘附层204之间的保护层207，因而保护层207可以对第二电极203、压电层202以及第一电极201进行保护。
在一些示例中，如图13B所示，转移结构20还包括设置在第一电极201远离压电层202一侧的弹性层211。弹性层211用于将转移结构20与基底10连接，起到承载转移结构20的作用。弹性层211具有弹性，有利于减小基底10对压电层202变形的干扰。
可选的，如图14所示，基底10包括第一衬底100以及设置在第一衬底100上沿第一方向延伸且沿第二方向依次排列的多条栅线101、沿第二方向延伸且沿第一方向依次排列的多条数据线102；基底10还包括设置在第一衬底100上的多个薄膜晶体管(Thin Film Transistor，简称TFT)103；位于同一排且沿第一方向排列的多个薄膜晶体管103的栅极与同一条栅线101电连接；位于同一排且沿第二方向排列的多个薄膜晶体管103的源极与同一条数据线102电连接；一个转移结构20中的第一电极201与一个薄膜晶体管103的漏极电连接。
其中，薄膜晶体管103包括源极、漏极、有源层、栅极以及栅绝缘层。
此处，第一衬底100为玻璃基板或硅基板。
此外，基底10上多个转移结构20的第二电极203可以与公共电极线电连接。
本公开实施例，基底10包括第一衬底100以及设置在第一衬底100上的栅线101、数据线102以及薄膜晶体管103，由于一个转移结构20中的第一电极201与一个薄膜晶体管103的漏极电连接，因而可以通过栅极101、数据线102以及薄膜晶体管103单独控制给每个转移结构20中的第一电极201施加电压，从而可以对多个转移结构20进行单独控制，这样一来，便可以对转移装置中的多个转移结构20是否粘附待转移部件30进行单独控制。
本公开实施例提供一种转移结构的制备方法，可以用于制备上述的转移结 构。转移结构的制备方法，如图15所示，包括：
S100、如图16A所示，在第二衬底60上形成限位层205；限位层205包括空腔。
此处，第二衬底60例如可以为玻璃。在垂直于第二衬底60的方向，空腔具有至少朝向第二衬底60的开口。当然，在垂直于第二衬底60的方向，空腔也可以贯穿限位层205。
在第二衬底60上形成限位层205的过程例如可以为：在第二衬底60上形成限位层薄膜，对限位层薄膜进行构图形成限位层205。此处，构图包括掩膜曝光、显影以及刻蚀工艺。
在一些实施例中，在S100之前，如图16B所示，在第二衬底60上形成第二牺牲层209。
S101、如图17所示，在限位层205的空腔内形成第一牺牲层208。
S102、如图18和图19所示，至少在限位层205的空腔内形成粘附层204。
此处，可以是如图18所示，仅在限位层205的空腔内形成粘附层204；也可以是如图19所示，不仅在限位层205的空腔内形成粘附层204，而且粘附层204还延伸至限位层205远离第二衬底60的一侧。
S103、如图20所示，在粘附层204上依次形成第二电极203和压电层202；压电层202位于限位层205的空腔内。
此处，可以是如图20所示，第二电极203全部位于限位层205的空腔内；也可以部分位于限位层205的空腔内，部分延伸至限位层205远离第二衬底60的一侧。
在S103之前，如图13A和13B所示，还可以在粘附层204上形成保护层207，以隔开粘附层204和第二电极203，起到保护作用。
S104、如图21所示，在压电层202上形成第一电极201。
此处，可以是第一电极201在第二衬底60上的正投影与限位层205在第二衬底60上的正投影无重叠区域；也可以是第一电极201在第二衬底60上的正投影与限位层205在第二衬底60上的正投影具有重叠区域。
在S104之前，如图13B所示，还可以在第一电极201上形成弹性层211，弹性层211起到承载转移结构20作用。
S105、如图2所示，去除第一牺牲层208和第二衬底60。
此处，可以利用激光去除第一牺牲层208和第二衬底60。
在第二衬底60上形成有第二牺牲层209的情况下，上述转移结构20的制备方法还包括在去除第一牺牲层208和第二衬底60的同时，去除第二牺牲层209。相对于在第二衬底60上直接形成限位层205，本公开实施例，在第二衬底60上先形成第二牺牲层209，再形成限位层205，有利于去除第二衬底60时，第二衬底60与限位层205的分离。
本公开实施例提供一种转移结构20的制备方法，转移结构20的制备方法与上述的转移结构20具有相同的结构和有益效果，由于上述实施例已经对转移结构20的结构和有益效果进行了详细的描述，因而此处不再赘述。
可选的，S100包括：
S200、如图23所示，在第二衬底60上形成限位层薄膜210。
S201、如图24所示，对限位层薄膜210进行构图，以在第二衬底60上形成限位层205，同时在限位层205的空腔的侧壁形成凸起结构206。
本公开实施例通过一次构图工艺可以同时形成限位层205和凸起结构206，简化了转移结构20的制作工艺。此外，在限位层205的空腔的侧壁形成凸起结构206，凸起结构206可以在粘附层204收缩回限位层205的空腔的过程中，阻止待转移部件30进入限位层205的空腔内，从而确保粘附层204和待转移部件30分离。
本公开一实施例还提供一种转移装置的制备方法，如图22所示，该制备方法包括将多个制备形成的转移结构20形成在基板10上。需要说明的是，为了简化图形，图22仅示出了将一个转移结构20形成在基板10上。
本公开实施例还提供另一种转移装置的制备方法，可以用于制备上述的转移装置。该转移装置的制备方法，如图25所示，包括：
S300、如图26所示，在基底10上依次形成层叠的第一电极201、压电层202和第二电极203。
S301、如图2、图3、图4以及图5所示，在第二电极203上形成粘附层204，并在基底10上形成限位层205；限位层205包括空腔。其中，压电层202以及至少部分粘附层204位于限位层205的空腔内；限位层205远离基底10的表面与基底10的距离大于粘附层204远离基底10的表面与基底10的距离。
此处，可以先在第二电极203上形成粘附层204，再在基板10上形成限位层205；也可以先在基板10上形成限位层205，再在第二电极203上形成粘附层204。
先在第二电极203上先形成粘附层204，再在基底10上形成限位层205时，形成在第二电极203上的粘附层204可以仅位于后续形成的限位层205的空腔内；也可以是部分位于后续形成的限位层205的空腔内，部分位于限位层205和基底10之间。先在基板10上形成限位层205，再在第二电极203上形成粘附层204，粘附层204全部位于限位层205的空腔内。
本公开实施例提供一种转移结构20的制备方法，转移结构20的制备方法与上述的转移结构20具有相同的结构和有益效果，由于上述实施例已经对转移结构20的结构和有益效果进行了详细的描述，因而此处不再赘述。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (16)

  1. 一种转移结构，包括：依次层叠设置在基底上的第一电极、压电层、第二电极以及粘附层；所述第一电极和所述第二电极相互绝缘；
    所述转移结构还包括：限位层，所述限位层包括空腔；
    其中，所述压电层以及至少部分所述粘附层位于所述限位层的所述空腔内；并且在垂直于所述基底的方向，所述限位层远离所述基底的表面与所述基底的距离大于所述粘附层远离所述基底的表面与所述基底的距离。
  2. 根据权利要求1所述的转移结构，其中，所述转移结构还包括：设置在所述限位层的所述空腔的侧壁的凸起结构。
  3. 根据权利要求2所述的转移结构，其中，在垂直于所述基底的方向，所述凸起结构位于所述粘附层远离所述基底的一侧。
  4. 根据权利要求3所述的转移结构，其中，在垂直于所述基底的方向，所述凸起结构远离所述基底的表面与所述限位层远离所述基底的表面在同一平面内。
  5. 根据权利要求2-4任一项所述的转移结构，其中，所述限位层与所述凸起结构一体成型。
  6. 根据权利要求1-5任一项所述的转移结构，其中，在垂直于所述基底的方向，所述空腔具有至少朝向远离所述基底一侧的开口。
  7. 根据权利要求1-6任一项所述的转移结构，其中，所述转移结构还包括：设置在所述第二电极和所述粘附层之间的保护层。
  8. 根据权利要求1-7任一项所述的转移结构，其中，所述转移结构还包括：设置在所述第一电极远离所述压电层一侧的弹性层。
  9. 一种转移装置，包括基底以及设置在所述基底上的多个如权利要求1-8任一项所述的转移结构。
  10. 根据权利要求9所述的转移装置，其中，所述基底包括第一衬底以及设置在所述第一衬底上沿第一方向延伸且沿第二方向依次排列的多条栅线、沿所述第二方向延伸且沿所述第一方向依次排列的多条数据线；
    所述基底还包括设置在所述第一衬底上的多个薄膜晶体管；位于同一排且沿第一方向排列的多个薄膜晶体管的栅极与同一条所述栅线电连接；位于同一排且沿第二方向排列的多个薄膜晶体管的源极与同一条所述数据线电连接；
    一个所述转移结构中的第一电极与一个所述薄膜晶体管的漏极电连接。
  11. 一种转移结构的制备方法，包括：
    在第二衬底上形成限位层，所述限位层包括空腔；
    在所述限位层的所述空腔内形成第一牺牲层；
    至少在所述限位层的所述空腔内形成粘附层；
    在所述粘附层上依次形成第二电极和压电层，所述压电层位于所述限位层的所述空腔内；
    在所述压电层上形成第一电极；
    去除所述第一牺牲层和所述第二衬底。
  12. 根据权利要求11所述的转移结构的制备方法，其中，在垂直于所述第二衬底的方向，所述空腔具有至少朝向所述第二衬底的开口。
  13. 根据权利要求11或12所述的转移结构的制备方法，其中，所述在第二衬底上形成限位层，包括：
    在所述第二衬底上形成限位层薄膜；
    对所述限位层薄膜进行构图，以在所述第二衬底上形成限位层，同时在所述限位层的所述空腔的侧壁形成凸起结构。
  14. 根据权利要求11-13任一项所述的转移结构的制备方法，还包括：在所述粘附层上依次形成第二电极和压电层之前，在所述粘附层上形成保护层。
  15. 根据权利要求11-14任一项所述的转移结构的制备方法，还包括：在所述压电层上形成第一电极之后，在所述第一电极上形成弹性层。
  16. 一种转移装置的制备方法，包括：
    在基底上依次形成层叠的第一电极、压电层和第二电极；
    在所述第二电极上形成粘附层，并在所述基底上形成限位层；所述限位层包括空腔；其中，所述压电层以及至少部分所述粘附层位于所述限位层的所述空腔内；所述限位层远离所述基底的表面与所述基底的距离大于所述粘附层远离所述基底的表面与所述基底的距离。
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