WO2016173182A1 - 一种显示面板隔离柱及其制作方法、显示面板及显示装置 - Google Patents

一种显示面板隔离柱及其制作方法、显示面板及显示装置 Download PDF

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WO2016173182A1
WO2016173182A1 PCT/CN2015/089778 CN2015089778W WO2016173182A1 WO 2016173182 A1 WO2016173182 A1 WO 2016173182A1 CN 2015089778 W CN2015089778 W CN 2015089778W WO 2016173182 A1 WO2016173182 A1 WO 2016173182A1
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Prior art keywords
pattern
display panel
isolation
material pattern
material layer
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PCT/CN2015/089778
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English (en)
French (fr)
Inventor
何晓龙
张锋
曹占锋
舒适
谷耀辉
徐威
鹿岛美纪
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京东方科技集团股份有限公司
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Priority to US14/915,934 priority Critical patent/US9893140B2/en
Publication of WO2016173182A1 publication Critical patent/WO2016173182A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/173—Passive-matrix OLED displays comprising banks or shadow masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a display panel isolation pillar, a manufacturing method thereof, a display panel, and a display device.
  • the organic light emitting diode has the advantages of self-luminescence, high contrast, high reaction speed, wide viewing angle, and the like, and plays an increasingly important role in the flat panel display technology.
  • OLED Organic Light-Emitting Diode
  • digital products such as displays, MP3s, TVs, mobile phones, and military fields.
  • the driving methods of OLED mainly include active driving and passive driving.
  • the drive control circuit is an indispensable part of the active light-emitting diode. Its performance is directly related to the performance of the whole system. Therefore, the design of the high-performance drive control circuit is designed in the active-driven OLED display. It plays a decisive role, and the active-driven OLED is complicated to manufacture and costly.
  • the passively driven OLED has the advantages of simple fabrication and low cost.
  • the display panel of the passively driven OLED includes a plurality of strip-shaped first electrodes 5 formed on the base substrate 1, a plurality of strip-shaped second electrodes 3, and a first electrode. a first signal line 51 for inputting a current signal, a second signal line 31 for inputting a current signal to the second electrode 3, a light-emitting function layer 4 between the first electrode 5 and the second electrode 3, a passivation layer 2, and Isolation column 6.
  • the driving principle of the OLED display panel is as shown in FIG. 1 and FIG. 2, and the intersection area of the first electrode 5 and the second electrode 3 forms a display unit, and is controlled to input to the first electrode 3 of different rows and the second electrode 5 of different columns.
  • the drive current controls the display of each display unit.
  • the passivation layer 2 is used to make the first signal line under the passivation layer 2 51.
  • the second signal line 31 is insulated from the first electrode 5 or the second electrode 3 located above the passivation layer 2. Since the first electrode is formed on the upper surface of the light-emitting function layer 4, it can only be formed by an evaporation method, and the first electrode formed by directly vapor-depositing the conductive material is a planar electrode, and in order to form a plurality of strip-shaped first electrodes, An isolation column is formed prior to vapor deposition of the conductive material such that the conductive material is vapor-deposited at the isolation column to form a strip-shaped first electrode.
  • the spacer column is generally set to an inverted trapezoid in the prior art.
  • the formed inverted trapezoidal angle is generally small, and it is easy to deposit a conductive material on the side of the spacer, so that the adjacent first electrode is turned on, and the display panel cannot be normally displayed.
  • Embodiments of the present disclosure provide a display panel isolation pillar and a manufacturing method thereof, a display panel, and a display device, wherein the display panel isolation pillar is used for vapor deposition to form an electrode, so that the electrode is automatically disconnected at the isolation column.
  • the display panel isolation pillar in the embodiment of the present disclosure includes a first material pattern and a second material pattern located above the first material pattern, such that an electrode surface formed by evaporation is lower than an upper surface of the first material pattern, thereby The electrode formed by vapor deposition is insulated from the electrode on the side of the second material pattern to avoid electrical connection between the electrodes.
  • an embodiment of the present disclosure provides a display panel isolation pillar including a first material pattern and a second material pattern located above the first material pattern, wherein the first material pattern includes an opposite upper surface, a lower surface and a first isolation side and a second isolation side opposite the upper surface and the lower surface, the second material pattern including opposing upper and lower surfaces, wherein the first material pattern The upper surface is in direct contact with the lower surface of the second material pattern, and the projection of the first isolation side and the second isolation side of the first material pattern on the plane of the lower surface of the second material pattern Located between the edges of the lower surface of the second material pattern.
  • an embodiment of the present disclosure provides a display panel including a substrate substrate and a plurality of display panel isolation pillars formed on the substrate substrate and a spacer between adjacent two display panel isolation pillars.
  • An electrode wherein the display panel isolating column according to any one of the embodiments of the present disclosure, the first electrode includes an upper surface and a lower surface, the first electrode The plane of the surface is lower than the plane of the upper surface of the first material pattern of the spacer of the display panel.
  • an embodiment of the present disclosure provides a display device including the display panel provided by the embodiment of the present disclosure.
  • an embodiment of the present disclosure provides a method for fabricating a display panel isolation pillar, including:
  • the second material layer is patterned by a dry etching process or a photolithography process to pattern the second material layer, and the patterned second material pattern includes a second material layer removal region and a second material layer retention region. ;
  • Embodiments of the present disclosure provide a display panel isolation pillar and a manufacturing method thereof, a display panel, and a display device.
  • the isolation pillar is mainly used to cause an electrode to be automatically disconnected at a spacer when vapor deposition forms an electrode.
  • the display panel isolation pillar in the embodiment of the present disclosure includes a first material pattern and a second material pattern located above the first material pattern, and the electrode surface formed by evaporation is lower than the upper surface of the first material pattern, thereby causing steaming
  • the plated electrode is insulated from the electrode on the side of the second material pattern to avoid electrical connection between the electrodes.
  • FIG. 1 is a schematic view of a conventional PMOLED display panel
  • FIG. 2 is an equivalent circuit diagram of the display panel shown in FIG. 1;
  • Figure 3 is a schematic view of the A-A' direction shown in Figure 1;
  • FIG. 4 is a schematic diagram of a display panel isolation column according to an embodiment of the present disclosure.
  • FIG. 5 is a schematic diagram of another display panel isolation column according to an embodiment of the present disclosure.
  • FIG. 6 is a schematic diagram of another display panel isolation column according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic diagram of a strip isolation column according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of a display panel according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic diagram of a method for fabricating a display panel isolation pillar according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic view showing deposition of a first material layer and a second material layer on a substrate
  • Figure 11 is a schematic view of the second material layer after patterning
  • FIG. 12 is a schematic view of a first material pattern after mask etching with a second material layer
  • FIG. 13 is a schematic diagram of another method for fabricating a display panel isolation pillar according to an embodiment of the present disclosure.
  • FIG. 14 is a schematic diagram of another method for fabricating a display panel isolation pillar according to an embodiment of the present disclosure.
  • FIG. 15 is a schematic diagram of another method for fabricating a display panel isolation pillar according to an embodiment of the present disclosure.
  • Figure 16 is a schematic view showing an insulating pattern formed on a substrate
  • Figure 17 is a schematic view showing the formation of via holes on the first material layer
  • Figure 18 is a schematic view showing the deposition of a second material layer
  • Figure 19 is a schematic view of the second material layer after patterning
  • Figure 20 is a schematic view of the first material layer after wet etching
  • Figure 21 is a specific embodiment of the step S106 of Figure 14.
  • layer refers to a film formed by deposition or other process on a substrate using a certain material. If the “layer” still needs a patterning process during the whole production process, it is called “layer” before the patterning process, and is called “pattern” after the patterning process.
  • patterning process is a process of forming a film into a layer comprising at least one pattern; and the patterning process generally comprises: applying a glue on the film, exposing the photoresist with a mask, and then removing the developer The photoresist is etched away, and then the portion of the film that is not covered with the photoresist is etched, and finally The remaining photoresist is peeled off.
  • An embodiment of the present disclosure provides a spacer 6 including, as shown in FIG. 4, a first material pattern 61 and a second material pattern 62 located above the first material pattern 61, wherein the first material pattern 61 includes an upper surface a surface, a lower surface, and a first isolation side 611 and a second isolation side 612 located between the upper surface and the lower surface, the second material pattern 62 including an opposite upper surface 621 and a lower surface 622, wherein the first material pattern 61
  • the upper surface is in direct contact with the lower surface 622 of the second material pattern 62, and the projection of the first isolation side 611 and the second isolation side 612 of the first material pattern 61 on the plane of the lower surface 622 of the second material pattern 62 is located at the second
  • the material pattern 62 is between the edges of the lower surface 622.
  • the projection of the first isolation side and the second isolation side of the first material pattern on the lower surface of the second material pattern is between the edges of the lower surface of the second material pattern, ie the first isolation side and the second isolation side of the first material pattern Retracted in the lower surface of the second material pattern.
  • the display panel isolation column provided by the embodiment of the present disclosure is mainly used to cause the electrode to be automatically disconnected at the isolation column when the electrode is formed by evaporation.
  • the electrode formed by the vapor deposition of the display panel isolation column is automatically disconnected in the isolation column, and the surface of the electrode formed by evaporation is lower than the upper surface of the first material pattern, thereby forming the electrode formed by evaporation and the second material.
  • the electrodes on the sides of the pattern are insulated to avoid electrical connection between the electrodes; on the other hand, the first material pattern is retracted into the lower surface of the second material pattern such that the electrode formed by evaporation does not contact the first material pattern.
  • the plane of the lower surface of the second material pattern is the lower surface of the second material pattern.
  • the first isolation side and the second isolation side of the first material pattern have a projection distance from a plane of the lower surface of the second material pattern that is less than 1 micrometer.
  • the first isolation side surface 611 of the first material pattern 61 has a projection distance from the plane of the lower surface of the second material pattern and a minimum distance d1 from the edge of the lower surface 622 of the second material pattern 62 is not less than 1 micrometer.
  • the second isolation side 612 of the first material pattern 61 has a projection distance from the plane of the lower surface of the second material pattern, and the minimum distance d2 from the edge of the lower surface 622 of the second material pattern 62 is not less than 1 micrometer, that is, d2 ⁇ 1 ⁇ m.
  • the first isolation side surface and the second isolation side surface are planar as an example for detailed description.
  • the minimum distance of the first isolation side of the first material pattern from the lower surface edge of the second material pattern may be the distance between the first isolation side and the lower surface edge of the second material pattern. The minimum distance.
  • the first isolation side of the first material pattern has a projection distance from a plane of the lower surface of the second material pattern and a minimum distance from the lower surface edge of the second material pattern is equal to the second isolation side surface at the lower surface of the second material pattern
  • the projection of the plane in which it is located is the minimum distance from the edge of the lower surface of the second material pattern.
  • the projection distance of the first isolation side surface 611 of the first material pattern 61 from the plane of the lower surface of the second material pattern is a minimum distance d1 from the edge of the lower surface 622 of the second material pattern 62 is equal to the first material.
  • the second isolated side 612 of the pattern 61 has a minimum distance d2 from the plane of the lower surface 622 of the second material pattern 62 at a plane of the lower surface of the second material pattern. That is, if the first material pattern and the second material pattern are symmetrical, the symmetry axes of the first material pattern and the second material pattern may be coincident.
  • the material forming the first material pattern is a conductive material
  • the material forming the second material pattern is an insulating material.
  • the material forming the first material pattern may be ITO (Indium tin oxide) or a conductive material such as metal.
  • the material forming the second material pattern may be an insulating material such as resin, silicon oxide, silicon nitride or the like.
  • the material forming the second material pattern is a photosensitive resin, and the second material pattern may be formed by photolithography.
  • the material forming the first material pattern is metal
  • the material forming the second material pattern is a resin as an example for detailed description.
  • the electrode formed by the evaporation is not in contact with the first material pattern, thereby avoiding occurrence of the first material pattern. The necessary electrical connections.
  • the isolation pillar 6 further includes an insulation pattern 63 under the first material pattern 61, the insulation pattern 63 includes opposite upper and lower surfaces; the upper surface of the insulation pattern 63 and the first material pattern The lower surface of 61 is in direct contact;
  • the first isolation side 611 and the second isolation side 612 of the first material pattern 61 are located between the first isolation side 631 and the second isolation side 632 of the insulation pattern 63.
  • the first isolation side and the second isolation side of the first material pattern 61 are located between the first isolation side and the second isolation side of the insulating pattern, that is, the side of the first material pattern is retracted into the lower surface of the insulating pattern.
  • the first material pattern is a conductive layer.
  • the first material pattern may be insulated from the conductive layer under the insulating pattern by an insulating pattern.
  • the first material pattern is formed with a via hole, and the via hole divides the first material pattern into two portions that are not in contact with each other, and the first isolation side surface and the second isolation side surface are respectively located in the two portions.
  • the via hole divides the first material pattern into the first portion 613 and the second portion 614, wherein the first isolation side surface 611 of the first material pattern is located at the first portion 613, and the second material pattern is second.
  • the isolated side 612 is located in the second portion 614.
  • the via hole divides the first material pattern into two portions that are not in contact with each other, and the first electrodes on both sides of the spacer column cannot be electrically connected even if they are in contact with the first material pattern, thereby further ensuring that the first electrodes do not contact each other.
  • the edge of the upper surface 621 of the second material pattern 62 is located between the edges of the lower surface 622. That is, the second material pattern is a positive trapezoid, so that the second material pattern is formed by a normal dry etching, photolithography, wet etching process, which is simpler than the formation of an inverted trapezoid.
  • the isolation column is strip-shaped, and the first isolation side and the second isolation side are sides along the long axis of the isolation column.
  • the long axis of the spacer column is along the direction of 101, and the first isolation side 611 and the second isolation side 612 of the first material pattern are exemplified, which are all sides along the direction of 101.
  • An embodiment of the present disclosure provides a display panel, as shown in FIG. 8, including a substrate substrate 1 and a plurality of isolation pillars 6 formed on the substrate substrate 1 and a first between the adjacent two isolation pillars 6.
  • the plane of the upper surface of the first electrode is lower than the plane of the upper surface of the first material pattern of the spacer, and the spacer is formed on the substrate by using the substrate as a reference plane. In the direction, the upper surface of the first electrode is lower than the upper surface of the second material pattern.
  • a display panel provided by the embodiment of the present disclosure includes the display panel isolation pillar and the first electrode provided by the embodiment of the present disclosure.
  • the upper surface of the first electrode is located lower than the upper surface of the first material pattern of the isolation pillar. In the plane, even if the side of the second material pattern of the spacer is deposited with an electrode, the first electrode cannot be in contact therewith; on the other hand, the first material pattern is indented into the lower surface of the second material pattern, even if the first electrode layer is Conductive layer, first electrode formed by evaporation and first material map The case is not in contact.
  • a difference in distance between the upper surface of the first electrode and the upper surface of the first material pattern of the spacer is not less than 400 nm. That is, the distance between the upper surface of the first electrode and the upper surface of the first material pattern of the spacer is c ⁇ 400 nm, so as to ensure that the plane of the upper surface of the first electrode is lower than the upper surface of the first material pattern of the spacer. The plane prevents the upper surface of the first electrode from being electrically connected to the electrode deposited on the side of the second material pattern of the spacer, resulting in conduction between the plurality of first electrodes.
  • the display panel further includes: a second electrode 3 and a light emitting function layer 4 between the first electrode 5 and the second electrode 3, wherein the second electrode 3 is located at the first electrode 5 and The lower surface of the column 6 is isolated, and the second electrode 3 is insulated from the first material pattern 61 of the spacer 6 by the insulating pattern 63 of the spacer 6. Since the first material pattern may be formed using a conductive metal, in order to prevent the first material pattern from being electrically connected to the second electrode, an insulating pattern is further formed between the first material pattern and the second electrode.
  • the display panel provided by the embodiment of the present disclosure is a passively driven OLED display panel.
  • An embodiment of the present disclosure provides a display device, including any of the display panels provided by the embodiments of the present disclosure.
  • the display device may be a display device such as an OLED display and any product or component having a display function such as a television, a digital camera, a mobile phone, a tablet computer or the like including the display device.
  • An embodiment of the present disclosure provides a method for fabricating a display panel isolation pillar, as shown in FIG.
  • Step 101 depositing a first material to form a first material layer.
  • Step 102 depositing a second material to form a second material layer. As shown in FIG. 10, a first material layer 610 and a second material layer 620 are sequentially deposited on the base 1.
  • Step 103 Patterning the second material layer by a dry etching process or a photolithography process to pattern the second material layer, and the second material pattern formed after the patterning includes the second material layer removal region and the second material layer retention region.
  • the second material pattern 62 formed after patterning is as shown in FIG. 11, and a portion of the second material layer is removed.
  • the patterning of the second material layer by specific dry etching or photolithography may be performed according to the existing dry etching process or photolithography process, and the embodiments of the present disclosure are not described herein.
  • Step 104 etching a first material layer located in the second material layer removal region and a portion of the second material layer retention region by using an etching solution, wherein the etching solution etches the second material layer and does not etch the first material layer.
  • a mask is formed in the second material pattern 62, and the first material layer corresponding to the second material layer removal region is etched by the etching solution to form a spacer.
  • the distance of the first material layer into the second material pattern can be controlled by controlling the etching time.
  • the method further includes:
  • Step 105 forming an insulation pattern, wherein the insulation pattern includes opposite upper and lower surfaces;
  • the projection of the first isolation side surface and the second isolation side surface of the first material pattern on the plane of the upper surface of the insulation pattern is between the edges of the upper surface of the insulation pattern.
  • the first material and the second material are deposited on the substrate on which the insulating pattern is formed, and the isolation pillar is formed by an etching process.
  • the specific formation of the insulating pattern may be formed by a process such as photolithography, dry etching, etc., and the embodiments of the present disclosure are not described herein.
  • the method further includes:
  • Step 106 Patterning the first material layer, forming a via hole on the first material layer, and the via hole divides the first material pattern of the isolation pillar into two portions that do not contact each other.
  • the isolation column after formation is shown in Fig. 6 and Fig. 7.
  • the foregoing step 106 specifically includes:
  • Step 1061 forming a photoresist on the first material layer.
  • Step 1062 Exposing and developing the photoresist by using a mask, and forming a photoresist remaining portion and a photoresist removing portion after development, wherein the photoresist removing portion corresponds to the via region.
  • Step 1063 removing a portion of the first material layer by wet or dry etching of the photoresist to form via holes.
  • Step 1064 removing the photoresist.
  • the embodiment of the present disclosure provides a specific fabrication diagram, and details the steps of forming the isolation pillar shown in FIG. 6 by using the manufacturing method. As shown in FIG. 15, the method includes:
  • an insulating pattern 63 is formed on the substrate 1.
  • the insulating pattern 63 as shown in FIG. 16 can be formed by a process of dry etching or wet etching.
  • Step 202 depositing a first material to form a first material layer, and patterning the first material pattern to form a via hole on the first material layer.
  • the first material layer 610 shown in FIG. 17 is formed by the above steps 1061-1064.
  • the first material layer is patterned, specifically by patterning with a photosensitive resin as a photoresist, and when the first material layer is formed, the photosensitive resin as a photoresist is peeled off.
  • Step 203 depositing a second material to form a second material layer 620.
  • the second material layer may be a resin material.
  • the resin material forming the second material layer has better heat resistance and high temperature resistance chemical properties with respect to the photosensitive resin patterned for the first material layer.
  • Step 204 Patterning the second material layer by using a dry etching process or a photolithography process to pattern the second material pattern, as shown in FIG. 19, the second material pattern formed after the patterning includes the second material layer removing region and the first Two material layer retention areas.
  • Step 205 As shown in FIG. 20, the first material layer located in the second material layer removal region and a portion of the second material layer retention region is etched by the etching solution.
  • the isolation column formed by the above steps 201 to 205 is as shown in FIG. 6.

Abstract

一种显示面板隔离柱及其制作方法、显示面板及显示装置。显示面板隔离柱（6）包括第一材料图案（61）以及位于第一材料图案（61）上面的第二材料图案（62），第一材料图案（61）包括相对的上表面、下表面以及位于上表面和下表面之间相对的第一隔离侧面（611）和第二隔离侧面（612），第二材料图案（62）包括相对的上表面（621）和下表面（622），第一材料图案（61）的上表面与第二材料图案（62）的下表面（622）直接接触，第一材料图案（61）的第一隔离侧面（611）和第二隔离侧面（612）在第二材料图案（62）下表面（622）所在平面的投影位于第二材料图案（62）下表面的边缘之间。

Description

一种显示面板隔离柱及其制作方法、显示面板及显示装置
相关申请的交叉引用
本申请主张在2015年4月30日在中国提交的中国专利申请号No.201510218799.6的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，尤其涉及一种显示面板隔离柱及其制作方法、显示面板及显示装置。
背景技术
目前，在平板显示技术中，有机发光二极管具有自发光性、高对比度、高反应速度、广视角等优点，在平板显示技术中发挥着越来越重要的作用。作为新一代显示器件，OLED(Organic Light-Emitting Diode，有机发光二极管)在显示器、MP3、电视、手机等数码产品以及军事领域都有广阔的发展空间和应用前景。
OLED的驱动方式主要有有源驱动和无源驱动两种方式。驱动控制电路是有源发光二极管中必不可少的重要组成部分，其性能的优劣直接关系到整个系统性能的好坏，因此，高性能的驱动控制电路的设计在有源驱动的OLED显示设计中起着举足轻重的作用，有源驱动的OLED的制作复杂、成本高。而采用无源驱动的OLED具有制作简单、低成本等优点。
无源驱动的OLED的显示面板如图1、图3所示，包括形成在衬底基板1上的多个条状的第一电极5、多个条状的第二电极3、向第一电极5输入电流信号的第一信号线51、向第二电极3输入电流信号的第二信号线31、位于第一电极5和第二电极3之间的发光功能层4、钝化层2、以及隔离柱6。OLED显示面板的驱动原理如图1、图2所示，第一电极5和第二电极3的交叉区域形成一个显示单元，通过控制向不同行第一电极3和不同列的第二电极5输入的驱动电流，控制各显示单元的显示。
如图1、图3所示，钝化层2用于使得位于钝化层2下面的第一信号线 51、第二信号线31与位于钝化层2上面的第一电极5或第二电极3绝缘。由于第一电极形成在发光功能层4的上面，其一般只能采用蒸镀法形成，而直接蒸镀导电材料形成的第一电极为一个平面电极，为了形成多个条状的第一电极，在蒸镀导电材料之前形成隔离柱，使得蒸镀导电材料时在隔离柱处断开，形成条状的第一电极。
如图3所示，为了使得蒸镀第一电极时，第一电极在隔离柱断开，现有技术中一般将隔离柱设置为倒梯形。形成的倒梯形夹角一般很小，则很容易在隔离柱的侧面沉积导电材料，从而使得相邻的第一电极导通，显示面板无法正常显示。
发明内容
本公开的实施例提供一种显示面板隔离柱及其制作方法、显示面板及显示装置，所述显示面板隔离柱用于蒸镀形成电极时，使得电极自动在隔离柱处断开。本公开实施例中的显示面板隔离柱包括第一材料图案以及位于所述第一材料图案上面的第二材料图案，通过使得蒸镀形成的电极表面低于第一材料图案的上表面，从而使得蒸镀形成的电极与第二材料图案侧面的电极绝缘，避免电极之间电连接。
为达到上述目的，本公开的实施例采用如下技术方案：
一方面，本公开实施例提供了一种显示面板隔离柱，包括第一材料图案以及位于所述第一材料图案上面的第二材料图案，其中，所述第一材料图案包括相对的上表面、下表面以及位于所述上表面和所述下表面之间相对的第一隔离侧面和第二隔离侧面，所述第二材料图案包括相对的上表面和下表面，其中，所述第一材料图案的上表面与所述第二材料图案的下表面直接接触，且所述第一材料图案的所述第一隔离侧面和所述第二隔离侧面在所述第二材料图案下表面所在平面的投影位于所述第二材料图案下表面的边缘之间。
另一发面，本公开实施例提供了一种显示面板，包括衬底基板以及形成在所述衬底基板上的多个显示面板隔离柱以及位于相邻两个显示面板隔离柱之间的第一电极，其中，所述显示面板隔离柱为本公开实施例提供的任一所述的显示面板隔离柱，所述第一电极包括上表面和下表面，所述第一电极上 表面所在平面低于所述显示面板隔离柱的第一材料图案的上表面所在平面。
另一方面，本公开实施例提供了一种显示装置，包括本公开实施例提供的所述显示面板。
再一方面，本公开实施例提供了一种显示面板隔离柱的制作方法，包括：
沉积第一材料形成第一材料层；
沉积第二材料形成第二材料层；
利用干刻工艺或光刻工艺对所述第二材料层进行构图使所述第二材料层图形化，图形化后形成的第二材料图案包括第二材料层去除区域和第二材料层保留区域；
利用刻蚀液刻蚀位于所述第二材料层去除区域以及部分第二材料层保留区域的第一材料层，其中所述刻蚀液刻蚀所述第二材料层且不刻蚀所述第一材料层。
本公开的实施例提供一种显示面板隔离柱及其制作方法、显示面板及显示装置，隔离柱主要用于在蒸镀形成电极时，使得电极自动在隔离柱处断开。本公开实施例中的显示面板隔离柱包括第一材料图案以及位于所述第一材料图案上面的第二材料图案，且蒸镀形成的电极表面低于第一材料图案的上表面，从而使得蒸镀形成的电极与第二材料图案侧面的电极绝缘，避免电极之间电连接。
附图说明
为了更清楚地说明本公开实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为现有的PMOLED显示面板示意图；
图2为图1所示显示面板的等效电路图；
图3为图1所示的A-A′向示意图；
图4为本公开实施例提供的一种显示面板隔离柱示意图；
图5为本公开实施例提供的另一种显示面板隔离柱示意图；
图6为本公开实施例提供的另一种显示面板隔离柱示意图；
图7为本公开实施例提供的一种条状隔离柱的示意图；
图8为本公开实施例提供的一种显示面板示意图；
图9为本公开实施例提供的一种显示面板隔离柱的制作方法示意图；
图10为在基板上沉积形成第一材料层和第二材料层的示意图；
图11为对第二材料层进行构图后的示意图；
图12为以第二材料层进行掩膜刻蚀第一材料图案后的示意图；
图13为本公开实施例提供的另一种显示面板隔离柱的制作方法示意图；
图14为本公开实施例提供的另一种显示面板隔离柱的制作方法示意图；
图15为本公开实施例提供的另一种显示面板隔离柱的制作方法示意图；
图16为在基板上形成绝缘图案的示意图；
图17为在第一材料层上形成过孔的示意图；
图18为沉积第二材料层的示意图；
图19为对第二材料层进行构图后的示意图；
图20为湿法刻蚀第一材料层后的示意图；
图21为图14中步骤S106的一种具体实施方式。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
在本公开所有实施例中，需要阐明“层”以及“图案”的定义，以及之间的关系。其中，“层”是指利用某一种材料在基板上利用沉积或其他工艺制作出的一层薄膜。若在整个制作过程当中该“层”还需构图工艺，则在构图工艺前称为“层”，构图工艺后称为“图案”。
所谓“构图工艺”是将薄膜形成包含至少一个图案的层的工艺；而构图工艺通常包含：在薄膜上涂胶，利用掩膜板对所述光刻胶进行曝光，再利用显影液将需去除的光刻胶冲蚀掉，再刻蚀掉未覆盖光刻胶的薄膜部分，最后 将剩下的光刻胶剥离。
本公开实施例提供了一种隔离柱6，如图4所示，包括第一材料图案61以及位于第一材料图案61上面的第二材料图案62，其中，第一材料图案61包括相对的上表面、下表面以及位于上表面和下表面之间相对的第一隔离侧面611和第二隔离侧面612，第二材料图案62包括相对的上表面621和下表面622，其中，第一材料图案61的上表面与第二材料图案62的下表面622直接接触，且第一材料图案61的第一隔离侧面611和第二隔离侧面612在第二材料图案62下表面622所在平面的投影位于第二材料图案62下表面622的边缘之间。
第一材料图案的第一隔离侧面和第二隔离侧面在第二材料图案下表面的投影位于第二材料图案下表面的边缘之间，即第一材料图案的第一隔离侧面和第二隔离侧面缩进在第二材料图案的下表面。
需要说明的是，本公开实施例提供的显示面板隔离柱，主要用于在蒸镀形成电极时，使得电极自动在隔离柱处断开。一方面，通过所述显示面板隔离柱蒸镀形成的电极在隔离柱自动断开，且蒸镀形成的电极表面低于第一材料图案的上表面，从而使得蒸镀形成的电极与第二材料图案侧面的电极绝缘，避免电极之间电连接；另一方面，第一材料图案缩进第二材料图案的下表面，使得蒸镀形成的电极与第一材料图案不接触。在第二材料图案下表面为平面的情况下，所述第二材料图案下表面所在平面即为所述第二材料图案的下表面。
可选的，第一材料图案的第一隔离侧面和第二隔离侧面在第二材料图案下表面所在平面的投影距离第二材料图案下表面边缘的最小距离不小于1微米。具体的，如图4所示，第一材料图案61的第一隔离侧面611在第二材料图案下表面所在平面的投影距离第二材料图案62的下表面622边缘的最小距离d1不小于1微米，即d1≥1μm；第一材料图案61的第二隔离侧面612在第二材料图案下表面所在平面的投影距离第二材料图案62的下表面622边缘的最小距离d2不小于1微米，即d2≥1μm。
需要说明的是，本公开实施例及附图以第一材料图案为长方体，则其第一隔离侧面和第二隔离侧面为平面为例进行详细说明。由于在制作过程中， 不可能形成绝对的平面，则所述第一材料图案的第一隔离侧面距离第二材料图案下表面边缘的最小距离，可以为第一隔离侧面距离第二材料图案下表面边缘的所有的距离中的最小距离。
进一步可选的，第一材料图案的第一隔离侧面在第二材料图案下表面所在平面的投影距离第二材料图案下表面边缘的最小距离等于第二隔离侧面在所述第二材料图案下表面所在平面的投影距离第二材料图案下表面边缘的最小距离。及如图4所示，第一材料图案61的第一隔离侧面611在所述第二材料图案下表面所在平面的投影距离第二材料图案62的下表面622边缘的最小距离d1等于第一材料图案61的第二隔离侧面612在所述第二材料图案下表面所在平面的投影距离第二材料图案62的下表面622边缘的最小距离d2。即若第一材料图案和第二材料图案对称，则可使得第一材料图案和第二材料图案的对称轴重合。
可选的，形成第一材料图案的材料为导电材料，形成第二材料图案的材料为绝缘材料。具体的，形成第一材料图案的材料可以是ITO(Indium tin oxide，氧化铟锡)、也可以是金属等导电材料。形成第二材料图案的材料可以是树脂、氧化硅、氮化硅等绝缘材料。进一步的，形成第二材料图案的材料为感光树脂，则第二材料图案可以通过光刻形成。本公开实施例中均以形成第一材料图案的材料为金属、形成第二材料图案的材料为树脂为例进行详细说明。则即使形成第一材料图案的材料为金属材料，由于第一材料图案缩进第二材料图案的下表面，则蒸镀形成的电极与第一材料图案不接触，避免通过第一材料图案发生不必要的电连接。
可选的，如图5所示，隔离柱6还包括位于第一材料图案61下面的绝缘图案63，绝缘图案63包括相对的上表面和下表面；绝缘图案63的上表面与第一材料图案61的下表面直接接触；
其中，第一材料图案61的第一隔离侧面611和第二隔离侧面612位于绝缘图案63的第一隔离侧面631和第二隔离侧面632之间。
第一材料图案61的第一隔离侧面和第二隔离侧面位于绝缘图案的第一隔离侧面和第二隔离侧面之间，即第一材料图案的侧面缩进所述绝缘图案下表面。这样，若绝缘图案下面形成有导电层，第一材料图案为导电层的情况 下，第一材料图案可以通过绝缘图案与绝缘图案下面的导电层绝缘。
可选的，第一材料图案上形成有过孔，过孔将第一材料图案分成互不接触的两部分，第一隔离侧面和第二隔离侧面分别位于两部分。具体的，如图6所示，过孔将第一材料图案分成第一部分613和第二部分614，其中，第一材料图案的第一隔离侧面611位于第一部分613，第一材料图案的第二隔离侧面612位于第二部分614。过孔将第一材料图案分成互不接触的两部分，则隔离柱两侧的第一电极即使与第一材料图案接触，也不能实现电连接，进一步保证了第一电极之间互不接触。
进一步的，如图4-图6所示，第二材料图案62的上表面621的边缘位于下表面622的边缘之间。即第二材料图案为正梯形，这样第二材料图案通过正常的干刻、光刻、湿刻的工艺形成，相比于形成倒梯形的制作更为简单。
可选的，隔离柱为条状，第一隔离侧面和第二隔离侧面为沿隔离柱长轴方向的侧面。如图7所示，隔离柱的长轴沿101方向，以第一材料图案的第一隔离侧面611和第二隔离侧面612为例，其均为沿101方向的侧面。
本公开实施例提供了一种显示面板，如图8所示，包括衬底基板1以及形成在衬底基板1上的多个隔离柱6以及位于相邻两个隔离柱6之间的第一电极5，其中，隔离柱6为本公开实施例提供的任一种隔离柱(图8仅以一种为例)，第一电极5包括上表面和下表面，第一电极5上表面所在平面低于隔离柱6的第一材料图案61的上表面所在平面。即如图8所示，在第一电极5和第一材料图案61的上表面均为平面的情况下，第一电极5的上表面与第一材料图案61的上表面的距离为c。
需要说明的是，本公开实施例中，所述第一电极的上表面所在平面低于隔离柱的第一材料图案的上表面所在平面，是以基板为基准面，在基板上形成隔离柱的方向上，第一电极上表面低于第二材料图案的上表面。
本公开实施例提供的一种显示面板，包括本公开实施例提供的显示面板隔离柱以及第一电极，一方面，第一电极的上表面所在平面低于隔离柱的第一材料图案的上表面所在平面，则即使隔离柱第二材料图案的侧面沉积有电极，第一电极也不能与其接触；另一方面，第一材料图案缩进第二材料图案的下表面，则即使第一电极层为导电层，蒸镀形成的第一电极与第一材料图 案也不接触。
进一步的，第一电极上表面与隔离柱的第一材料图案的上表面的距离差不小于400纳米。即图8所示的第一电极上表面与隔离柱的第一材料图案的上表面的距离c≥400nm，以保证第一电极的上表面所在平面低于隔离柱第一材料图案的上表面所在平面，防止第一电极的上表面与隔离柱第二材料图案侧面沉积的电极接触电连接，导致多条第一电极之间导通。
可选的，如图8所示，显示面板还包括：第二电极3以及位于第一电极5和第二电极3之间的发光功能层4，其中，第二电极3位于第一电极5和隔离柱6的下面，且第二电极3通过隔离柱6的绝缘图案63与隔离柱6的第一材料图案61绝缘。由于第一材料图案可以采用导电金属形成，则为了防止第一材料图案与第二电极电连接，第一材料图案和第二电极之间还形成有绝缘图案。
可选的，本公开实施例提供的显示面板为无源驱动的OLED显示面板。
本公开实施例提供了一种显示装置，包括本公开实施例提供的任一所述的显示面板。所述显示装置可以为OLED显示器等显示器件以及包括这些显示器件的电视、数码相机、手机、平板电脑等任何具有显示功能的产品或者部件。
本公开实施例提供了一种显示面板隔离柱的制作方法，如图9所示，包括：
步骤101、沉积第一材料形成第一材料层。
步骤102、沉积第二材料形成第二材料层。如图10所示，依次在基本1上沉积第一材料层610和第二材料层620。
步骤103、利用干刻工艺或光刻工艺对第二材料层进行构图使第二材料层图形化，图形化后形成的第二材料图案包括第二材料层去除区域和第二材料层保留区域。
图形化后形成的第二材料图案62如图11所示，第二材料层的部分被去除。具体干刻或光刻对第二材料层进行构图可以根据现有的干刻工艺或光刻工艺进行，本公开实施例在这里不作赘述。
步骤104、利用刻蚀液刻蚀位于第二材料层去除区域以及部分第二材料层保留区域的第一材料层，其中刻蚀液刻蚀第二材料层且不刻蚀第一材料层。
如图12所示，以第二材料图案62进行掩膜，利用刻蚀液刻蚀对应第二材料层去除区域的第一材料层，以形成隔离柱。具体可以通过控制刻蚀时间，控制第一材料层缩进第二材料图案的距离。
可选的，在形成第一材料图案的材料为导电材料的情况下，如图13所示，在上述步骤101之前，方法还包括：
步骤105、形成绝缘图案，其中，绝缘图案包括相对的上表面和下表面；
其中，第一材料图案的第一隔离侧面和第二隔离侧面在绝缘图案上表面所在平面的投影位于绝缘图案上表面的边缘之间。
即在基板上形成绝缘图案之后，再在形成有绝缘图案的基板上沉积第一材料、第二材料，利用刻蚀工艺再形成隔离柱。具体形成绝缘图案可以是通过光刻、干刻等工艺形成，本公开实施例在这里不作赘述。
可选的，如图14所示，在上述步骤101之后，在上述步骤102之前，所述方法还包括：
步骤106、对第一材料层进行构图，在第一材料层上形成过孔，过孔将隔离柱的第一材料图案分成互不接触的两部分。形成后的隔离柱如图6、图7所示。
如图21，上述步骤106具体包括：
步骤1061、在第一材料层上形成光刻胶。
步骤1062、利用掩膜板对光刻胶进行曝光和显影，显影后形成光刻胶保留部分和光刻胶去除部分，其中，光刻胶去除部分对应过孔区域。
步骤1063、利用湿法或干法刻蚀光刻胶去除部分的第一材料层以形成过孔。
步骤1064、将光刻胶去除。
下面，本公开实施例提供一具体的制作示意图，详细说明采用制作方法形成如图6所示的隔离柱的步骤。如图15所示，所述方法包括：
步骤201、如图16所示，在基板1上形成绝缘图案63。具体可以通过干法刻蚀或湿法刻蚀的工艺形成如图16所示的绝缘图案63。
步骤202、沉积第一材料形成第一材料层，并对第一材料图案进行构图，在第一材料层上形成过孔。具体采用上述步骤1061-1064形成如图17所示的第一材料层610。
这里需要说明的是，对第一材料层进行构图，具体可以是通过感光树脂作为光刻胶进行构图，在形成第一材料层时，将作为光刻胶的感光树脂剥离。
步骤203、如图18所示，沉积形成第二材料形成第二材料层620。具体的，第二材料层可以是树脂材料。形成第二材料层的树脂材料，相对于对第一材料层进行构图的感光树脂具有更好的耐热、耐高温的化学性质。
步骤204、利用干刻工艺或光刻工艺对第二材料层进行构图使第二材料图案图形化，如图19所示，图形化后形成的第二材料图案包括第二材料层去除区域和第二材料层保留区域。
步骤205、如图20所示，利用刻蚀液刻蚀位于第二材料层去除区域以及部分第二材料层保留区域的第一材料层。
通过上述步骤201-步骤205形成的隔离柱如图6所示。
在本公开的描述中，需要理解的是，术语“上”、“下”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本公开和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (18)

  1. 一种显示面板隔离柱，包括第一材料图案以及位于所述第一材料图案上面的第二材料图案，其中，所述第一材料图案包括相对的上表面、下表面以及位于所述上表面和所述下表面之间相对的第一隔离侧面和第二隔离侧面，所述第二材料图案包括相对的上表面和下表面，其中，所述第一材料图案的上表面与所述第二材料图案的下表面直接接触，且所述第一材料图案的所述第一隔离侧面和所述第二隔离侧面在所述第二材料图案下表面所在平面的投影位于所述第二材料图案下表面的边缘之间。
  2. 根据权利要求1所述的显示面板隔离柱，其中，所述第一材料图案的所述第一隔离侧面和所述第二隔离侧面在所述第二材料图案下表面所在平面的投影距离所述第二材料图案下表面边缘的最小距离不小于1微米。
  3. 根据权利要求2所述的显示面板隔离柱，其中，所述第一材料图案的所述第一隔离侧面在所述第二材料图案下表面所在平面的投影距离所述第二材料图案下表面边缘的最小距离等于所述第二隔离侧面在所述第二材料图案下表面所在平面的投影距离所述第二材料图案下表面边缘的最小距离。
  4. 根据权利要求1所述的显示面板隔离柱，其中，形成所述第一材料图案的材料为导电材料，形成所述第二材料图案的材料为绝缘材料。
  5. 根据权利要求1-4任一项所述的显示面板隔离柱，其中，所述显示面板隔离柱还包括位于所述第一材料图案下面的绝缘图案，所述绝缘图案包括相对的上表面和下表面；所述绝缘图案的上表面与所述第一材料图案的下表面直接接触；
    其中，所述第一材料图案的第一隔离侧面和第二隔离侧面在所述绝缘图案上表面所在平面的投影位于所述绝缘图案上表面的边缘之间。
  6. 根据权利要求1-3任一项所述的显示面板隔离柱，其中，所述第一材料图案上形成有过孔，所述过孔将所述第一材料图案分成互不接触的两部分，所述第一隔离侧面和所述第二隔离侧面分别位于所述两部分。
  7. 根据权利要求4所述显示面板隔离柱，其中，所述第一材料为金属，所述第二材料为感光树脂。
  8. 根据权利要求1所述的显示面板隔离柱，其中，所述第二材料图案的上表面的边缘位于所述第二材料图案的下表面的边缘之间。
  9. 根据权利要求1所述的显示面板隔离柱，其中，所述显示面板隔离柱为条状，所述第一隔离侧面和所述第二隔离侧面为沿所述显示面板隔离柱长轴方向的侧面。
  10. 一种显示面板，包括衬底基板以及形成在所述衬底基板上的多个显示面板隔离柱以及位于相邻两个显示面板隔离柱之间的第一电极，其中，所述显示面板隔离柱为权利要求1-9任一项所述的显示面板柱，所述第一电极包括上表面和下表面，所述第一电极上表面所在平面低于所述显示面板隔离柱的第一材料图案的上表面所在平面。
  11. 根据权利要求10所述的显示面板，其中，所述第一电极上表面所在平面与所述显示面板隔离柱的第一材料图案的上表面所在平面的距离差不小于400纳米。
  12. 根据权利要求10或11所述的显示面板，其中，所述显示面板还包括：第二电极以及位于所述第一电极和所述第二电极之间的发光功能层，其中，所述第二电极位于所述第一电极和所述显示面板隔离柱的下面，且所述第二电极通过所述显示面板隔离柱的绝缘图案与所述显示面板隔离柱的第一材料图案绝缘。
  13. 根据权利要求10所述的显示面板，其中，所述显示面板为无源驱动的OLED显示面板。
  14. 一种显示装置，包括权利要求10-13任一项所述的显示面板。
  15. 一种显示面板隔离柱的制作方法，包括：
    沉积第一材料形成第一材料层；
    沉积第二材料形成第二材料层；
    利用干刻工艺或光刻工艺对所述第二材料层进行构图使所述第二材料层图形化，图形化后形成的第二材料图案包括第二材料层去除区域和第二材料层保留区域；
    利用刻蚀液刻蚀位于所述第二材料层去除区域以及部分第二材料层保留区域的第一材料层，其中所述刻蚀液刻蚀所述第二材料层且不刻蚀所述第一 材料层。
  16. 根据权利要求15所述的制作方法，其中，形成所述第一材料图案的材料为导电材料；在沉积第一材料形成第一材料层之前，所述方法还包括：
    形成绝缘图案，其中，所述绝缘图案包括相对的上表面和下表面；
    其中，所述第一材料图案的第一隔离侧面和第二隔离侧面在所述绝缘图案上表面所在平面的投影位于所述绝缘图案上表面的边缘之间。
  17. 根据权利要求15或16所述的制作方法，其中，在沉积第一材料形成第一材料层之后，在沉积第二材料形成第二材料层之前，所述方法还包括：
    对所述第一材料层进行构图以在所述第一材料层上形成过孔，所述过孔将所述显示面板隔离柱的第一材料图案分成互不接触的两部分。
  18. 根据权利要求17所述的制作方法，其中，所述对所述第一材料层进行构图以在所述第一材料层上形成过孔具体包括：
    在所述第一材料层上形成光刻胶；
    利用掩膜板对所述光刻胶进行曝光和显影，显影后形成光刻胶保留部分和光刻胶去除部分，其中，所述光刻胶去除部分对应所述过孔区域；
    利用湿法或干法刻蚀所述光刻胶去除部分的第一材料层以形成过孔；
    将所述光刻胶去除。
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