WO2020215461A1 - Oled阵列基板及其制作方法 - Google Patents

Oled阵列基板及其制作方法 Download PDF

Info

Publication number
WO2020215461A1
WO2020215461A1 PCT/CN2019/090973 CN2019090973W WO2020215461A1 WO 2020215461 A1 WO2020215461 A1 WO 2020215461A1 CN 2019090973 W CN2019090973 W CN 2019090973W WO 2020215461 A1 WO2020215461 A1 WO 2020215461A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
slot
organic
array substrate
oled array
Prior art date
Application number
PCT/CN2019/090973
Other languages
English (en)
French (fr)
Inventor
夏存军
张兴永
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/500,708 priority Critical patent/US11264439B2/en
Publication of WO2020215461A1 publication Critical patent/WO2020215461A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/84—Passivation; Containers; Encapsulations
    • H10K50/844—Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the invention relates to an OLED array substrate and a manufacturing method thereof, in particular to an OLED array substrate suitable for design of a narrow frame panel and a manufacturing method thereof.
  • AMOLEDs active matrix organic light-emitting diodes
  • OLED display bending service life narrow frame Etc.
  • OLED full-screen flexible display will require the use of thin film packaging for OLED devices and narrow the surrounding frame as much as possible.
  • the narrowing of the lower frame is a big test.
  • the big problem of the narrowing of the lower frame of OLED display is that the boundary of the thin film package must wrap the cathode of the OLED device, and the cathode of the OLED device is limited by the mask error of about ⁇ 100 microns, so the area covered by the thin film package There is no way to effectively shrink and narrow.
  • the lower frame of the OLED becomes narrower, risks such as poor cathode coating, easy corrosion, and easy overflow of the encapsulated organic layer over the retaining wall will result.
  • the main purpose of the present invention is to provide an OLED array substrate and a manufacturing method thereof, which has a plurality of discontinuous cathode layers.
  • the cathode on the surface of the pixel defining layer far away from the display area is corroded, it will not affect the cathode in the display area.
  • the function of the display device will not affect the display effect of the display device.
  • forming a raised barrier on the pixel defining layer can further prevent the encapsulated organic layer from overflowing.
  • the present invention provides a manufacturing method of an OLED array substrate, which includes the following steps:
  • a substrate is provided, wherein a TFT layer is formed on the substrate, an insulating layer is formed on a part of the TFT layer, an anode layer is formed on a part of the insulating layer and is connected to the TFT layer, and a pixel A defining layer is formed on the TFT layer, the insulating layer and the anode layer;
  • a plurality of cathode layers are formed on the pixel defining layer and in the first slot hole and the second slot hole, and the plurality of cathode layers are discontinuous cathode layers.
  • the method further includes the following step: forming an organic barrier wall in and above the discontinuous slot.
  • an organic layer is formed to cover the first slot up to the organic barrier wall.
  • the method before forming an organic layer, the method further includes the following steps: forming a first inorganic layer on the pixel defining layer, the first inorganic layer covering the plurality of cathode layers and The organic retaining wall.
  • the method further includes the following steps: forming a second inorganic layer on the organic layer, the second inorganic layer covering the organic layer and the first inorganic layer An inorganic layer.
  • the present invention provides an OLED array substrate comprising: a substrate; a TFT layer formed on the substrate; an insulating layer formed on a part of the TFT layer; and an anode layer formed on the Part of the TFT layer and connected to the TFT layer; a pixel defining layer is formed on the TFT layer, the insulating layer and the anode layer, wherein the pixel defining layer has a first slot And a second slot, a light emitting layer is formed in the first slot, a plurality of fillers are formed in the second slot, and a plurality of fillers are formed in the second slot.
  • Continuous slot holes; and a plurality of cathode layers formed on the pixel defining layer and in the first slot holes and the second slot holes, the plurality of cathode layers are discontinuous cathode layers.
  • the first slot and the second slot are in an inverted trapezoid shape
  • the filler is in an inverted triangle or an inverted trapezoid shape
  • an organic retaining wall is further included, and the organic retaining wall is provided in and above the discontinuous slot.
  • it further includes an organic layer covering the top of the first slot up to the organic retaining wall.
  • it further includes a first inorganic layer, the first inorganic layer covering the plurality of cathode layers and the organic barrier; and a second inorganic layer, the second inorganic layer Covering the organic layer and the first inorganic layer.
  • the present invention further provides an OLED array substrate, which includes: a substrate; a TFT layer formed on the substrate; an insulating layer formed on part of the TFT layer; and an anode layer formed On part of the TFT layer and connected to the TFT layer; a pixel defining layer is formed on the TFT layer, the insulating layer, and the anode layer, wherein the pixel defining layer has a first groove A hole and a second slot, the first slot and the second slot are inverted trapezoid, a light emitting layer is formed in the first slot, and the second slot has a plurality of fillers, The filler is in the shape of an inverted triangle or trapezoid, and the plurality of fillers form a plurality of discontinuous slots in the second slot; an organic retaining wall, the organic retaining wall is arranged in the discontinuous slot In and above the hole; and a plurality of cathode layers are formed on the pixel defining layer and in the first slot hole and the second
  • it further includes an organic layer covering the top of the first slot up to the organic retaining wall.
  • it further includes a first inorganic layer covering the plurality of cathode layers and the organic barrier; and a second inorganic layer, the second inorganic layer Covering the organic layer and the first inorganic layer.
  • one pixel defining layer is provided with a slot, and a plurality of fillers are arranged in the slot to form a plurality of discontinuous slots, so a plurality of discontinuous slots can be formed on the pixel defining layer.
  • Discontinuous cathode layer so when the cathode on the surface of the pixel defining layer far from the display area is corroded, it will not affect the function of the cathode in the display area, and thus will not affect the display effect of the display device, so it will no longer be fully covered
  • the thin film encapsulation layer of the bottom frame cathode can effectively realize a narrower bottom frame.
  • forming a raised barrier on the pixel defining layer can further prevent the encapsulated organic layer from overflowing.
  • Fig. 1 A schematic diagram of the first step of the manufacturing method of the OLED array substrate of the present invention.
  • Figure 2 A schematic diagram of the second step of the manufacturing method of the OLED array substrate of the present invention.
  • Fig. 3 A schematic diagram of the third step of the manufacturing method of the OLED array substrate of the present invention.
  • Fig. 4 A schematic diagram of the fourth step of the manufacturing method of the OLED array substrate of the present invention.
  • Fig. 5 A schematic diagram of the fifth step of the manufacturing method of the OLED array substrate of the present invention.
  • Fig. 6 A schematic diagram of the sixth step of the manufacturing method of the OLED array substrate of the present invention.
  • Fig. 7 A schematic diagram of the seventh step of the manufacturing method of the OLED array substrate of the present invention.
  • FIG. 8 The eighth step of the manufacturing method of the OLED array substrate of the present invention and the schematic diagram of the structure of the OLED array substrate of the present invention.
  • FIGS. 1-8 are schematic diagrams of the steps of the manufacturing method of the OLED array substrate of the present invention, and FIG. 8 includes a schematic structural diagram of the OLED array substrate of the present invention.
  • FIGS. 1-8 show a partial cross-sectional schematic diagram of an OLED array substrate 100 of the present invention at the lower frame portion of the panel, which only shows the structure of one pixel closest to the edge of the panel.
  • an OLED array substrate 100 manufacturing method of the present invention includes the following steps:
  • the first step (shown in Figure 1): Provide a substrate 11, in which a TFT layer 12 is formed on the substrate 11, an insulating layer 13 is formed on part of the TFT layer 12, and an anode layer 14 is formed on Part of the insulating layer 13 is connected to the TFT layer 12, and a pixel defining layer 15 is formed on the TFT layer 12, the insulating layer 13 and the anode layer 14.
  • process technologies such as coating, exposure, and development of photolithography can be used to prepare the pixel definition layer.
  • the second step (shown in FIG. 2): remove part of the pixel defining layer 15, and form a first slot 151 on the anode layer 14 in the pixel defining layer 15, and in the first slot
  • a second slot hole 152 is formed beside the hole 151
  • a first protrusion 153 is formed beside the second slot hole 152
  • a second protrusion 154 is formed beside the first protrusion 153.
  • the first slot 151 and the second slot 152 are slots formed by etching the pixel defining layer 15, and the cross section is preferably an inverted trapezoid.
  • the first protrusion 153 and the The second protrusion 154 is the part left after the two sides of the pixel defining layer 15 are etched and removed, and its cross-section is a regular trapezoid. So far, the first slot 151 and the second slot 152 still belong to the pixel defining layer 15, but the first protrusion 153 independently forms a retaining wall, and the second protrusion 154 independently forms a plastic
  • the layer 16, the first protrusion 153 and the second protrusion 154 do not belong to the pixel defining layer 15.
  • first slot 151, the second slot 152, and the first protrusion 153 are located in a display area A
  • the second protrusion 154 is located in a bending area B
  • the bending area One side of B is adjacent to the display area A
  • the other side is adjacent to a chip area C.
  • process technologies such as coating, exposure, and development of photolithography can be used to prepare the slots and protrusions on the pixel definition layer.
  • the third step (as shown in FIG. 3): forming a light-emitting layer 17 in the first slot 151, and forming a plurality of fillers 181, 182, 183 in the second slot 152 to be able to A plurality of discontinuous slots 184, 185 are formed in the second slot 152.
  • the fillers 181, 183 made on both sides of the second slot 152 are inverted triangles or trapezoids, and the fillers 182 made in the middle of the second slot 152 are inverted trapezoids, so that A plurality of regular trapezoidal discontinuous slots 184, 185 are formed in the second slot 152.
  • a thermal evaporation process can be used to form a light-emitting layer on the pixel defining layer; and an inkjet printing process can be used to print organic fillers in the slots.
  • the organic fillers can be acrylic or epoxy resin. Etc., the height of the organic filler can be higher than the height of the pixel defining layer, and it is convex, and UV curing is performed.
  • the fourth step (as shown in FIG. 4): forming a plurality of cathode layers 19 on the pixel defining layer 15, the plurality of cathode layers 19 being formed on the pixel defining layer 15, and forming the first groove In the hole 151 and the second slot 152.
  • a cathode layer 19 is formed on the pixel defining layer 15 in the first slot 151 and outside the first slot 151, and on the surface of the plurality of fillers 181, 182, 183
  • a plurality of cathode layers 19 are formed at the bottom of the plurality of discontinuous slots 184 and 185. That is to say, due to the existence of the discontinuous slots 184, 185, the plurality of discontinuous cathode layers 19 can be manufactured in a single manufacturing process.
  • a thermal evaporation process can be used to form a cathode layer on the surface of the light-emitting layer.
  • the fifth step (shown in Figure 5): forming an organic barrier wall 20 in and above the discontinuous slots 184, 185, the organic barrier wall 20 being higher than the cathode layer 19 by a distance, the The top of the organic retaining wall 20 is, for example, a circular arc shape.
  • the sixth step (as shown in FIG. 6): forming a first inorganic layer 21 on the pixel defining layer 15, the first inorganic layer 21 covering the plurality of cathode layers 19 and the organic barrier wall 20,
  • the first inorganic layer 21 may also cover a part of the TFT layer 12 and/or the insulating layer 13 and cover up to the retaining wall formed by the first protrusion 153.
  • this step can be selectively implemented according to the actual needs of the user.
  • PECVD and inkjet printing processes can be used to encapsulate the surface of the device, and the inorganic film layer formed by PECVD can be silicon nitride, silicon oxynitride, or the like.
  • the seventh step (as shown in FIG. 7): an organic layer 22 is formed on the first inorganic layer 21 above the first slot 151, that is, the organic layer 22 covers the first slot 151 The upper first inorganic layer 21 reaches to the organic retaining wall 20.
  • PECVD and inkjet printing processes can be used to encapsulate the surface of the device, and the organic film layer formed by inkjet printing can be acrylic, epoxy or the like.
  • the eighth step (as shown in Figure 8): forming a second inorganic layer 23 on the organic layer 22, the second inorganic layer 23 covering the organic layer 22 and the first inorganic layer 21, the The second inorganic layer 23 can further cover up to the edge of the bending area, and includes a retaining wall formed by covering the first protrusion 153.
  • this step can be selectively implemented according to the actual needs of the user.
  • users can optionally set the number of inorganic and organic layers according to actual needs.
  • PECVD and inkjet printing processes can be used to encapsulate the surface of the device, and the inorganic film layer formed by PECVD can be silicon nitride, silicon oxynitride, or the like.
  • an OLED array substrate 100 of the present invention can be manufactured, which mainly includes a substrate 11, a TFT layer 12, an insulating layer 13, an anode layer 14, and a pixel defining Layer 15, wherein the TFT layer 12 is formed on the substrate 11, the insulating layer 13 is formed on a part of the TFT layer 12, and the anode layer 14 is formed on a part of the insulating layer 13 and is combined with The TFT layer 12 is connected, and the pixel defining layer 15 is formed on the TFT layer 12, the insulating layer 13 and the anode layer 14.
  • the pixel defining layer 15 has a first slot 151 and a second slot 152.
  • a light-emitting layer 17 is formed in the first slot 151
  • the second slot 152 has a plurality of Fillers 181, 182, 183, the plurality of fillers 181, 182, 183
  • a plurality of discontinuous slots 184 are formed in the second slot 152, 185.
  • a plurality of cathode layers 19 on the pixel defining layer 15.
  • the plurality of cathode layers 19 are formed on the pixel defining layer 15 and the first slot 151 and the second slot 152 Inside, specifically, a cathode layer 19 is formed on the pixel defining layer 15 in the first slot 151 and outside the first slot 151, and the plurality of fillers 181, 182, 183 surface and the plurality of discontinuous slots 184, A plurality of cathode layers 19 are formed at the bottom of 185, and the plurality of cathode layers 19 are discontinuous cathode layers.
  • An organic barrier wall 20 is formed in and above the discontinuous slots 184, 185, and the organic barrier wall 20 is higher than the cathode layer 19 by a distance.
  • the OLED array substrate 100 further includes a first inorganic layer 21, an organic layer 22, and a second inorganic layer 23, wherein the first inorganic layer 21 covers the plurality of cathode layers 19 and the organic barrier 20
  • the first inorganic layer 21 may also cover part of the TFT layer 12 and/or the insulating layer 13 up to the barrier formed by the first protrusion 153;
  • the organic layer 22 is formed on the first On the inorganic layer 21, the organic layer 22 covers the first inorganic layer 21 above the first slot 151 up to the organic barrier wall 20; and the second inorganic layer 23 is formed on the organic layer 22, the second inorganic layer 23 covers the organic layer 22 and the first inorganic layer 21, the second inorganic layer 23 can further cover up to the bending area, including covering the first protrusion 153 formed retaining wall.
  • a pixel defining layer is provided with a slot, and a plurality of fillers are arranged in the slot to form a plurality of discontinuous slots, so that the pixel defining layer can be formed Multiple discontinuous cathode layers. Therefore, when the cathode on the surface of the pixel defining layer far from the display area is corroded, it will not affect the function of the cathode in the display area, and thus will not affect the display effect of the display device, so it is no longer affected.
  • the thin film encapsulation layer that completely covers the cathode of the lower frame can effectively realize a narrower lower frame.
  • forming a raised barrier on the pixel defining layer can further prevent the encapsulated organic layer from overflowing.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明公开一种OLED阵列基板及其制作方法，所述OLED阵列基板主要包含一基板、一TFT层、一绝缘层、一阳极层、一像素限定层，其中所述像素限定层具有一第一槽孔及一第二槽孔，所述第一槽孔内形成一发光层，所述第二槽孔内具有多个填充物，所述多个填充物在所述第二槽孔内形成多个不连续槽孔，用以形成多个不连续的阴极层。当远离显示区的像素限定层表面的阴极被腐蚀，不会影响到显示区内的阴极的功能，从而不会影响到显示器件的显示效果，因此不再受全部覆盖下边框阴极的薄膜封装层限制，可以有效的实现更窄的下边框。

Description

OLED阵列基板及其制作方法 技术领域
本发明涉及一种OLED阵列基板及其制作方法，特别是涉及一种适用于窄边框面板设计的OLED阵列基板及其制作方法。
 背景技术
与液晶显示器相比，有源矩阵有机发光二极管(AMOLED)具有高对比、视角、运动图像响应速度等，以此引起人们的关注和开发。随着OLED应用领域的拓展，新的应用领域更多的需要OLED显示柔性化的全面屏，OLED显示柔性化的全面屏会有越来越多的要求如：OLED显示弯折使用寿命、窄边框等；OLED全面屏柔性显示则会要求对OLED器件需要的封装采用薄膜化及四周边框尽量变窄，OLED显示的边框中，下边框变窄是一个很大的考验。
现在OLED显示的下边框变窄很大的难题就是，薄膜封装的边界要包裹住OLED器件的阴极，而OLED器件的阴极受掩膜版误差约±100微米的限制，所以薄膜封装所要覆盖的区域就没法进行有效的收缩变窄。也就是说，现在OLED下边框变窄时，会造成阴极包覆不佳、易腐蚀，封装有机层易溢出挡墙等风险。
因此，有必要提供一种改良的OLED阵列基板及其制作方法，以解决上述技术问题。
 技术问题
本发明的主要目的是提供一种OLED阵列基板及其制作方法，其具有多个不连续的阴极层，当远离显示区的像素限定层表面的阴极被腐蚀，不会影响到显示区内的阴极的功能，从而不会影响到显示器件的显示效果。此外，在所述像素限定层形成突起的挡墙，可进一步防止封装的有机层溢出。
 技术解决方案
为达上述目的，本发明提供一种OLED阵列基板的制作方法，其包含以下步骤：
提供一基板，其中一TFT层形成在所述基板上，一绝缘层形成在部分的所述TFT层上，一阳极层形成在部分的所述绝缘层上并与所述TFT层连接，一像素限定层形成在所述TFT层、所述绝缘层及所述阳极层上；
移除部分的所述像素限定层，将所述像素限定层在所述阳极层上方形成一第一槽孔，在所述第一槽孔旁形成一第二槽孔；
形成一发光层在所述第一槽孔内，及在所述第二槽孔内制作多个填充物，以在所述第二槽孔内形成多个不连续槽孔；及
形成多个阴极层在所述像素限定层上，及形成在所述第一槽孔及所述第二槽孔内，所述多个阴极层为不连续的阴极层。
在本发明的一实施例中，在形成多个阴极层的步骤之后，还包含以下步骤：形成一有机挡墙在所述不连续槽孔内及其上方。
在本发明的一实施例中，在形成一有机挡墙的步骤之后，形成一有机层覆盖所述第一槽孔上方直至所述有机挡墙。
在本发明的一实施例中，在形成一有机层之前，还含包含以下步骤：在所述像素限定层上形成一第一无机层，所述第一无机层覆盖所述多个阴极层及所述有机挡墙。
在本发明的一实施例中，在形成一有机层之后，还含包含以下步骤：在所述有机层上形成一第二无机层，所述第二无机层覆盖所述有机层及所述第一无机层。
为达上述目的，本发明提供一种OLED阵列基板，其包含：一基板；一TFT层，形成在所述基板上；一绝缘层，形成在部分的所述TFT层；一阳极层，形成在部分的所述TFT层上并与所述TFT层连接；一像素限定层，形成在所述TFT层、所述绝缘层及所述阳极层上，其中所述像素限定层具有一第一槽孔及一第二槽孔，所述第一槽孔内形成一发光层，所述第二槽孔内具有多个填充物，所述多个填充物在所述第二槽孔内形成多个不连续槽孔；及多个阴极层，形成在所述像素限定层上及所述第一槽孔及所述第二槽孔内，所述多个阴极层为不连续的阴极层。
在本发明的一实施例中，所述第一槽孔及所述第二槽孔为倒梯形，所述填充物为倒三角形或倒梯形。
在本发明的一实施例中，还包含一有机挡墙，所述有机挡墙设在所述不连续槽孔内及其上方。
在本发明的一实施例中，还包含一有机层覆盖所述第一槽孔上方直至所述有机挡墙。
在本发明的一实施例中，还包含一第一无机层，所述第一无机层覆盖所述多个阴极层及所述有机挡墙；及一第二无机层，所述第二无机层覆盖所述有机层及所述第一无机层。
为达上述目的，本发明另提供一种OLED阵列基板，其包含：一基板；一TFT层，形成在所述基板上；一绝缘层，形成在部分的所述TFT层；一阳极层，形成在部分的所述TFT层上并与所述TFT层连接；一像素限定层，形成在所述TFT层、所述绝缘层及所述阳极层上，其中所述像素限定层具有一第一槽孔及一第二槽孔，所述第一槽孔及所述第二槽孔为倒梯形，所述第一槽孔内形成一发光层，所述第二槽孔内具有多个填充物，所述填充物为倒三角形或倒梯形，所述多个填充物在所述第二槽孔内形成多个不连续槽孔；一有机挡墙，所述有机挡墙设在所述不连续槽孔内及其上方；及多个阴极层，形成在所述像素限定层上及所述第一槽孔及所述第二槽孔内，所述多个阴极层为不连续的阴极层。
在本发明的一实施例中，还包含一有机层覆盖所述第一槽孔上方直至所述有机挡墙。
在本发明的一实施例中，还包含一第一无机层，所述第一无机层覆盖所述多个阴极层及所述有机挡墙；及一第二无机层，所述第二无机层覆盖所述有机层及所述第一无机层。
 有益效果
在本发明中，通过将一像素限定层设置一槽孔，并通过在所述槽孔内设置多个填充物以形成多个不连续槽孔，故可在所述像素限定层上形成多个不连续的阴极层，因此当远离显示区的像素限定层表面的阴极被腐蚀，不会影响到显示区内的阴极的功能，从而不会影响到显示器件的显示效果，因此不再受全部覆盖下边框阴极的薄膜封装层限制，可以有效的实现更窄的下边框。此外，在所述像素限定层形成突起的挡墙，可进一步防止封装的有机层溢出。
 附图说明
图1：本发明的OLED阵列基板的制作方法的第一步骤示意图。
图2：本发明的OLED阵列基板的制作方法的第二步骤示意图。
图3：本发明的OLED阵列基板的制作方法的第三步骤示意图。
图4：本发明的OLED阵列基板的制作方法的第四步骤示意图。
图5：本发明的OLED阵列基板的制作方法的第五步骤示意图。
图6：本发明的OLED阵列基板的制作方法的第六步骤示意图。
图7：本发明的OLED阵列基板的制作方法的第七步骤示意图。
图8：本发明的OLED阵列基板的制作方法的第八步骤及本发明的OLED阵列基板的结构示意图。
 本发明的实施方式
为让本发明上述目的、特征及优点更明显易懂，下文特举本发明较佳实施例，并配合附图，作详细说明。再者，本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参照附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
请参照图1-8所示，图1-8是本发明的OLED阵列基板的制作方法的步骤示意图，其中图8包含本发明的OLED阵列基板的结构示意图。特别说明的是，在图1-8之中显示的是本发明的一种OLED阵列基板100在面板下边框部分的局部剖面示意图，其只显示了最接近面板边缘的一个像素的结构。
如图1-8所示，本发明的一种OLED阵列基板100制作方法包含以下步骤：
第一步骤(如图1所示)：提供一基板11，其中一TFT层12形成在所述基板11上，一绝缘层13形成在部分的所述TFT层12上，一阳极层14形成在部分的所述绝缘层13上并与所述TFT层12连接，一像素限定层15形成在所述TFT层12、所述绝缘层13及所述阳极层14上。
在本步骤中，可利用光刻技术的涂布、曝光、显影等工艺技术来制备像素定义层。
第二步骤(如图2所示)：移除部分的所述像素限定层15，将所述像素限定层15在所述阳极层14上方形成一第一槽孔151，在所述第一槽孔151旁形成一第二槽孔152，在所述第二槽孔152旁形成一第一突出153，在所述第一突出153旁形成一第二突出154。
详细来说，所述第一槽孔151及所述第二槽孔152是所述像素限定层15蚀刻所形成的槽孔，其剖面为优选为倒梯形，所述第一突出153及所述第二突出154是所述像素限定层15蚀刻去除两侧后所留下的部分，其剖面为正梯形。至此，所述第一槽孔151及所述第二槽孔152仍属于所述像素限定层15，但所述第一突出153独立形成一挡墙，所述第二突出154上独立形成一塑料层16，所述第一突出153及所述第二突出154不属于所述像素限定层15。
此外，所述第一槽孔151、所述第二槽孔152及所述第一突出153位在一显示区A，所述第二突出154位在一弯折区B，所述弯折区B的一边邻接所述显示区A，另一边邻接一芯片区C。当所述OLED阵列基板100制作完成后，在面板下边框部分，所述弯折区B提供面板弯曲功能，以将所述芯片区C折叠至面板下方，以进一步缩小面板边缘的尺寸。
在本步骤中，可利用光刻技术的涂布、曝光、显影等工艺技术来制备像素定义层上的各槽孔及突出。
第三步骤(如图3所示)：在所述第一槽孔151内形成一发光层17，及在所述第二槽孔152内制作多个填充物181, 182, 183，以能够在所述第二槽孔152内形成多个不连续槽孔184, 185。
优选地，在所述第二槽孔152两侧制作的填充物181, 183为倒三角形或倒梯形，在所述第二槽孔152中间制作的所述填充物182为倒梯形，因此可使所述第二槽孔152内形成多个正梯形的不连续槽孔184, 185。
在本步骤中，可利用热蒸发工艺，在像素限定层上形成发光层；及可利用喷墨打印工艺，在槽孔内打印有机的填充物，所述有机填充物可以是亚克力、环氧树脂等，所述有机填充物的高度可高于像素限定层的高度，且呈凸起状，并进行UV固化等。
第四步骤(如图4所示)：在所述像素限定层15上形成多个阴极层19，所述多个阴极层19形成在所述像素限定层15上，及形成所述第一槽孔151及所述第二槽孔152内。具体地，是在所述第一槽孔151内及所述第一槽孔151外部的所述像素限定层15上形成一个阴极层19，并且在所述多个填充物181, 182, 183表面及所述多个不连续槽孔184, 185底部形成多个阴极层19。也就是说，由于所述不连续槽孔184, 185的存在，可在一次制作工艺中制作出所述多个不连续的阴极层19。
在本步骤中，可利用热蒸发工艺，在发光层表面形成阴极层。
第五步骤(如图5所示)：在所述不连续槽孔184, 185内及其上方形成一有机挡墙20，所述有机挡墙20高于所述阴极层19一距离，所述有机挡墙20顶部例如为一圆弧形。
第六步骤(如图6所示)：在所述像素限定层15上形成一第一无机层21，所述第一无机层21覆盖所述多个阴极层19及所述有机挡墙20，所述第一无机层21也可覆盖部分的所述TFT层12及/或所述绝缘层13，并一直覆盖至所述第一突出153形成的挡墙。然而，本步骤可依据用户实际需求来选择性实施。
在本步骤中，可利用PECVD和喷墨打印工艺对器件表面进行薄膜封装，PECVD形成的无机膜层可以是氮化硅、氮氧化硅等。
第七步骤(如图7所示)：在所述第一无机层21上形成一有机层22在所述第一槽孔151上方，也就是所述有机层22覆盖所述第一槽孔151上方的所述第一无机层21，直至所述有机挡墙20。
在本步骤中，可利用PECVD和喷墨打印工艺对器件表面进行薄膜封装，喷墨打印形成的有机膜层可以是亚克力、环氧树脂等。
第八步骤(如图8所示)：在所述有机层22上形成一第二无机层23，所述第二无机层23覆盖所述有机层22及所述第一无机层21，所述第二无机层23可进一步覆盖直至所述弯折区边缘，其中包含覆盖所述第一突出153形成的挡墙。然而，本步骤可依据用户实际需求来选择性实施。另外，用户也可依据实际需求选择性设置无机层及有机层的层数。
在本步骤中，可利用PECVD和喷墨打印工艺对器件表面进行薄膜封装，PECVD形成的无机膜层可以是氮化硅、氮氧化硅等。
如上所述，通过上述制作方法的各步骤，可制作完成本发明的一种OLED阵列基板100，其主要包含一基板11、一TFT层12、一绝缘层13、一阳极层14、一像素限定层15，其中所述TFT层12形成在所述基板11上，所述绝缘层13形成在部分的所述TFT层12上，所述阳极层14形成在部分的所述绝缘层13上并与所述TFT层12连接，所述像素限定层15形成在所述TFT层12、所述绝缘层13及所述阳极层14上。
再者，将所述像素限定层15具有一第一槽孔151及一第二槽孔152，所述第一槽孔151内形成一发光层17，所述第二槽孔152内具有多个填充物181, 182, 183，所述多个填充物181, 182, 183在所述第二槽孔152内形成多个不连续槽孔184, 185。
再者，在所述像素限定层15上具有多个阴极层19，所述多个阴极层19形成在所述像素限定层15上及所述第一槽孔151及所述第二槽孔152内，具体地即是在所述第一槽孔151内及所述第一槽孔151外部的所述像素限定层15上形成一个阴极层19，并且在所述多个填充物181, 182, 183表面及所述多个不连续槽孔184, 185底部形成多个阴极层19，所述多个阴极层19为不连续的阴极层。
在所述不连续槽孔184, 185内及其上方形成一有机挡墙20，所述有机挡墙20高于所述阴极层19一距离。
所述OLED阵列基板100还包含一第一无机层21、一有机层22及一第二无机层23，其中所述第一无机层21覆盖所述多个阴极层19及所述有机挡墙20，所述第一无机层21也可覆盖部分的所述TFT层12及/或所述绝缘层13，直至所述第一突出153形成的挡墙；所述有机层22形成在所述第一无机层21上，所述有机层22覆盖所述第一槽孔151上方的所述第一无机层21，直至所述有机挡墙20；及所述第二无机层23形成在所述有机层22上，所述第二无机层23覆盖所述有机层22及所述第一无机层21，所述第二无机层23可进一步覆盖直至所述弯折区，其中包含覆盖所述第一突出153形成的挡墙。
综上所述，本发明通过将一像素限定层设置一槽孔，并通过在所述槽孔内设置多个填充物以形成多个不连续槽孔，故可在所述像素限定层上形成多个不连续的阴极层，因此当远离显示区的像素限定层表面的阴极被腐蚀，不会影响到显示区内的阴极的功能，从而不会影响到显示器件的显示效果，因此不再受全部覆盖下边框阴极的薄膜封装层限制，可以有效的实现更窄的下边框。此外，在所述像素限定层形成突起的挡墙，可进一步防止封装的有机层溢出。
本发明已由上述相关实施例加以描述，然而上述实施例仅为实施本发明的范例。必需指出的是，已公开的实施例并未限制本发明的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包含于本发明的范围内。

Claims (13)

  1.    一种OLED阵列基板的制作方法，其包含以下步骤：
    提供一基板，其中一TFT层形成在所述基板上，一绝缘层形成在部分的所述TFT层上，一阳极层形成在部分的所述绝缘层上并与所述TFT层连接，一像素限定层形成在所述TFT层、所述绝缘层及所述阳极层上；
    移除部分的所述像素限定层，将所述像素限定层在所述阳极层上方形成一第一槽孔，在所述第一槽孔旁形成一第二槽孔；
    形成一发光层在所述第一槽孔内，及在所述第二槽孔内制作多个填充物，以在所述第二槽孔内形成多个不连续槽孔；及
    形成多个阴极层在所述像素限定层上，及形成在所述第一槽孔及所述第二槽孔内，所述多个阴极层为不连续的阴极层。
  2.    如权利要求1所述的OLED阵列基板的制作方法，其中在形成多个阴极层的步骤之后，还包含以下步骤：形成一有机挡墙在所述不连续槽孔内及其上方。
  3.    如权利要求2所述的OLED阵列基板的制作方法，其中在形成一有机挡墙的步骤之后，形成一有机层覆盖所述第一槽孔上方直至所述有机挡墙。
  4.    如权利要求3所述的OLED阵列基板的制作方法，其中在形成一有机层之前，还含包含以下步骤：在所述像素限定层上形成一第一无机层，所述第一无机层覆盖所述多个阴极层及所述有机挡墙。
  5.    如权利要求3所述的OLED阵列基板的制作方法，其中在形成一有机层之后，还含包含以下步骤：在所述有机层上形成一第二无机层，所述第二无机层覆盖所述有机层及所述第一无机层。
  6.    一种OLED阵列基板，其包含：
    一基板；
    一TFT层，形成在所述基板上；
    一绝缘层，形成在部分的所述TFT层；
    一阳极层，形成在部分的所述TFT层上并与所述TFT层连接；
    一像素限定层，形成在所述TFT层、所述绝缘层及所述阳极层上，其中所述像素限定层具有一第一槽孔及一第二槽孔，所述第一槽孔内形成一发光层，所述第二槽孔内具有多个填充物，所述多个填充物在所述第二槽孔内形成多个不连续槽孔；及
    多个阴极层，形成在所述像素限定层上及所述第一槽孔及所述第二槽孔内，所述多个阴极层为不连续的阴极层。
  7.    如权利要求6所述的OLED阵列基板，其中所述第一槽孔及所述第二槽孔为倒梯形，所述填充物为倒三角形或倒梯形。
  8.    如权利要求6所述的OLED阵列基板，其中还包含一有机挡墙，所述有机挡墙设在所述不连续槽孔内及其上方。
  9.    如权利要求6所述的OLED阵列基板，其中还包含一有机层覆盖所述第一槽孔上方直至所述有机挡墙。
  10. 如权利要求9所述的OLED阵列基板，其中还包含一第一无机层，所述第一无机层覆盖所述多个阴极层及所述有机挡墙；及一第二无机层，所述第二无机层覆盖所述有机层及所述第一无机层。
  11. 一种OLED阵列基板，其包含：
    一基板；
    一TFT层，形成在所述基板上；
    一绝缘层，形成在部分的所述TFT层；
    一阳极层，形成在部分的所述TFT层上并与所述TFT层连接；
    一像素限定层，形成在所述TFT层、所述绝缘层及所述阳极层上，其中所述像素限定层具有一第一槽孔及一第二槽孔，所述第一槽孔及所述第二槽孔为倒梯形，所述第一槽孔内形成一发光层，所述第二槽孔内具有多个填充物，所述填充物为倒三角形或倒梯形，所述多个填充物在所述第二槽孔内形成多个不连续槽孔；
    一有机挡墙，所述有机挡墙设在所述不连续槽孔内及其上方；及
    多个阴极层，形成在所述像素限定层上及所述第一槽孔及所述第二槽孔内，所述多个阴极层为不连续的阴极层。
  12. 如权利要求11所述的OLED阵列基板，其中还包含一有机层覆盖所述第一槽孔上方直至所述有机挡墙。
  13. 如权利要求12所述的OLED阵列基板，其中还包含一第一无机层，所述第一无机层覆盖所述多个阴极层及所述有机挡墙；及一第二无机层，所述第二无机层覆盖所述有机层及所述第一无机层。
PCT/CN2019/090973 2019-04-22 2019-06-12 Oled阵列基板及其制作方法 WO2020215461A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/500,708 US11264439B2 (en) 2019-04-22 2019-06-12 Organic light-emitting diode array substrate and method of manufacturing the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910322930.1 2019-04-22
CN201910322930.1A CN110085553B (zh) 2019-04-22 2019-04-22 Oled阵列基板及其制作方法

Publications (1)

Publication Number Publication Date
WO2020215461A1 true WO2020215461A1 (zh) 2020-10-29

Family

ID=67415892

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/090973 WO2020215461A1 (zh) 2019-04-22 2019-06-12 Oled阵列基板及其制作方法

Country Status (3)

Country Link
US (1) US11264439B2 (zh)
CN (1) CN110085553B (zh)
WO (1) WO2020215461A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111900186B (zh) * 2020-06-17 2022-07-12 武汉华星光电半导体显示技术有限公司 显示面板及其制备方法
CN112309988B (zh) * 2020-10-22 2022-09-27 武汉华星光电半导体显示技术有限公司 显示面板及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106876331A (zh) * 2017-03-03 2017-06-20 武汉华星光电技术有限公司 Oled显示面板及其制备方法、显示装置
WO2018212960A1 (en) * 2017-05-17 2018-11-22 Apple Inc. Organic light-emitting diode display with reduced lateral leakage
CN109616580A (zh) * 2018-10-23 2019-04-12 武汉华星光电半导体显示技术有限公司 阵列基板及其制作方法、显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105633297B (zh) * 2014-11-25 2018-04-20 乐金显示有限公司 透视有机发光显示装置及其制造方法
CN206250196U (zh) * 2016-11-09 2017-06-13 昆山国显光电有限公司 Oled触控显示面板及触控显示装置
CN107968107B (zh) * 2017-06-16 2020-05-15 广东聚华印刷显示技术有限公司 印刷型电致发光显示器及其制作方法
CN109103215B (zh) 2017-06-21 2021-03-09 京东方科技集团股份有限公司 一种有机发光二极管显示面板及其制作方法、显示装置
CN108649057B (zh) * 2018-05-14 2020-07-31 京东方科技集团股份有限公司 一种显示面板、其制作方法及显示装置
KR20200028567A (ko) * 2018-09-06 2020-03-17 삼성디스플레이 주식회사 표시 장치
JP2020134715A (ja) * 2019-02-20 2020-08-31 株式会社ジャパンディスプレイ 表示装置及び表示装置の製造方法
KR20200111889A (ko) * 2019-03-19 2020-10-05 삼성디스플레이 주식회사 디스플레이 패널 및 이를 포함하는 디스플레이 장치
KR20200113957A (ko) * 2019-03-27 2020-10-07 삼성디스플레이 주식회사 표시 장치

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106876331A (zh) * 2017-03-03 2017-06-20 武汉华星光电技术有限公司 Oled显示面板及其制备方法、显示装置
WO2018212960A1 (en) * 2017-05-17 2018-11-22 Apple Inc. Organic light-emitting diode display with reduced lateral leakage
CN109616580A (zh) * 2018-10-23 2019-04-12 武汉华星光电半导体显示技术有限公司 阵列基板及其制作方法、显示装置

Also Published As

Publication number Publication date
CN110085553A (zh) 2019-08-02
US20210335934A1 (en) 2021-10-28
CN110085553B (zh) 2021-06-22
US11264439B2 (en) 2022-03-01

Similar Documents

Publication Publication Date Title
US11805667B2 (en) Encapsulation structure, electronic apparatus and encapsulation method
US10211416B2 (en) Flexible display panel, fabrication method, and flexible display apparatus
JP6219685B2 (ja) 発光ディスプレイバックプレーン、ディスプレイデバイス、及び画素定義層の製造方法
US20190140202A1 (en) Flexible display panel and flexible display apparatus
JP6095301B2 (ja) 表示装置
WO2019127685A1 (zh) 显示面板制备方法、显示面板及显示装置
CN104282729B (zh) 一种有机发光显示面板及其制备方法、显示装置
CN109904336B (zh) 电子装置基板及制造方法/显示装置
WO2020094015A1 (zh) 显示基板和显示装置
JP2008262796A (ja) 表示装置およびその製造方法
US10727438B2 (en) OLED component and method for manufacturing the same
WO2020082481A1 (zh) 阵列基板及其制作方法、显示装置
CN110828691A (zh) 柔性显示面板及其制备方法
KR20150074409A (ko) 표시 장치 및 그 제조 방법
WO2020215461A1 (zh) Oled阵列基板及其制作方法
CN112018131B (zh) 柔性显示面板及其制备方法
CN109994524B (zh) 有机发光显示装置及其制造方法
WO2024017343A1 (zh) 显示面板及其制作方法、显示装置
WO2020056804A1 (zh) Oled显示面板及其制作方法
JP2016143605A (ja) 発光装置の製造方法、発光装置、及び電子機器
CN110993646A (zh) Oled背板的制备方法及oled背板
CN112420945B (zh) 显示面板及其制备方法、显示装置
JP2015133293A (ja) 表示装置
US20110080087A1 (en) Organic electro-luminescent device package and packaging process thereof
CN113035913A (zh) 一种显示面板及其制备方法、显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19926642

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19926642

Country of ref document: EP

Kind code of ref document: A1