WO2020199541A1 - 显示基板、显示面板及显示装置 - Google Patents

显示基板、显示面板及显示装置 Download PDF

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Publication number
WO2020199541A1
WO2020199541A1 PCT/CN2019/108644 CN2019108644W WO2020199541A1 WO 2020199541 A1 WO2020199541 A1 WO 2020199541A1 CN 2019108644 W CN2019108644 W CN 2019108644W WO 2020199541 A1 WO2020199541 A1 WO 2020199541A1
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WIPO (PCT)
Prior art keywords
sub
pixel
display area
area
pixels
Prior art date
Application number
PCT/CN2019/108644
Other languages
English (en)
French (fr)
Inventor
刘权
秦旭
张露
常苗
胡思明
韩珍珍
Original Assignee
昆山国显光电有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 昆山国显光电有限公司 filed Critical 昆山国显光电有限公司
Priority to KR1020217018899A priority Critical patent/KR102626540B1/ko
Priority to EP19923267.9A priority patent/EP3882897B1/en
Priority to JP2021534724A priority patent/JP7229359B2/ja
Publication of WO2020199541A1 publication Critical patent/WO2020199541A1/zh
Priority to US17/239,705 priority patent/US11355047B2/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/57—Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0232—Special driving of display border areas
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas

Definitions

  • This application relates to the field of display technology, and in particular to a display substrate, a display panel and a display device.
  • a display substrate includes a display area and a frame area at least partially surrounding the display area; the display area includes a first display area and a second display area , The light transmittance of the first display area is greater than the light transmittance of the second display area; the display area is provided with a plurality of pixel groups composed of a plurality of sub-pixels arranged along a first direction, the The plurality of sub-pixels includes one or more first sub-pixels and one or more second sub-pixels; at least one of the plurality of pixel groups includes a first sub-pixel group located in the first display area and a In the second sub-pixel group of the second display area, at least another of the plurality of pixel groups only includes the second sub-pixel group located in the second display area; the first sub-pixel group includes the at least one first A sub-pixel; the second sub-pixel group includes the at least one second sub-pixel; when the number of the sub-pixels
  • a pixel circuit for driving the sub-pixels is arranged in the display area; one or more EM signal control circuits are arranged in the frame area, and the number of output terminals of each EM signal control circuit is m, wherein, m is an integer greater than 2; each of the output terminals is electrically connected to the pixel circuits of at least part of the sub-pixels in one pixel group.
  • the first sub-pixel group includes two of the first sub-pixels, and each of the first sub-pixels corresponds to one of the pixel circuits;
  • the frame area includes two pixels located opposite to each other in the display area.
  • the two sub-frame areas extend in the third direction; the two sub-frame areas are respectively provided with EM signal control circuits corresponding to the first sub-pixel group; the first sub-frame area
  • the pixel circuit corresponding to each of the first sub-pixels of the pixel group is electrically connected to the EM signal control circuit in the sub-frame area that is closer to the corresponding first sub-pixel.
  • the embodiment of the present application also provides a display panel, which includes the above-mentioned display substrate and packaging structure;
  • the packaging structure includes a polarizer, and the polarizer covers at least the second display area;
  • the polarizer does not cover the first display area.
  • An embodiment of the present application also provides a display device, including: an equipment body, the equipment body having a device area;
  • the display panel is covered on the device body;
  • the device area is located below the first display area, and a photosensitive device that emits or collects light through the first display area is provided in the device area.
  • the display area includes a first display area and a second display area.
  • the light transmittance of the first display area is greater than the light transmittance of the second display area.
  • the device is arranged under the first display area, and external incident light can enter the photosensitive device through the first display area, and a full-screen display is realized while ensuring the normal operation of the photosensitive device.
  • the number of output terminals of each EM signal control circuit arranged in the frame area is m, m is an integer greater than 2, and each output terminal can be electrically connected to the pixel circuit corresponding to at least some sub-pixels in a pixel group, that is, one
  • the EM signal control circuit can control the pixel circuits of the sub-pixels in more than two pixel groups, so that the number of EM signal control circuits in the frame area can be reduced, and thus the size of the frame area can be reduced.
  • the display area can be made larger, which is beneficial to improve the user experience.
  • FIG. 1 is a top view of a display substrate provided by an embodiment of the present application.
  • FIG. 2 is a partial schematic diagram of an embodiment of the sub-pixel arrangement of the display substrate shown in FIG. 1;
  • FIG. 3 is a schematic diagram of the connection of an embodiment of a pixel circuit and an EM signal control circuit in the display substrate shown in FIG. 1;
  • FIG. 4 is a schematic diagram of the connection of another embodiment of the pixel circuit and the EM signal control circuit in the display substrate shown in FIG. 1;
  • FIG. 5 is a schematic diagram of the connection of another embodiment of the pixel circuit and the EM signal control circuit in the display substrate shown in FIG. 1;
  • FIG. 6 is a schematic diagram of an embodiment of the arrangement of the first pixels in the first display area 10 and the pixel circuits corresponding to the first pixels in the display substrate shown in FIG. 1;
  • FIG. 7 is a schematic diagram of another embodiment of the arrangement of the first pixels in the first display area 10 and the pixel circuits corresponding to the first pixels in the display substrate shown in FIG. 1;
  • FIG. 8 is a schematic diagram of another embodiment of the arrangement of the first pixels in the first display area 10 and the pixel circuits corresponding to the first pixels in the display substrate shown in FIG. 1;
  • FIG. 9 is a partial schematic diagram of another embodiment of the sub-pixel arrangement of the display substrate shown in FIG. 1;
  • FIG. 10 is a schematic diagram of an embodiment of the projection of the first electrode on the substrate in the display substrate shown in FIG. 1;
  • FIG. 11 is a schematic diagram of another embodiment of the projection of the first electrode on the substrate in the display substrate shown in FIG. 1;
  • FIG. 12 is a schematic diagram of another embodiment of the projection of the first electrode on the substrate in the display substrate shown in FIG. 1;
  • FIG. 13 is a schematic diagram of an embodiment in which the middle surface electrode of the display substrate shown in FIG. 1 and the low-level power signal line are overlapped through a conductive layer;
  • FIG. 14 is a partial schematic diagram of an embodiment of the arrangement of the first sub-pixels in the first display area and the second sub-pixels in the second display area in the display substrate shown in FIG. 1.
  • a slotted area is provided on the display screen of an electronic device of the related art, and photosensitive devices such as a camera, earpiece, and infrared sensor are arranged in the slotted area, and external light enters the photosensitive device through the slotted area.
  • the slotted area cannot display the picture, it is not a full screen in the true sense.
  • the driving circuit for driving the display screen such as the EM signal control circuit, the scanning control circuit, etc., is arranged in the frame area surrounding the display area.
  • the driving circuit of the electronic device is relatively complicated, resulting in a larger width of the frame area. When the size of the electronic device is constant, the area of the display area is smaller, which affects the aesthetics of the electronic device and the user experience.
  • the embodiment of the present application provides a display substrate.
  • the display substrate 100 includes a display area 1 and a frame area 2 at least partially surrounding the display area 1.
  • the display area 1 includes a first display area 10 and a second display area 20.
  • the light transmittance of the first display area 10 is greater than that of the first display area. 2.
  • the light transmittance of the display area 20 is greater than that of the first display area.
  • the display area 1 is provided with a plurality of pixel groups 30 composed of a plurality of sub-pixels arranged along a first direction, and the plurality of sub-pixels includes one or more first sub-pixels 311, and one or more The second sub-pixel 321.
  • At least one of the plurality of pixel groups 30 includes a first sub-pixel group 31 located in the first display area 10 and a second sub-pixel group 32 located in the second display area 20.
  • at least The other only includes the second sub-pixel group 32 located in the second display area 20.
  • the first sub-pixel group 31 includes at least one of the first sub-pixels 311, and the second sub-pixel group 32 includes at least one of the second sub-pixels 321.
  • the multiple sub-pixels are arranged at intervals along the second direction.
  • the size of the first sub-pixel 311 in the second direction may be greater than the size of the second sub-pixel 321 of the same pixel group 30 in the second direction.
  • the size of the first sub-pixel 311 in the first direction may be substantially equal to the size of the second sub-pixel 321 of the same pixel group 30 in the first direction.
  • the plurality of pixel groups 30 are arranged at intervals along the first direction.
  • the display area 1 is provided with a pixel circuit 50 for driving each sub-pixel in the display area 1, and one or more EM signal control circuits 40 are provided in the frame area 2, and each EM signal control circuit 40
  • the number of output terminals is m, where m is an integer greater than 2.
  • Each output terminal 41 is electrically connected to the pixel circuit 50 of at least part of the sub-pixels in a pixel group 30.
  • the EM signal control circuit 40 is used to provide a light emitting signal to the pixel circuit 50, and the pixel circuit 50 controls the corresponding sub-pixel to emit light after receiving the light emitting signal provided by the EM signal control circuit 40.
  • the EM signal control circuit 40 provided in the frame area 2 can be connected to the sub-pixels in the same pixel group 30 through the wiring 60.
  • the display area 1 includes a first display area 10 and a second display area 20.
  • the light transmittance of the first display area 10 is greater than the light transmittance of the second display area 20.
  • the device is arranged under the first display area 10, and external incident light can enter the photosensitive device through the first display area 10 to realize the full-screen display of the display substrate 100 while ensuring the normal operation of the photosensitive device; it is arranged in each frame area 2
  • the number of output terminals 41 of the EM signal control circuit 40 is m, and m is an integer greater than 2.
  • Each output terminal 41 can be electrically connected to a pixel circuit corresponding to at least some sub-pixels in a pixel group 30, that is, an EM signal control circuit 40 can control the pixel circuits of sub-pixels in more than two (for example, three, four, five, etc.) pixel groups, thereby reducing the number of EM signal control circuits 40 in the frame area 2, thereby reducing The size of border area 2.
  • the display area 1 can be made larger, which is beneficial to improve the user experience.
  • the frame area 2 may include two sub-frame areas 21 located on opposite sides of the display area 1, and the two sub-frame areas 21 may extend along the third direction.
  • the EM signal control circuit 40 may be arranged in the two sub-frame areas 21.
  • the third direction can be the same as or different from the first direction.
  • only the pixel circuit 50 corresponding to the first sub-pixel 311 in the first display area 10 is provided in the first display area 10 as an example for illustration.
  • the first display area 10 The pixel circuit 50 corresponding to the first sub-pixel 311 may be disposed in the second display area 20.
  • the second display area 20 includes a first area 201 and a second area 202 adjacent to the first area 201 and the first display area 10.
  • the second area 202 at least partially surrounds the first display area. 10.
  • one side of the first display area 10 coincides with a side edge of the display area 1, for example, coincides with the top edge of the display area 1, and the second area 202 surrounds the other three sides of the first display area 10.
  • the first display area 10 is disposed inside the display area 1, and the second area 202 surrounds the four sides of the first display area 10.
  • a border area can be set on the top of the display area 1, or not.
  • the pixel circuit 50 corresponding to the first sub-pixel 311 in the first sub-pixel group 31 may be disposed in the second area 202.
  • the first sub-pixel 311 and the corresponding pixel circuit 50 may be electrically connected through a wire 70.
  • Such an arrangement can reduce the structural complexity of the first display area 10, increase the light transmittance of the first display area 10, and thereby reduce the diffraction generated when external incident light passes through the first display area 10.
  • the pixel circuit 50 corresponding to each first sub-pixel 311 in the first sub-pixel group 31 is disposed in the area adjacent to the sub-pixel 311 in the second area 202 to shorten the connection between the first sub-pixel 311 and the corresponding pixel circuit. 50 wires.
  • the first sub-pixel group 31 includes two first sub-pixels 311, each first sub-pixel 311 corresponds to a pixel circuit 50, and each first sub-pixel 311 corresponds to a pixel circuit 50 It is arranged in a region of the second region 202 adjacent to the first sub-pixel 311.
  • the first sub-pixel group 31 includes a first sub-pixel 311, the first sub-pixel 311 corresponds to a pixel circuit 50, and the pixel circuit 50 corresponding to the first sub-pixel 311 is disposed in The second area 202 is located in an area on either side of the first sub-pixel 311.
  • the first sub-pixel group 31 includes a first sub-pixel 311, the first sub-pixel 311 corresponds to two pixel circuits 50, and the first sub-pixel 311 corresponds to two pixel circuits 50 are respectively arranged in areas of the second area 202 located on both sides of the first sub-pixel 311.
  • the first sub-pixel group 31 includes two first sub-pixels 311.
  • Each first sub-pixel 311 can correspond to a pixel circuit 50, and the two sub-frame regions 21 are respectively provided with an EM signal control circuit 40 corresponding to the first sub-pixel group 31, and each first sub-pixel group 31
  • the pixel circuit 50 corresponding to the sub-pixel 311 is respectively electrically connected to the EM signal control circuit 40 in the sub-frame area 21 that is closer to the first sub-pixel 311.
  • the pixel circuit 50 is connected to the EM signal control circuit 40 in the sub-frame area 21 on the right side of the display area 1.
  • the first sub-pixel 311 in the first sub-pixel group 31 is disposed in the area adjacent to the first sub-pixel 311 of the second display area 20, the first sub-pixel 311 is close to the second
  • the end of the display area 20 can be electrically connected to the corresponding pixel circuit 50, and the connection line between the two is relatively short.
  • the pixel circuit 50 corresponding to the first sub-pixel 311 can be electrically connected to the corresponding EM signal control circuit 40 through the wiring provided in the second display area 20, and there is no need to introduce the wiring into the first display area 10.
  • the pixel circuit 50 corresponding to the first sub-pixel 311 in the first sub-pixel group 31 is disposed under the first sub-pixel 311, because the pixel circuit 50 corresponding to the first sub-pixel 311 is adjacent to the first sub-pixel 311
  • the EM signal control circuit 40 provided in the sub-frame area 21 is electrically connected, and the wiring 60 between the pixel circuit 50 corresponding to the first sub-pixel 311 and the EM signal control circuit 40 is shorter.
  • the above-mentioned two arrangements of the first sub-pixel 311 corresponding to the pixel circuit 50 can reduce the complexity of the lines in the first display area 10, thereby increasing the light transmittance of the first display area 10, and reducing external incident light Diffraction generated when passing through the first display area 10.
  • the first sub-pixel 311 and the second sub-pixel 321 of the same pixel group 30 are located in the first sub-pixel 311 and the sub-frame area 21 which is closer to the first sub-pixel 311.
  • the pixel circuit 50 corresponding to the second sub-pixel 321 and the pixel circuit 50 corresponding to the first sub-pixel 311 are electrically connected to the same output terminal 41 of the same EM signal control circuit 40.
  • the sub-frame area 21 adjacent to the first sub-pixel 311 refers to the sub-frame area of the two sub-frame areas 21 that is closer to the first sub-pixel 311.
  • the pixel circuit corresponding to the second sub-pixel 321 located between the first sub-pixel 311 and the sub-frame area 21 adjacent to the first sub-pixel 311 and the pixel circuit corresponding to the first sub-pixel 311 can pass through one
  • the wiring is connected to the output terminal 41 of the corresponding EM signal control circuit 40, which can reduce the length of the wiring, which is beneficial to simplify the wiring complexity in the display area 1.
  • the two sub-frame areas 21 may be respectively provided with a scan control circuit, and the pixel circuit 50 corresponding to each first sub-pixel 311 of the first sub-pixel group 31 and the sub-frame area 21 located closer to the first sub-pixel 311
  • the scan control circuit inside is electrically connected.
  • the scan control circuit is used to provide scan signals to the pixel circuit, and the scan control circuit is electrically connected to the pixel circuit through a gate line.
  • the first sub-pixel circuit 50 corresponding to the first sub-pixel 311 in the first sub-pixel group 31 is disposed in the area of the second display area 20 that is close to the first sub-pixel 311, the first sub-pixel The end of the 311 close to the second area 202 can be electrically connected to the corresponding pixel circuit 50, and the connection line between the two is relatively short; and the pixel circuit 50 corresponding to the first sub-pixel 311 can be arranged in the second display area.
  • the gate lines in 20 are electrically connected to the corresponding scan control circuit, and there is no need to introduce the gate lines into the first display area 10.
  • the pixel circuit 50 corresponding to the first sub-pixel 311 in the first sub-pixel group 31 is disposed under the first sub-pixel 311, because the pixel circuit 50 corresponding to the first sub-pixel 311 is adjacent to the first sub-pixel 311
  • the scan control circuit provided in the sub-frame area 21 is electrically connected, and the gate line between the pixel circuit 50 corresponding to the first sub-pixel 311 and the scan control circuit is shorter.
  • the above-mentioned two arrangements of the pixel circuit 50 corresponding to the first sub-pixel 311 can reduce the complexity of the gate line arrangement in the first display area 10, thereby increasing the light transmittance of the first display area 10 and reducing the external Diffraction occurs when incident light passes through the first display area 10.
  • the second sub-pixel located between the first sub-pixel 311 and the sub-frame area 21 closer to the first sub-pixel 311 The pixel circuit 50 corresponding to the pixel 321 and the pixel circuit 50 corresponding to the first sub-pixel 311 are electrically connected to the same scan control circuit.
  • the pixel circuit 50 corresponding to the second sub-pixel 321 located between the first sub-pixel 311 and the sub-frame area 21 closer to the first sub-pixel 311, and the pixel corresponding to the first sub-pixel 311 The circuit 50 can be electrically connected to the corresponding scan control circuit through a gate line, which can reduce the length of the gate line, which is beneficial to simplify the wiring complexity in the display area 1.
  • the first sub-pixel group 31 includes a first sub-pixel 311, each first sub-pixel corresponds to a pixel circuit 50, and one of the two sub-frame areas 21 is provided in the sub-frame area.
  • the EM signal control circuit 40 is provided in one sub-frame area 21 to drive the pixel circuit 50 corresponding to the first sub-pixel in the first display area 10, which can simplify the EM signal control circuit in the sub-frame area 21
  • the number is beneficial to reduce the width of the sub-frame area 21.
  • the pixel circuit 50 corresponding to the first sub-pixel 311 and the pixel circuit 50 corresponding to the second sub-pixel 321 in the same pixel group 30 are connected to the same output terminal of the same EM signal control circuit 40.
  • the pixel circuit 50 corresponding to the first sub-pixel 311 and the pixel circuit 50 corresponding to the second sub-pixel 321 in the same pixel group 30 can be connected to the output terminal 41 of the corresponding EM signal control circuit 40 through one wire. Can reduce the complexity of routing.
  • the first sub-pixel group 31 may include one first sub-pixel 311, and the first sub-pixel 311 corresponds to two pixel circuits 50.
  • the two sub-frame regions 21 are respectively provided with an EM signal control circuit 40 corresponding to the first sub-pixel group 311, two pixel circuits 50 corresponding to the first sub-pixel 311 of the first sub-pixel group 31 and two corresponding
  • the EM signal control circuit 40 is electrically connected in a one-to-one correspondence.
  • the first sub-pixel 311 when the two pixel circuits 50 corresponding to the first sub-pixel 311 in the first sub-pixel group 31 are arranged in the area adjacent to the first sub-pixel 311 of the second display area 20, the first sub-pixel 311
  • the two ends of the pixel circuit 50 can be electrically connected to the two pixel circuits 50 in a one-to-one correspondence, and the connection line between the two is relatively short; and the pixel circuit 50 corresponding to the first sub-pixel 311 can be arranged in the second display area 20
  • the wiring 60 is electrically connected to the corresponding EM signal control circuit 40, and there is no need to introduce the wiring 60 into the first display area 10.
  • each pixel circuit 50 can be arranged in the sub-frame area 21 that is closer to it.
  • the signal control circuit 40 is electrically connected to make the wiring 60 between the pixel circuit corresponding to the first sub-pixel 311 and the EM signal control circuit 40 shorter.
  • the above-mentioned two arrangements of the pixel circuit 50 corresponding to the first sub-pixel 311 can reduce the complexity of the circuit in the first display area 10, thereby increasing the light transmittance of the first display area 10 and reducing the external incidence. Diffraction occurs when light passes through the first display area 10.
  • the first sub-pixel 311 corresponds to the two pixel circuits 50, which can reduce the delay of the control signal, which is beneficial to improve the display effect.
  • the pixel circuit 50 corresponding to the second sub-pixel 321 located between the first display area 10 and each sub-frame area 21, and the pixel circuit 50 in the pixel group 30 The pixel circuit 50 of the first sub-pixel 311 that is closer to the corresponding sub-frame area 21 is connected to the same output terminal 41 of the EM signal control circuit 40 in the corresponding sub-frame area 21.
  • two types of pixel circuits namely one pixel circuit 50 corresponding to the first sub-pixel 311 in the same pixel group 30, and the pixel circuit 50 located at a distance from the pixel circuit 50 can be compared through the same wiring 60.
  • the corresponding pixel circuit 50 of the second sub-pixel 321 between the near sub-frame regions 21 is electrically connected to the same output terminal of the EM signal control circuit 40, thereby simplifying the layout of the wiring 60 and simplifying the process of preparing the display substrate 100 Process.
  • the two sub-frame areas 21 may be respectively provided with scan control circuits, the corresponding pixel circuits 50 of all the second sub-pixels 321 located between the first display area 10 and each sub-frame area 21, and the first The pixel circuit 50 of a sub-pixel 311 that is closer to the sub-frame area 21 is connected to the same scan control circuit in the sub-frame area through a gate line.
  • This arrangement can simplify the layout of the gate lines and simplify the manufacturing process.
  • the first sub-pixel 311 and the second sub-pixel 321 in each pixel group 30 have approximately the same size in the first direction. In the first direction, two adjacent ones There are no other second sub-pixels between the two second sub-pixel groups 32.
  • the arrangement of the first sub-pixels 311 and the second sub-pixels 321 of the display substrate 100 is not limited to this, and may also be the case shown in FIG. 9.
  • the distribution density of the first sub-pixels 311 in the first display area 10 (that is, the number of sub-pixels in a unit area) is smaller than the distribution density of the second sub-pixels 321 in the second display area 20.
  • the size of the first sub-pixel 311 in the first direction is larger than the size of the second sub-pixel 321 in the first direction.
  • the second display area 20 also includes at least one third sub-pixel group 90 arranged between two adjacent second sub-pixel groups 32, the third sub-pixel group 90 includes at least one second sub-pixel 321, and the third sub-pixel When the group 90 includes a plurality of second sub-pixels 321, the plurality of second sub-pixels 321 are arranged at intervals by the first sub-pixel group 31 along the second direction.
  • a third sub-pixel group 90 is provided between two adjacent second sub-pixel groups 32.
  • two adjacent Two or more third sub-pixel groups 90 arranged along the first direction are arranged between the second sub-pixel groups 32.
  • the second sub-pixels 321 of the third sub-pixel group 90 and the second sub-pixels 321 of the second sub-pixel group 32 adjacent to the third sub-pixel group 90 are located in the sub-frame area 21 and The second sub-pixel 321 of the second sub-pixel group 32 and the second sub-pixel 321 of the third sub-pixel group 90 between the first display areas 10, and the pixel circuit 50 corresponding to each second sub-pixel 321 is electrically connected to the same EM The same output terminal of the signal control circuit 40 or different output terminals of the same EM signal control circuit 40. That is, the pixel circuit 50 corresponding to the second sub-pixel 321 in the third sub-pixel group 90 on the left side of the first display area 10 shown in FIG.
  • the pixel circuit 50 corresponding to the second sub-pixel 321 of the second sub-pixel group 32 located on the left side of the first display area 10 can be connected to the same output terminal of the same EM signal control circuit 40 or different outputs of the same EM signal control circuit 40 Terminal.
  • the second sub-pixel group 32 adjacent to the third sub-pixel group 90 may be the second sub-pixel group 32 located above the third sub-pixel group 90, or may be the second sub-pixel group 32 located below the third sub-pixel group 90. Sub-pixel group 32.
  • the same EM signal control circuit 40 can simultaneously drive the pixel circuits 50 of the sub-pixels in multiple pixel groups and the third sub-pixel group 90 adjacent to the pixel group, which can further reduce the EM signal control in the frame area.
  • the number of circuits thereby reducing the size of the frame area.
  • the pixel circuit corresponding to the second sub-pixel 321 in the third sub-pixel group 90 and the pixel circuit corresponding to the second sub-pixel 321 of the second sub-pixel group 32 adjacent to the third sub-pixel group 90 may also be Connect to different EM signal control circuits 40.
  • the distribution density of the second sub-pixels 321 in the second area 202 is greater than the distribution density of the first sub-pixels in the first display area 10 and less than the distribution density of the second sub-pixels 321 in the first area 201.
  • the spacing between two adjacent second sub-pixels 321 in the second area 202 is smaller than the spacing between two adjacent first sub-pixels 311 in the first display area 10; and/or, The size of the second sub-pixel 321 in the second area 202 is smaller than the size of the first sub-pixel 311 in the first display area 10.
  • Such a configuration can make the distribution density of the second sub-pixels 321 in the second area 202 greater than the distribution density of the first sub-pixels 311 in the first display area 10.
  • the pixel circuit corresponding to each of the first sub-pixel 311 and the second sub-pixel 321 may be a circuit including 3 transistors and 1 capacitor, or a circuit including 3 transistors and 2 capacitors, or A circuit with 7 transistors and 1 capacitor, or a circuit with 7 transistors and 2 capacitors.
  • the arrangement of the second sub-pixels 321 in the second display area 20 may be the same as the arrangement of the first sub-pixels 311 in the first display area 10, so that the second display area 20 and The display effect of the first display area 10 is more consistent.
  • the first sub-pixel 311 in the first sub-pixel group 31 includes a first electrode, a first light-emitting structure block on the first electrode, and a second electrode on the first light-emitting structure block, each The first electrode corresponding to the sub-pixel includes at least one first electrode block.
  • the first electrode 301 corresponding to one first sub-pixel 311 includes two or more first electrode blocks 3011, and the first electrode 301 further includes The connecting portion 3012 between the two first electrode blocks 3011 is electrically connected to two adjacent first electrode blocks 3011 through the corresponding connecting portion 3012.
  • the size of the connecting portion 3012 in a plane parallel to the display substrate 100 and perpendicular to its extending direction is greater than 3 ⁇ m and smaller than two times the maximum size of the first electrode block 3011.
  • the resistance of the connecting portion 3012 can be made smaller; by setting the size of the connecting portion 3012 to be smaller than half of the maximum size of the first electrode block 3011, The arrangement of the connecting portion 3012 has a small effect on the size of the first electrode block 3011, avoiding a larger size of the connecting portion 3012 leading to a reduction in the size of the first electrode block 3011, and further reducing the effective light-emitting area of the first display area 10.
  • the first direction is perpendicular to the second direction, and the first direction is the row direction or the column direction.
  • the plurality of first electrodes 301 may be arranged in one row and multiple columns, or one column and multiple rows, or two columns and multiple rows, or two rows and multiple columns, or multiple rows and multiple columns. 10 to FIG. 12 only take the first direction as the column direction and the second direction as the row direction as an example for illustration. In other embodiments, the first direction may also be the row direction and the second direction is the column direction.
  • first electrode blocks 3011 corresponding to the first sub-pixels 311 in the same first sub-pixel group 31 two adjacent first electrode blocks 3011 are arranged staggered in the second direction. Such an arrangement can further reduce the diffraction effect generated when light incident from outside passes through the first display area 10.
  • the central axis in the second direction of the two first electrode blocks 3011 arranged at intervals of one first electrode block 3011 coincide.
  • the arrangement of the plurality of first electrode blocks 3011 in the first sub-pixel group is more regular, so that the arrangement of the first light-emitting structure blocks arranged above the plurality of first electrode blocks 3011 is more regular, and then the preparation The opening arrangement of the mask plate used in the light-emitting structure block is relatively regular.
  • the first light-emitting structure block in the first display area and the second display area of the display substrate 100 can be fabricated in the same vapor deposition process using the same mask. It is more uniform and reduces the wrinkles of the net.
  • the display substrate 100 includes a substrate, the first electrode block 3011 is disposed on the substrate, and the projection of the first electrode block 3011 on the substrate is composed of one or more first graphic units.
  • the first graphic unit may be circular, oval, dumbbell, gourd or rectangular.
  • Each of the first sub-pixel groups shown in FIG. 10 to FIG. 11 includes two first electrodes 301, and each first electrode 301 includes the same number of first electrode blocks 3011; each one shown in FIG. 12
  • the sub-pixel group includes three first electrodes 301, and each first electrode 301 includes the same number of first electrode blocks 3011.
  • the projection of each first electrode block 3011 shown in FIG. 10 on the substrate is composed of a first pattern unit, which is rectangular; each first electrode block 3011 shown in FIG.
  • the projection on the bottom consists of a first graphic unit, which is in the shape of a gourd;
  • the projection of each first electrode block 3011 shown in FIG. 12 on the substrate consists of a first graphic unit,
  • the graphic unit is circular.
  • the first graphic unit is circular, elliptical, dumbbell-shaped or gourd-shaped.
  • the size of the first electrode 301 in the first direction changes continuously or intermittently, and the adjacent ones in the first direction
  • the distance between the two first electrodes 301 in the first direction changes continuously or intermittently, so that two adjacent first electrodes 301 have different diffraction positions.
  • the diffraction effects at different positions cancel each other out, so that the diffraction effects can be effectively reduced, thereby ensuring that the images captured by the camera arranged under the first display area 10 have high definition.
  • the light-emitting structure includes a first light-emitting structure block correspondingly disposed on each first electrode block 3011, and the projection of the first light-emitting structure block on the substrate is composed of a second pattern unit or a plurality of second patterns.
  • Unit composition wherein, the second graphic unit includes a circle, an oval, a dumbbell, a gourd or a rectangle.
  • the first graphics unit and the second graphics unit may be the same or different.
  • the first graphic unit is different from the second graphic unit to further reduce the diffraction effect generated when light passes through the first display area 10.
  • the first display area 10 may be a transparent display area, and a photosensitive device such as a camera may be disposed under the first display area 10.
  • the light transmittance of the first display area 10 is relatively large, for example, greater than 70%, to meet the lighting requirements of the photosensitive device.
  • the materials of each layer in the first display area 10 can be transparent materials. In this way, the lighting effect of the photosensitive device, such as a camera, disposed under the first display area 10 can be improved.
  • the materials of the first electrode and/or the second electrode located in the first display area 10 are both transparent materials.
  • the light transmittance of the transparent material used for preparing the first electrode and/or the second electrode in the first display area 10 is greater than or equal to 70%.
  • the light transmittance of the transparent material is greater than or equal to 90%, for example, the light transmittance of the transparent material may be 90%, 95%, or the like. Such an arrangement can make the light transmittance of the first display area 10 larger, so that the light transmittance of the first display area 10 meets the lighting requirements of the photosensitive device disposed below it.
  • the transparent material used for preparing the first electrode and/or the second electrode in the first display region 10 includes indium tin oxide, indium zinc oxide, silver-doped indium tin oxide or silver-doped indium zinc oxide. At least one of.
  • the transparent material used for preparing the first electrode and/or the second electrode in the first display area 10 is silver-doped indium tin oxide or silver-doped indium zinc oxide to ensure the first Based on the high light transmittance of the display area 10, the resistance of the first electrode and/or the second electrode is reduced.
  • the second sub-pixel 321 in the second display area 20 includes a third electrode, a second light-emitting structure block on the third electrode, and a fourth electrode on the second light-emitting structure block.
  • the second electrode of each first sub-pixel in the first display area 10 and the fourth electrode of each second sub-pixel in the second display area 20 are surface electrodes 81 connected together.
  • a low-level power signal line 23 is provided in the frame area 2, a low-level power signal line 23 is provided around the display area, and the low-level power signal line 23 is electrically connected to the surface electrode 81 in the display area 1. To provide power signals to the first sub-pixel and the second sub-pixel in the display area 1.
  • the display substrate 100 is further provided with a conductive layer 82, the first display area 10 is adjacent to the frame area 2, and the low-level power signal line 23 and the surface electrode 81 are bridged by the conductive layer 82, thereby realizing the low-level power signal line 23 and the surface electrode 81's electrical connection.
  • the material of the region 821 of the conductive layer 82 adjacent to the first display region 10 is a transparent conductive material. Or, the low-level power signal line is not provided in the area of the border area adjacent to the first display area.
  • the transparent conductive material has better light transmittance, when the material of the region 821 adjacent to the first display area 10 is a transparent material, compared to using a metal material, the first display area 10 that is closer to the conductive layer 82 can be avoided.
  • the area 821 of the area 821 reflects light, which results in poor display effect of the first display area 10 and poor imaging effect of the camera arranged under the first display area 10; the low level is not set in the area of the border area 2 close to the first display area 10
  • the power signal line 23 there is no need to provide a conductive layer for bridging the low-level power signal line 23 and the surface electrode 81 in this area, so that when external light is incident, the area will not reflect light, which can avoid comparison with the conductive layer 82.
  • the area 821 near the first display area 10 reflects light, which results in a poor display effect of the first display area 10 and a poor imaging effect of the camera disposed under the first display area 10.
  • the material of the conductive layer may include at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, silver-doped indium zinc oxide, zinc oxide, aluminum-doped zinc oxide, and gallium-doped zinc oxide.
  • indium tin oxide indium zinc oxide
  • silver-doped indium tin oxide silver-doped indium zinc oxide
  • zinc oxide aluminum-doped zinc oxide
  • gallium-doped zinc oxide gallium-doped zinc oxide.
  • the number of colors of the first sub-pixels 311 provided in the first display area 10 is n
  • the number of colors of the second sub-pixels 321 provided in the second display area 20 is n.
  • n is a natural number not less than 3.
  • the distribution density of the first sub-pixels 311 in the first display area 10 is smaller than the distribution density of the second sub-pixels 321 in the second display area 20.
  • the second sub-pixels 321 of the second group of colors constitute the transition pixel unit 13.
  • the number of colors included in the first group of colors m1 ⁇ [1,n-1], the number of colors included in the second group of colors m2 n-m1, both the first group of colors and the second group of colors different.
  • the first group of colors may include one color or multiple colors
  • the second group of colors may include one color or multiple colors
  • the first group of colors includes one color, and the color is green
  • the second group of colors includes two colors, and the colors are red and blue.
  • the first sub-pixels 311 of the first group of colors adjacent to the second display area 20 in the first display area 10 and the second sub-pixels 321 of the second group of colors in the second display area 20 constitute the transition pixel unit 13,
  • the first sub-pixel 311 and the second sub-pixel 321 in the transition pixel unit 13 can emit light as one pixel unit.
  • the transition pixel unit 13 when the transition pixel unit 13 is controlled to emit light, the first sub-pixel in the transition pixel unit 13 The 311 and the second sub-pixel 321 can emit light together, thereby increasing the brightness at the junction of the first display area 10 and the second display area 20, so that the black line formed at the junction is not easily observed, thereby improving the user's viewing effect; and,
  • the display substrate 100 displays a white screen, it can avoid that the colors of adjacent sub-pixels in the first display area 10 and the second display area 20 are the same, which causes the light of that color to be emitted at the junction of the two, and the area at the junction cannot The problem of displaying a white screen can improve the user experience.
  • the transition pixel unit includes one first sub-pixel as shown in FIG. 14 or multiple first sub-pixels.
  • the transition pixel unit includes multiple second sub-pixels in addition to the case shown in FIG. , Or only one second sub-pixel.
  • the multiple colors can also be cyan, magenta and yellow; and red, green, blue and white can also be used.
  • the types and numbers of colors included in the multiple colors are not limited in the embodiments of the present application, and can be specifically selected according to needs.
  • the first sub-pixel in the transition pixel unit is a sub-pixel multiplexed by the transition pixel unit and the first pixel unit during display.
  • the first sub-pixel and the second sub-pixel in the transition pixel unit can be controlled to turn on; when the first pixel unit is used for display, the transition pixel unit can be controlled to The first sub-pixels of the second group of colors in the first sub-pixel and the first pixel unit are turned on, so that the transition pixel unit and the first pixel unit multiplex the first sub-pixel during display.
  • first sub-pixel in the transition pixel unit and the first sub-pixel in the first display area having the second group of colors adjacent to the first sub-pixel form one or more first pixel units.
  • This configuration can increase the number of pixel units per unit area to a certain extent, which is beneficial to improve the display effect.
  • the first sub-pixel in the transition pixel unit may be a sub-pixel multiplexed by the transition pixel unit and the pixel unit in the first display area during display.
  • the first sub-pixel in the transition pixel unit is an isolated sub-pixel in the first display area, and the isolated sub-pixel and other first sub-pixels in the first display area cannot form a complete first pixel unit.
  • An embodiment of the present application also provides a display panel, which includes the above-mentioned display substrate and packaging structure.
  • the packaging structure includes a polarizer, and the polarizer covers at least the second display area.
  • the polarizer does not cover the first display area, and a photosensitive device that emits or collects light through the first display area may be disposed under the first display area.
  • the polarizer can dissipate the reflected light on the surface of the display panel and improve the user experience; the first display area is not provided with a polarizer, which can increase the light transmittance of the first display area and ensure the normal operation of the photosensitive device placed under the first display area .
  • the embodiment of the present application also provides a display device, which includes an equipment body and the above-mentioned display panel.
  • the device body has a device area, and the display panel covers the device body.
  • the device area is located below the first display area, and the device area is provided with a photosensitive device that transmits light through the first display area.
  • the photosensitive device may include a camera and/or a light sensor.
  • Devices other than photosensitive devices such as gyroscopes or earpieces, can also be arranged in the device area.
  • the device area may be a slotted area, and the first display area of the display panel may be arranged corresponding to the slotted area so that the photosensitive device can emit or collect light through the first display area.
  • the above-mentioned display device may be a digital device such as a mobile phone, a tablet, a palm computer, or an iPod.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance.
  • plurality refers to two or more, unless specifically defined otherwise.

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Abstract

一种显示基板(100)、显示面板及显示装置。显示基板(100)包括显示区(1)及至少部分包围显示区的边框区(2)，显示区(1)包括第一显示区(10)和第二显示区(20)，第一显示区(10)的透光率大于第二显示区(20)；显示区(1)内设有沿第一方向排布的多个像素组(30)，每一像素组(30)包括第一子像素组(31)和第二子像素组(32)，或仅包括第二子像素组(32)；第一子像素组(31)包括至少一个第一子像素(311)，第二子像素组(32)包括至少一个第二子像素(321)；同一像素组(30)中子像素的数量为多个时，多个子像素沿第二方向间隔排布；显示区(1)内设置驱动子像素的像素电路(50)；边框区(2)内设置具有两个以上输出端子的EM信号控制电路(40)，EM信号控制电路(40)的每一输出端子(41)与一个像素组(30)中至少部分子像素的像素电路(50)电连接。

Description

显示基板、显示面板及显示装置
相关申请的交叉引用
本申请要求于2019年3月29日提交中国专利局，申请号为201910250700.9，申请名称为“显示基板、显示面板及显示装置”的中国专利申请的优先权,在此将其全文引入作为参考。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示基板、显示面板及显示装置。
背景技术
随着电子设备的快速发展，用户对屏占比的要求越来越高，使得电子设备的全面屏显示受到业界越来越多的关注。传统的电子设备如手机、平板电脑等，由于需要集成诸如前置摄像头、听筒以及红外感应元件等，故而可通过在显示屏上开槽(Notch)，在开槽区域设置摄像头、听筒以及红外感应元件等，但开槽区域并不能用来显示画面。或者采用在屏幕上开孔的方式，对于实现摄像功能的电子设备来说，外界光线可通过屏幕上的开孔处进入位于屏幕下方的感光元件。但是这些电子设备均不是真正意义上的全面屏，并不能在整个屏幕的各个区域均进行显示，如在摄像头区域不能显示画面。
发明内容
根据本申请实施例的第一方面，提供了一种显示基板，所述显示基板包括显示区及至少部分包围所述显示区的边框区；所述显示区包括第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率；所述显示区内设有沿第一方向排布的由多个子像素构成的多个像素组，所述多个子像素包括一个或多个第一子像素，和一个或多个第二子像素；所述多个像素组中至少一个包括位于所述第一显示区的第一子像素组和位于所述第二显示区的第二子像素组，所述多个像素组中至少另一个仅包括位于所述第二显示区的第二子像素组；所述第一子像素组包括所述至少一个第一子像素；所述第二子像素组包括所述至少一个第二子像素；同一像素组中的所述子像素的数量为多个时，所述多个子像素沿第二方向间隔排布；
所述显示区内设置有用于驱动所述子像素的像素电路；所述边框区内设置有一个或多个EM信号控制电路，每一所述EM信号控制电路输出端子的数量为m，其中，m为大于2的整数；每一所述输出端子与一个所述像素组中的至少部分所述子像素的所述像素电路电连接。
在一个实施例中，所述第一子像素组包括两个所述第一子像素，每一所述第一子像素对 应一个所述像素电路；所述边框区包括位于所述显示区相对两侧的子边框区；两个所述子边框区沿第三方向延伸；两个所述子边框区内分别设置有与所述第一子像素组对应的EM信号控制电路；所述第一子像素组的每一个所述第一子像素对应的所述像素电路与距离相应的所述第一子像素较近的所述子边框区内的所述EM信号控制电路电连接。
本申请实施例还提了一种显示面板，所述显示面板包括上述的显示基板及封装结构；
所述封装结构包括偏光片，所述偏光片至少覆盖所述第二显示区；
所述偏光片未覆盖所述第一显示区。
本申请实施例还提了一种显示装置，包括：设备本体，所述设备本体具有器件区；
上述的显示面板，所述显示面板覆盖在所述设备本体上；
其中，所述器件区位于所述第一显示区下方，且所述器件区中设置有透过所述第一显示区发射或者采集光线的感光器件。
本申请实施例提供的显示基板、显示面板及显示装置，显示区包括第一显示区和第二显示区，第一显示区的透光率大于第二显示区的透光率，则可将感光器件设置在第一显示区下方，外部入射光线可通过第一显示区进入感光器件，在保证感光器件正常工作的同时实现全面屏显示。
设置在边框区中的每一EM信号控制电路的输出端子数量为m，m为大于2的整数，每一输出端子可与一个像素组中的至少部分子像素对应的像素电路电连接，即一个EM信号控制电路可控制两个以上的像素组中的子像素的像素电路，从而可减少边框区中EM信号控制电路的数量，因而可减小边框区的尺寸。在显示基板的尺寸一定时，可将显示区做得更大，有利于提升用户的使用体验。
附图说明
图1是本申请一实施例提供的显示基板的俯视图；
图2是图1所示的显示基板的子像素排布的一实施例的局部示意图；
图3是图1所示的显示基板中像素电路与EM信号控制电路一实施例的连接示意图；
图4是图1所示的显示基板中像素电路与EM信号控制电路又一实施例的连接示意图；
图5是图1所示的显示基板中像素电路与EM信号控制电路又一实施例的连接示意图；
图6是图1所示的显示基板中第一显示区10的第一像素及第一像素对应的像素电路的排布的一实施例的示意图；
图7是图1所示的显示基板中第一显示区10的第一像素及第一像素对应的像素电路的排布的又一实施例的示意图；
图8是图1所示的显示基板中第一显示区10的第一像素及第一像素对应的像素电路的排布的又一实施例的示意图；
图9是图1所示的显示基板的子像素排布的又一实施例的局部示意图；
图10是图1所示的显示基板中第一电极在衬底上的投影的一实施例的示意图；
图11是图1所示的显示基板中第一电极在衬底上的投影的又一实施例的示意图；
图12是图1所示的显示基板中第一电极在衬底上的投影的又一实施例的示意图；
图13是图1所示的显示基板中面电极与低电平电源信号线通过导电层搭接的一实施例的示意图；
图14是图1所示的显示基板中第一显示区的第一子像素与第二显示区的第二子像素排布的一实施例的局部示意图。
具体实施方式
这里将详细地对示例性实施例进行说明，其示例表示在附图中。下面的描述涉及附图时，除非另有表示，不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反，它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置的例子。
正如背景技术中所言，相关技术的电子设备的显示屏上设置有开槽区，将摄像头、听筒以及红外感应元件等感光器件设置在开槽区，外界光线通过开槽区进入感光器件。但是开槽区不能显示画面，不是真正意义上的全面屏。并且，用于驱动显示屏的驱动电路例如EM信号控制电路、扫描控制电路等设置在环绕显示区的边框区中，相关技术中电子设备的驱动电路比较复杂，导致边框区的宽度较大，在电子设备的尺寸一定时会使得显示区的面积较小，影响电子设备的美观及用户的使用体验。
下面结合附图，对本申请实施例中的显示基板、显示面板及显示装置进行详细说明。在不冲突的情况下，下述的实施例及实施方式中的特征可以相互补充或相互组合。
本申请实施例提供了一种显示基板。参见图1，显示基板100包括显示区1及至少部分包围显示区1的边框区2，显示区1包括第一显示区10和第二显示区20，第一显示区10的透光率大于第二显示区20的透光率。
参见图2，显示区1内设有沿第一方向排布的由多个子像素构成的多个像素组30，所述多个子像素包括一个或多个第一子像素311，和一个或多个第二子像素321。所述多个像素组30中至少一个包括位于第一显示区10的第一子像素组31和位于第二显示区20的第二子像素组32，所述每一多个像素组30中至少另一个仅包括位于第二显示区20的第二子像素组32。第一子像素组31包括至少一个所述第一子像素311，第二子像素组32包括至少一个所述第二子像素321。同一像素组30中的子像素(包括第一子像素311和第二子像素321，或者只包括第二子像素321)的数量为多个时，多个子像素沿第二方向间隔排布。第一子像素311沿第二方向的尺寸可以大于同一像素组30的第二子像素321沿第二方向的尺寸。第一子 像素311沿第一方向的尺寸可以基本等于同一像素组30的第二子像素321沿第一方向的尺寸。多个像素组30沿第一方向间隔排布。
参见图3至图5，显示区1内设置有用于驱动显示区1中各子像素的像素电路50，边框区2内设置有一个或多个EM信号控制电路40，每一EM信号控制电路40的输出端子数为m，其中m为大于2的整数。每一输出端子41与一个像素组30中的至少部分子像素的像素电路50电连接。
EM信号控制电路40用于给像素电路50提供发光信号，像素电路50接收EM信号控制电路40提供的发光信号后，控制其对应的子像素发光。其中，边框区2内设置的EM信号控制电路40可通过走线60与同一像素组30中的子像素连接。
本申请实施例提供的显示基板100，显示区1包括第一显示区10和第二显示区20，第一显示区10的透光率大于第二显示区20的透光率，则可将感光器件设置在第一显示区10下方，外部入射光线可通过第一显示区10进入感光器件，在保证感光器件正常工作的同时实现显示基板100的全面屏显示；设置在边框区2中的每一EM信号控制电路40的输出端子41数量为m，m为大于2的整数，每一输出端子41可与一个像素组30中的至少部分子像素对应的像素电路电连接，即一个EM信号控制电路40可控制两个以上(例如可以是三个、四个、五个等)的像素组中的子像素的像素电路，从而可减少边框区2中EM信号控制电路40的数量，因而可减小边框区2的尺寸。在显示基板100的尺寸一定时，可将显示区1做得更大，有利于提升用户的使用体验。
再次参见图3，边框区2可包括位于显示区1的相对两侧的两个子边框区21，两个子边框区21可沿第三方向延伸。EM信号控制电路40可设置在两个子边框区21中。其中，所述第三方向可以与第一方向相同，也可以是不同。
图3至图5中仅以第一显示区10中第一子像素311对应的像素电路50设置在第一显示区10中为例进行说明，在其他实施例中，第一显示区10中的第一子像素311对应的像素电路50可设置在第二显示区20中。
在一个实施例中，再次参见图1，第二显示区20包括第一区域201和邻接第一区域201与第一显示区10的第二区域202，第二区域202至少部分包围第一显示区10。在一实施例中，第一显示区10的一边与显示区1的一侧边缘重合，例如，与显示区1的顶部边缘重合，第二区域202包围第一显示区10的另外三个边。在另一实施例中，第一显示区10的设置在显示区1内部，第二区域202包围第一显示区10的四个边。显示区1的顶部可设置边框区，也可不设置边框区。参见图6至图8，第一子像素组31中第一子像素311对应的像素电路50可设置在第二区域202。第一子像素311与对应的像素电路50可通过导线70电连接。
如此设置可降低第一显示区10的结构复杂度，提高第一显示区10的透光率，并且从而降低外部入射光透过第一显示区10时产生的衍射。进一步地，第一子像素组31中每一第一 子像素311对应的像素电路50设置在第二区域202中邻近该子像素311的区域，以缩短连接第一子像素311与对应的像素电路50的导线。
在一实施例中，参见图6，第一子像素组31包括两个第一子像素311，每一第一子像素311对应一个像素电路50，每一第一子像素311对应的像素电路50设置在第二区域202的邻近该第一子像素311的区域中。
在另一实施例中，参见图7，第一子像素组31包括一个第一子像素311，该第一子像素311对应一个像素电路50，该第一子像素311对应的像素电路50设置在第二区域202位于该第一子像素311两侧的任一侧的区域中。
在又一实施例中，参见图8，第一子像素组31包括一个第一子像素311，该第一子像素311对应两个像素电路50，该第一子像素311对应的两个像素电路50分别设置在第二区域202的位于该第一子像素311两侧的区域中。
在一个实施例中，参见图2和图3，第一子像素组31包括两个第一子像素311。每一第一子像素311可对应一个像素电路50，两个子边框区21内分别设置有与该第一子像素组31对应的EM信号控制电路40，第一子像素组31的每一第一子像素311对应的像素电路50分别与距离该第一子像素311较近的子边框区21内的EM信号控制电路40电连接。图3中所示的位于左边的第一子像素311对应的像素电路50与设置在显示区1左侧的子边框区21中的EM信号控制电路40连接，位于右边的第一子像素311对应的像素电路50与显示区1右侧的子边框区21中的EM信号控制电路40连接。
如此设置，当第一子像素组31中的第一子像素311对应的像素电路50设置在第二显示区20的与第一子像素311相邻的区域时，第一子像素311靠近第二显示区20的端部可与对应的像素电路50电连接，二者之间的连接线较短。并且，第一子像素311对应的像素电路50可通过设置在第二显示区20中的走线与对应的EM信号控制电路40电连接，无需将走线引入第一显示区10中。当第一子像素组31中第一子像素311对应的像素电路50设置在该第一子像素311下方时，由于第一子像素311对应的像素电路50与该第一子像素311相邻的子边框区21内设置的EM信号控制电路40电连接，则第一子像素311对应的像素电路50与EM信号控制电路40之间的走线60较短。以上所述的第一子像素311对应像素电路50的两种设置方式均可降低第一显示区10中的线路的复杂度，进而提高第一显示区10的透光率，并降低外部入射光透过第一显示区10时产生的衍射。
进一步地，参见图2和图3，同一像素组30的第一子像素311和第二子像素321中，位于第一子像素311与距离所述第一子像素311较近的子边框区21之间的第二子像素321对应的像素电路50，以及所述第一子像素311对应的像素电路50，电连接至同一EM信号控制电路40的同一输出端子41。其中，与第一子像素311邻近的子边框区21指的是两个子边框区21中的与该第一子像素311距离较近的子边框区。如此设置，位于第一子像素311 与该第一子像素311邻近的子边框区21之间的第二子像素321对应的像素电路、以及该第一子像素311对应的像素电路可通过一根走线连接至对应的EM信号控制电路40的输出端子41，可减小走线的长度，有利于简化显示区1中的走线复杂度。
两个子边框区21内可分别设置有扫描控制电路，第一子像素组31的每一第一子像素311对应的像素电路50与位于距离所述第一子像素311较近的子边框区21内的扫描控制电路电连接。其中，扫描控制电路用于给像素电路提供扫描信号，扫描控制电路通过栅线与像素电路电连接。
如此设置，当第一子像素组31中的第一子像素311对应的像素电路50设置在第二显示区20的与所述第一子像素311距离较近的区域中时，第一子像素311的靠近第二区域202的端部可与对应的像素电路50电连接，二者之间的连接线较短；并且，第一子像素311对应的像素电路50可通过设置在第二显示区20中的栅线与对应的扫描控制电路电连接，无需将栅线引入第一显示区10中。当第一子像素组31中第一子像素311对应的像素电路50设置在该第一子像素311下方时，由于第一子像素311对应的像素电路50与该第一子像素311相邻的子边框区21内设置的扫描控制电路电连接，则第一子像素311对应的像素电路50与扫描控制电路之间的栅线较短。以上所述的第一子像素311对应的像素电路50的两种设置方式均可降低第一显示区10中栅线设置的复杂度，进而提高第一显示区10的透光率，并降低外部入射光透过第一显示区10时产生的衍射。
进一步地，同一像素组30中的第一子像素311和第二子像素321中，位于第一子像素311和距离所述第一子像素311较近的子边框区21之间的第二子像素321对应的像素电路50，以及所述第一子像素311对应的像素电路50，电连接至同一扫描控制电路。如此设置，位于第一子像素311和距离所述第一子像素311较近的子边框区21之间的第二子像素321对应的像素电路50、以及所述第一子像素311对应的像素电路50可通过一个栅线与对应的扫描控制电路电连接，可减小栅线的长度，有利于简化显示区1中的走线复杂度。
在另一个实施例中，参见图5，第一子像素组31包括一个第一子像素311，每一第一子像素对应一个像素电路50，两个子边框区21中的一个子边框区内设置有与第一子像素组31对应的EM信号控制电路40，第一子像素组31的第一子像素311对应的像素电路50与对应的EM信号控制电路的输出端子电连接。如此设置，只需在一个子边框区21内设置EM信号控制电路40，来驱动第一显示区10中的第一子像素对应的像素电路50，可简化子边框区21内EM信号控制电路的数量，有利于减小子边框区21的宽度。
进一步地，参见图5，同一像素组30中的第一子像素311对应的像素电路50和第二子像素321对应的像素电路50连接至同一EM信号控制电路40的同一输出端子。如此设置，同一像素组30中的第一子像素311对应的像素电路50和第二子像素321对应的像素电路50可通过一根走线连接至对应的EM信号控制电路40的输出端子41，可减小走线的复杂度。
在又一个实施例中，参见图8，第一子像素组31可包括一个第一子像素311，该第一子像素311对应两个像素电路50。两个子边框区21内分别设置有与该第一子像素组311组对应的EM信号控制电路40，第一子像素组31的第一子像素311对应的两个像素电路50与对应的两个EM信号控制电路40一一对应电连接。
如此设置，当第一子像素组31中的第一子像素311对应的两个像素电路50设置在第二显示区20的与第一子像素311相邻的区域中时，第一子像素311的两端部可与两个像素电路50一一对应电连接，二者之间的连接线较短；并且，第一子像素311对应的像素电路50可通过设置在第二显示区20中的走线60与对应的EM信号控制电路40电连接，无需将走线60引入第一显示区10中。当第一子像素组31中第一子像素311对应的两个像素电路50设置在该第一子像素311下方时，每一像素电路50可与其距离较近的子边框区21内设置的EM信号控制电路40电连接，可使第一子像素311对应的像素电路与EM信号控制电路40之间的走线60较短。以上所述的第一子像素311对应的像素电路50的两种设置方式均可降低第一显示区10中的线路的复杂度，进而提高第一显示区10的透光率，并降低外部入射光透过第一显示区10时产生的衍射。同时，第一子像素311对应两个像素电路50，可降低控制信号的延迟，有利于提升显示效果。
进一步地，参见图2和图3，同一像素组30中，位于第一显示区10与每一子边框区21之间的第二子像素321对应的像素电路50、以及该像素组30中的第一子像素311的距离相应子边框区21较近的像素电路50，这两类像素电路连接至相应子边框区21内的EM信号控制电路40的同一输出端子41。如此设置，通过同一根走线60，可将两类像素电路，即同一像素组30中第一子像素311对应的一个像素电路50，以及位于所述像素电路50与距离所述像素电路50较近的子边框区21之间的第二子像素321的对应的像素电路50，与EM信号控制电路40的同一输出端子电连接，从而可简化走线60的布置，简化制备显示基板100的工艺流程。
进一步地，两个子边框区21内可分别设置有扫描控制电路，位于第一显示区10与每一子边框区21之间的所有第二子像素321的对应的像素电路50、以及所述第一子像素311的距离所述子边框区21较近的像素电路50，通过一根栅线连接至该子边框区内的同一扫描控制电路。如此设置可简化栅线的布置，简化制备工艺。
其中，图2所示的显示基板100中，每一像素组30中的第一子像素311和第二子像素321在第一方向上的尺寸大致相同，在第一方向上，相邻的两个第二子像素组32之间不存在其他的第二子像素。但是显示基板100第一子像素311和第二子像素321的排布不限于此，也可以是图9中所示的情况。
参见图9，第一显示区10中第一子像素311的分布密度(也就是单位面积中的子像素数量)小于第二显示区20中第二子像素321的分布密度。同一像素组30中，第一子像素311 在第一方向上的尺寸大于第二子像素321在第一方向上的尺寸。第二显示区20还包括设置在相邻两个第二子像素组32之间的至少一个第三子像素组90，第三子像素组90包括至少一个第二子像素321，第三子像素组90包括多个第二子像素321时，多个第二子像素321沿第二方向被第一子像素组31间隔排布。
其中，图9所示的显示基板100中，在第一方向上，相邻两个第二子像素组32之间设置有一个第三子像素组90，在其他实施例中，相邻两个第二子像素组32之间设置有两个或两个以上沿第一方向排布的第三子像素组90。
在一实施例中，第三子像素组90的第二子像素321以及与该第三子像素组90相邻的第二子像素组32的第二子像素321中，位于子边框区21与第一显示区10之间的第二子像素组32的第二子像素321和第三子像素组90的第二子像素321，各个第二子像素321对应的像素电路50电连接至同一EM信号控制电路40的同一输出端子或同一EM信号控制电路40的不同输出端子。也即是，图9中所示的位于第一显示区10左侧的第三子像素组90中的第二子像素321对应的像素电路50、以及与该第三子像素组90相邻的第二子像素组32的位于第一显示区10左侧的第二子像素321对应的像素电路50，可连接至同一EM信号控制电路40的同一输出端子或者同一EM信号控制电路40的不同输出端子。其中，与第三子像素组90相邻的第二子像素组32可以是位于第三子像素组90上方的第二子像素组32，也可以是位于第三子像素组90下方的第二子像素组32。
如此设置，同一个EM信号控制电路40可同时驱动多个像素组中的子像素的像素电路50，以及与该像素组相邻的第三子像素组90，可进一步减少边框区中EM信号控制电路的数量，进而减小边框区的尺寸。
当然，第三子像素组90中的第二子像素321对应的像素电路、与该第三子像素组90相邻的第二子像素组32的第二子像素321对应的像素电路，也可连接至不同的EM信号控制电路40。
在一个实施例中，第二区域202内第二子像素321的分布密度大于第一显示区10内第一子像素的分布密度，且小于第一区域201内第二子像素321的分布密度。如此设置，显示基板100在显示时，第二区域202的亮度介于第一区域201与第一显示区10之间，可避免第一显示区10与第二区域202邻接时二者的亮度差异较大造成的分界线明显的问题，有利于提升用户的使用体验。
在其中一实施例中，第二区域202内相邻两个第二子像素321之间的间距小于第一显示区10内相邻两个第一子像素311之间的间距；和/或，第二区域202内的第二子像素321的尺寸小于第一显示区10内的第一子像素311的尺寸。如此设置可使得第二区域202中第二子像素321的分布密度大于第一显示区10中第一子像素311的分布密度。
在一个实施例中，每一第一子像素311及第二子像素321对应的像素电路可为包括3 个晶体管和1个电容的电路、或包括3个晶体管和2个电容的电路、或包括7个晶体管1个电容的电路、或包括7个晶体管2个电容的电路。
在一个实施例中，第二显示区20中的第二子像素321的排布方式可与第一显示区10中的第一子像素311的排布方式相同，从而使得第二显示区20和第一显示区10的显示效果更一致。
在一个实施例中，第一子像素组31中的第一子像素311包括第一电极、位于第一电极上的第一发光结构块及位于第一发光结构块上的第二电极，每一子像素对应的第一电极包括至少一个第一电极块。
在一个实施例中，参见图10至图12，一个第一子像素311对应的第一电极301包括两个或两个以上的第一电极块3011，该第一电极301还包括设置在相邻两个第一电极块3011之间的连接部3012，相邻的两个第一电极块3011通过对应的连接部3012电连接。
连接部3012与第一电极块3011设置在同一层时，连接部3012在平行于显示基板100的平面内垂直于其延伸方向上的尺寸大于3μm，且小于第一电极块3011的最大尺寸的二分之一。通过设置连接部3012在垂直于其延伸方向的尺寸大于3μm，可使得连接部3012的电阻较小；通过设置连接部3012的尺寸小于第一电极块3011的最大尺寸的二分之一，可使得连接部3012的设置对第一电极块3011的尺寸影响较小，避免连接部3012的尺寸较大导致第一电极块3011的尺寸减小，进一步导致第一显示区10的有效发光面积减小。
在一个实施例中，第一方向与第二方向垂直，第一方向为行方向或列方向。多个第一电极301可排列成一行多列、或一列多行、或两列多行、或两行多列、或多行多列。其中，图10至图12仅以第一方向为列方向，第二方向为行方向为例进行示意，在其他实施例中，第一方向也可以是行方向，第二方向为列方向。
在一个实施例中，同一第一子像素组31中的第一子像素311对应的第一电极块3011中，相邻的两个第一电极块3011在第二方向上错位排布。如此设置可进一步减弱外部入射的光线通过第一显示区10时产生的衍射效应。
进一步地，同一第一子像素组31中的第一子像素311对应的第一电极块3011中，间隔一个第一电极块3011设置的两个第一电极块3011在第二方向上的中轴线重合。如此设置，使得第一子像素组中的多个第一电极块3011的排布更规则，从而对应设置在多个第一电极块3011上方的第一发光结构块的排布更规则，进而制备发光结构块采用的掩模板的开口排布比较规则。并且，在蒸镀发光结构时，显示基板100的第一显示区和第二显示区中的第一发光结构块可采用同一掩膜板在同一蒸镀工艺中制作，由于掩膜板上的图形较均匀，也减少了张网褶皱。
在一个实施例中，显示基板100包括衬底，第一电极块3011设置在衬底上，第一电极块3011在衬底上的投影由一个或者多个第一图形单元组成。其中，第一图形单元可为圆形、 椭圆形、哑铃形、葫芦形或矩形。
图10中至图11中所示的每一第一子像素组包括两个第一电极301，每一第一电极301包括的第一电极块3011的数量相同；图12中所示的每一子像素组包括三个第一电极301，每一第一电极301包括的第一电极块3011的数量相同。图10中所示的每一第一电极块3011在衬底上的投影由一个第一图形单元组成，该第一图形单元为矩形；图11中所示的每一第一电极块3011在衬底上的投影由一个第一图形单元组成，该第一图形单元为葫芦形；图12所示的每一第一电极块3011在衬底上的投影由一个第一图形单元组成，该第一图形单元为圆形。优选的，第一图形单元为圆形、椭圆形、哑铃形或葫芦形，如此此设置，第一电极301在第一方向上的尺寸连续变化或者间断变化，则在第一方向上相邻的两个第一电极301在第一方向上的间距连续变化或者间断变化，从而相邻的两个第一电极301产生衍射的位置不同。不同位置处的衍射效应相互抵消，从而可以有效减弱衍射效应，进而确保第一显示区10下方设置的摄像头拍摄的图像具有较高的清晰度。
在一个实施例中，发光结构包括对应设置在每一第一电极块3011上的第一发光结构块，第一发光结构块在衬底上的投影由一个第二图形单元或者多个第二图形单元组成。其中，第二图形单元包括圆形、椭圆形、哑铃形、葫芦形或矩形。第一图形单元与第二图形单元可相同或者不同。在一个实施例中，第一图形单元与第二图形单元不同，以进一步减弱光线通过第一显示区10时产生的衍射效应。
在一个实施例中，第一显示区10可以是透明显示区，第一显示区10下方可设置摄像头等感光器件。第一显示区10的透光率较大，例如可大于70％，以满足感光器件的采光需求。
为了提高第一显示区10的光透过率，第一显示区10中的各层材料均可采用透明材料。如此可提高第一显示区10下方设置的感光器件例如摄像头的采光效果。
在一个实施例中，位于第一显示区10中的第一电极和/或第二电极的材料均为透明材料。进一步地，制备位于第一显示区10中的第一电极和/或第二电极采用的透明材料的透光率大于或等于70％。在一个实施例中，该透明材料的透光率大于或等于90％，例如该透明材料的透光率可以为90％、95％等。如此设置可使得第一显示区10的透光率较大，进而使得第一显示区10的透光率满足其下方设置的感光器件的采光需求。
进一步地，制备位于第一显示区10中的第一电极和/或第二电极采用的透明材料包括氧化铟锡、氧化铟锌、掺杂银的氧化铟锡或者掺杂银的氧化铟锌中的至少一种。在一个实施例中，制备位于第一显示区10中的第一电极和/或第二电极采用的透明材料采用掺杂银的氧化铟锡或者掺杂银的氧化铟锌，以在保证第一显示区10的高透光率的基础上，减小第一电极和/或第二电极的电阻。
在一个实施例中，第二显示区20中的第二子像素321包括第三电极、位于第三电极上的第二发光结构块及位于第二发光结构块上的第四电极。参见图13，第一显示区10 中各第一子像素的第二电极与第二显示区20中各第二子像素的第四电极为连成一片的面电极81。
参见图13，边框区2内设置有低电平电源信号线23，低电平电源信号线23环绕显示区设置，低电平电源信号线23与显示区1中的面电极81电连接，用于给显示区1中的第一子像素和第二子像素提供电源信号。
显示基板100还设置有导电层82，第一显示区10与边框区2邻接，低电平电源信号线23与面电极81通过导电层82桥接，从而实现低电平电源信号线23与面电极81的电连接。导电层82邻接第一显示区10的区域821的材料为透明导电材料。或者，边框区邻接第一显示区的区域内未设置低电平电源信号线。
如此设置，由于透明导电材料的透光性较好，邻接第一显示区10的区域821的材料为透明材料时，相对于采用金属材质，可避免与导电层82较近的第一显示区10的区域821反光而导致第一显示区10的显示效果不好、以及导致设置在第一显示区10下方的摄像头成像效果差；边框区2靠近第一显示区10的区域内未设置低电平电源信号线23时，则该区域内也无需设置用以桥接低电平电源信号线23与面电极81的导电层，从而外部光线入射时该区域不会发生反光，可避免与导电层82较近的第一显示区10的区域821反光而导致第一显示区10的显示效果不好、以及导致设置在第一显示区10下方的摄像头成像效果差。
进一步地，导电层的材料可包括氧化铟锡、氧化铟锌、掺杂银的氧化铟锡、掺杂银的氧化铟锌、氧化锌、掺铝的氧化锌及掺镓的氧化锌中的至少一种。
在一个实施例中，参见图14，第一显示区10内设置的第一子像素311的颜色的数量为n，第二显示区20内设置的第二子像素321的颜色的数量为n，其中n为不小于3的自然数。第一显示区10内第一子像素311的分布密度小于第二显示区20内第二子像素321的分布密度。
其中，第一显示区10中的与第二显示区20相邻的第一组颜色的第一子像素311及第二显示区20中与该第一组颜色的第一子像素311相邻的第二组颜色的第二子像素321组成过渡像素单元13。第一组颜色中包括的颜色的数量m1∈[1,n-1]，第二组颜色中包括的颜色的数量m2＝n-m1，第一组颜色与第二组颜色中的颜色种类均不同。
在一个实施例中，第一组颜色可以包括一种颜色，也可以包含多种颜色，第二组颜色可以包括一种颜色，也可以包含多种颜色。
图13中所示的显示基板的结果中，第一组颜色包括一种颜色，且颜色是绿色，第二组颜色包括两种颜色，且颜色为红色和蓝色。第一显示区域10中的与第二显示区域20相邻的第一组颜色的第一子像素311，和第二显示区域20中第二组颜色的第二子像素321组成过渡像素单元13，从而使得过渡像素单元13中的第一子像素311和第二子像素321可以作为一个像素单元发光，在这种情况，当控制过渡像素单元13发光时，过渡像素单元13中的第一 子像素311和第二子像素321可以一起发光，从而提高第一显示区10和第二显示区20交界处的亮度，使得交界处所形成的黑线不易被观察到，从而提高用户的观看效果；并且，显示基板100显示白色画面时，可避免第一显示区10和第二显示区20中相邻子像素的颜色相同而导致二者交界处发出该颜色的光，而出现二者交界处的区域不能显示白色画面的问题，可提高用户的使用体验。
基于与图14所示实施例不同的像素排布方式，第一显示区10中与第二显示区20相邻的第一组颜色的第一子像素，可以不只一种颜色的第一子像素，因此过渡像素单元除了如图14所示的情况包含一个第一子像素，也可以包含多个第一子像素，当然，过渡像素单元除了如图14所示的情况包含多个第二子像素，也可以只包含一个第二子像素。需要说明的是，多种颜色除了可以如上述为红色，绿色和蓝色；也可以是青色，品红和黄色；还可以红色，绿色，蓝色和白色。对于多种颜色所包含的颜色类型和数量，本申请实施例不作限制，具体可以根据需要选择。
过渡像素单元中的第一子像素为过渡像素单元与第一像素单元在显示时复用的子像素。在一个实施例中，在通过过渡像素单元进行显示时，可以控制过渡像素单元中的第一子像素与第二子像素开启；在通过第一像素单元进行显示时，可以控制过渡像素单元中的第一子像素与第一像素单元中的第二组颜色的第一子像素开启，从而实现过渡像素单元与第一像素单元在显示时复用第一子像素。
进一步地，过渡像素单元中的第一子像素和第一显示区中具有该第一子像素相邻的第二组颜色的第一子像素组成一个或多个第一像素单元。如此设置可以在一定程度上提高单位面积内像素单元的数量，有利于提高显示效果。
其中，过渡像素单元中的第一子像素可为过渡像素单元与第一显示区中的像素单元在显示时复用的子像素。或者，过渡像素单元中的第一子像素在第一显示区中为孤立子像素，孤立子像素与第一显示区中的其他第一子像素无法组成一个完整的第一像素单元。
本申请实施例还提供了一种显示面板，显示面板包括上述的显示基板及封装结构。
在一个实施例中，封装结构包括偏光片，偏光片至少覆盖第二显示区。在其中一实施例中，偏光片未覆盖第一显示区，第一显示区下方可设置透过第一显示区发射或者采集光线的感光器件。偏光片可消散显示面板表面的反射光，改善用户的使用体验；第一显示区不设置偏光片，可提高第一显示区的透光率，保证第一显示区下方设置的感光器件的正常工作。
本申请实施例还提供了一种显示装置，显示装置包括设备本体及上述的显示面板。设备本体具有器件区，显示面板覆盖在设备本体上。其中，器件区位于第一显示区下方，且器件区中设置有透过第一显示区进行光线采集的感光器件。
其中，感光器件可包括摄像头和/或光线感应器。器件区中还可设置除感光器件的其他器件，例如陀螺仪或听筒等器件。器件区可以是开槽区，显示面板的第一显示区可对应于开 槽区贴合设置，以使得感光器件能够透过该第一显示区进行发射或者采集光线。
上述显示装置可以为手机、平板、掌上电脑、ipod等数码设备。
需要指出的是，在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间唯一的层，或还可以存在一个以上的中间层或元件。相同的参考标记指示相同的元件。
在本发明中，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上，除非另有明确的限定。
本领域技术人员在考虑说明书及实施这里公开的方案后，将容易想到本发明的其它实施方案。本发明旨在涵盖本发明的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本发明的一般性原理并包括本发明未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本发明的真正范围由下面的权利要求指出。
应当理解的是，本发明并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本发明的范围仅由所附的权利要求来限制。

Claims (20)

  1. 一种显示基板，包括显示区及至少部分包围所述显示区的边框区；所述显示区包括第一显示区和第二显示区，所述第一显示区的透光率大于所述第二显示区的透光率；
    所述显示区内设有沿第一方向排布的由多个子像素构成的多个像素组，所述多个子像素包括一个或多个第一子像素和一个或多个第二子像素；
    所述多个像素组中至少一个包括位于所述第一显示区的一第一子像素组和位于所述第二显示区的一第二子像素组，所述多个像素组中至少另一个仅包括位于所述第二显示区的第二子像素组；
    所述第一子像素组包括所述至少一个第一子像素；所述第二子像素组包括所述至少一个第二子像素；同一像素组中的所述子像素的数量为多个时，所述多个子像素沿第二方向间隔排布；
    所述显示区内设置有用于驱动所述子像素的像素电路；所述边框区内设置有一个或多个EM信号控制电路，每一所述EM信号控制电路输出端子的数量为m，其中，m为大于2的整数；每一所述输出端子与一个所述像素组中的至少部分所述子像素的所述像素电路电连接。
  2. 根据权利要求1所述的显示基板，其中，所述第一子像素组包括两个所述第一子像素，每一所述第一子像素对应一个所述像素电路；
    所述边框区包括位于所述显示区相对两侧的子边框区；两个所述子边框区沿第三方向延伸；两个所述子边框区内分别设置有与所述第一子像素组对应的EM信号控制电路；所述第一子像素组的每一个所述第一子像素对应的所述像素电路与距离相应的所述第一子像素较近的所述子边框区内的所述EM信号控制电路电连接。
  3. 根据权利要求2所述的显示基板，其中，同一所述像素组的所述第一子像素和所述第二子像素中，位于所述第一子像素与距离所述第一子像素较近的所述子边框区之间的所述第二子像素对应的所述像素电路、以及相应的所述第一子像素对应的所述像素电路电连接至同一所述EM信号控制电路的同一输出端子。
  4. 根据权利要求1所述的显示基板，其中，两个所述子边框区内分别设置有扫描控制电路，所述第一子像素组的每一所述第一子像素对应的所述像素电路分别与距离相应所述第一子像素较近的所述子边框区内的所述扫描控制电路电连接；
    同一所述像素组的所述第一子像素和所述第二子像素中，位于所述第一子像素和距离所述第一子像素较近的所述子边框区之间的所述第二子像素对应的所述像素电路、以及相应的所述第一子像素对应的所述像素电路电连接至同一所述所述扫描控制电路。
  5. 根据权利要求1所述的显示基板，其中，所述第一子像素组包括一个所述第一子像素，每一所述第一子像素对应一个所述像素电路；
    所述边框区包括位于所述显示区相对两侧的子边框区，两个所述子边框区沿第三方向延伸，其中一个所述子边框区内设置有与所述第一子像素组对应的所述EM信号控制电路；
    所述第一子像素组的所述第一子像素的所述像素电路与对应的所述EM信号控制电路的输出端子电连接。
  6. 根据权利要求5所述的显示基板，其中，同一所述像素组中的所述第一子像素对应的所述像素电路和所述第二子像素对应的所述像素电路连接至同一所述EM信号控制电路的同一输出端子。
  7. 根据权利要求1所述的显示基板，其中，所述第一子像素组包括一个所述第一子像素，所述第一子像素对应两个所述像素电路；
    所述边框区包括位于所述显示区相对两侧的子边框区；两个所述子边框区沿第三方向延伸；两个所述子边框区内分别设置有与所述第一子像素组对应的所述EM信号控制电路；所述第一子像素组的所述第一子像素的两个所述像素电路分别与对应的两个所述EM信号控制电路一一对应电连接；
    同一所述像素组中，位于所述第一显示区与每一所述子边框区之间的所述第二子像素对应的所述像素电路、以及所述第一子像素的距离所述子边框区较近的所述像素电路连接至相应所述子边框区内的所述EM信号控制电路的同一输出端子。
  8. 根据权利要求1所述的显示基板，其中，所述第二显示区包括第一区域和邻接所述第一区域与所述第一显示区的第二区域，所述第二区域至少部分包围所述第一显示区，所述第一子像素组中的所述第一子像素对应的所述像素电路设置在所述第二区域。
  9. 根据权利要求8所述的显示基板，其中，所述第一子像素组包括两个所述第一子像素；每一所述第一子像素对应一个所述像素电路，每一所述第一子像素对应的所述像素电路设置在所述第二区域的距离所述第一子像素更近的区域中。
  10. 根据权利要求8所述的显示基板，其中，所述第一子像素组包括一个所述第一子像素，所述第一子像素对应一个所述像素电路；所述第一子像素组的所述第一子像素对应的所述像素电路设置在所述第二区域位于所述第一子像素的两侧的任一侧区域中。
  11. 根据权利要求8所述的显示基板，其中，所述第一子像素组包括一个所述第一子像素，所述第一子像素对应两个所述像素电路；所述第一子像素对应的两个所述像素电路分别设置在所述第二区域位于所述第一子像素两侧的区域中；
    所述第二区域内所述第二子像素的分布密度大于所述第一显示区内所述第一子像素的 分布密度，且小于所述第一区域内所述第二子像素的分布密度。
  12. 根据权利要求1所述的显示基板，其中，所述第一显示区中所述第一子像素的分布密度小于所述第二显示区中所述第二子像素的分布密度；
    同一所述像素组中，在所述第一方向上所述第一子像素在所述第一方向上的尺寸大于所述第二子像素在所述第一方向上的尺寸；所述第二显示区还包括设置在相邻两个第二子像素组之间的至少一个第三子像素组，所述第三子像素组包括至少一个第二子像素，第三子像素组包括多个第二子像素时，多个第二子像素沿所述第二方向被所述第一子像素组间隔成两部分排布。
  13. 根据权利要求12所述的显示基板，其中所述边框区包括位于所述显示区相对两侧的子边框区；两个所述子边框区沿第三方向延伸；所述第三子像素组的所述第二子像素以及与所述第三子像素组相邻的所述第二子像素组的所述第二子像素中，位于所述子边框区与所述第一显示区之间的所述第二子像素组的所述第二子像素以及所述第三子像素组的所述第二子像素对应的所述像素电路电连接至同一所述EM信号控制电路的同一输出端子或同一所述EM信号控制电路的不同输出端子。
  14. 根据权利要求1所述的显示基板，其中，所述第一子像素包括第一电极、位于所述第一电极上的第一发光结构块、以及位于所述第一发光结构块上的第二电极；
    每一所述第一子像素的所述第一电极包括两个或两个以上的第一电极块和设置在相邻两个所述第一电极块之间的连接部，相邻的两个所述第一电极块通过对应的所述连接部电连接；同一所述第一子像素组中的所述第一子像素对应的所述第一电极块中，相邻的两个所述第一电极块在所述第二方向上错位排布，所述第二方向与所述第一方向垂直。
  15. 根据权利要求14所述的显示基板，其中所述显示基板包括衬底，所述第一电极设置在所述衬底上；所述第一电极在所述衬底上的投影由一个或者多个第一图形单元组成；所述第一图形单元包括圆形、椭圆形、哑铃形、葫芦形或矩形；
    所述第一发光结构块在所述衬底上的投影由一个或者多个第二图形单元组成，所述第二图形单元与所述第一图形单元相同或不同；
    所述第一电极和/或所述第二电极为透明材质；所述透明材质的透光率大于或等于70％。
  16. 根据权利要求1所述的显示基板，其中，所述边框区还设置有低电平电源信号线；所述第一子像素组中的所述第一子像素包括第一电极、位于所述第一电极上的第一发光结构块、以及位于所述第一发光结构块上的第二电极；
    所述第二像素组中的所述第二子像素包括第三电极、位于所述第三电极上的第二发光结构块、以及位于所述第二发光结构块上的第四电极；所述第一显示区中的所述第二电极及所 述第二显示区中的所述第四电极连接成面电极；
    所述第一显示区与所述边框区邻接；所述低电平电源信号线围绕至少部分所述显示区设置；所述低电平电源信号线与所述面电极通过导电层桥接；所述导电层邻接所述第一显示区的部分的材料为透明导电材料，或者，所述边框区邻接所述第一显示区的区域内未设置所述低电平电源信号线。
  17. 根据权利要求1所述的显示基板，其中所述第一显示区内的所述第一子像素的分布密度小于所述第二显示区内的所述第二子像素的分布密度；
    所述第一显示区内所述第一子像素的颜色的数量为n，所述第二显示区内所述第二子像素的颜色的数量为n，其中n为不小于3的自然数；
    其中，所述第一显示区中的与所述第二显示区相邻的具有第一组颜色的第一子像素、及所述第二显示区中与具有所述第一组颜色的所述第一子像素相邻的具有第二组颜色的第二子像素组成过渡像素单元；
    所述第一组颜色的颜色的数量m1∈[1,n-1]，所述第二组颜色的颜色数量m2＝n-m1；所述第一组颜色与所述第二组颜色中的颜色种类均不同。
  18. 根据权利要求17所述的显示基板，其中，所述过渡像素单元中的所述第一子像素和所述第一显示区中与所述第一子像素相邻的具有所述第二组颜色的第一子像素，组成一个或多个第一像素单元；
    其中，所述过渡像素单元中的所述第一子像素为所述过渡像素单元与所述第一显示区中的所述第一像素单元在显示时复用的子像素；或者，
    所述过渡像素单元中的所述第一子像素在所述第一显示区中为孤立子像素；所述孤立子像素与所述第一显示区中的其他第一子像素无法组成一个完整的所述第一像素单元。
  19. 一种显示面板，包括权利要求1所述的显示基板及封装结构；所述封装结构包括偏光片，所述偏光片至少覆盖所述第二显示区，所述偏光片未覆盖所述第一显示区。
  20. 一种显示装置，包括：设备本体，所述设备本体具有器件区；和
    如权利要求19所述的显示面板，所述显示面板覆盖在所述设备本体上；
    其中，所述器件区位于所述第一显示区下方，且所述器件区中设置有透过所述第一显示区发射或者采集光线的感光器件。
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