WO2022134097A1 - 显示面板、显示装置 - Google Patents

显示面板、显示装置 Download PDF

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Publication number
WO2022134097A1
WO2022134097A1 PCT/CN2020/139687 CN2020139687W WO2022134097A1 WO 2022134097 A1 WO2022134097 A1 WO 2022134097A1 CN 2020139687 W CN2020139687 W CN 2020139687W WO 2022134097 A1 WO2022134097 A1 WO 2022134097A1
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WO
WIPO (PCT)
Prior art keywords
sub
row
pixel driving
light
equal
Prior art date
Application number
PCT/CN2020/139687
Other languages
English (en)
French (fr)
Inventor
孙阔
唐国强
黄炜赟
石领
庞暄
冉启福
邬奇洋
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司, 成都京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2020/139687 priority Critical patent/WO2022134097A1/zh
Priority to CN202080003697.1A priority patent/CN114981976A/zh
Priority to US17/614,699 priority patent/US20230025386A1/en
Publication of WO2022134097A1 publication Critical patent/WO2022134097A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present disclosure relates to the field of display technology, and in particular, to a display panel and a display device.
  • the under-screen camera technology is to set a light-transmitting area on the display panel, and set the camera facing the light-transmitting area to achieve full-screen display.
  • it is difficult to achieve normal display in the light-transmitting area while achieving greater light transmittance.
  • a display panel includes a first display area, the first display area includes a first external area and a first compressed area, the first compressed area is located in the One side of the first external area in a first direction, wherein the first direction is parallel to the data lines in the display panel, and the display panel further includes: a plurality of first light-emitting units, a plurality of first In the pixel driving circuit, the number of the first light-emitting unit and the first pixel driving circuit is the same.
  • a plurality of the first light-emitting units are arrayed in the first display area along a row-column direction, wherein the column direction is parallel to the first direction; a plurality of the first pixel driving circuits are arrayed along the row-column direction in the first display area In the first compression area, at least part of the first pixel driving circuit is used to provide driving current to the first light-emitting unit located in the first external area; wherein, the number of rows of the first pixel driving circuit is equal to the number of rows of the first pixel driving circuit.
  • the number of rows of the first light-emitting unit and the number of columns of the first pixel driving circuit are equal to the number of columns of the first light-emitting unit.
  • the first display area includes a plurality of first column extension areas distributed along a row direction, the first column extension areas extend along a column direction, and the first column
  • the number of columns in the extension region is the same as the number of columns of the first light-emitting units; wherein, each of the first column-direction extension regions is correspondingly provided with a column of the first light-emitting units and a column of the first pixel driving circuits .
  • the plurality of first light-emitting units include: first sub-light-emitting units in N1 rows and M columns, and second sub-light-emitting units in N2 rows and M columns, the first sub-light-emitting units are located in the The first external area, wherein the first sub-light-emitting unit in row X+1 is located on one side of the first sub-light-emitting unit in row X in the first direction, and X is greater than or equal to 1 and less than or equal to N1-1 a positive integer; the second sub-light-emitting unit is located in the first compression area, wherein the second sub-light-emitting unit in the X+1th row is located on one side of the second sub-light-emitting unit in the Xth row in the first direction, Wherein, X is a positive integer greater than or equal to 1 and less than or equal to N2-1.
  • the first pixel driving circuit includes: a first sub-pixel driving circuit in N1 rows and M columns, a second sub-pixel driving circuit in N2 rows and M columns, and at least part of the first sub-pixel driving circuit is used to emit light to the first sub-pixel
  • the unit provides a driving current, wherein the first sub-pixel driving circuit in row X+1 is located on one side of the first sub-pixel driving circuit in row X in the first direction, wherein X is greater than or equal to 1 and less than or equal to N1 A positive integer of -1.
  • the second sub-pixel driving circuit is used to provide a driving current to the second sub-light-emitting unit, wherein the second sub-pixel driving circuit in the X+1th row is located in the X-th row.
  • the second sub-pixel driving circuit is in the first sub-pixel driving circuit.
  • X is a positive integer greater than or equal to 1 and less than or equal to N2-1; wherein, N1 is a positive integer greater than or equal to 1, and M is a positive integer greater than or equal to 1.
  • the first sub-pixel driving circuit in row X is configured to provide a driving current to the first sub-light-emitting unit in row X, which is located in the same first column direction extension region, where X is greater than or equal to 1 and a positive integer less than or equal to N1;
  • the second sub-pixel drive circuit in row X is used to provide driving current to the second sub-light-emitting unit in row X, which is located in the same first column direction extension region, where X is greater than or equal to 1 and A positive integer less than or equal to N2.
  • the first external area includes a first light-transmitting area and a first sub-display area, and the first light-transmitting area and the first sub-display area are distributed along a row direction
  • the The display panel further includes a plurality of second pixel driving circuits, the plurality of second pixel driving circuits are located in the first sub-display area, and the plurality of second pixel driving circuits include N1 rows and M1 columns of second pixels distributed along the row and column direction.
  • the driving circuit, the second pixel driving circuit in the X+1th row is located on the side of the Xth row of the second pixel driving circuit in the first direction, wherein X is a positive integer greater than or equal to 1 and less than or equal to N1-1, M1 is equal to the number of columns of the first sub-light-emitting units in the first sub-display area; each first column-direction extension area located in the first sub-display area is provided with a corresponding column of the second pixel driving circuits; in the same In the first column extension area, the second pixel driving circuit in the Xth row is used to provide a driving current to the first sub-light-emitting unit in the Xth row in the first sub-display area, where X is greater than or equal to 1 A positive integer less than or equal to N1.
  • the first sub-pixel driving circuit in row X is configured to provide a driving current to the first sub-light-emitting unit in row X in the light-transmitting region, where X is greater than or equal to 1 and A positive integer less than or equal to N1.
  • the first sub-display area is located on one side or both sides of the light-transmitting area in the row direction.
  • the second pixel driving circuit in row X and the first sub-pixel driving circuit in row X share the same gate driving signal.
  • the second sub-pixel driving circuit in any row is located on one side of the first sub-pixel driving circuit in any row in the first direction.
  • the plurality of first sub-pixel driving circuits include two adjacent rows of the first sub-pixel driving circuits, and at least two adjacent rows of the first sub-pixel driving circuits are disposed between the two adjacent rows of the first sub-pixel driving circuits. a row of the second sub-pixel driving circuits.
  • the same number of rows of the second sub-pixel driving circuits are disposed between the first sub-pixel driving circuits in each adjacent row.
  • the display panel further includes a normal display area, the normal display area is located on a side of the first compression area away from the first external area, and the display panel further includes A third pixel driving circuit, the third pixel driving circuit is located in the normal display area, and the size of the third pixel driving circuit in the column direction is larger than the size of the first pixel driving circuit in the column direction.
  • the pixel density of the normal display area is equal to the pixel density of the first display area.
  • the ratio of the dimension of the first external area in the column direction to the dimension of the first compressed area in the column direction is 1:12-1:8.
  • the display panel further includes a second display area, the second display area includes a second external area and a second compression area, and the second external area is located in the first external area.
  • An external area is located on a side away from the first compressed area, the second compressed area is located on a side of the second external area away from the first external area, and the display panel further includes: a plurality of A fourth light-emitting unit and a plurality of fourth pixel driving circuits, the number of the fourth light-emitting unit and the fourth pixel driving circuit is the same.
  • a plurality of the fourth light-emitting units are arrayed in the second display area along the row and column directions; a plurality of the fourth pixel driving circuits are arrayed in the second compression area along the row and column directions, at least part of the fourth pixels
  • the driving circuit is configured to provide driving current to the fourth light-emitting unit located in the second external area; wherein, the number of rows of the fourth pixel driving circuit is equal to the number of rows of the fourth light-emitting unit, and the fourth pixel The number of columns of the driving circuit is equal to the number of columns of the fourth light emitting unit.
  • the second display area includes a plurality of second column-direction extension areas distributed along the row direction, and the second column-direction extension areas extend along the column direction, and the second column direction extension area
  • the number of columns of the extension area, the fourth light-emitting unit, and the first light-emitting unit is the same, and the second column-direction extension area is directly opposite to the first column-direction extension area in the column direction; wherein, each A column of the fourth light-emitting units and a column of the fourth pixel driving circuits are correspondingly disposed in the second column-direction extension region.
  • the plurality of fourth light-emitting units include: third sub-light-emitting units in N3 rows and M columns, and fourth sub-light-emitting units in N4 rows and M columns.
  • the third sub-light-emitting unit is located in the second external area, wherein the third sub-light-emitting unit in the X+1th row is located at one side of the third sub-light-emitting unit in the Xth row in the second direction, and the The second direction is opposite to the first direction, X is a positive integer greater than or equal to 1 and less than or equal to N3-1;
  • the fourth sub-light-emitting unit is located in the second compression area, wherein the fourth sub-light-emitting unit in the X+1th row
  • the sub-light-emitting unit is located at one side of the fourth sub-light-emitting unit in the Xth row in the second direction, where X is a positive integer greater than or equal to 1 and less than or equal to N4-1.
  • the fourth pixel driving circuit includes a third sub-pixel driving circuit in N3 rows and M columns, and a fourth sub-pixel driving circuit in N4 rows and M columns.
  • Provide a drive current wherein the third sub-pixel drive circuit in row X+1 is located on one side of the third sub-pixel drive circuit in row X in the second direction, wherein X is greater than or equal to 1 and less than or equal to N3- A positive integer of 1;
  • the fourth sub-pixel driving circuit is used to provide a driving current to the fourth sub-light-emitting unit, wherein the fourth sub-pixel driving circuit in row X+1 is located in the fourth sub-pixel driving circuit in row X
  • X is a positive integer greater than or equal to 1 and less than or equal to N4-1; wherein, N3 is a positive integer greater than or equal to 1.
  • the driving circuit for the third sub-pixel in row X is configured to provide a driving current to the third sub-light-emitting unit in row X which is located in the same second column direction extension region, where X is greater than or equal to 1 and a positive integer less than or equal to N3;
  • the fourth sub-pixel drive circuit in row X is used to provide drive current to the fourth sub-light-emitting unit in row X, which is located in the same second column extension region, where X is greater than or equal to 1 and A positive integer less than or equal to N4.
  • the second external area includes a second light-transmitting area and a second sub-display area, and the second light-transmitting area and the second sub-display area are distributed along a row direction
  • the The display panel further includes a plurality of fifth pixel driving circuits, the fifth pixel driving circuits are located in the second sub-display area, and the plurality of the fifth pixel driving circuits include N3 rows and M2 columns of fifth pixel driving circuits distributed along the row and column directions.
  • the fifth pixel driving circuit in row X+1 is located on the side of the fifth pixel driving circuit in row X in the second direction, wherein X is a positive integer greater than or equal to 1 and less than or equal to N3-1, and M2 is equal to the number of columns of third sub-light-emitting units in the second sub-display area; a row of the fifth pixel driving circuit is correspondingly disposed in each column of the second column-direction extension area of the second sub-display area;
  • the fifth pixel driving circuit in row X is configured to provide a driving current to the third sub-light-emitting unit in row X in the second sub-display region, where X is greater than A positive integer equal to 1 and less than or equal to N3; in the same second column extension region, the third sub-pixel driving circuit in row X is used to emit light to the third sub-pixel in row X located in the second light-transmitting region
  • the unit provides a drive current, wherein X is a positive integer greater than or equal to 1 and less than or equal to N3.
  • the second sub-display area is located on one side or both sides of the light-transmitting area in the row direction.
  • the second light-transmitting area and the first light-transmitting area are disposed opposite to each other in a column direction.
  • the fifth pixel driving circuit in row X and the third sub-pixel driving circuit in row X share the same gate driving signal, and X is a positive integer greater than or equal to 1 and less than or equal to N3.
  • the fourth sub-pixel driving circuit in any row is located on one side of the third sub-pixel driving circuit in any row in the second direction.
  • the plurality of third sub-pixel driving circuits include two adjacent rows of third sub-pixel driving circuits, and at least two adjacent rows of third sub-pixel driving circuits are disposed between the two adjacent rows of third sub-pixel driving circuits. a row of the fourth sub-pixel driving circuits.
  • the same number of rows of the fourth sub-pixel driving circuits are disposed between the third sub-pixel driving circuits in each adjacent row.
  • a display device comprising: the above-mentioned display panel and a camera, at least a part of the camera is facing a first external area of the display panel.
  • FIG. 1 is a schematic structural diagram of a conventional display panel in the related art
  • FIG. 2 is a schematic structural diagram of another display panel in the related art
  • FIG. 3 is a schematic structural diagram of an exemplary embodiment of a display panel of the present disclosure
  • FIG. 4 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 5 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 6 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 7 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 8 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 9 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 10 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 11 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 12 is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • FIG. 13 is a schematic structural diagram of a display device of the present disclosure.
  • Example embodiments will now be described more fully with reference to the accompanying drawings.
  • Example embodiments can be embodied in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art.
  • the same reference numerals in the drawings denote the same or similar structures, and thus their detailed descriptions will be omitted.
  • the conventional display panel includes a pixel driving circuit 01 and a light-emitting unit 02, and the pixel driving circuit 01 and the light-emitting unit 02 are arranged in one-to-one correspondence, and the corresponding pixel driving circuit and at least partially overlap with the area where the light-emitting unit is located.
  • the display panel also includes a pixel driving circuit 01 and a light-emitting unit 02 .
  • the display panel compresses the size of the plurality of pixel driving circuits 01 in the row direction, so that an external area 03 where only the light-emitting units 02 are arranged is formed on the display panel. Since there is no pixel driving circuit provided in the external area 03, the external area 03 has a relatively high transmittance, and a camera can be correspondingly installed at the position of the external area 03.
  • the external area 03 needs to have a larger size in the row direction, so it is necessary to compress more pixel driving circuits or increase the compression ratio of the pixel driving circuits.
  • All of the above settings will increase the complexity of the display panel structure and the difficulty of the manufacturing process.
  • forming an external area by compressing the pixel driving circuit in the row direction is not conducive to the layout design of the pixel driving circuit.
  • the present exemplary embodiment provides a display panel, as shown in FIG. 3 , which is a schematic structural diagram of an exemplary embodiment of the display panel of the present disclosure.
  • the display panel may include a first display area 1, the first display area 1 may include a first external area 11 and a first compressed area 12, and the first compressed area 12 may be located in the first external area 11 One side in the first direction Y, wherein the first direction Y is parallel to the data lines in the display panel, and the display panel may further include: a plurality of first light-emitting units 2, a plurality of first In the pixel driving circuit 3, the number of the first light-emitting unit and the first pixel driving circuit may be the same.
  • a plurality of the first light-emitting units 2 may be arrayed in the first display area 1 along a row and column direction, wherein the column direction is parallel to the first direction Y; a plurality of the first pixel driving circuits 3 may be distributed in the first compression area 12 in an array along the row and column direction, and part of the first pixel driving circuits 3 can be used to provide driving current to the first light-emitting unit located in the first external area 11; wherein, the first pixel driving circuit 3
  • the number of rows of a pixel driving circuit 3 may be equal to the number of rows of the first light-emitting unit 2
  • the number of columns of the first pixel driving circuit 3 may be equal to the number of columns of the first light-emitting unit 2 .
  • the data line is a signal line that provides data signals to the pixel driving circuit.
  • the first pixel driving circuit 3 and the first light-emitting unit 2 have the same number of rows and columns, and the size of the integrated region (the first display area 1 ) of the first light-emitting unit 2 in the column direction is larger than that of the first light-emitting unit 2
  • the size in the column direction of the integrated region (first compressed region) of the pixel driver circuit is equivalent to compressing the first pixel driving circuit 3 in the first display area 1 to the first compressed area 12 in the column direction, so as to reserve the first external area 11 .
  • this setting can make the first external area 11 only have light-emitting units and no pixel driving circuit, so that the first external area 11 has a higher light transmittance, and the location of the first external area 11 Camera can be set.
  • the first external area 11 has a larger size in the row direction, which can facilitate the arrangement of cameras in the row direction.
  • the size of the pixel driving circuit in the column direction is relatively large, and compressing the pixel driving circuit in the column direction has less influence on the layout design of the pixel driving circuit.
  • the number of the first light-emitting units in the first light-emitting units in each row may be equal to the number of the first pixel driving circuits in the first pixel driving circuits in each row number.
  • the number of the first light emitting units in each column of the first light emitting units may be equal to the number of the first pixel driving circuits in each column of the first pixel driving circuits.
  • the density of the first light emitting cells in the first compressed region may be equal to the density of the first light emitting cells in the first outer region.
  • the first display area may include a plurality of first column extension areas 13 distributed along the row direction, and the first column extension areas 13 may extend along the column direction , and the number of columns of the first column extension region 13 may be the same as the number of columns of the first light emitting unit 2 ; wherein, each of the first column extension regions 13 may be provided with a corresponding row of the first column extension region 13 .
  • a light-emitting unit 2 and a column of the first pixel driving circuits 3 that is, in the first display area 1, the pixel driving circuits are not compressed in the row direction, and the first pixel driving circuit columns and the first light emitting unit columns are arranged in a one-to-one correspondence.
  • the first light-emitting units 2 can be uniformly distributed in the first display area 1
  • the first pixel driving circuits 3 can be uniformly distributed in the first compression area 12
  • the size of each first pixel driving circuit 3 can be the same .
  • the plurality of first light-emitting units 2 may include: first sub-light-emitting units 21 in 3 rows and 9 columns, and second sub-light-emitting units 22 in 9 rows and 9 columns.
  • a sub-light-emitting unit 21 may be located in the first external area 11, wherein the first sub-light-emitting unit 21 in the X+1th row is located on one side of the first sub-light-emitting unit 21 in the Xth row in the first direction Y , X is a positive integer greater than or equal to 1 and less than or equal to 2.
  • the first sub-light-emitting unit 21 in the second row is located on one side of the first sub-light-emitting unit 21 in the first row in the first direction Y.
  • the second sub-light-emitting unit 22 may be located in the first compression area 12, wherein the second sub-light-emitting unit 22 in the X+1th row is located in the X-th row of the second sub-light-emitting unit 22 in the first direction Y.
  • the numbers in the first sub-light-emitting unit 21 and the second sub-light-emitting unit 22 indicate the row and column coordinates of the light-emitting unit.
  • the first sub-light-emitting unit 21 marked with 31 indicates the row and column coordinates of the third row and the first column.
  • the first sub-light-emitting unit 21 and the second sub-light-emitting unit 22 marked with 31 represent the second sub-light-emitting unit 22 in the third row and the first column.
  • the first pixel driving circuit 3 may include: a first sub-pixel driving circuit 31 with 3 rows and 9 columns, and a second sub-pixel driving circuit 32 with 9 rows and 9 columns.
  • the first sub-pixel driving circuit 31 is used to provide a driving current to the first sub-light-emitting unit 21, wherein the first sub-pixel driving circuit 31 in the X+1th row is located in the X-th row.
  • the second sub-pixel driving circuit 32 can be used to provide a driving current to the second sub-light-emitting unit 22 , wherein the second sub-pixel driving circuit 32 in the X+1th row is located in the X-th row of the second sub-pixel driving circuit 32 One side in the first direction Y, where X is a positive integer greater than or equal to 1 and less than or equal to 8, for example, the second sub-pixel driving circuit 32 in the second row is located in the first row of the second sub-pixel driving circuit 32 on one side of the first direction Y.
  • the numbers in the first sub-pixel driving circuit 31 and the second sub-pixel driving circuit 32 represent the row and column coordinates of the pixel driving circuit.
  • the first sub-pixel driving circuit 31 marked with 31 represents the third row
  • the first sub-pixel driving circuit 31 in the first column and the second sub-pixel driving circuit 32 marked with 31 represent the second sub-pixel driving circuit 32 in the third row and the first column.
  • the second sub-pixel driving circuit 32 in any row may be located on one side of the first sub-pixel driving circuit 31 in any row along the first direction Y.
  • the first sub-pixel driving circuit 31 in the X-th row can be used to provide a driving current to the first sub-light-emitting unit 21 in the X-th row located in the same first column extension region 13 , where X is a positive value greater than or equal to 1 and less than or equal to 3 Integer.
  • the driving circuit 31 of the first sub-pixel in the first row and the first column is used to provide the driving current to the first sub-light-emitting unit 21 in the first row and the first column.
  • the second sub-pixel driving circuit in row X is used to provide driving current to the second sub-light-emitting unit in row X which is located in the same first column direction extension region 13 , where X is a positive integer greater than or equal to 1 and less than or equal to 9.
  • the driving circuit 32 of the second sub-pixel in the first row and the first column is used to provide the driving current to the second sub-light-emitting unit 22 in the first row and the first column.
  • first sub-light-emitting unit, the second sub-light-emitting unit, the first sub-pixel driving circuit, and the second sub-pixel driving circuit in the first display area 1 may also be other The number of rows and columns, these all belong to the protection scope of the present disclosure.
  • part of the second sub-pixel driving circuits 32 in the first compression region 12 needs to span multiple rows of pixel driving circuits and the second sub-light-emitting circuits located in the same first column-direction extension region.
  • Unit 22 is connected.
  • the second sub-pixel driving circuits 32 in the first row need to span three rows of pixel driving circuits and be connected to the second sub-light-emitting units 22 in the first row located in the same first column extension region 13 .
  • the first row of the second sub-pixel driving circuit 32 needs to span the 10 rows of pixel driving circuits and be located in the same
  • the second sub-light-emitting units 22 of the first column-oriented extension area are connected. This arrangement will result in a long connection line between part of the second pixel driving circuit and the second light emitting unit.
  • FIG. 4 it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure.
  • two rows of the second sub-pixel driving circuits 32 may be disposed between each adjacent row of the first sub-pixel driving circuits 31 .
  • the first sub-pixel driving circuit 31 in the first row may be located on the opposite side of the first direction Y of the second sub-pixel driving circuit 32 in the first row, that is, the first sub-pixel driving circuit 31 in the first row may be located in all pixel driving circuits the first line of .
  • this arrangement can reduce the length of part of the connection line between the second pixel driving circuit and the second light emitting unit.
  • the second sub-light-emitting units 22 in the first row only need to span one row of pixel driving circuits to be connected to the second sub-pixel driving circuits 32 in the first row located in the same first column extension region.
  • other rows of the second sub-pixel driving circuits 31 may also be disposed between each adjacent row of the first sub-pixel driving circuits 31 .
  • four rows of the second sub-pixel driving circuits 31 may be disposed between each adjacent row of the first sub-pixel driving circuits 31 .
  • the number of rows of second sub-pixel driving circuits between the first sub-pixel driving circuits 31 in each adjacent row may be the same or different, for example, the first sub-pixel driving circuits 31 in the first row and the first sub-pixels in the second row
  • Two rows of second sub-pixel driving circuits may be arranged between the driving circuits 31
  • 5 rows of second sub-pixel driving circuits may be arranged between the second row of the first sub-pixel driving circuits 31 and the third row of the first sub-pixel driving circuits 31 .
  • the first sub-pixel driving circuit 31 in the first row may also be disposed at other positions.
  • the first sub-pixel driving circuit 31 in the first row may be disposed in the first direction Y of the second sub-pixel driving circuit 32 in the first row. side.
  • FIG. 5 it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure.
  • the first external area 11 may include a first light-transmitting area 111 and a first sub-display area 112, and the first light-transmitting area 111 and the first sub-display area 112 may be distributed along the row direction.
  • the display panel may further A plurality of second pixel driving circuits 4 may be included, the plurality of second pixel driving circuits 4 may be located in the first sub-display area 112 , and the plurality of second pixel driving circuits 4 may include 3 rows 4 distributed along the row and column directions.
  • the first sub-display area 112 is provided with the first sub-light-emitting units 21 in 3 rows and 4 columns.
  • the numbers marked in the second pixel driving circuit 4 represent the row and column coordinates of the second pixel driving circuit.
  • the second pixel driving circuit 4 marked with 28 represents the second pixel driving circuit in the second row and the eighth column.
  • the second pixel driving circuit in row X+1 may be located on one side of the second pixel driving circuit in row X in the first direction, where X is a positive integer greater than or equal to 1 and less than or equal to 2.
  • a row of the second pixel driving circuits 4 is correspondingly disposed in each of the first column extension regions 13 located in the first sub-display region; in the same first column extension region 13 , the second pixel in the Xth row
  • the driving circuit 4 is configured to provide a driving current to the first sub-light-emitting unit 21 in the X-th row in the first sub-display area, where X is a positive integer greater than or equal to 1 and less than or equal to 3.
  • the second pixel driving circuit 4 in the second row and the eighth column can be used to provide the driving current to the first sub-light-emitting unit 21 in the second row and the eighth column.
  • the first sub-pixel driving circuit in row X is configured to provide a driving current to the first sub-light-emitting unit in row X in the light-transmitting region, where X is greater than or equal to 1 and A positive integer less than or equal to 3.
  • the driving circuit of the first sub-pixel in the second row and the third column may be used to provide the driving current to the first sub-light-emitting unit 21 in the second row and the third column.
  • the first sub-display area 112 may be located on one side of the light-transmitting area 111 in the row direction. It should be understood that, in other exemplary embodiments, the first sub-display area 112 may be located on both sides of the light-transmitting area 111 in the row direction. As shown in FIG. 6 , it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure. The first sub-display area 112 may be located on both sides of the light-transmitting area 111 in the row direction. In addition, in other exemplary embodiments, the second pixel driving circuits 4 with other numbers of rows and columns may also be integrated in the first sub-display area.
  • FIG. 7 it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure.
  • the display panel has the features of the display panels shown in FIG. 4 and FIG. 5 at the same time. That is, the first external area 11 may include the first light-transmitting area 111 and the first sub-display area 112 distributed along the row direction. Multiple rows of the second sub-pixel driving circuits 32 may be disposed between each adjacent row of the first sub-pixel driving circuits 31 .
  • FIG. 8 it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure.
  • the first sub-display area 112 of the display panel may also be located on both sides of the light-transmitting area 111 in the row direction.
  • the display panel may further include a gate driving circuit, and the gate driving circuit may include a cascaded shift register unit GOA, wherein the number annotated in GOA indicates the number of stages of the shift register unit, for example , GOA1 represents the first stage shift register unit.
  • the second pixel driving circuit 4 in row X and the first sub-pixel driving circuit 31 in row X may share the same gate driving signal, that is, the second pixel driving circuit 4 in row X and the first sub-pixel driving circuit 31 in row X may share the same gate driving signal.
  • a sub-pixel driving circuit 31 is connected to the shift register units of the same stage. For example, as shown in FIG. 8, the second pixel driving circuit 4 in the first row and the first sub-pixel driving circuit 31 in the first row are connected to the first-stage shift register unit GOA1, and the second pixel driving circuit 4 in the second row and the second The row first sub-pixel driving circuit 31 is connected to the second-stage shift register unit GOA2.
  • each row of pixel driving circuits may be correspondingly provided with two shift register units, the two shift register units may be located on both sides of the row of pixel driving circuits, and the two shift register units may The row pixel drive circuits are driven simultaneously.
  • the second pixel driving circuit 4 in row X and the first sub-pixel driving circuit 31 in row X may share the same gate driving signal, where X is greater than A positive integer equal to 1 and less than or equal to 3.
  • FIG. 9 it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure.
  • the display panel may further include a normal display area 14, the normal display area 14 may be located on the side of the first compressed area 12 away from the first external area 11, and the display panel may further include a third pixel
  • the driving circuit 5 and the third pixel driving circuit 5 may be located in the normal display area 14 , and the size of the third pixel driving circuit 5 in the column direction may be larger than the size of the first pixel driving circuit 3 in the column direction. That is, the display panel can only compress the pixel driving circuits of some rows in the column direction, and the pixel driving circuits located in the normal display area 14 may not be compressed.
  • the normal display area 14 may also be provided with light-emitting units 6 corresponding to the third pixel driving circuits 5 one-to-one.
  • the pixel density of the normal display area 14 may be equal to the pixel density of the first display area 1 .
  • the ratio of the dimension of the first external area 11 in the column direction to the dimension of the first compressed area 12 in the column direction may be 1:12-1:8, for example, 1:12, 1 :10, 1:9, 1:8, etc.
  • this embodiment when the number of rows of the first sub-light-emitting units 21 is M, M connection lines need to be set in each first column-direction extension region 13 to connect the first sub-light-emitting units 21 and the first sub-light-emitting units 21 Pixel drive circuit 31 .
  • the first column-direction extension region 13 cannot accommodate a corresponding number of connection lines. Therefore, this embodiment has a limit on the number of rows of the first sub-light-emitting units 21 , that is, this embodiment has a limit on the column dimension of the camera.
  • FIG. 10 it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure.
  • the display panel may further include a second display area 7, the second display area 7 may include a second outer area 71 and a second compression area 72, and the second outer area 71 may be located in the first outer area.
  • the side of the placement area 11 away from the first compression area 12, the second compression area 72 may be located at the side of the second outer area 71 away from the first outer area 11, and the display panel also It may include: a plurality of fourth light-emitting units 8 and a plurality of fourth pixel driving circuits 9, and the number of the fourth light-emitting units and the fourth pixel driving circuits may be the same.
  • a plurality of the fourth light-emitting units 8 can be arrayed in the second display area 7 along the row and column directions; a plurality of the fourth pixel driving circuits 9 can be arrayed and distributed in the second compression area 72 along the row and column directions, at least Part of the fourth pixel driving circuit 9 can be used to provide driving current to the fourth light-emitting unit 8 located in the second external area 71; wherein, the number of rows of the fourth pixel driving circuit 9 is equal to the fourth pixel driving circuit 9 The number of rows of the light-emitting units 8 and the number of columns of the fourth pixel driving circuit 9 are equal to the number of columns of the fourth light-emitting units 8 .
  • the number of fourth light-emitting units in each row of fourth light-emitting units may be equal to the number of fourth pixel driving circuits in each row of fourth pixel driving circuits number.
  • the number of fourth light-emitting units in each column of fourth light-emitting units may be equal to the number of fourth pixel driving circuits in each column of fourth pixel driving circuits.
  • the density of the fourth light emitting cells in the second compressed region 72 may be equal to the density of the fourth light emitting cells in the second outer region.
  • the second display area 7 may include a plurality of second column-direction extension areas 73 distributed along the row direction, and the second column-direction extension areas 73 are arranged in the column direction extension, the number of columns of the second column extension region 73 , the fourth light emitting unit 8 , and the first light emitting unit 2 can be the same, and the second column extension region 73 extends with the first column direction
  • the regions 13 face each other in the column direction; wherein, a column of the fourth light-emitting units 8 and a column of the fourth pixel driving circuits 9 may be correspondingly disposed in each of the second column-direction extension regions 73 .
  • the second column extension region 73 is directly opposite to the first column extension region 13 in the column direction. It can be understood that the area covered by the second column extension region 73 infinitely extends in the column direction and the first column direction The area covered by the extension area 13 extending infinitely along the column direction coincides with each other.
  • This exemplary embodiment compresses the first pixel driving circuits 3 in the first display area 1 to the first compression area 12 in the column direction to reserve the first external area 11 ;
  • the fourth pixel driving circuit 9 is compressed to the second compressed area 72 in the column direction to reserve the second external area 71 .
  • the cameras may be correspondingly disposed in the first external area 11 and the second external area 71 .
  • the first external area and the second external area integrate 4 rows of light-emitting units in total, but the first column extension area 13 and the second column extension area 73 only need to integrate 2 connections respectively. Under the same column size of the external area, this setting can reduce the number of connecting lines in the column extension area, so that a camera with a larger size can be installed correspondingly.
  • the plurality of fourth light-emitting units 8 may include: 2 rows and 9 columns of third sub-light-emitting units 81 , and 4 rows and 9 columns of fourth sub-light-emitting units 82 .
  • the third sub-light-emitting unit 81 is located in the second external area 71, wherein the third sub-light-emitting unit 81 in the X+1th row is located in the second direction X of the third sub-light-emitting unit 81 in the Xth row.
  • the second direction X is opposite to the first direction Y, and X is a positive integer.
  • the fourth sub-light-emitting unit 82 may be located in the second compression area 72, wherein the fourth sub-light-emitting unit 82 in the X+1th row is located at one of the fourth sub-light-emitting units 82 in the Xth row in the second direction. side, where X is a positive integer greater than or equal to 1 and less than or equal to 3.
  • the fourth pixel driving circuit 9 may include a third sub-pixel driving circuit 91 in 2 rows and 9 columns, and a fourth sub-pixel driving circuit 92 in 4 rows and 9 columns.
  • the three sub-light-emitting units 81 provide the driving current, wherein the third sub-pixel driving circuit 91 in the X+1th row is located on one side of the third sub-pixel driving circuit 91 in the Xth row in the second direction, wherein X is positive Integer; the fourth sub-pixel driving circuit 92 is used to provide a driving current to the fourth sub-light-emitting unit 82, wherein the fourth sub-pixel driving circuit 92 in the X+1th row can be located in the X-th row for driving the fourth sub-pixel One side of the circuit 92 in the second direction X, where X is a positive integer greater than or equal to 1 and less than or equal to 3. As shown in FIG.
  • the numbers marked in the third sub-light-emitting unit 81 represent the row and column coordinates of the third sub-light-emitting unit 81 , for example, 11 represents the third sub-light-emitting unit 81 in the first row and the first column.
  • the numbers in the fourth sub-light-emitting unit 82 , the third sub-pixel driving circuit 91 , and the fourth sub-pixel driving circuit 92 represent their row and column coordinates, respectively.
  • the third sub-pixel driving circuit 91 in the X-th row can be used to provide a driving current to the third sub-light-emitting unit 81 in the X-th row which is located in the same second column direction extension region 73 with it.
  • X is a positive integer greater than or equal to 1 and less than or equal to 2
  • the fourth sub-pixel driving circuit 92 in the X-th row can be used to provide the fourth sub-light-emitting unit 82 in the X-th row with the fourth sub-light-emitting unit 82 in the same second column extension region 73 Drive current, where X is a positive integer greater than or equal to 1 and less than or equal to 4.
  • the fourth sub-pixel driving circuit 92 in any row may be located on one side of the third sub-pixel driving circuit 81 in any row along the second direction X.
  • the third sub-light-emitting unit 81 , the fourth sub-light-emitting unit 82 , the third sub-pixel driving circuit 91 , and the fourth sub-pixel driving circuit 92 in the second display area 7 also Other numbers of rows and columns are possible, which all belong to the protection scope of the present disclosure.
  • FIG. 11 it is a schematic structural diagram of another exemplary embodiment of a display panel of the present disclosure.
  • two rows of fourth sub-pixel driving circuits 92 may be disposed between each adjacent row of the third sub-pixel driving circuits 91 .
  • the third sub-pixel driving circuit 91 in the first row may be located on one side in the first direction Y of the fourth sub-pixel driving circuit 92 in the first row.
  • other rows of the fourth sub-pixel driving circuits 92 may also be disposed between each adjacent row of the third sub-pixel driving circuits 91 .
  • three rows of the fourth sub-pixel driving circuits 92 may be disposed between the third sub-pixel driving circuits 91 in each adjacent row.
  • the number of rows of the fourth sub-pixel driving circuits 92 between the third sub-pixel driving circuits 91 in each adjacent row may be the same or different.
  • the third sub-pixel driving circuit 91 in the first row may also be disposed at other positions.
  • the third sub-pixel driving circuit 91 in the first row may be disposed in the second direction X of the fourth sub-pixel driving circuit 92 in the first row. side.
  • the connection line between the pixel driving circuit 91 and the third sub-light-emitting unit 81 and the connection line between the fourth sub-pixel driving circuit 92 and the fourth sub-light-emitting unit 82 may be transparent conductive lines, for example, the material of the connection line may be It is indium tin oxide. In order to increase the integration degree of the connection lines in the row direction, the connection lines may be located in different conductive layers.
  • FIG. 12 it is a schematic structural diagram of another exemplary embodiment of the display panel of the present disclosure.
  • the second external area 71 may include a second light-transmitting area 711 and a second sub-display area 712, and the second light-transmitting area 711 and the second sub-display area 712 may be distributed along the row direction.
  • the display panel may further A plurality of fifth pixel driving circuits 10 may be included, the fifth pixel driving circuits 10 may be located in the second sub-display area 712, and a plurality of the fifth pixel driving circuits 10 may include 2 rows and 4 columns distributed along the row and column directions.
  • the fifth pixel driving circuit 10 in the X+1 row is located on the side of the fifth pixel driving circuit 10 in the Xth row in the second direction X, where X is a positive integer, and the fifth pixel driving circuit
  • the number of columns may be equal to the number of columns of the third sub-light-emitting units 81 in the second sub-display area 712 .
  • a column of the fifth pixel driving circuits 10 is correspondingly disposed in each column of the second column-direction extension regions 73 located in the second sub-display region 712 .
  • the fifth pixel driving circuit 10 in the Xth row can be used to provide a driving current to the third sub-light-emitting unit 81 in the Xth row of the second sub-display region 712 .
  • X is a positive integer greater than or equal to 1 and less than or equal to 2
  • the third sub-pixel driving circuit 91 in the Xth row can be used to locate the second light-transmitting region
  • the third sub-light-emitting unit 81 in the Xth row of 711 provides a drive current, where X is a positive integer greater than or equal to 1 and less than or equal to 2.
  • fifth pixel driving circuits 10 with other numbers of rows and columns may also be integrated in the second sub-display area.
  • the second light-transmitting regions 711 and the first light-transmitting regions 111 may be disposed opposite to each other in the column direction. That is, the area covered by the second light-transmitting area 711 extending infinitely along the column direction overlaps with the area covered by the first light-transmitting area 111 extending infinitely along the column direction.
  • the second sub-display area is located on both sides of the light-transmitting area in the row direction. It should be understood that, in other exemplary embodiments, the second sub-display area is located on one side of the light-transmitting area in the row direction.
  • the fifth pixel driving circuit 10 in row X and the third sub-pixel driving circuit 91 in row X may share the same gate driving signal, and X is greater than or equal to 1 and less than or equal to 2 positive integer of .
  • the exemplary embodiment also provides a display device, as shown in FIG. 13 , which is a schematic structural diagram of the display device of the present disclosure.
  • the display device may include: the above-mentioned display panel 101 and a camera 102, and the camera 102 may be directly opposite to the first light-transmitting area and the second light-transmitting area of the display panel.
  • the number of cameras 102 may be two, and the two cameras may be arranged in the row direction.
  • the display device may be a display device such as a mobile phone, a tablet computer, or the like.

Abstract

涉及显示技术领域，提出一种显示面板(101)、显示装置，显示面板(101)包括第一显示区(1)，第一显示区(1)包括第一外置区(11)和第一压缩区(12)，第一压缩区(12)位于第一外置区(11)在第一方向(Y)上的一侧，第一方向(Y)与数据线平行。显示面板(101)还包括：多个第一发光单元(2)、多个第一像素驱动电路(3)，多个第一发光单元(2)沿行列方向阵列分布于第一显示区(1)，第一方向(Y)与列方向平行；多个第一像素驱动电路(3)沿行列方向阵列分布于第一压缩区(12)，至少部分第一像素驱动电路(3)用于向位于第一外置区(11)的第一发光单元(2)提供驱动电流；其中，第一像素驱动电路(3)的行数等于第一发光单元(2)的行数，第一像素驱动电路(3)的列数等于第一发光单元(2)的列数。显示面板(101)能够在不降低像素密度的前提下，在第一外置区(11)实现较高的透光率。

Description

显示面板、显示装置 技术领域
本公开涉及显示技术领域，尤其涉及一种显示面板、显示装置。
背景技术
屏下摄像头技术是在显示面板上设置透光区，将摄像头与透光区正对设置，从而实现全屏显示。然而，透光区在实现较大透光率的同时很难实现正常显示。
需要说明的是，在上述背景技术部分公开的信息仅用于加强对本公开的背景的理解，因此可以包括不构成对本领域普通技术人员已知的现有技术的信息。
公开内容
根据本公开的一个方面，提供一种显示面板，所述显示面板包括第一显示区，所述第一显示区包括第一外置区和第一压缩区，所述第一压缩区位于所述第一外置区在第一方向上的一侧，其中，所述第一方向与所述显示面板中的数据线平行，所述显示面板还包括：多个第一发光单元、多个第一像素驱动电路，第一发光单元和第一像素驱动电路的个数相同。多个所述第一发光单元沿行列方向阵列分布于所述第一显示区，其中，所述列方向与所述第一方向平行；多个第一所述像素驱动电路沿行列方向阵列分布于所述第一压缩区，至少部分所述第一像素驱动电路用于向位于所述第一外置区的第一发光单元提供驱动电流；其中，所述第一像素驱动电路的行数等于所述第一发光单元的行数，所述第一像素驱动电路的列数等于所述第一发光单元的列数。
本公开一种示例性实施例中，所述第一显示区包括沿行方向分布的多个第一列向延伸区，所述第一列向延伸区沿列方向延伸，且所述第一列向延伸区的列数与所述第一发光单元的列数相同；其中，每一所述第一列向延伸区中对应设置有一列所述第一发光单元和一列所述第一像素驱动电路。
本公开一种示例性实施例中，多个所述第一发光单元包括：N1行M列第一子发光单元、N2行M列第二子发光单元，所述第一子发光单元位于所述第一外置区，其中，第X+1行第一子发光单元位于第X行第一子发光单元在所述第一方向上的一侧，X为大于等于1且小于等于N1-1的正整数；所述第二子发光单元位于所述第一压缩区，其中，第X+1行第二子发光单元位于第X行第二子发光单元在所述第一方向上的一侧，其中，X为大于等于1且小于等于N2-1的正整数。所述第一像素驱动电路包括：N1行M列第一子像素驱动电路、N2行M列第二子像素驱动电路，至少部分所述第一子像素驱动电路用于向所述第一子发光单元提供驱动电流，其中，第X+1行第一子像素驱动电路位于第X行第一子像素驱动电路在所述第一方向上的一侧，其中，X为大于等于1且小于等于N1-1的正整数。所述第二子像素驱动电路用于向所述第二子发光单元提供驱动电流，其中，第X+1行第二 子像素驱动电路位于第X行第二子像素驱动电路在所述第一方向上的一侧，其中，X为大于等于1且小于等于N2-1的正整数；其中，N1为大于等于1的正整数，M为大于等于1的正整数。
本公开一种示例性实施例中，第X行第一子像素驱动电路用于向与其位于同一第一列向延伸区的第X行第一子发光单元提供驱动电流，其中X为大于等于1且小于等于N1的正整数；第X行第二子像素驱动电路用于向与其位于同一第一列向延伸区的第X行第二子发光单元提供驱动电流，其中，X为大于等于1且小于等于N2的正整数。
本公开一种示例性实施例中，所述第一外置区包括第一透光区和第一子显示区，所述第一透光区和第一子显示区沿行方向分布，所述显示面板还包括多个第二像素驱动电路，多个第二像素驱动电路位于所述第一子显示区，多个所述第二像素驱动电路包括沿行列方向分布的N1行M1列第二像素驱动电路，第X+1行第二像素驱动电路位于第X行第二像素驱动电路在所述第一方向上的一侧，其中，X为大于等于1且小于等于N1-1的正整数，M1等于所述第一子显示区中第一子发光单元的列数；位于所述第一子显示区的每个第一列向延伸区对应设置有一列所述第二像素驱动电路；在同一第一列向延伸区中，第X行所述第二像素驱动电路用于向位于所述第一子显示区中第X行所述第一子发光单元提供驱动电流，其中X为大于等于1且小于等于N1的正整数。在同一第一列向延伸区中，第X行所述第一子像素驱动电路用于向位于所述透光区中第X行第一子发光单元提供驱动电流，其中X为大于等于1且小于等于N1的正整数。
本公开一种示例性实施例中，所述第一子显示区位于所述透光区在行方向上的一侧或两侧。
本公开一种示例性实施例中，第X行第二像素驱动电路和第X行第一子像素驱动电路共用同一栅极驱动信号。
本公开一种示例性实施例中，任一行所述第二子像素驱动电路位于任一行所述第一子像素驱动电路在所述第一方向上的一侧。
本公开一种示例性实施例中，多个所述第一子像素驱动电路包括相邻的两行第一子像素驱动电路，该相邻的两行第一子像素驱动电路之间至少设置有一行所述第二子像素驱动电路。
本公开一种示例性实施例中，每相邻行所述第一子像素驱动电路之间设置有相同行数的所述第二子像素驱动电路。
本公开一种示例性实施例中，所述显示面板还包括正常显示区，所述正常显示区位于所述第一压缩区远离所述第一外置区的一侧，所述显示面板还包括第三像素驱动电路，第三像素驱动电路位于所述正常显示区，所述第三像素驱动电路在列方向的尺寸大于所述第一像素驱动电路在列方向上的尺寸。
本公开一种示例性实施例中，所述正常显示区的像素密度等于所述第一显示区的像素密度。
本公开一种示例性实施例中，所述第一外置区在列方向尺寸与所述第一压缩区在列方向尺寸的比值为1:12-1:8。
本公开一种示例性实施例中，所述显示面板还包括第二显示区，所述第二显示区包括第二外置区和第二压缩区，所述第二外置区位于所述第一外置区远离所述第一压缩区的一侧，所述第二压缩区位于所述第二外置区远离所述第一外置区的一侧，所述显示面板还包括：多个第四发光单元、多个第四像素驱动电路，第四发光单元和第四像素驱动电路的个数相同。多个所述第四发光单元沿行列方向阵列分布于所述第二显示区；多个所述第四像素驱动电路沿行列方向阵列分布于所述第二压缩区，至少部分所述第四像素驱动电路用于向位于所述第二外置区的第四发光单元提供驱动电流；其中，所述第四像素驱动电路的行数等于所述第四发光单元的行数，所述第四像素驱动电路的列数等于所述第四发光单元的列数。
本公开一种示例性实施例中，所述第二显示区包括沿行方向分布的多个第二列向延伸区，且所述第二列向延伸区沿列方向延伸，所述第二列向延伸区、所述第四发光单元、所述第一发光单元的列数相同，所述第二列向延伸区与所述第一列向延伸区在列方向上正对；其中，每一所述第二列向延伸区中对应设置有一列所述第四发光单元和一列所述第四像素驱动电路。
本公开一种示例性实施例中，多个所述第四发光单元包括：N3行M列第三子发光单元、N4行M列第四子发光单元。所述第三子发光单元位于所述第二外置区，其中，第X+1行第三子发光单元位于第X行第三子发光单元在所述第二方向上的一侧，所述第二方向与所述第一方向相反，X为大于等于1且小于等于N3-1的正整数；所述第四子发光单元位于所述第二压缩区，其中，第X+1行第四子发光单元位于第X行第四子发光单元在所述第二方向上的一侧，其中，X为大于等于1且小于等于N4-1的正整数。所述第四像素驱动电路包括N3行M列第三子像素驱动电路、N4行M列第四子像素驱动电路，至少部分所述第三子像素驱动电路用于向所述第三子发光单元提供驱动电流，其中，第X+1行第三子像素驱动电路位于第X行第三子像素驱动电路在所述第二方向上的一侧，其中，X为大于等于1且小于等于N3-1的正整数；所述第四子像素驱动电路用于向所述第四子发光单元提供驱动电流，其中，第X+1行第四子像素驱动电路位于第X行第四子像素驱动电路在所述第二方向上的一侧，其中，X为大于等于1且小于等于N4-1的正整数；其中，N3为大于等于1的正整数。
本公开一种示例性实施例中，第X行第三子像素驱动电路用于向与其位于同一第二列向延伸区的第X行第三子发光单元提供驱动电流，其中X为大于等于1且小于等于N3的正整数；第X行第四子像素驱动电路用于向与其位于同一第二列向延伸区的第X行第四子发光单元提供驱动电流，其中，X为大于等于1且小于等于N4的正整数。
本公开一种示例性实施例中，所述第二外置区包括第二透光区和第二子显示区，所述第二透光区和第二子显示区沿行方向分布，所述显示面板还包括多个第五像素驱动电路， 第五像素驱动电路位于所述第二子显示区，多个所述第五像素驱动电路包括沿行列方向分布的N3行M2列第五像素驱动电路，第X+1行第五像素驱动电路位于第X行第五像素驱动电路在所述第二方向上的一侧，其中，X为大于等于1且小于等于N3-1的正整数，M2等于所述第二子显示区中第三子发光单元的列数；位于所述第二子显示区的每列第二列向延伸区对应设置有一列所述第五像素驱动电路；
在同一第二列向延伸区中，第X行所述第五像素驱动电路用于向位于所述第二子显示区的第X行所述第三子发光单元提供驱动电流，其中X为大于等于1且小于等于N3的正整数；在同一第二列向延伸区中，第X行所述第三子像素驱动电路用于向位于所述第二透光区的第X行第三子发光单元提供驱动电流，其中X为大于等于1且小于等于N3的正整数。
本公开一种示例性实施例中，所述第二子显示区位于所述透光区在行方向上的一侧或两侧。
本公开一种示例性实施例中，所述第二透光区和所述第一透光区在列方向上相对设置。
本公开一种示例性实施例中，第X行第五像素驱动电路和第X行第三子像素驱动电路共用同一栅极驱动信号，X为大于等于1且小于等于N3的正整数。
本公开一种示例性实施例中，任一行所述第四子像素驱动电路位于任一行所述第三子像素驱动电路在所述第二方向上的一侧。
本公开一种示例性实施例中，多个所述第三子像素驱动电路包括相邻的两行第三子像素驱动电路，该相邻的两行第三子像素驱动电路之间至少设置有一行所述第四子像素驱动电路。
本公开一种示例性实施例中，每相邻行所述第三子像素驱动电路之间设置有相同行数的所述第四子像素驱动电路。
根据本公开的一个方面，提供一种显示装置，该显示装置包括：上述的显示面板和摄像头，所述摄像头的至少部分与所述显示面板的第一外置区正对。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性和解释性的，并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分，示出了符合本公开的实施例，并与说明书一起用于解释本公开的原理。显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为相关技术中常规显示面板的结构示意图；
图2为相关技术中另一种显示面板的结构示意图；
图3为本公开显示面板一种示例性实施例的结构示意图；
图4为本公开显示面板另一种示例性实施例的结构示意图；
图5为本公开显示面板另一种示例性实施例的结构示意图；
图6为本公开显示面板另一种示例性实施例的结构示意图；
图7为本公开显示面板另一种示例性实施例的结构示意图；
图8为本公开显示面板另一种示例性实施例的结构示意图；
图9为本公开显示面板另一种示例性实施例的结构示意图；
图10为本公开显示面板另一种示例性实施例的结构示意图；
图11为本公开显示面板另一种示例性实施例的结构示意图；
图12为本公开显示面板另一种示例性实施例的结构示意图；
图13为本公开显示装置的结构示意图。
具体实施方式
现在将参考附图更全面地描述示例实施例。然而，示例实施例能够以多种形式实施，且不应被理解为限于在此阐述的范例；相反，提供这些实施例使得本公开将更加全面和完整，并将示例实施例的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构，因而将省略它们的详细描述。
虽然本说明书中使用相对性的用语，例如“上”“下”来描述图标的一个组件对于另一组件的相对关系，但是这些术语用于本说明书中仅出于方便，例如根据附图中所述的示例的方向。能理解的是，如果将图标的装置翻转使其上下颠倒，则所叙述在“上”的组件将会成为在“下”的组件。其他相对性的用语，例如“高”“低”“顶”“底”“左”“右”等也作具有类似含义。当某结构在其它结构“上”时，有可能是指某结构一体形成于其它结构上，或指某结构“直接”设置在其它结构上，或指某结构通过另一结构“间接”设置在其它结构上。
用语“一个”、“一”、“所述”用以表示存在一个或多个要素/组成部分/等；用语“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等。
如图1所示，为相关技术中常规显示面板的结构示意图，常规显示面板包括有像素驱动电路01和发光单元02，像素驱动电路01和发光单元02一一对应设置，相对应的像素驱动电路和发光单元所在区域至少部分重合。
如图2所示，为相关技术中另一种显示面板的结构示意图，该显示面板同样包括像素驱动电路01和发光单元02。其中，该显示面板在行方向压缩多个像素驱动电路01的尺寸，以使显示面板上形成仅设置有发光单元02的外置区03。由于外置区03中没有设置像素驱动电路，从而外置区03具有较高的透过率，外置区03所在位置可以对应设置摄像头。当显示面板需要对应设置多个沿行向排布的摄像头时，外置区03在行向上需要具有较大的尺寸，从而需要压缩更多的像素驱动电路或提高像素驱动电路的压缩比例，然而上述设置均会增加显示面板结构的复杂程度和制作工艺的难度。同时，由于像素驱动电路在行向上的尺寸原本较小，通过沿行方向压缩像素驱动电路的方式形成外置区不利于像素驱动电路 的版图设计。
基于此，本示例性实施例提供一种显示面板，如图3所示，为本公开显示面板一种示例性实施例的结构示意图。所述显示面板可以包括第一显示区1，所述第一显示区1可以包括第一外置区11和第一压缩区12，所述第一压缩区12可以位于所述第一外置区11在第一方向Y上的一侧，其中，所述第一方向Y与所述显示面板中的数据线平行，所述显示面板还可以包括：多个第一发光单元2、多个第一像素驱动电路3，第一发光单元和第一像素驱动电路的个数可以相同。多个所述第一发光单元2可以沿行列方向阵列分布于所述第一显示区1，其中，所述列方向与所述第一方向Y平行；多个第一所述像素驱动电路3可以沿行列方向阵列分布于所述第一压缩区12，部分所述第一像素驱动电路3可以用于向位于所述第一外置区11的第一发光单元提供驱动电流；其中，所述第一像素驱动电路3的行数可以等于所述第一发光单元2的行数，所述第一像素驱动电路3的列数可以等于所述第一发光单元2的列数。其中，数据线即为向像素驱动电路提供数据信号的信号线。
本示例性实施例中，第一像素驱动电路3和第一发光单元2具有相同的行列数，且第一发光单元2的集成区域(第一显示区1)在列方向上的尺寸大于第一像素驱动电路的集成区域(第一压缩区)在列方向的尺寸。即相当于将第一显示区1中的第一像素驱动电路3在列方向上压缩到第一压缩区12，以预留出第一外置区11。一方面，该设置可以使得第一外置区11中仅设置有发光单元，且没有设置像素驱动电路，从而第一外置区11具有较高的透光率，第一外置区11所在位置可以设置摄像头。另一方面，该第一外置区11在行方向上具有较大尺寸，可以便于在行方向上设置摄像头。再一方面，像素驱动电路在列方向上的尺寸较大，将像素驱动电路沿列方向压缩对像素驱动电路的版图设计影响较小。
本示例性实施例中，如图3所示，在第一显示区中，每一行第一发光单元中第一发光单元的个数可以等于每一行第一像素驱动电路中第一像素驱动电路的个数。每一列第一发光单元中第一发光单元的个数可以等于每一列第一像素驱动电路中第一像素驱动电路的个数。第一压缩区中第一发光单元的密度可以等于第一外置区中第一发光单元的密度。
本示例性实施例中，如图3所示，所述第一显示区可以包括沿行方向分布的多个第一列向延伸区13，所述第一列向延伸区13可以沿列方向延伸，且所述第一列向延伸区13的列数可以与所述第一发光单元2的列数相同；其中，每一所述第一列向延伸区13中可以对应设置有一列所述第一发光单元2和一列所述第一像素驱动电路3。即，在第一显示区1中，像素驱动电路没有沿行方向压缩，第一像素驱动电路列和第一发光单元列一一对应设置。如图3所示，第一发光单元2可以均匀分布于第一显示区1，第一像素驱动电路3可以均匀分布于第一压缩区12，且每一第一像素驱动电路3的尺寸可以相同。
本示例性实施例中，如图3所示，多个所述第一发光单元2可以包括：3行9列第一子发光单元21、9行9列第二子发光单元22，所述第一子发光单元21可以位于所述第一外置区11，其中，第X+1行第一子发光单元21位于第X行第一子发光单元21在所述第一方向Y上的一侧，X为大于等于1且小于等于2的正整数，例如，第二行第一子发光单 元21位于第一行第一子发光单元21在第一方向Y上的一侧。所述第二子发光单元22可以位于所述第一压缩区12，其中，第X+1行第二子发光单元22位于第X行第二子发光单元22在所述第一方向Y上的一侧，其中，X为大于等于1且小于等于8的正整数，例如，第二行第二子发光单元22位于第一行第二子发光单元22在第一方向Y上的一侧。如图3所示，第一子发光单元21、第二子发光单元22中的数字表示该发光单元的行列坐标，例如，标注有31的第一子发光单元21表示第3行第1列的第一子发光单元21，标注有31的第二子发光单元22表示第3行第1列的第二子发光单元22。
本示例性实施例中，如图3所示，所述第一像素驱动电路3可以包括：3行9列第一子像素驱动电路31、9行9列第二子像素驱动电路32，所述第一子像素驱动电路31用于向所述第一子发光单元21提供驱动电流，其中，第X+1行第一子像素驱动电路31位于第X行第一子像素驱动电路31在所述第一方向Y上的一侧，其中，X为大于等于1且小于等于2的正整数，例如第二行第一子像素驱动电路31位于第一行第一子像素驱动电路31在第一方向Y的一侧。所述第二子像素驱动电路32可以用于向所述第二子发光单元22提供驱动电流，其中，第X+1行第二子像素驱动电路32位于第X行第二子像素驱动电路32在所述第一方向Y上的一侧，其中，X为大于等于1且小于等于8的正整数，例如，第二行第二子像素驱动电路32位于第一行第二子像素驱动电路32在第一方向Y的一侧。如图3所示，第一子像素驱动电路31、第二子像素驱动电路32中的数字表示该像素驱动电路的行列坐标，例如，标注有31的第一子像素驱动电路31表示第三行第一列的第一子像素驱动电路31，标注有31的第二子像素驱动电路32表示第三行第一列的第二子像素驱动电路32。
本示例性实施例中，如图3所示，任一行所述第二子像素驱动电路32可以位于任一行所述第一子像素驱动电路31在所述第一方向Y上的一侧。第X行第一子像素驱动电路31可以用于向与其位于同一第一列向延伸区13的第X行第一子发光单元21提供驱动电流，其中X为大于等于1且小于等于3的正整数。例如，第一行第一列第一子像素驱动电路31用于向第一行第一列第一子发光单元21提供驱动电流。第X行第二子像素驱动电路用于向与其位于同一第一列向延伸区13的第X行第二子发光单元提供驱动电流，其中，X为大于等于1且小于等于9的正整数。例如，第一行第一列第二子像素驱动电路32用于向第一行第一列第二子发光单元22提供驱动电流。
应该理解的是，在其他示例性实施例中，第一显示区1中的第一子发光单元、第二子发光单元、第一子像素驱动电路、第二子像素驱动电路还可以为其他的行列数，这些都属于本公开的保护范围。
本示例性实施例中，如图3所示，第一压缩区12中的部分第二子像素驱动电路32需要跨越多行像素驱动电路和与其位于同一第一列向延伸区的第二子发光单元22连接。例如，第一行第二子像素驱动电路32需要跨越3行像素驱动电路和与其位于同一第一列向延伸区13的第一行第二子发光单元22连接。尤其当第一子发光单元21行数较多时，例 如，当第一子发光单元21行数为10行时，第一行第二子像素驱动电路32需要跨越10行像素驱动电路和与其位于同一第一列向延伸区的第二子发光单元22连接。该设置会造成部分第二像素驱动电路和第二发光单元之间的连接线较长。
如图4所示，为本公开显示面板另一种示例性实施例的结构示意图。本示例性实施例中，每相邻行所述第一子像素驱动电路31之间可以设置有两行的所述第二子像素驱动电路32。第一行第一子像素驱动电路31可以位于第一行第二子像素驱动电路32在第一方向Y反方向的一侧，即第一行第一子像素驱动电路31可以位于所有像素驱动电路的第一行。如图4所示，该设置可以降低部分第二像素驱动电路和第二发光单元之间连接线的长度。例如，第一行第二子发光单元22仅需跨越一行像素驱动电路即可和与其位于同一第一列向延伸区的第一行第二子像素驱动电路32连接。
应该理解的是，在其他示例性实施例中，每相邻行所述第一子像素驱动电路31之间还可以设置有其他行数的所述第二子像素驱动电路。例如，每相邻行所述第一子像素驱动电路31之间可以设置有4行的所述第二子像素驱动电路。每相邻行所述第一子像素驱动电路31之间的第二子像素驱动电路行数可以相同也可以不同，例如，第一行第一子像素驱动电路31和第二行第一子像素驱动电路31之间可以设置2行第二子像素驱动电路，第二行第一子像素驱动电路31和第三行第一子像素驱动电路31之间可以设置5行第二子像素驱动电路。此外，第一行第一子像素驱动电路31还可以设置于其他位置，例如，第一行第一子像素驱动电路31可以设置于第一行第二子像素驱动电路32在第一方向Y的一侧。
本示例性实施例中，如图5所示，为本公开显示面板另一种示例性实施例的结构示意图。所述第一外置区11可以包括第一透光区111和第一子显示区112，所述第一透光区111和第一子显示区112可以沿行方向分布，所述显示面板还可以包括多个第二像素驱动电路4，多个第二像素驱动电路4可以位于所述第一子显示区112，多个所述第二像素驱动电路4可以包括沿行列方向分布的3行4列第二像素驱动电路4，相应的，第一子显示区112中设置有3行4列第一子发光单元21。其中，第二像素驱动电路4中批注的数字表示第二像素驱动电路的行列坐标。例如，批注有28的第二像素驱动电路4表示第2行第8列第二像素驱动电路。第X+1行第二像素驱动电路可以位于第X行第二像素驱动电路在所述第一方向上的一侧，其中，X为大于等于1且小于等于2的正整数。位于所述第一子显示区的每个第一列向延伸区13对应设置有一列所述第二像素驱动电路4；在同一第一列向延伸区13中，第X行所述第二像素驱动电路4用于向位于所述第一子显示区中第X行所述第一子发光单元21提供驱动电流，其中X为大于等于1且小于等于3的正整数。例如，第2行第8列第二像素驱动电路4可以用于向第2行第8列第一子发光单元21提供驱动电流。在同一第一列向延伸区中，第X行所述第一子像素驱动电路用于向位于所述透光区中第X行第一子发光单元提供驱动电流，其中X为大于等于1且小于等于3的正整数。例如，第2行第3列第一子像素驱动电路可以用于向第2行第3列第一子发光单元21提供驱动电流。
本示例性实施例中，如图5所示，所述第一子显示区112可以位于所述透光区111在行方向上的一侧。应该理解的是，在其他示例性实施例中，所述第一子显示区112可以位于所述透光区111在行方向上的两侧。如图6所示，为本公开显示面板另一种示例性实施例的结构示意图。所述第一子显示区112可以位于所述透光区111在行方向上的两侧。此外，在其他示例性实施例中，第一子显示区中还可以集成其他行列数的第二像素驱动电路4。
如图7所示，为本公开显示面板另一种示例性实施例的结构示意图。该显示面板同时具有图4和图5所示显示面板的特征。即所述第一外置区11可以包括沿行方向分布的第一透光区111和第一子显示区112。每相邻行所述第一子像素驱动电路31之间可以设置有多行的所述第二子像素驱动电路32。
如图8所示，为本公开显示面板另一种示例性实施例的结构示意图。该显示面板的第一子显示区112同样可以位于所述透光区111在行方向上的两侧。如图8所示，该显示面板还可以包括栅极驱动电路，该栅极驱动电路可以包括级联的移位寄存器单元GOA，其中GOA中批注的数字表示该移位寄存器单元的级数，例如，GOA1表示第一级移位寄存器单元。本示例性实施例中，第X行第二像素驱动电路4和第X行第一子像素驱动电路31可以共用同一栅极驱动信号，即第X行第二像素驱动电路4和第X行第一子像素驱动电路31连接同一级数的移位寄存单元。例如，如图8所示，第1行第二像素驱动电路4和第1行第一子像素驱动电路31连接第一级移位寄存单元GOA1，第2行第二像素驱动电路4和第2行第一子像素驱动电路31连接第二级移位寄存单元GOA2。本示例性实施例中，每一行像素驱动电路可以对应设置两个移位寄存器单元，该两个移位寄存器单元可以位于该行像素驱动电路的两侧，该两个移位寄存器单元可以对该行像素驱动电路同时驱动。
本示例性实施例中，如图5-7所示，同样的，第X行第二像素驱动电路4和第X行第一子像素驱动电路31可以共用同一栅极驱动信号，其中X为大于等于1且小于等于3的正整数。
本示例性实施例中，如图9所示，为本公开显示面板另一种示例性实施例的结构示意图。所述显示面板还可以包括正常显示区14，所述正常显示区14可以位于所述第一压缩区12远离所述第一外置区11的一侧，所述显示面板还可以包括第三像素驱动电路5，第三像素驱动电路5可以位于所述正常显示区14，所述第三像素驱动电路5在列方向的尺寸可以大于所述第一像素驱动电路3在列方向上的尺寸。即该显示面板可以仅在列方向上压缩部分行的像素驱动电路，位于正常显示区14中像素驱动电路可以不进行压缩。正常显示区14中还可以设置有与第三像素驱动电路5一一对应的发光单元6。所述正常显示区14的像素密度可以等于所述第一显示区1的像素密度。
本示例性实施例中，所述第一外置区11在列方向尺寸与所述第一压缩区12在列方向尺寸的比值可以为1:12-1:8，例如，1：12、1:10、1:9、1:8等。将位于第一显示区1中的第一像素驱动电路3在列方向上压缩到原来的10/11，即可以实现所述第一外置区11在列 方向尺寸与所述第一压缩区12在列方向尺寸的比值为1:10。
本示例性实施例中，当第一子发光单元21的行数为M行时，每一第一列向延伸区13中需要设置M条连接线以连接第一子发光单元21和第一子像素驱动电路31。当第一子发光单元21的行数较多时，第一列向延伸区13将无法容纳对应条数的连接线。因此，该实施例对第一子发光单元21的行数存在限制，即该实施例对摄像头的列向尺寸存在限制。
本示例性实施例中，如图10所示，为本公开显示面板另一种示例性实施例的结构示意图。所述显示面板还可以包括第二显示区7，所述第二显示区7可以包括第二外置区71和第二压缩区72，所述第二外置区71可以位于所述第一外置区11远离所述第一压缩区12的一侧，所述第二压缩区72可以位于所述第二外置区71远离所述第一外置区11的一侧，所述显示面板还可以包括：多个第四发光单元8、多个第四像素驱动电路9，第四发光单元和第四像素驱动电路个数可以相同。多个所述第四发光单元8可以沿行列方向阵列分布于所述第二显示区7；多个所述第四像素驱动电路9可以沿行列方向阵列分布于所述第二压缩区72，至少部分所述第四像素驱动电路9可以用于向位于所述第二外置区71的第四发光单元8提供驱动电流；其中，所述第四像素驱动电路9的行数等于所述第四发光单元8的行数，所述第四像素驱动电路9的列数等于所述第四发光单元8的列数。
本示例性实施例中，如图10所示，在第二显示区中，每一行第四发光单元中第四发光单元的个数可以等于每一行第四像素驱动电路中第四像素驱动电路的个数。每一列第四发光单元中第四发光单元的个数可以等于每一列第四像素驱动电路中第四像素驱动电路的个数。第二压缩区72中第四发光单元的密度可以等于第二外置区中第四发光单元的密度。
本示例性实施例中，如图10所示，所述第二显示区7可以包括沿行方向分布的多个第二列向延伸区73，且所述第二列向延伸区73沿列方向延伸，所述第二列向延伸区73、所述第四发光单元8、所述第一发光单元2的列数可以相同，所述第二列向延伸区73与所述第一列向延伸区13在列方向上正对；其中，每一所述第二列向延伸区73中可以对应设置有一列所述第四发光单元8和一列所述第四像素驱动电路9。所述第二列向延伸区73与所述第一列向延伸区13在列方向上正对，可以理解为，第二列向延伸区73沿列方向无限延伸所覆盖区域与第一列向延伸区13沿列方向无限延伸所覆盖区域重合。
本示例性实施例将第一显示区1中的第一像素驱动电路3在列方向上压缩到第一压缩区12，以预留出第一外置区11；同时将第二显示区7中的第四像素驱动电路9在列方向上压缩到第二压缩区72，以预留出第二外置区71。摄像头可以对应设置于第一外置区11和第二外置区71。如图10所示，第一外置区和第二外置区共集成有4行发光单元，但是第一列向延伸区13和第二列向延伸区73只需分别集成2条连接。在相同外置区的列向尺寸下，该设置可以降低列向延伸区中连接线的条数，从而可以对应安装较大尺寸的摄像头。
本示例性实施例中，如图10所示，多个所述第四发光单元8可以包括：2行9列第三子发光单元81、4行9列第四子发光单元82。所述第三子发光单元81位于所述第二外置 区71，其中，第X+1行第三子发光单元81位于第X行第三子发光单元81在所述第二方向X上的一侧，所述第二方向X与所述第一方向Y相反，X为正整数。所述第四子发光单元82可以位于所述第二压缩区72，其中，第X+1行第四子发光单元82位于第X行第四子发光单元82在所述第二方向上的一侧，其中，X为大于等于1且小于等于3的正整数。所述第四像素驱动电路9可以包括2行9列第三子像素驱动电路91、4行9列第四子像素驱动电路92，所述第三子像素驱动电路91可以用于向所述第三子发光单元81提供驱动电流，其中，第X+1行第三子像素驱动电路91位于第X行第三子像素驱动电路91在所述第二方向上的一侧，其中，X为正整数；所述第四子像素驱动电路92用于向所述第四子发光单元82提供驱动电流，其中，第X+1行第四子像素驱动电路92可以位于第X行第四子像素驱动电路92在所述第二方向X上的一侧，其中，X为大于等于1且小于等于3的正整数。如图10所示，第三子发光单元81中批注的数字表示第三子发光单元81的行列坐标，例如，11表示第一行第一列第三子发光单元81。同理，第四子发光单元82、第三子像素驱动电路91、第四子像素驱动电路92中的数字分别表示其的行列坐标。
本示例性实施例中，如图10所示，第X行第三子像素驱动电路91可以用于向与其位于同一第二列向延伸区73的第X行第三子发光单元81提供驱动电流，其中X为大于等于1且小于等于2的正整数；第X行第四子像素驱动电路92可以用于向与其位于同一第二列向延伸区73的第X行第四子发光单元82提供驱动电流，其中，X为大于等于1且小于等于4的正整数。其中，任一行所述第四子像素驱动电路92可以位于任一行所述第三子像素驱动电路81在所述第二方向X上的一侧。
应该理解的是，在其他示例性实施例中，第二显示区7中的第三子发光单元81、第四子发光单元82、第三子像素驱动电路91、第四子像素驱动电路92还可以为其他的行列数，这些都属于本公开的保护范围。
如图11所示，为本公开显示面板另一种示例性实施例的结构示意图。本示例性实施例中，每相邻行所述第三子像素驱动电路91之间可以设置有2行第四子像素驱动电路92。第一行第三子像素驱动电路91可以位于第一行第四子像素驱动电路92在第一方向Y的一侧。
应该理解的是，在其他示例性实施例中，每相邻行所述第三子像素驱动电路91之间还可以设置有其他行数的所述第四子像素驱动电路92。例如，每相邻行所述第三子像素驱动电路91之间可以设置有3行的所述第四子像素驱动电路92。每相邻行所述第三子像素驱动电路91之间的第四子像素驱动电路92的行数可以相同也可以不同。此外，第一行第三子像素驱动电路91还可以设置于其他位置，例如，第一行第三子像素驱动电路91可以设置于第一行第四子像素驱动电路92在第二方向X的一侧。
本示例性实施例中，第一子像素驱动电路31和第一子发光单元21之间的连接线、第二子像素驱动电路32和第二子发光单元22之间的连接线、第三子像素驱动电路91和第三子发光单元81之间的连接线、第四子像素驱动电路92和第四子发光单元82之间的连 接线可以为透明导电线，例如，该连接线的材料可以为氧化铟锡。为增加上述连接线在行方向上的集成度，上述连接线可以位于不同的导电层。
本示例性实施例中，如图12所示，为本公开显示面板另一种示例性实施例的结构示意图。所述第二外置区71可以包括第二透光区711和第二子显示区712，所述第二透光区711和第二子显示区712可以沿行方向分布，所述显示面板还可以包括多个第五像素驱动电路10，第五像素驱动电路10可以位于所述第二子显示区712，多个所述第五像素驱动电路10可以包括沿行列方向分布的2行4列第五像素驱动电路，第X+1行第五像素驱动电路10位于第X行第五像素驱动电路10在所述第二方向X上的一侧，其中，X为正整数，第五像素驱动电路的列数可以等于所述第二子显示区712中第三子发光单元81的列数。位于所述第二子显示区712的每列第二列向延伸区73对应设置有一列所述第五像素驱动电路10。在同一第二列向延伸区73中，第X行所述第五像素驱动电路10可以用于向位于所述第二子显示区712的第X行所述第三子发光单元81提供驱动电流，其中X为大于等于1且小于等于2的正整数；在同一第二列向延伸区73中，第X行所述第三子像素驱动电路91可以用于向位于所述第二透光区711的第X行第三子发光单元81提供驱动电流，其中X为大于等于1且小于等于2的正整数。应该理解的是，在其他示例性实施例中，第二子显示区中还可以集成其他行列数的第五像素驱动电路10。
本示例性实施例中，如图12所示，所述第二透光区711和所述第一透光区111在列方向上可以相对设置。即第二透光区711沿列方向无限延伸所覆盖区域与第一透光区111沿列方向无限延伸所覆盖区域重合。
本示例性实施例中，如图12所示，所述第二子显示区位于所述透光区在行方向上的两侧。应该理解的是，在其他示例性实施例中，所述第二子显示区位于所述透光区在行方向上的一侧。
本示例性实施例中，如图12所示，第X行第五像素驱动电路10和第X行第三子像素驱动电路91可以共用同一栅极驱动信号，X为大于等于1且小于等于2的正整数。
本示例性实施例还提供一种显示装置，如图13所示，为本公开显示装置的结构示意图。该显示装置可以包括：上述的显示面板101和摄像头102，所述摄像头102可以与所述显示面板的第一透光区和第二透光区正对。如图13所示，摄像头102可以为两个，两个摄像头可以沿行方向设置。该显示装置可以为手机、平板电脑等显示装置。
本领域技术人员在考虑说明书及实践这里公开的内容后，将容易想到本公开的其他实施例。本申请旨在涵盖本公开的任何变型、用途或者适应性变化，这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的，本公开的真正范围和精神由权利要求指出。
应当理解的是，本公开并不局限于上面已经描述并在附图中示出的精确结构，并且可以在不脱离其范围进行各种修改和改变。本公开的范围仅由所附的权利要求来限定。

Claims (25)

  1. 一种显示面板，其中，所述显示面板包括第一显示区，所述第一显示区包括第一外置区和第一压缩区，所述第一压缩区位于所述第一外置区在第一方向上的一侧，其中，所述第一方向与所述显示面板中的数据线平行，所述显示面板还包括：
    多个第一发光单元，多个所述第一发光单元沿行列方向阵列分布于所述第一显示区，其中，所述列方向与所述第一方向平行；
    多个第一像素驱动电路，与所述第一发光单元个数相同，多个第一所述像素驱动电路沿行列方向阵列分布于所述第一压缩区，至少部分所述第一像素驱动电路用于向位于所述第一外置区的第一发光单元提供驱动电流；
    其中，所述第一像素驱动电路的行数等于所述第一发光单元的行数，所述第一像素驱动电路的列数等于所述第一发光单元的列数。
  2. 根据权利要求1所述的显示面板，其中，所述第一显示区包括沿行方向分布的多个第一列向延伸区，所述第一列向延伸区沿列方向延伸，且所述第一列向延伸区的列数与所述第一发光单元的列数相同；
    其中，每一所述第一列向延伸区中对应设置有一列所述第一发光单元和一列所述第一像素驱动电路。
  3. 根据权利要求2所述的显示面板，其中，
    多个所述第一发光单元包括：
    N1行M列第一子发光单元，所述第一子发光单元位于所述第一外置区，其中，第X+1行第一子发光单元位于第X行第一子发光单元在所述第一方向上的一侧，X为大于等于1且小于等于N1-1的正整数；
    N2行M列第二子发光单元，所述第二子发光单元位于所述第一压缩区，其中，第X+1行第二子发光单元位于第X行第二子发光单元在所述第一方向上的一侧，X为大于等于1且小于等于N2-1的正整数；
    所述第一像素驱动电路包括：
    N1行M列第一子像素驱动电路，至少部分所述第一子像素驱动电路用于向所述第一子发光单元提供驱动电流，其中，第X+1行第一子像素驱动电路位于第X行第一子像素驱动电路在所述第一方向上的一侧，X为大于等于1且小于等于N1-1的正整数；
    N2行M列第二子像素驱动电路，所述第二子像素驱动电路用于向所述第二子发光单元提供驱动电流，其中，第X+1行第二子像素驱动电路位于第X行第二子像素驱动电路在所述第一方向上的一侧，X为大于等于1且小于等于N2-1的正整数；
    其中，N1为大于等于1的正整数，M为大于等于1的正整数。
  4. 根据权利要求3所述的显示面板，其中，
    第X行第一子像素驱动电路用于向与其位于同一第一列向延伸区的第X行第一 子发光单元提供驱动电流，其中X为大于等于1且小于等于N1的正整数；
    第X行第二子像素驱动电路用于向与其位于同一第一列向延伸区的第X行第二子发光单元提供驱动电流，其中，X为大于等于1且小于等于N2的正整数。
  5. 根据权利要求3所述的显示面板，其中，所述第一外置区包括第一透光区和第一子显示区，所述第一透光区和第一子显示区沿行方向分布，所述显示面板还包括：
    多个第二像素驱动电路，位于所述第一子显示区，多个所述第二像素驱动电路包括沿行列方向分布的N1行M1列第二像素驱动电路，第X+1行第二像素驱动电路位于第X行第二像素驱动电路在所述第一方向上的一侧，其中，X为大于等于1且小于等于N1-1的正整数，M1等于所述第一子显示区中第一子发光单元的列数；
    位于所述第一子显示区的每个第一列向延伸区对应设置有一列所述第二像素驱动电路；
    在同一第一列向延伸区中，第X行所述第二像素驱动电路用于向位于所述第一子显示区中第X行所述第一子发光单元提供驱动电流，其中X为大于等于1且小于等于N1的正整数；
    在同一第一列向延伸区中，第X行所述第一子像素驱动电路用于向位于所述透光区中第X行第一子发光单元提供驱动电流，其中X为大于等于1且小于等于N1的正整数。
  6. 根据权利要求5所述的显示面板，其中，所述第一子显示区位于所述透光区在行方向上的一侧或两侧。
  7. 根据权利要求5所述的显示面板，其中，第X行第二像素驱动电路和第X行第一子像素驱动电路共用同一栅极驱动信号。
  8. 根据权利要求3-7任一项所述的显示面板，其中，任一行所述第二子像素驱动电路位于任一行所述第一子像素驱动电路在所述第一方向上的一侧。
  9. 根据权利要求3-7任一项所述的显示面板，其中，多个所述第一子像素驱动电路包括相邻的两行第一子像素驱动电路，该相邻的两行第一子像素驱动电路之间至少设置有一行所述第二子像素驱动电路。
  10. 根据权利要求9所述的显示面板，其中，每相邻行所述第一子像素驱动电路之间设置有相同行数的所述第二子像素驱动电路。
  11. 根据权利要求1-7任一项所述的显示面板，其中，所述显示面板还包括正常显示区，所述正常显示区位于所述第一压缩区远离所述第一外置区的一侧，所述显示面板还包括：
    第三像素驱动电路，位于所述正常显示区，所述第三像素驱动电路在列方向的尺寸大于所述第一像素驱动电路在列方向上的尺寸。
  12. 根据权利要求11所述的显示面板，其中，所述正常显示区的像素密度等于所述第一显示区的像素密度。
  13. 根据权利要求1-7任一项所述的显示面板，其中，所述第一外置区在列方向尺寸与所述第一压缩区在列方向尺寸的比值为1:12-1:8。
  14. 根据权利要求5-7任一项所述的显示面板，其中，所述显示面板还包括第二显示区，所述第二显示区包括第二外置区和第二压缩区，所述第二外置区位于所述第一外置区远离所述第一压缩区的一侧，所述第二压缩区位于所述第二外置区远离所述第一外置区的一侧，所述显示面板还包括：
    多个第四发光单元，多个所述第四发光单元沿行列方向阵列分布于所述第二显示区；
    多个第四像素驱动电路，与所述第四发光单元个数相同，多个所述第四像素驱动电路沿行列方向阵列分布于所述第二压缩区，至少部分所述第四像素驱动电路用于向位于所述第二外置区的第四发光单元提供驱动电流；
    其中，所述第四像素驱动电路的行数等于所述第四发光单元的行数，所述第四像素驱动电路的列数等于所述第四发光单元的列数。
  15. 根据权利要求14所述的显示面板，其中，所述第二显示区包括沿行方向分布的多个第二列向延伸区，且所述第二列向延伸区沿列方向延伸，所述第二列向延伸区、所述第四发光单元、所述第一发光单元的列数相同，所述第二列向延伸区与所述第一列向延伸区在列方向上正对；
    其中，每一所述第二列向延伸区中对应设置有一列所述第四发光单元和一列所述第四像素驱动电路。
  16. 根据权利要求15所述的显示面板，其中，
    多个所述第四发光单元包括：
    N3行M列第三子发光单元，所述第三子发光单元位于所述第二外置区，其中，第X+1行第三子发光单元位于第X行第三子发光单元在第二方向上的一侧，所述第二方向与所述第一方向相反，X为大于等于1且小于等于N3-1的正整数；
    N4行M列第四子发光单元，所述第四子发光单元位于所述第二压缩区，其中，第X+1行第四子发光单元位于第X行第四子发光单元在所述第二方向上的一侧，X为大于等于1且小于等于N4-1的正整数；
    所述第四像素驱动电路包括：
    N3行M列第三子像素驱动电路，至少部分所述第三子像素驱动电路用于向所述第三子发光单元提供驱动电流，其中，第X+1行第三子像素驱动电路位于第X行第三子像素驱动电路在所述第二方向上的一侧，X为大于等于1且小于等于N3-1的正整数；
    N4行M列第四子像素驱动电路，所述第四子像素驱动电路用于向所述第四子发光单元提供驱动电流，其中，第X+1行第四子像素驱动电路位于第X行第四子像素驱动电路在所述第二方向上的一侧，X为大于等于1且小于等于N4-1的正整数；
    其中，N3为大于等于1的正整数。
  17. 根据权利要求16所述的显示面板，其中，
    第X行第三子像素驱动电路用于向与其位于同一第二列向延伸区的第X行第三子发光单元提供驱动电流，其中X为大于等于1且小于等于N3的正整数；
    第X行第四子像素驱动电路用于向与其位于同一第二列向延伸区的第X行第四子发光单元提供驱动电流，其中，X为大于等于1且小于等于N4的正整数。
  18. 根据权利要求16所述的显示面板，其中，所述第二外置区包括第二透光区和第二子显示区，所述第二透光区和第二子显示区沿行方向分布，所述显示面板还包括：
    多个第五像素驱动电路，位于所述第二子显示区，多个所述第五像素驱动电路包括沿行列方向分布的N3行M2列第五像素驱动电路，第X+1行第五像素驱动电路位于第X行第五像素驱动电路在所述第二方向上的一侧，其中，X为大于等于1且小于等于N3-1的正整数，M2等于所述第二子显示区中第三子发光单元的列数；
    位于所述第二子显示区的每列第二列向延伸区对应设置有一列所述第五像素驱动电路；
    在同一第二列向延伸区中，第X行所述第五像素驱动电路用于向位于所述第二子显示区的第X行所述第三子发光单元提供驱动电流，其中X为大于等于1且小于等于N3的正整数；
    在同一第二列向延伸区中，第X行所述第三子像素驱动电路用于向位于所述第二透光区的第X行第三子发光单元提供驱动电流，其中X为大于等于1且小于等于N3的正整数。
  19. 根据权利要求18所述的显示面板，其中，所述第二子显示区位于所述透光区在行方向上的一侧或两侧。
  20. 根据权利要求18所述的显示面板，其中，所述第二透光区和所述第一透光区在列方向上相对设置。
  21. 根据权利要求18所述的显示面板，其中，第X行第五像素驱动电路和第X行第三子像素驱动电路共用同一栅极驱动信号，X为大于等于1且小于等于N3的正整数。
  22. 根据权利要求16-21任一项所述的显示面板，其中，任一行所述第四子像素驱动电路位于任一行所述第三子像素驱动电路在所述第二方向上的一侧。
  23. 根据权利要求16-21任一项所述的显示面板，其中，多个所述第三子像素驱动电路包括相邻的两行第三子像素驱动电路，该相邻的两行第三子像素驱动电路之间至少设置有一行所述第四子像素驱动电路。
  24. 根据权利要求21所述的显示面板，其中，每相邻两行所述第三子像素驱动电路之间设置有相同行数的所述第四子像素驱动电路。
  25. 一种显示装置，其中，包括：
    权利要求1-24任一项所述的显示面板；
    摄像头，所述摄像头的至少部分与所述显示面板的第一外置区正对。
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