WO2020113874A1 - 电力电子换流器的定导纳建模与实时仿真方法 - Google Patents

电力电子换流器的定导纳建模与实时仿真方法 Download PDF

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WO2020113874A1
WO2020113874A1 PCT/CN2019/081194 CN2019081194W WO2020113874A1 WO 2020113874 A1 WO2020113874 A1 WO 2020113874A1 CN 2019081194 W CN2019081194 W CN 2019081194W WO 2020113874 A1 WO2020113874 A1 WO 2020113874A1
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branch
current
equivalent
admittance
simulation
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PCT/CN2019/081194
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French (fr)
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汪可友
徐晋
李国杰
冯琳
韩蓓
江秀臣
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上海交通大学
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Priority claimed from CN201811491963.0A external-priority patent/CN109543339B/zh
Priority claimed from CN201811491738.7A external-priority patent/CN109614687B/zh
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Priority to CA3101654A priority Critical patent/CA3101654C/en
Publication of WO2020113874A1 publication Critical patent/WO2020113874A1/zh

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  • the present invention relates to the technical field of power systems, and in particular, to a method for definite admittance modeling and real-time simulation of power electronic converters.
  • Electromagnetic transient simulation is an important part of power system simulation. Its basic theory and method were proposed by H.W. Dommel of Canada in the late 1960s. For different types of applications, electromagnetic transient simulation can be divided into offline simulation and real-time simulation. Generally speaking, the calculation time of offline simulation tools is much longer than the duration of the transient phenomena studied. When faced with time-critical application scenarios, the real-time emulator cooperates with each other through hardware and software platforms to ensure the precise synchronization of the emulator's internal clock and the real-world clock, and can provide a high degree of simulation for various power system protection and control devices. The actual test environment on site.
  • the modeling methods mainly used in power electronic switches can be divided into the following two types:
  • the binary resistance modeling will cause the admittance mutation of the switch branch when the switch state changes. Therefore, the admittance matrix needs to be re-formed for each switching action, which is inefficient and difficult to meet the real-time requirements. It is more used in offline electromagnetic Transient simulation tools, such as PSCAD-EMTDC, Matlab Simpower Simulation Toolbox, EMTP series simulation software, etc.;
  • the equivalent admittance of small inductance and small capacitance can be made equal through reasonable parameter settings, avoiding the change of the admittance matrix caused by the switching action, and greatly improving the simulation efficiency , Is used in the small step model library of real-time digital simulator RTDS.
  • this kind of definite admittance model has obvious transient errors after switching, and the power loss of the converter obtained by simulation is much larger than the actual situation, which seriously affects the accuracy of simulation. This is called the virtual power loss problem.
  • the object of the present invention is to provide a method for definite admittance modeling and real-time simulation of power electronic converters, which avoids the switching action When the admittance matrix changes, it solves the problem of virtual power loss of the traditional modeling and simulation method in real-time simulation of power electronic converters, which greatly improves the simulation accuracy.
  • the present invention is achieved by the following technical solutions.
  • a fixed admittance modeling and real-time simulation method for power electronic converter includes the following steps:
  • the current simulation time t is the initial time of the simulation, the historical current source size of the resistance branch, the inductance branch, the capacitance branch and the switch branch is zero, and the equivalent current of the independent voltage source branch is calculated separately; if the current The simulation time t is not the initial time of the simulation, then the resistance branch and the inductor branch at the current simulation time are calculated according to the branch voltage and the branch current of the resistance branch, the inductor branch, the capacitor branch and the switch branch at the previous simulation time , The historical current source size of the capacitor branch and the switch branch, the equivalent current of the independent voltage source branch is calculated separately;
  • the calculation formula of the equivalent admittance of each branch is as follows:
  • R is the resistance value of the resistance branch
  • the equivalent admittance of the inductance branch is: Where L is the inductance value of the inductance branch and ⁇ t is the time step of real-time simulation;
  • C is the capacitance value of the capacitance branch
  • the equivalent admittance of the switch branch is: Where C dc is the capacitance on the DC side of the power electronic converter, and Lac is the inductance on the AC side of the power electronic converter;
  • R s is the internal resistance of the independent voltage source branch.
  • I h_L (t) i L (t- ⁇ t); where, i L (t- ⁇ t) is the branch current of the inductance branch at the last simulation time;
  • I h_C (t) -Y b_C u C (t- ⁇ t); where u C (t- ⁇ t) is the branch voltage at a simulation time on the capacitor branch, and Y b_C is the capacitor Equivalent admittance of branch;
  • V s (t) is the internal potential of the independent voltage source branch
  • R s is the internal resistance of the independent voltage source branch
  • the historical current of the inductor branch I h_L (t) i L (t- ⁇ t); where, i L (t- ⁇ t) is the branch current of the inductor branch at the last simulation time;
  • I h_C (t) -Y b_C u C (t- ⁇ t); where u C (t- ⁇ t) is the branch voltage at a simulation time on the capacitor branch, and Y b_C is the capacitor branch Equivalent admittance of the road;
  • u sw (t- ⁇ t) is the branch voltage of the switching branch at the last simulation time
  • i sw (t- ⁇ t) is the branch current of the switching branch at the last simulation time
  • Y b_sw is the equivalent of the switching branch Admittance
  • V s (t) is the internal potential of the independent voltage source branch
  • R s is the internal resistance of the independent voltage source branch
  • the present invention has the following technical effects:
  • the equivalent model of the switch branch in the power electronic converter of the present invention adopts the same equivalent admittance in the on state and the off state, which avoids the reformation of the conduction due to the change of the switch state in the simulation process
  • the operation of the nano-matrix makes the transient error after the switching action quickly decay.
  • the real-time simulation waveform using the method of the present invention is closer to the ideal switching waveform than the traditional inductance-capacitance equivalent method, which greatly improves the real-time simulation accuracy of the power electronic converter.
  • the virtual power loss of power electronic converters increases with increasing switching frequency As shown in Figure 3, it is as high as 60% at 100kHz, which is seriously inconsistent with the actual situation.
  • the virtual power loss of the power electronic converter basically does not change with the switching frequency, and is always maintained at a level close to zero, which is closer to the converter composed of the ideal switch.
  • FIG. 1 is a schematic diagram of an equivalent model of a resistance branch, an inductance branch, a capacitance branch, and a switch branch of the present invention
  • FIG. 3 is a comparison of voltage waveforms of a fixed admittance modeling and real-time simulation method of a three-level converter according to Embodiment 1 of the present invention
  • FIG. 4 is the virtual power loss rate of the three-level converter with fixed admittance modeling and real-time simulation method according to Embodiment 1 of the present invention at different converter switching frequencies;
  • FIG. 5 is a circuit diagram of a fixed admittance modeling and real-time simulation method of a three-level converter according to Embodiment 1 of the present invention; wherein, (a) is a circuit diagram of a single-phase three-level converter, and (b) is a general-purpose three-electric converter.
  • FIG. 6 is a flowchart of a method for fixed admittance modeling and real-time simulation of a three-level converter according to Embodiment 1 of the present invention.
  • Figure 8 is a simple circuit containing a single-phase two-level bridge converter
  • FIG. 9 is a flow chart of a method for fixed admittance modeling and real-time simulation of a two-level bridge converter according to Embodiment 2 of the present invention.
  • Embodiment 1 The method for modeling and real-time simulation of three-level converter with constant admittance, including the following steps:
  • Step (1) The three-level converter and the branches and nodes in the circuit where it is located are respectively numbered, wherein the number of the ground node is 0;
  • Step (2) Replace each resistance branch, inductor branch, capacitor branch and switch branch with an equivalent model of an equivalent admittance and a historical current source in parallel, and an independent voltage source branch with an equivalent Replace the equivalent model of an admittance with an equivalent current source in parallel;
  • the equivalent admittance calculation formula of each branch is as follows:
  • R is the resistance value of the resistance branch
  • L is the inductance value of the inductance branch
  • ⁇ t is the time step of real-time simulation
  • C is the capacitance value of the capacitance branch
  • the switch branch that is, the switch branch in the three-level converter, is replaced with an equivalent model of an equivalent admittance and a historical current source in parallel.
  • the switch branch is in the on state and off state
  • the same equivalent admittance is used below, that is, the equivalent admittance of the switch branch is:
  • C dc is the capacitance on the DC side of the three-level converter
  • Lac is the inductance on the AC side of the three-level converter
  • R s is the internal resistance of the independent voltage source branch
  • Step (3) According to the equivalent admittance of each branch, calculate the node admittance matrix of the simulated circuit;
  • Step (4) If the current simulation time t is the initial time of the simulation, the historical current source size of the resistance branch, the inductance branch, the capacitance branch and the switch branch is zero, and the equivalent current of the independent voltage source branch is additionally calculated, If the current simulation time t is not the initial time of the simulation, the resistance branch and the inductance at the current simulation time are calculated according to the branch voltage and the branch current of the resistance branch, the inductor branch, the capacitor branch and the switch branch at the previous simulation time The historical current source size of the branch, capacitor branch and switch branch, and the equivalent current of the independent voltage source branch are additionally calculated; among them, the calculation formulas of the historical current and equivalent current of each branch are as follows:
  • i L (t- ⁇ t) is the branch current of the inductor branch at the last simulation time
  • u C (t- ⁇ t) is the branch voltage of the capacitor branch at a simulation time
  • Y b_C is the equivalent admittance of the capacitor branch
  • u sw (t- ⁇ t) is the branch voltage of the switching branch at the last simulation time
  • i sw (t- ⁇ t) is the branch current of the switching branch at the last simulation time
  • Y b_sw is the equivalent of the switching branch Admittance
  • V s (t) is the internal potential of the independent voltage source branch
  • R s is the internal resistance of the independent voltage source branch
  • Step (5) According to the size of the historical current source and equivalent current source at the current simulation time, calculate the magnitude of the injection current flowing into each node;
  • Step (6) According to the injection current flowing into each node, combined with the node admittance matrix, calculate the voltage of each node;
  • Step (7) According to the voltage of each node and the equivalent admittance of each branch equivalent model, calculate the branch voltage and branch current of each branch;
  • Step (8) If the last simulation time has not been reached, return to step (4) and enter the next simulation time t+ ⁇ t, otherwise end.
  • FIG. 5 For ease of understanding, a simple circuit of a single-phase three-level converter as shown in FIG. 5 is taken as a specific application example to further elaborate the above embodiments of the present invention, but it should not be used to limit the protection scope of the present invention.
  • PXIe-8135 PXIe controller
  • PXIe-P of National Instruments NI
  • PXIe controller the PXIe controller
  • NI National Instruments
  • the PXIe controller is mainly responsible for the simulation of the converter control system
  • the FPGA module is mainly responsible for the simulation of the three-level converter circuit part, and they communicate through the PXIe bus.
  • the PXIe controller can also communicate with the host computer via Ethernet to display real-time simulation waveforms on the host computer.
  • the FPGA module can be connected to an external controller and an oscilloscope through the I/O port to perform hardware-in-the-loop simulation.
  • the programs in the host computer, PXIe controller and FPGA module are all unifiedly programmed through the Labview development environment of National Instruments (NI).
  • NI National Instruments
  • the program in the host computer completes the communication with the PXIe controller and the simulation waveform display and other functions;
  • the program in the PXIe controller completes the communication with the host computer, reads and writes data from the FPGA module, and simulates commutation The controller's control system and other functions.
  • the above program is not within the protection scope of the present invention, and the relevant program examples are provided on the official website of the National Instruments (NI) company, so they will not be described in detail.
  • the FPGA module is the specific implementation carrier of the present invention. It is programmed by Labview. See FIG. 5.
  • FIG. 5 is a circuit diagram of a fixed admittance modeling and real-time simulation method of a single-phase three-level converter in this specific application example.
  • Branch 1 Independent voltage source branch
  • Branch 2 (capacitor branch)
  • Branch 3 (capacitor branch)
  • Branch 8 (resistance branch)
  • Branch 1 Independent voltage source branch
  • Branch 1 Independent voltage source branch
  • FIG. 2 and FIG. 3 are the comparison between the method provided by the above embodiment of the present invention and the traditional real-time simulation method.
  • FIG. 4 is the two methods under different converter switching frequencies Virtual power loss rate.
  • the real-time simulation waveform using the method provided by the above embodiment of the present invention is closer to the ideal switching waveform than the traditional inductance-capacitance equivalent method, which greatly improves the real-time simulation of the three-level converter Precision.
  • the virtual power loss of a three-level converter increases with increasing switching frequency Large, as shown in Figure 4, at 100kHz up to more than 60%, which is seriously inconsistent with the actual.
  • the virtual power loss of the three-level converter basically does not change with the switching frequency, and is always maintained at a level close to zero, which is closer to the converter composed of an ideal switch.
  • Embodiment 2 The method for modeling and real-time simulation of two-level converter with constant admittance, including the following steps:
  • Branch 3 (capacitor branch)
  • Branch 7 (resistance branch)
  • Branch 1 Independent voltage source branch
  • the current simulation time t 1 ⁇ s, which is not the initial time of the simulation, according to the branch voltage and branch current at a simulation time on each branch, the historical current source size of each branch at the current simulation time is calculated.
  • the historical current calculation formula is as follows:
  • Branch 1 Independent voltage source branch

Abstract

一种电力电子换流器的定导纳建模与实时仿真方法，包括如下步骤：电力电子换流器中的电阻支路、电感支路、电容支路和开关支路用一个等效导纳和一个历史电流源并联的等效模型替换，独立电压源支路用一个等效导纳和一个等效电流源并联的等效模型替换，根据各个支路的等效导纳，计算被仿真电路的节点导纳矩阵，根据当前仿真时刻的历史电流源和等效电流源的大小，结合节点导纳矩阵以及各个支路的等效导纳，计算出各个支路电压和支路电流，完成最后的仿真。本发明在避免开关动作后重新形成导纳矩阵的同时，可以使开关动作后的暂态误差快速衰减，解决了传统建模仿真方法在用于电力电子换流器实时仿真时的虚拟功率损耗问题，极大地提高了仿真精度。

Description

电力电子换流器的定导纳建模与实时仿真方法 技术领域
本发明涉及电力系统技术领域，具体地，涉及一种电力电子换流器的定导纳建模与实时仿真方法。
背景技术
电磁暂态仿真是电力系统仿真的重要组成部分。其基本理论与方法由加拿大的H.W Dommel于20世纪60年代末提出。针对不同类型的应用,电磁暂态仿真可分为离线仿真和实时仿真。通常来说,离线仿真工具的计算时间要远多于所研究暂态现象的持续时间。而在面向对时间有严格要求的应用场景时，实时仿真器通过软硬件平台相互配合，保证了仿真器内部时钟与现实世界时钟的精确同步，可以为各种电力系统保护与控制装置提供高度模拟现场实际的测试环境。
随着越来越多的电力电子设备引入电力系统，电力电子开关的高频离散特性给电力电子设备的建模与实时仿真的实现带来了巨大挑战。目前，在电磁暂态仿真中，电力电子开关主要采用的建模方法可以分为以下两种：
1)二值电阻建模，即开关导通时用小电阻等效，关断时用大电阻等效；
2)基于电感/电容等效的定导纳建模，即开关导通时用小电感等效，关断时用小电容等效；
二值电阻建模在开关状态变化时将引起开关支路的导纳突变，因此每次开关动作都需要重新形成导纳矩阵，效率低下，难以满足实时性要求，更多地应用于离线的电磁暂态仿真工具中，如PSCAD-EMTDC，Matlab的Simpower Simulation Toolbox，EMTP系列仿真软件等；
基于电感/电容等效的定导纳建模可以通过合理的参数设置，使小电感和小电容的等效导纳相等，避免了因开关动作导致的导纳矩阵改变，极大地提高了仿真效率，被应用于实时数字仿真仪RTDS的小步长模型库中。然而，受电感和电容物理特性的制约，这种定导纳模型在开关动作后存在明显暂态误差，仿真得到的换流器功率损耗远大于实际情况，严重影响了仿真精度，这一现象被称为虚拟功率损耗问题。
目前没有发现同本发明类似技术的说明或报道，也尚未收集到国内外类似的资料。
发明内容
针对已有电力电子换流器建模方法的不足，本发明的目的在于提供一种专门用于电力电 子换流器的定导纳建模与实时仿真方法，该方法在避免因开关动作导致的导纳矩阵改变的同时，解决了传统建模仿真方法在电力电子换流器实时仿真时的虚拟功率损耗问题，极大地提高了仿真精度。
本发明是通过以下技术方案实现的。
一种电力电子换流器的定导纳建模与实时仿真方法，包括如下步骤：
S1，将电力电子换流器及其所在电路中的各个支路和节点分别进行编号，其中接地节点的编号为0；
S2，将电阻支路、电感支路、电容支路和开关支路，分别用一个等效导纳和一个历史电流源并联的等效模型替换；独立电压源支路用一个等效导纳和一个等效电流源并联的等效模型替换，计算各个支路等效模型的等效导纳，其中，开关支路等效模型在导通状态下和关断状态下采用相同的等效导纳；
S3，根据各个支路的等效导纳，计算被仿真电路的节点导纳矩阵；
S4，如果当前仿真时刻t是仿真初始时刻，则电阻支路、电感支路、电容支路和开关支路的历史电流源大小取零，独立电压源支路的等效电流另外计算；如果当前仿真时刻t不是仿真初始时刻，则根据上一仿真时刻电阻支路、电感支路、电容支路和开关支路的支路电压和支路电流，计算出当前仿真时刻电阻支路、电感支路、电容支路和开关支路的历史电流源大小，独立电压源支路的等效电流另外计算；
S5，根据当前仿真时刻的历史电流源和等效电流源的大小，计算流入各个节点的注入电流大小；
S6，根据流入各个节点的注入电流，结合节点导纳矩阵，计算出各个节点的电压大小；
S7，根据各个节点的电压，结合各个支路的等效导纳，计算出各个支路电压和支路电流；
S8，如果没有到达最后的仿真时刻，则返回S4，进入下一仿真时刻t+Δt；否则结束。
优选地，各个支路的等效导纳计算公式如下：
电阻支路的等效导纳为：
Figure PCTCN2019081194-appb-000001
其中，R是电阻支路的电阻值；
电感支路的等效导纳为：
Figure PCTCN2019081194-appb-000002
其中，L是电感支路的电感值，Δt是实时仿真的时间步长；
电容支路的等效导纳为：
Figure PCTCN2019081194-appb-000003
其中，C是电容支路的电容值；
开关支路的等效导纳为：
Figure PCTCN2019081194-appb-000004
其中，C dc是电力电子换流器直流侧的电容，L ac 是电力电子换流器交流侧的电感；
独立电压源支路的等效导纳为：
Figure PCTCN2019081194-appb-000005
其中，R s是独立电压源支路的内电阻。
当所述的电力电子换流器是三电平换流器时，历史电流和等效电流的计算公式如下：
电阻支路的历史电流为：I h_R＝0；
电感支路的历史电流为：I h_L(t)＝i L(t-Δt)；其中，i L(t-Δt)是上一仿真时刻电感支路的支路电流；
电容支路的历史电流为：I h_C(t)＝-Y b_Cu C(t-Δt)；其中，u C(t-Δt)是电容支路上一仿真时刻的支路电压，Y b_C是电容支路的等效导纳；
导通时,开关支路的历史电流为：I h_sw(t)＝-5.04Y b_swu sw(t-Δt)-i sw(t-Δt)；关断时,开关支路的历史电流为：I h_sw(t)＝Y b_swu sw(t-Δt)-0.39i sw(t-Δt)；其中，u sw(t-Δt)是上一仿真时刻开关支路的支路电压，i sw(t-Δt)是上一仿真时刻开关支路的支路电流，Y b_sw是开关支路的等效导纳；
独立电压源支路的等效电流源为
Figure PCTCN2019081194-appb-000006
其中,V s(t)是独立电压源支路的内电势大小，R s是独立电压源支路的内电阻大小；
当所述的电力电子换流器是二电平换流器时，历史电流和等效电流的计算公式如下：
电阻支路的历史电流I h_R＝0；
电感支路的历史电流I h_L(t)＝i L(t-Δt)；其中，i L(t-Δt)是上一仿真时刻电感支路的支路电流；
电容支路的历史电流：I h_C(t)＝-Y b_Cu C(t-Δt)；其中，u C(t-Δt)是电容支路上一仿真时刻的支路电压，Y b_C是电容支路的等效导纳；
导通时，开关支路的历史电流：
Figure PCTCN2019081194-appb-000007
关断时，开关支路的历史电流：
Figure PCTCN2019081194-appb-000008
或者采用
导通时，开关支路的历史电流
Figure PCTCN2019081194-appb-000009
关断时，开关支路的历史电流
Figure PCTCN2019081194-appb-000010
其中,u sw(t-Δt)是上一仿真时刻开关支路的支路电压，i sw(t-Δt)是上一仿真时刻开关支路的支路电流，Y b_sw是开关支路的等效导纳；
独立电压源支路的等效电流源：
Figure PCTCN2019081194-appb-000011
其中,V s(t)是独立电压源支路的内电势大小，R s是独立电压源支路的内电阻大小。
与现有技术相比，本发明具有如下技术效果:
(1)本发明在电力电子换流器中的开关支路等效模型在导通状态下和关断状态下采用相同的等效导纳，避免了仿真过程中因开关状态改变而重新形成导纳矩阵的操作，使得开关动作后的暂态误差快速衰减。
(2)采用本发明方法的实时仿真波形比传统的基于电感电容等效法更贴近理想开关波形，极大地提高了电力电子换流器的实时仿真精度。对于理想开关组成的换流器而言，没有虚拟功率损耗，而在传统的基于电感/电容等效的仿真方法下，电力电子换流器的虚拟功率损耗随着开关频率的增大而增大，如图3所示，在100kHz时高达60％以上，和实际严重不符。在本发明方法下，电力电子换流器的虚拟功率损耗基本不随开关频率变化，始终维持在接近零的水平，更加贴近理想开关组成的换流器。
附图说明
通过阅读参照以下附图对非限制性实施例所作的详细描述，本发明的其它特征、目的和优点将会变得更明显：
图1是本发明电阻支路、电感支路、电容支路以及开关支路的等效模型示意图；
图2是本发明实施例1三电平换流器的定导纳建模与实时仿真方法电流波形对比；
图3是本发明实施例1三电平换流器的定导纳建模与实时仿真方法电压波形对比；
图4是本发明实施例1三电平换流器的定导纳建模与实时仿真方法在不同换流器开关频率下的虚拟功率损耗率；
图5是本发明实施例1三电平换流器的定导纳建模与实时仿真方法的电路图；其中，(a)为单相三电平换流器电路图，(b)为通用三电平换流器等效电路图，(c)为三电平换流器定导纳等效模型电路图；
图6是本发明实施例1三电平换流器的定导纳建模与实时仿真方法流程图。
图7是本发明实施例2两电平换流器的定导纳建模与实时仿真方法电流波形对比；
图8是含单相两电平桥式换流器的简单电路；
图9是本发明实施例2两电平桥式换流器的定导纳建模与实时仿真方法流程图。
具体实施方式
下面对本发明的实施例作详细说明：本实施例在以本发明技术方案为前提下进行实施，给出了详细的实施方式和具体的操作过程。应当指出的是，对本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。
实施例1：三电平换流器的定导纳建模与实时仿真方法，包括下列步骤：
步骤(1)将三电平换流器及其所在电路中的支路和节点分别进行编号，其中接地节点的编号为0；
步骤(2)将各个电阻支路、电感支路、电容支路和开关支路，分别用一个等效导纳和一个历史电流源并联的等效模型替换，独立电压源支路用一个等效导纳和一个等效电流源并联的等效模型替换；其中，各个支路的等效导纳计算公式如下：
电阻支路的等效导纳
Figure PCTCN2019081194-appb-000012
其中，R是电阻支路的电阻值；
电感支路的等效导纳
Figure PCTCN2019081194-appb-000013
其中，L是电感支路的电感值，Δt是实时仿真的时间步长；
电容支路的等效导纳
Figure PCTCN2019081194-appb-000014
其中，C是电容支路的电容值；
所述的开关支路，即三电平换流器中的开关支路，用一个等效导纳和一个历史电流源并联的等效模型替换，开关支路在导通状态下和关断状态下采用相同的等效导纳，即开关支路的等效导纳为：
Figure PCTCN2019081194-appb-000015
其中，C dc是三电平换流器直流侧的电容，L ac是三电平换流器交流侧的电感；
独立电压源支路的等效导纳
Figure PCTCN2019081194-appb-000016
其中，R s是独立电压源支路的内电阻；
步骤(3)根据各个支路的等效导纳，计算被仿真电路的节点导纳矩阵；
步骤(4)如果当前仿真时刻t是仿真初始时刻，则电阻支路、电感支路、电容支路和开关支路的历史电流源大小取零，独立电压源支路的等效电流另外计算，如果当前仿真时刻t不是仿真初始时刻，则根据上一仿真时刻电阻支路、电感支路、电容支路和开关支路的支路电压和支路电流，计算出当前仿真时刻电阻支路、电感支路、电容支路和开关支路的历史电流源大小，独立电压源支路的等效电流另外计算；其中，各个支路的历史电流和等效电流的计算公式如下：
电阻支路的历史电流I h_R＝0；
电感支路的历史电流I h_L(t)＝i L(t-Δt)
其中，i L(t-Δt)是上一仿真时刻电感支路的支路电流；
电容支路的历史电流I h_C(t)＝-Y b_Cu C(t-Δt)
其中，u C(t-Δt)是电容支路上一仿真时刻的支路电压，Y b_C是电容支路的等效导纳；
导通时,开关支路的历史电流I h_sw(t)＝-5.04Y b_swu sw(t-Δt)-i sw(t-Δt)
关断时,开关支路的历史电流I h_sw(t)＝Y b_swu sw(t-Δt)-0.39i sw(t-Δt)
其中,u sw(t-Δt)是上一仿真时刻开关支路的支路电压，i sw(t-Δt)是上一仿真时刻开关支路的支路电流，Y b_sw是开关支路的等效导纳；
独立电压源支路的等效电流源
Figure PCTCN2019081194-appb-000017
其中,V s(t)是独立电压源支路的内电势大小，R s是独立电压源支路的内电阻大小；
步骤(5)根据当前仿真时刻的历史电流源和等效电流源的大小，计算流入各个节点的注入电流大小；
步骤(6)根据流入各个节点的注入电流，结合节点导纳矩阵，计算出各个节点的电压大小；
步骤(7)根据各个节点的电压，结合各个支路等效模型的等效导纳，计算出各个支路的支路电压和支路电流；
步骤(8)如果没有到达最后的仿真时刻，则返回步骤(4)，进入下一仿真时刻t+Δt，否则结束。
为便于理解，下面将以一个如图5所示的单相三电平换流器的简单电路为具体应用实例，对本发明上述实施例进一步阐述，但不应以此限制本发明的保护范围。
在具体实现该三电平换流器的实时仿真时，本具体应用实例中采用如下硬件平台：PXIe机箱内分别装有美国国家仪器(NI)公司的PXIe-8135(PXIe控制器)和PXIe-7975R(FPGA模块)，PXIe控制器主要负责换流器控制系统的仿真，FPGA模块主要负责三电平换流器电路部分的仿真，它们之间通过PXIe总线进行通信。此外，PXIe控制器还可以通过以太网与上位机进行通信，在上位机上显示实时仿真波形，FPGA模块可以通过I/O端口与外置控制器和示波器相连，进行硬件在环仿真。
上位机、PXIe控制器和FPGA模块中的程序都是通过美国国家仪器(NI)公司的Labview开发环境进行统一编程。通过Labview编程，上位机中的程序完成与PXIe控制器的通讯以及仿真波形显示等功能；PXIe控制器中的程序完成与上位机的通信、从FPGA模块中读取和写入数据、模拟换流器的控制系统等功能。上述程序不属于本发明保护范围，且美国国家仪器(NI)公司官网上提供相关的程序范例，故不再详细描述。而FPGA模块是本发明的具体实施载体，通过Labview编程，参见图5，图5是本一具体应用实例的单相三电平换流器的定导纳建模与实时仿真方法电路图。
本具体应用实例提供的单相三电平换流器的定导纳建模与实时仿真方法的实施步骤如下：
(1)将三电平换流器及其所在电路中的各个支路和节点分别进行编号，如图所5b示；
(2)将各个电阻支路、电感支路、电容支路以及开关支路，分别用一个等效导纳和一个历史电流源并联的如图1所示的等效模型替换，独立电压源支路用一个等效导纳和一个等效电流源并联的等效模型替换，仿真步长取1μs，则各个支路的等效导纳如下：
支路1(独立电压源支路)
Figure PCTCN2019081194-appb-000018
支路2(电容支路)
Figure PCTCN2019081194-appb-000019
支路3(电容支路)
Figure PCTCN2019081194-appb-000020
支路4(开关支路)
Figure PCTCN2019081194-appb-000021
支路5(开关支路)
Figure PCTCN2019081194-appb-000022
支路6(开关支路)
Figure PCTCN2019081194-appb-000023
支路7(电感支路)
Figure PCTCN2019081194-appb-000024
支路8(电阻支路)
Figure PCTCN2019081194-appb-000025
计算得到的各个支路的等效导纳值也标注在图5b中；
(3)根据各个支路的等效导纳，计算被仿真电路的节点导纳矩阵Y n
Figure PCTCN2019081194-appb-000026
(4.0)当前仿真时刻t＝0μs，是仿真初始时刻，则电阻支路、电感支路、电容支路以及开关支路的历史电流源大小取零，独立电压源支路的等效电流另外计算，即：
支路1(独立电压源支路)
Figure PCTCN2019081194-appb-000027
支路2(电容支路)I h_Cdc1＝0A
支路3(电容支路)I h_Cdc2＝0A
支路4(关断的开关支路)I h_sw1＝0A
支路5(关断的开关支路)I h_sw2＝0A
支路6(导通的开关支路)I h_sw3＝0A
支路7(电感支路)I h_L＝0A
支路8(电阻支路)I h_R＝0A
(5.0)根据当前仿真时刻的历史电流源和等效电流源的大小，计算流入各个节点的注入电流大小(流入为正，流出为负)：
节点1的注入电流I n1＝7500A
节点2的注入电流I n2＝-7500A
节点3的注入电流I n3＝0A
节点4的注入电流I n4＝0A
(6.0)已知流入各个节点的注入电流，结合节点导纳矩阵，根据节点电压方程Y nV n＝I n，计算出各个节点的电压大小:
节点1的电压V n1＝3.7125V
节点2的电压V n2＝-3.7125V
节点3的电压V n3＝0V
节点4的电压V n4＝0V
(7.0)根据各个节点的电压，结合各个支路的等效导纳，计算出各个支路的支路电压和支路电流：
支路1(独立电压源支路)V b_Vs＝7.4250V,I b_Vs＝7.4257e3A
支路2(电容支路)V b_Cdc1＝3.7125V,I b_Cdc1＝7.4250e3A
支路3(电容支路)V b_Cdc2＝3.7125V,I b_Cdc2＝7.4250e3A
支路4(开关支路)V b_sw1＝3.7125V,I b_sw1＝0.7425A
支路5(开关支路)V b_sw2＝3.7125V,I b_sw2＝0.7425A
支路6(开关支路)V b_sw3＝0V,I b_sw3＝0A
支路7(电感支路)V b_Lac＝0V,I b_Lac＝0A
支路8(电阻支路)V b_R＝0V,I b_R＝0A
(8.0)当前仿真时刻t＝0μs，没有到达最后的仿真时刻，返回步骤(4.0)，从而进入下一仿真时刻t＝1μs；
进入下一仿真时刻t＝1μs：
(4.1)当前仿真时刻t＝1μs，不是仿真初始时刻，则根据各个支路上一仿真时刻的支路电压和支路电流，计算出当前仿真时刻各个支路的历史电流源大小，各个支路的历史电流计算和等效电流公式如下：
支路1(独立电压源支路)
Figure PCTCN2019081194-appb-000028
支路2(电容支路)I h_Cdc1＝-7.4250e3A
支路3(电容支路)I h_Cdc2＝-7.4250e3A
支路4(关断的开关支路)I h_sw1＝-0.4529A
支路5(关断的开关支路)I h_sw2＝-0.4529A
支路6(导通的开关支路)I h_sw3＝0A
支路7(电感支路)I h_L＝0A
支路8(电阻支路)I h_R＝0A
(5.1)根据当前仿真时刻的历史电流源和等效电流源的大小，计算流入各个节点的注入电流大小；
节点1的注入电流I n1＝1.4925e4A
节点2的注入电流I n2＝-1.4925e4A
节点3的注入电流I n3＝0A
节点4的注入电流I n4＝0A
(6.1)根据流入各个节点的注入电流，结合节点导纳矩阵，计算出各个节点的电压大小；
节点1的电压V n1＝7.3881V
节点2的电压V n2＝-7.3881V
节点3的电压V n3＝3.6998e-16V
节点4的电压V n4＝7.3847e-19V
(7.1)根据各个节点的电压，结合各个支路的等效导纳，计算出各个支路的支路电压和支路电流；
支路1(独立电压源支路)V b_Vs＝14.7762V,I b_Vs＝7.3522e3A
支路2(电容支路)V b_Cdc1＝7.3881V,I b_Cdc1＝7.3512e3A
支路3(电容支路)V b_Cdc2＝7.3881V,I b_Cdc2＝7.3512e3A
支路4(开关支路)V b_sw1＝7.3881V,I b_sw1＝1.0247A
支路5(开关支路)V b_sw2＝7.3881V,I b_sw2＝1.0247A
支路6(开关支路)V b_sw3＝3.6998e-16V,I b_sw3＝7.3995e-17A
支路7(电感支路)V b_Lac＝3.6924e-16V,I b_Lac＝7.3847e-20A
支路8(电阻支路)V b_R＝7.3847e-19V,I b_R＝7.3847e-20A
(8.1)当前仿真时刻t＝1μs，没有到达最后的仿真时刻，返回步骤(4.1)，从而进入下一仿真时刻t＝2μs；
进入下一仿真时刻t＝2μs：
(4.2)当前仿真时刻t＝2μs，不是仿真初始时刻，则根据各个支路上一仿真时刻的支路电压和支路电流，计算出当前仿真时刻各个支路的历史电流源大小和等效电流大小……；此处步骤与前述步骤一致，不再赘述；
如上重复步骤(4)～(8)，直到达到最后的仿真时刻，结束仿真程序。
实施结果请参见图2、图3和图4，图2、图3是本发明上述实施例所提供的方法与传统实时仿真方法结果对比，图4是两种方法在不同换流器开关频率下的虚拟功率损耗率。如图2、图3所示，采用本发明上述实施例所提供的方法的实时仿真波形比传统的基于电感电容等效法更贴近理想开关波形，极大地提高了三电平换流器的实时仿真精度。对于理想开关组成的换流器而言，没有虚拟功率损耗，而在传统的基于电感/电容等效的仿真方法下，三电平换流器的虚拟功率损耗随着开关频率的增大而增大，如图4所示，在100kHz时高达60％以上，和实际严重不符。在本发明方法下，三电平换流器的虚拟功率损耗基本不随开关频率变化，始终维持在接近零的水平，更加贴近理想开关组成的换流器。
实施例2：两电平换流器的定导纳建模与实时仿真方法，包括下列步骤：
(1)将两电平桥式换流器及其所在电路中的支路和节点分别进行编号，如图8所示；
(2)将各个电阻支路、电感支路、电容支路以及开关支路，分别用一个等效导纳和一个历史电流源并联的如图1所示的等效模型替换，独立电压源支路用一个等效导纳和一个等效电流源并联的等效模型替换，仿真步长取1μs，则各个支路的等效导纳如下：
Figure PCTCN2019081194-appb-000029
支路3(电容支路)
Figure PCTCN2019081194-appb-000030
支路4(开关支路)
Figure PCTCN2019081194-appb-000031
支路5(开关支路)
Figure PCTCN2019081194-appb-000032
支路6(电感支路)
Figure PCTCN2019081194-appb-000033
支路7(电阻支路)
Figure PCTCN2019081194-appb-000034
计算得到的各个支路的等效导纳值也标注在图8b中；
(3)根据各个支路的等效导纳，计算被仿真电路的节点导纳矩阵Y n
Figure PCTCN2019081194-appb-000035
(4.0)当前仿真时刻t＝0μs，是仿真初始时刻，则所有支路的历史电流源大小取零，独立电压源支路的等效电流另外计算，即：
支路1(独立电压源支路)
Figure PCTCN2019081194-appb-000036
支路2(电容支路)I h_Cdc1＝0A
支路3(电容支路)I h_Cdc2＝0A
支路4(开关支路)I h_sw1＝0A
支路5(开关支路)I h_sw2＝0A
支路6(电感支路)I h_L＝0A
支路7(电阻支路)I h_R＝0A
(5.0)根据当前仿真时刻的历史电流源和等效电流源的大小，计算流入各个节点的注入电流大小(流入为正，流出为负)：
节点1的注入电流I n1＝7500A
节点2的注入电流I n2＝-7500A
节点3的注入电流I n3＝0A
节点4的注入电流I n4＝0A
(6.0)已知流入各个节点的注入电流，结合节点导纳矩阵，根据节点电压方程Y nV n＝I n， 计算出各个节点的电压大小:
节点1的电压V n1＝3.7125V
节点2的电压V n2＝-3.7125V
节点3的电压V n3＝0V
节点4的电压V n4＝0V
(7.0)根据各个节点的电压，结合各个支路的等效导纳，计算出各个支路电压和支路电流：
支路1(独立电压源支路)V b_Vs＝7.4250V,I b_Vs＝7.4257e3A
支路2(电容支路)V b_Cdc1＝3.7125V,I b_Cdc1＝7.4250e3A
支路3(电容支路)V b_Cdc2＝3.7125V,I b_Cdc2＝7.4250e3A
支路4(开关支路)V b_sw1＝3.7125V,I b_sw1＝0.7425A
支路5(开关支路)V b_sw2＝3.7125V,I b_sw2＝0.7425A
支路6(电感支路)V b_Lac＝0V,I b_Lac＝0A
支路7(电阻支路)V b_R＝0V,I b_R＝0A
(8.0)当前仿真时刻t＝0μs，没有到达最后的仿真时刻，返回步骤(4)，从而进入下一仿真时刻t＝1μs；
(4.1)当前仿真时刻t＝1μs，不是仿真初始时刻，则根据各个支路上一仿真时刻的支路电压和支路电流，计算出当前仿真时刻各个支路的历史电流源大小，各类支路的历史电流计算公式如下：
支路1(独立电压源支路)
Figure PCTCN2019081194-appb-000037
支路2(电容支路)I h_Cdc1＝-7.4250e3A
支路3(电容支路)I h_Cdc2＝-7.4250e3A
支路4(导通的开关支路)I h_sw1＝2.5351A
支路5(关断的开关支路)I h_sw2＝-0.4349A
支路6(电感支路)I h_L＝0A
支路7(电阻支路)I h_R＝0A；
(5.1)根据当前仿真时刻的历史电流源和等效电流源的大小，计算流入各个节点的注入电流大小；
节点1的注入电流I n1＝1.4922e4A
节点2的注入电流I n2＝-1.4925e4A
节点3的注入电流I n3＝2.9700A
节点4的注入电流I n4＝0A；
(6.1)根据流入各个节点的注入电流，结合节点导纳矩阵，计算出各个节点的电压大小：
节点1的电压V n1＝7.3874V
节点2的电压V n2＝-7.3874V
节点3的电压V n3＝7.4213V
节点4的电压V n4＝0.0148V；
(7.1)根据各个节点的电压，结合各个支路的等效导纳，计算出各个支路电压和支路电流：
支路1(独立电压源支路)V b_Vs＝14.7747V,I b_Vs＝7.3523e3A
支路2(电容支路)V b_Cdc1＝7.3874V,I b_Cdc1＝7.3497e3A
支路3(电容支路)V b_Cdc2＝7.3874V,I b_Cdc2＝7.3497e3A
支路4(开关支路)V b_sw1＝-0.0339V,I b_sw1＝2.5283A
支路5(开关支路)V b_sw2＝14.8087V,I b_sw2＝2.5268A
支路6(电感支路)V b_Lac＝7.4065V,I b_Lac＝0.0015A
支路7(电阻支路)V b_R＝0.0148V,I b_R＝0.0015A；
(8.1)当前仿真时刻t＝1μs，没有到达最后的仿真时刻，返回步骤(4)，从而进入下一仿真时刻t＝2μs；
(4.2)当前仿真时刻t＝2μs，不是仿真初始时刻，则根据各个支路上一仿真时刻的支路电压和支路电流，计算出当前仿真时刻各个支路的历史电流源大小……
如上重复步骤(4)～(8),直到达到最后的仿真时刻，结束仿真程序。
以上对本发明的具体实施例进行了描述。需要理解的是，本发明并不局限于上述特定实施方式，本领域技术人员可以在权利要求的范围内做出各种变形或修改，这并不影响本发明的实质内容。

Claims (3)

  1. 一种电力电子换流器的定导纳建模与实时仿真方法，其特征在于，包括如下步骤：
    S1，将电力电子换流器及其所在电路中的各个支路和节点分别进行编号，其中接地节点的编号为0；
    S2，将各个电阻支路、电感支路、电容支路和电力电子换流器中的开关支路，分别用一个等效导纳和一个历史电流源并联的等效模型替换；独立电压源支路用一个等效导纳和一个等效电流源并联的等效模型替换，计算各个支路等效模型的等效导纳，其中，开关支路等效模型在导通状态下和关断状态下采用相同的等效导纳；
    S3，根据各个支路的等效导纳，计算被仿真电路的节点导纳矩阵；
    S4，如果当前仿真时刻t是仿真初始时刻，则电阻支路、电感支路、电容支路和开关支路的历史电流源大小取零，独立电压源支路的等效电流另外计算；
    如果当前仿真时刻t不是仿真初始时刻，则根据上一仿真时刻电阻支路、电感支路、电容支路和开关支路的支路电压和支路电流，计算出当前仿真时刻电阻支路、电感支路、电容支路和开关支路的历史电流源大小，独立电压源支路的等效电流另外计算；
    S5，根据当前仿真时刻的历史电流源和等效电流源的大小，计算流入各个节点的注入电流大小；
    S6，根据流入各个节点的注入电流，结合节点导纳矩阵，计算出各个节点的电压大小；
    S7，根据各个节点的电压，结合各个支路等效模型的等效导纳，计算出各个支路的支路电压和支路电流；
    S8，如果没有到达最后的仿真时刻，则返回S4，进入下一仿真时刻t+Δt；否则结束。
  2. 根据权利要求1所述的电力电子换流器的定导纳建模与实时仿真方法，其特征在于，各个支路等效模型的等效导纳计算公式如下：
    电阻支路的等效导纳为：
    Figure PCTCN2019081194-appb-100001
    其中，R是电阻支路的电阻值；
    电感支路的等效导纳为：
    Figure PCTCN2019081194-appb-100002
    其中，L是电感支路的电感值，Δt是实时仿真的时间步长；
    电容支路的等效导纳为：
    Figure PCTCN2019081194-appb-100003
    其中，C是电容支路的电容值；
    开关支路的等效导纳为：
    Figure PCTCN2019081194-appb-100004
    其中，C dc是电力电子换流器直流侧的电容，L ac是电力电子换流器交流侧的电感；
    独立电压源支路的等效导纳为：
    Figure PCTCN2019081194-appb-100005
    其中，R s是独立电压源支路的内电阻。
  3. 根据权利要求1所述的电力电子换流器的定导纳建模与实时仿真方法，其特征在于，当所述的电力电子换流器是三电平换流器时，历史电流和等效电流的计算公式如下：
    电阻支路的历史电流为：I h_R＝0；
    电感支路的历史电流为：I h_L(t)＝i L(t-Δt)；其中，i L(t-Δt)是上一仿真时刻电感支路的支路电流；
    电容支路的历史电流为：I h_C(t)＝-Y b_Cu C(t-Δt)；其中，u C(t-Δt)是电容支路上一仿真时刻的支路电压，Y b_C是电容支路的等效导纳；
    导通时,开关支路的历史电流为：I h_sw(t)＝-5.04Y b_swu sw(t-Δt)-i sw(t-Δt)；关断时,开关支路的历史电流为：I h_sw(t)＝Y b_swu sw(t-Δt)-0.39i sw(t-Δt)；其中，u sw(t-Δt)是上一仿真时刻开关支路的支路电压，i sw(t-Δt)是上一仿真时刻开关支路的支路电流，Y b_sw是开关支路的等效导纳；
    独立电压源支路的等效电流源为
    Figure PCTCN2019081194-appb-100006
    其中,V s(t)是独立电压源支路的内电势大小，R s是独立电压源支路的内电阻大小；
    当所述的电力电子换流器是二电平换流器时，历史电流和等效电流的计算公式如下：
    电阻支路的历史电流I h_R＝0；
    电感支路的历史电流I h_L(t)＝i L(t-Δt)；其中，i L(t-Δt)是上一仿真时刻电感支路的支路电流；
    电容支路的历史电流：I h_C(t)＝-Y b_Cu C(t-Δt)；其中，u C(t-Δt)是电容支路上一仿真时刻的支路电压，Y b_C是电容支路的等效导纳；
    导通时，开关支路的历史电流：
    Figure PCTCN2019081194-appb-100007
    关断时，开关支路的历史电流：
    Figure PCTCN2019081194-appb-100008
    或者采用
    导通时，开关支路的历史电流
    Figure PCTCN2019081194-appb-100009
    关断时，开关支路的历史电流
    Figure PCTCN2019081194-appb-100010
    其中,u sw(t-Δt)是上一仿真时刻开关支路的支路电压，i sw(t-Δt)是上一仿真时刻开关支路的支路电流，Y b_sw是开关支路的等效导纳；
    独立电压源支路的等效电流源：
    Figure PCTCN2019081194-appb-100011
    其中,V s(t)是独立电压源支路的内电势大小，R s是独立电压源支路的内电阻大小。
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