WO2020113690A1 - 显示面板和显示装置 - Google Patents

显示面板和显示装置 Download PDF

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Publication number
WO2020113690A1
WO2020113690A1 PCT/CN2018/122187 CN2018122187W WO2020113690A1 WO 2020113690 A1 WO2020113690 A1 WO 2020113690A1 CN 2018122187 W CN2018122187 W CN 2018122187W WO 2020113690 A1 WO2020113690 A1 WO 2020113690A1
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WO
WIPO (PCT)
Prior art keywords
fan
display area
source
switch
driver chip
Prior art date
Application number
PCT/CN2018/122187
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English (en)
French (fr)
Inventor
熊志
Original Assignee
惠科股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Priority to US17/043,984 priority Critical patent/US11367371B2/en
Publication of WO2020113690A1 publication Critical patent/WO2020113690A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours

Definitions

  • the present application relates to the field of display technology, in particular to a display panel and a display device.
  • TFT-LCD thin film transistor-liquid crystal Display, thin-film transistor liquid crystal display
  • TFT-LCD thin film transistor-liquid crystal Display, thin-film transistor liquid crystal display
  • the requirements for display quality and product maturity are getting higher and higher, and the product cost is becoming more and more sensitive.
  • the border that is, each Source IC (source driver chip) corresponding area increase is one of the commonly used means.
  • the main purpose of the present application is to propose a display panel aimed at avoiding color shift and ensuring the uniformity of the display effect of the display panel.
  • the display panel proposed in this application includes: a substrate provided with a display area, a fan-out area, and a source driver chip; a feedback line is provided in the display area; and the source driver chip has In the first state and the second state, when the source driver chip is in the first state, the source driver chip inputs a first data signal to the feedback line, and when the source driver chip is in the In the second state, the voltage of the feedback row is fed back to the source driver chip, so that the source driver chip outputs a second data signal to the remaining rows of the display area, each column of the first data signal Set equal to the sum of the second data signals.
  • the source driver chip includes: an operational amplifier having a first input terminal, a second input terminal, and a first output terminal, the first output terminal being connected to the second input terminal, The first output terminal is configured to connect to the display area; a digital-to-analog conversion module is connected to the first input terminal; and a voltage-current conversion module, the voltage-current conversion module has a third input terminal and a second output Terminal, the third input terminal is connected to the first output terminal, and the second output terminal is connected to the second input terminal; and, the switch unit and the controller, when the source chip is in the first In one state, the controller is configured to control the switching unit to connect the first output terminal of the operational amplifier and the display area, and when the source chip is in the second state, the controller is configured To control the switch unit to connect the display area, the voltage-current conversion module and the second input terminal of the operational amplifier.
  • the switch unit includes a first switch and a second switch, the first switch is provided between the first output terminal and the display area, and the second switch is provided in the display area and Between the third input terminal of the voltage-current conversion module; when the first switch is turned on and the second switch is turned off, the source driver chip is in the first state; the controller is A timer, when the timer reaches a preset duration, the second switch is turned on, the first switch is turned off, and the source driver chip is in the second state.
  • the feedback line is configured as a colorless filter setting and the feedback line is designed with a black matrix, so that the feedback line becomes an invalid line.
  • a black matrix design for the feedback row includes the following steps: setting several alignment marks on the substrate corresponding to the feedback row; providing a black matrix photoresist system, and coating the substrate on the substrate corresponding to the feedback row.
  • the black matrix photoresist system forms a photoresist layer, and the photoresist layer covers the feedback line.
  • a plurality of source lines and a plurality of gate lines are provided in the display area, the source lines and the gate lines cross to form a plurality of pixel units, and the first row in the display area
  • the pixel unit is set as the feedback line.
  • a plurality of the source lines divide the feedback row into a plurality of pixel units, and each of the pixel units is connected to a first output terminal of the operational amplifier.
  • a plurality of fan-out wires are provided in the fan-out area, one end of the fan-out wire is connected to the source driver chip, and the other end of the fan-out wire is connected to the source wire;
  • the fan-out wires are arranged symmetrically with respect to the middle of the length direction of the fan-out zone.
  • the resistance value of the fan-out wire is increasing in the middle near the length of the fan-out region.
  • the present application also proposes a display device including the display panel, the display panel including:
  • a substrate, a display area, a fan-out area and a source driving chip are provided on the substrate; a feedback line is provided in the display area; the source driving chip has a first state and a second state when the source electrode When the driving chip is in the first state, the source driving chip inputs a first data signal to the feedback line, and when the source driving chip is in the second state, the voltage of the feedback line is fed back to The source driver chip, so that the source driver chip outputs second data signals to the remaining rows of the display area, and the sum of the first data signal and the second data signal in each column is set equal.
  • the present application proposes a display panel including a substrate.
  • the substrate is provided with a display area, a fan-out area, and a source driver chip.
  • a feedback line is provided in the display area.
  • the source driver chip has a In a state and a second state, when the source driver chip is in the first state, the source driver chip inputs a first data signal to the feedback row, and when the source driver chip is in the first state In the two state, the voltage of the feedback row is fed back to the source driver chip, and the source driver chip outputs a second data signal to the remaining rows of the display area, the second data signal and the first
  • the size of the data signal is set in reverse so that the sum of the first data signal and the second data signal in each column is set equal.
  • the source driver chip of the display panel has a first state and a second state.
  • the source driver chip can send feedback lines Input the first data signal, due to the delay effect of the data line, the size of the first data signal acting on the feedback line is not the same, so the pixel voltage at different positions of the feedback line is inconsistent; at this time, the source driver chip switches to the first In the second state, when the source driver chip is in the second state, different pixel voltages can be fed back to the source driver chip, so that the source driver chip outputs the second data signal to the remaining rows of the display area, the size of the second data signal
  • the size of the first data signal is set in the opposite direction.
  • the sum of the first data signal and the second data signal at different positions in the remaining rows can be set substantially equal, which can make the pixel voltages at different positions in the remaining rows tend to be consistent. Therefore, the display effect of the display panel can be made more uniform, and the color shift phenomenon can be avoided.
  • 1 is a schematic diagram of pixel voltages output by an exemplary source driver chip at different positions
  • FIG. 2 is a waveform diagram of the pixel voltage at position A in FIG. 1;
  • FIG. 3 is a waveform diagram of the pixel voltage at position B in FIG. 1;
  • FIG. 4 is a schematic structural diagram of a display panel of this application.
  • FIG. 5 is a schematic diagram of the display area in FIG. 1;
  • FIG. 6 is a schematic diagram of the source driver chip in FIG. 1 in a first state
  • FIG. 7 is a schematic diagram of the source driver chip in FIG. 1 in a second state.
  • Label name Label name 10 Substrate 400 Voltage current conversion module 20
  • Source line 500 Switch unit 30 Fan out wire 210 First input 11 Display area 220 Second input 12 Fan-out area 230 First output 13
  • Source driver chip 410 Third input 100 Feedback line 420 Second output 200
  • Operational Amplifier 510 First switch 300 D/A conversion module 520 Second switch
  • first”, “second”, etc. are for descriptive purposes only, and cannot be understood as instructions or hints Its relative importance or implicitly indicates the number of technical features indicated.
  • the features defined with “first” and “second” may include at least one of the features either explicitly or implicitly.
  • the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of those skilled in the art to realize. When the combination of technical solutions contradicts or cannot be realized, it should be considered that the combination of such technical solutions does not exist , Nor within the scope of protection required by this application.
  • the present application proposes a display panel, which has good pixel voltage consistency, so that the display distribution of the display panel can be made uniform.
  • the display panel includes a substrate 10, and the substrate 10 is provided with a display area 11, a fan-out area 12 and a source driver chip 13, the display area 11 is provided with a feedback line 100; the source driver chip 13 has a first state and a second state, when the source driver chip 13 is in the first state, the source driver chip 13 to the The first data signal is input to the feedback line 100, and when the source driving chip 13 is in the second state, the voltage of the feedback line 100 is fed back to the source driving chip 13, and the source driving chip 13
  • the remaining rows of the display area 11 output second data signals, the second data signals and the first data signals are arranged in opposite sizes, so that each column of the first data signal and the second data signal The sum of is set equal.
  • the output signals of the source driver chip 13 (output data signal) and the gate driver chip (output scan signal) first respectively pass through the traces of their respective fan-out circuits, and then are transmitted to the display through the scan lines and the data lines respectively In the pixel unit array of the panel.
  • the data line can be equivalent to a low-pass filter in the form of a first-order resistance capacitor, so it will delay the signal ( RC delay) function.
  • the feedback panel 100 is provided on the substrate 10 of the display panel proposed by the present application.
  • the source driver chip 13 of the display panel has a first state and a second state. When the source driver chip 13 is in the first state, the source driver chip 13 The first data signal can be input to the feedback line 100. Due to the delay effect of the data line, the magnitude of the first data signal acting on the feedback line 100 is not the same. Thus, the pixel voltages at different positions of the feedback line 100 are inconsistent; The source driver chip 13 is switched to the second state.
  • the source driver chip 13 When the source driver chip 13 is in the second state, different pixel voltages can be fed back to the source driver chip 13, so that the source driver chip 13 is directed to the remaining rows of the display area 11
  • the second data signal is output, and the size of the second data signal is opposite to the size of the first data signal.
  • the sum of the first data signal and the second data signal at different positions in the remaining rows can be set substantially equal, and then the The pixel voltages in different positions of the remaining rows tend to be consistent, so that the display effect of the display panel can be more uniform, and the color shift phenomenon can be avoided.
  • the source driver chip 13 includes an operational amplifier 200, a digital-to-analog conversion module 300, a voltage-current conversion module 400, a switching unit 500, and a controller (not shown).
  • the operational amplifier 200 has a first input Terminal 210, a second input terminal 220, and a first output terminal 230, the first output terminal 230 is connected to the second input terminal 220, and the first output terminal 230 is configured to connect to the display area 11;
  • the digital-to-analog conversion module 300 is connected to the first input terminal 210;
  • the voltage-current conversion module 400 has a third input terminal 410 and a second output terminal 420, the third input terminal 410 and the first output terminal 230 Connected, the second output terminal 420 is connected to the second input terminal 220; when the source chip is in the first state, the controller is configured to control the switching unit 500 to communicate with the operational amplifier 200, the first output terminal 230 and the display area 11, when the source chip is in the second state, the controller is configured to control the switch unit 500 to communicate with the display area 11, the voltage The current conversion module 400 and the second input 220 of the operational amplifier 200.
  • the voltage-current conversion module 400 is a high voltage input, a low current output, a low voltage input, and a high current output.
  • the low current acts on the operational amplifier 200.
  • the power of the operational amplifier 200 is low.
  • the charging speed of the area where the pixel voltage is high is low; on the contrary, the area where the pixel voltage is low is converted into a high current by the voltage-current conversion module 400, and the high current acts on the operational amplifier 200.
  • the operational amplifier 200 It has a high power and fast charging speed in the area where the pixel voltage is low. In this way, the pixel voltage in different areas tends to be consistent, which can improve the uniformity of the display effect of the display screen.
  • the switch unit 500 includes a first switch 510 and a second switch 520, the first switch 510 is disposed between the first output terminal 230 and the display area 11, the second switch 520 is provided between the display area 11 and the third input terminal 410 of the voltage-current conversion module 400; when the first switch 510 is turned on and the second switch 520 is turned off, the source is driven
  • the chip 13 is in the first state
  • the controller is a timer. When the timer reaches a preset duration, the second switch 520 is turned on, the first switch 510 is turned off, and the source The driving chip 13 is in the second state.
  • the first switch 510 is turned on and the second switch 520 is turned off to charge the display panel, and when the charging time reaches a preset duration T by the timer, it is turned off
  • the first switch 510, turning on the second switch 520 can connect the pixel voltage to the voltage-current conversion module 400 inside the source driver chip 13; due to the delay of the signal in the fan-out area 12, the pixel voltage of the pixel is inconsistent.
  • a switch 510 turning on the second switch 520 to feed back the pixel voltage to the voltage-current conversion module 400 of the source driver chip 13, the voltage-current conversion module 400 provides different I_REF (I_Reference, reference current) under different pixel voltages, when The larger the pixel voltage input by the voltage-current conversion module 400, the smaller the reference current it outputs; when the resistance of the fan-out area 12 becomes larger, the smaller the pixel voltage, that is, the larger the reference current output by the voltage-current conversion module 400; As the internal reference current of the source driver chip 13 increases, the driving capability of the source driver chip 13 increases, that is, the driving capability of the operational amplifier 200 inside the source driver chip 13 is strong, so that the pixel voltage at different positions can be consistent, Therefore, the problem of uneven display effect of the display panel can be solved.
  • I_REF I_Reference, reference current
  • a plurality of source lines 20 and a plurality of gate lines are provided in the display area 11, the source lines 20 and the gate lines cross to form a plurality of pixel units, and the display area 11
  • the pixel unit in the first row within is set as the feedback row 100.
  • a plurality of source lines 20 and a plurality of gate lines are poor to form a plurality of pixel units.
  • the first row of pixel units are divided into a plurality of sub-regions by the plurality of source lines 20
  • Each sub-region is connected to the output of one of the operational amplifiers 200. Since the initial pixel voltages in different sub-regions are different, the pixel voltages returned by the operational amplifier 200 corresponding to the different sub-regions are different, so that pixels in different sub-regions can be made The voltage tends to be uniform, thereby improving the uniformity of the display effect of the display panel.
  • the function of the feedback line 100 is to detect pixel voltages of different sub-regions, so the feedback line 100 does not need to display colors. Therefore, in this embodiment, the feedback line 100 is configured as an achromatic filter setting. Specifically, each pixel unit except the feedback line 100 is provided with a color filter, each row of pixel units is set to the same color, and the feedback line 100 is the first row of pixel units; therefore, different colors can be displayed on the pixel units ; The feedback line 100 is configured as a colorless filter setting, therefore, the cost of the display panel can be significantly reduced.
  • the feedback row 100 is designed with a black matrix.
  • the black matrix can block the light and avoid the light from the backlight. In this way, even if the pixel voltage is not uniform at the beginning, it will not affect the normal display of the display panel.
  • BM black matrix
  • BOA black matrix attached to the array substrate 10
  • the feedback line 100 is configured as a colorless filter setting, and the feedback line 100 is designed with a black matrix, so it does not affect the normal display of the display screen regardless of the voltage.
  • the manufacturing steps of the black matrix are as follows: Step 1. Set several alignment marks on the substrate 10 corresponding to the feedback line 100; Step 2. Provide a black matrix photoresist system on the substrate 10 corresponding to the feedback line 100 Coating the black matrix photoresist system to form a photoresist layer that covers the feedback line 100; the black matrix photoresist system includes at least the following two components: negative photoresist and metal halide
  • the metal halide is a material with a low optical density value when it is not illuminated, so that the photoresist layer is transparent when it is not exposed; Step 3.
  • the design pattern exposes the photoresist layer through a photomask; the metal halide in the photoresist layer in the illumination area decomposes to form metal particles, so that the photoresist layer in the illumination area appears black, and the photoresist layer in the illumination area becomes Insoluble in developing solution; Step 4. Perform development process on the photoresist layer to remove the photoresist layer in the unilluminated area blocked by the photomask to form a black matrix.
  • a plurality of fan-out wires 30 are provided in the fan-out area 12, the fan-out wires One end of 30 is connected to the source driver chip 13, and the other end of the fan-out wire 30 is connected to the source wire 20; the fan-out wire 30 is arranged symmetrically with respect to the middle of the fan-out region 12 in the longitudinal direction. Since the fan-out wires 30 are arranged symmetrically with respect to the middle in the longitudinal direction of the fan-out area 12, the signal delay effects on both sides of the fan-out area 12 can be made similar, so that the uniformity of the display effect of the display panel can be improved.
  • the delay effect of the fan-out wires 30 at the position is similar.
  • the resistance value of the fan-out wires 30 is gradually increased near the middle of the fan-out area 12 in the longitudinal direction.
  • the length of the fan-out wire 30 is short, the longer the length of the fan-out wire 30, the greater the resistance of the fan-out wire 30, the stronger the signal delay effect of the fan-out wire 30, so the short-length fan-out wire 30 is set to have a large resistance
  • the delay effects of the fan-out wires 30 at different positions can be made similar, so that the uniformity of the display effect of the display panel can be optionally improved.
  • the present application also proposes a display device including the display panel.
  • the specific structure of the display panel refers to the above embodiments. Since the display device proposed by the present application adopts all the technical solutions of all the above embodiments, at least All advantages brought by the technical solutions of the above embodiments will not be repeated here.
  • the display device may be, but not limited to, a television, a display, or the like.
  • the display device is a liquid crystal display; in other embodiments, the display device may also be an OLED display (Organic Light-Emitting Diode, organic electroluminescent diode display), etc.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板和显示装置，显示面板包括基板（10），基板上设置有显示区（11）、扇出区（12）和源极驱动芯片（13），显示区内（11）设有反馈行（100）；源极驱动芯片（13）具有第一状态和第二状态，当源极驱动芯片（13）处于第一状态时，源极驱动芯片（13）向反馈行（100）输入第一数据信号，当源极驱动芯片（13）处于第二状态时，反馈行（100）的电压反馈至源极驱动芯片（13），源极驱动芯片（13）向显示区（11）的其余行输出第二数据信号，每列第一数据信号与第二数据信号的总和呈相等设置。

Description

显示面板和显示装置
相关申请
本申请要求2018年12月05日申请的，申请号为201811484036.6，名称为“显示面板和显示装置”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及显示技术领域，特别涉及一种显示面板和显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。随着TFT-LCD（thin film transistor-liquid crystal display，薄膜晶体管液晶显示器）不断朝向大型化、高解析度、高分辨率的方向发展，对显示品质、成品成熟度要求越来越高的同时，产品成本也越来越敏感。为了达到降低成本的目的，通过减小border（边框）尺寸，即每个Source IC（源极驱动芯片）对应区域增加是常用的手段之一。如图1至图3所示，这种方式在Fanout（扇出区）走线设计时其走线电阻及寄生电容差异变大，这将导致在Source Driver OP （源极驱动芯片的运算放大器）的输出电压（即Point A）与经过扇出区之后提供给面板的像素电压不一致（Point B），这会导致显示面板的显示效果不均匀，因此会出现色偏现象。
发明内容
本申请的主要目的是提出一种显示面板，旨在避免产生色偏，保证显示面板显示效果的均匀性。
为实现上述目的，本申请提出的显示面板包括：基板，所述基板上设置有显示区、扇出区和源极驱动芯片；所述显示区内设有反馈行；所述源极驱动芯片具有第一状态和第二状态，当所述源极驱动芯片处于所述第一状态时，所述源极驱动芯片向所述反馈行输入第一数据信号，当所述源极驱动芯片处于所述第二状态时，所述反馈行的电压反馈至所述源极驱动芯片，以使所述源极驱动芯片向所述显示区的其余行输出第二数据信号，每列所述第一数据信号与所述第二数据信号的总和呈相等设置。
可选地，所述源极驱动芯片包括：运算放大器，所述运算放大器具有第一输入端、第二输入端和第一输出端，所述第一输出端与所述第二输入端相连，所述第一输出端设置为连接所述显示区；数模转换模块，与所述第一输入端相连；以及，电压电流转换模块，所述电压电流转换模块具有第三输入端和第二输出端，所述第三输入端与所述第一输出端相连，所述第二输出端与所述第二输入端相连；以及，开关单元和控制器，当所述源极芯片处于所述第一状态时，所述控制器设置为控制所述开关单元连通所述运算放大器的第一输出端和所述显示区，当所述源极芯片处于所述第二状态时，所述控制器设置为控制所述开关单元连通所述显示区、所述电压电流转换模块和所述运算放大器的第二输入端。
可选地，所述开关单元包括第一开关和第二开关，所述第一开关设于所述第一输出端和所述显示区之间，所述第二开关设于所述显示区和所述电压电流转换模块的第三输入端之间；当所述第一开关导通，所述第二开关断开时，所述源极驱动芯片处于所述第一状态；所述控制器为计时器，当所述计时器达到预设时长时，所述第二开关导通，所述第一开关断开，所述源极驱动芯片处于所述第二状态。
可选地，所述反馈行被配置为无彩色滤光片设置且所述反馈行采用黑色矩阵设计，以使所述反馈行成为无效行。
可选地，所述反馈行采用黑色矩阵设计包括如下步骤：在反馈行所对应的基板上设置数个对位标记；提供黑色矩阵光阻体系，在反馈行所对应的基板上涂布所述黑色矩阵光阻体系，形成光阻层，所述光阻层覆盖所述反馈行。
可选地，所述显示区内设有多条源极线和多条栅极线，所述源极线和所述栅极线交叉形成多个像素单元，所述显示区内的第一行像素单元设置为所述反馈行。
可选地，多个所述源极线将所述反馈行分隔为多个所述像素单元，每一所述像素单元连接一个所述运算放大器的第一输出端。
可选地，所述扇出区内设有多条扇出导线，所述扇出导线的一端连接所述源极驱动芯片，所述扇出导线的另一端连接所述源极线；所述扇出导线关于所述扇出区长度方向的中部呈对称设置。
可选地，所述扇出导线的电阻值在靠近所述扇出区长度方向的中部呈递增设置。
本申请还提出一种显示装置，所述显示装置包括所述显示面板，所述显示面板包括：
基板，所述基板上设置有显示区、扇出区和源极驱动芯片；所述显示区内设有反馈行；所述源极驱动芯片具有第一状态和第二状态，当所述源极驱动芯片处于所述第一状态时，所述源极驱动芯片向所述反馈行输入第一数据信号，当所述源极驱动芯片处于所述第二状态时，所述反馈行的电压反馈至所述源极驱动芯片，以使所述源极驱动芯片向所述显示区的其余行输出第二数据信号，每列所述第一数据信号与所述第二数据信号的总和呈相等设置。
本申请提出一种显示面板，该显示面板包括基板，所述基板上设置有显示区、扇出区和源极驱动芯片，所述显示区内设有反馈行；所述源极驱动芯片具有第一状态和第二状态，当所述源极驱动芯片处于所述第一状态时，所述源极驱动芯片向所述反馈行输入第一数据信号，当所述源极驱动芯片处于所述第二状态时，所述反馈行的电压反馈至所述源极驱动芯片，所述源极驱动芯片向所述显示区的其余行输出第二数据信号，所述第二数据信号与所述第一数据信号的大小呈相反设置，以使每列所述第一数据信号与所述第二数据信号的总和呈相等设置。由于本申请提出的显示面板的基板上设有反馈行，显示面板的源极驱动芯片具有第一状态和第二状态，当源极驱动芯片处于第一状态时，源极驱动芯片能够向反馈行输入第一数据信号，由于数据线的延迟作用，作用在反馈行上的第一数据信号的大小并不相同，如此，反馈行不同位置的像素电压不一致；此时，源极驱动芯片切换至第二状态，当源极驱动芯片处于第二状态时，不同的像素电压能够反馈至源极驱动芯片，进而使得源极驱动芯片向显示区的其余行输出第二数据信号，第二数据信号的大小与第一数据信号的大小呈相反设置，如此，能够使得其余行不同位置的第一数据信号与第二数据信号的总和大体呈相等设置，进而能够使得其余行不同位置的像素电压趋于一致，从而能够使得显示面板的显示效果更均匀，避免出现色偏现象。
附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图示出的结构获得其他的附图。
图1为示例性的源驱动芯片在不同位置输出的像素电压的示意图；
图2为图1中A位置的像素电压的波形图；
图3为图1中B位置的像素电压的波形图；
图4为本申请显示面板的结构示意图；
图5为图1中显示区的示意图；
图6为图1中源驱动芯片在第一状态下的示意图；
图7为图1中源驱动芯片在第二状态下的示意图。
附图标号说明：
标号 名称 标号 名称
10 基板 400 电压电流转换模块
20 源极线 500 开关单元
30 扇出导线 210 第一输入端
11 显示区 220 第二输入端
12 扇出区 230 第一输出端
13 源极驱动芯片 410 第三输入端
100 反馈行 420 第二输出端
200 运算放大器 510 第一开关
300 数模转换模块 520 第二开关
本申请目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
需要说明，若本申请实施例中有涉及方向性指示（诸如上、下、左、右、前、后……），则该方向性指示仅用于解释在某一特定姿态（如附图所示）下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
另外，若本申请实施例中有涉及“第一”、“第二”等的描述，则该“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本申请要求的保护范围之内。
本申请提出一种显示面板，该显示面板的像素电压一致性好，从而能够使得显示面板的显示分布均匀。
在本申请一实施例中，如图4和图5所示，该显示面板包括基板10，所述基板10上设置有显示区11、扇出区12和源极驱动芯片13，所述显示区11内设有反馈行100；所述源极驱动芯片13具有第一状态和第二状态，当所述源极驱动芯片13处于所述第一状态时，所述源极驱动芯片13向所述反馈行100输入第一数据信号，当所述源极驱动芯片13处于所述第二状态时，所述反馈行100的电压反馈至所述源极驱动芯片13，所述源极驱动芯片13向所述显示区11的其余行输出第二数据信号，所述第二数据信号与所述第一数据信号的大小呈相反设置，以使每列所述第一数据信号与所述第二数据信号的总和呈相等设置。
具体地，源极驱动芯片13(输出数据信号)和栅极驱动芯片(输出扫描信号)的输出信号首先分别经过其各自的扇出电路的走线，再分别通过扫描线和数据线传输到显示面板的像素单元阵列中。数据线可等效为一阶电阻电容形式的低通滤波器，因此将对信号产生延迟( RC delay )作用。
本申请提出的显示面板的基板10上设有反馈行100，显示面板的源极驱动芯片13具有第一状态和第二状态，当源极驱动芯片13处于第一状态时，源极驱动芯片13能够向反馈行100输入第一数据信号，由于数据线的延迟作用，作用在反馈行100上的第一数据信号的大小并不相同，如此，反馈行100不同位置的像素电压不一致；此时，源极驱动芯片13切换至第二状态，当源极驱动芯片13处于第二状态时，不同的像素电压能够反馈至源极驱动芯片13，进而使得源极驱动芯片13向显示区11的其余行输出第二数据信号，第二数据信号的大小与第一数据信号的大小呈相反设置，如此，能够使得其余行不同位置的第一数据信号与第二数据信号的总和大体呈相等设置，进而能够使得其余行不同位置的像素电压趋于一致，从而能够使得显示面板的显示效果更均匀，避免出现色偏现象。
可选地，如图6和图7所示，现对所述源极驱动芯片13的结构进行详细说明。本实施例中，所述源极驱动芯片13包括运算放大器200、数模转换模块300、电压电流转换模块400、开关单元500和控制器（图未示），所述运算放大器200具有第一输入端210、第二输入端220和第一输出端230，所述第一输出端230与所述第二输入端220相连，所述第一输出端230设置为连接所述显示区11；所述数模转换模块300与所述第一输入端210相连；所述电压电流转换模块400具有第三输入端410和第二输出端420，所述第三输入端410与所述第一输出端230相连，所述第二输出端420与所述第二输入端220相连；当所述源极芯片处于所述第一状态时，所述控制器设置为控制所述开关单元500连通所述运算放大器200的第一输出端230和所述显示区11，当所述源极芯片处于所述第二状态时，所述控制器设置为控制所述开关单元500连通所述显示区11、所述电压电流转换模块400和所述运算放大器200的第二输入端220。
具体地，本实施例中，所述电压电流转换模块400为高电压输入，低电流输出，低电压输入，高电流输出。如此，能够改变运算放大器200的功率，原来处于高像素电压的区域，经电压电流转换模块400转换出低的电流，低的电流作用在运算放大器200上，此时运算放大器200的功率低，对原来处于高像素电压的区域的充电速度慢；相反地，来处于低像素电压的区域，经电压电流转换模块400转换出高的电流，高的电流作用在运算放大器200上，此时运算放大器200的功率高，对原来处于低像素电压的区域的充电速度快，如此，能够使得不同区域的像素电压趋于一致，从而能够改善显示屏显示效果的均匀性。
可选地，请继续参照图6和图7，现对所述开关单元500和所述控制器的结构进行详细说明。本实施例中，所述开关单元500包括第一开关510和第二开关520，所述第一开关510设于所述第一输出端230和所述显示区11之间，所述第二开关520设于所述显示区11和所述电压电流转换模块400的第三输入端410之间；当所述第一开关510导通，所述第二开关520断开时，所述源极驱动芯片13处于所述第一状态，所述控制器为计时器，当所述计时器达到预设时长时，所述第二开关520导通，所述第一开关510断开，所述源极驱动芯片13处于所述第二状态。
具体地，在正常显示区11之前的反馈行100，先导通第一开关510、关闭第二开关520，对显示面板进行充电，通过所述计时器，当充电时间达到预设时长T时，关闭第一开关510，导通第二开关520可将像素电压与源极驱动芯片13内部的电压电流转换模块400相连接；由于扇出区12信号产生延迟，导致其像素电压不一致，此时关闭第一开关510，导通第二开关520将像素电压反馈至源极驱动芯片13的电压电流转换模块400，电压电流转换模块400在不同像素电压下其提供的I_REF（I_Reference，参考电流）不同，当电压电流转换模块400输入的像素电压越大时，其输出的参考电流越小；当由于扇出区12电阻变大时，其像素电压越小，即电压电流转换模块400输出参考电流越大；随着源极驱动芯片13内部参考电流增加，源极驱动芯片13驱动能力增加，即通过源极驱动芯片13内部的运算放大器200的驱动能力较强，从而能够达到不同位置像素电压一致的目的，因此能够解决显示面板显示效果不均匀的问题。
可选地，现对所述反馈行100的位置进行说明。本实施例中，所述显示区11内设有多条源极线20和多条栅极线，所述源极线20和所述栅极线交叉形成多个像素单元，所述显示区11内的第一行像素单元设置为所述反馈行100。
具体地，多条源极线20和多条栅极线较差形成多个像素单元，现以第一行像素单元为例，第一行像素单元被多条源极线20分隔为多个子区域，每个子区域与一个所述运算放大器200的输出端相连，由于不同子区域内的初始像素电压不同，因此不同子区域对应的运算放大器200反馈的像素电压不同，从而能够使得不同子区域的像素电压趋于一致，进而改善显示面板显示效果的均匀性。
可选地，反馈行100的作用是为了侦测不同子区域的像素电压，因此反馈行100不需要显示颜色，因此本实施例中，所述反馈行100被配置为无彩色滤光片设置。具体地，除了反馈行100以外的像素单元上均设有彩色滤光片，每行像素单元设置为相同的颜色，反馈行100为像素单元的第一行；因此像素单元上能够显示不同的颜色；而反馈行100被配置为无彩色滤光片设置，因此，能够显著降低显示面板的成本。
在一实施例中，如图5所示，所述反馈行100采用黑色矩阵设计。黑色矩阵能够遮光，避免背光源的光线射出。如此，在一开始即使像素电压不均匀也不会影响显示面板的正常显示。
传统的液晶显示面板中，通常会在彩膜基板10一侧制作一层黑色矩阵(BM，Black Matrix)，黑色矩阵设置为分割相邻色阻，遮挡色彩的空隙，防止漏光或者混色；而将黑色矩阵制备在TFT 阵列基板10的技术叫做BOA(BM On Array，黑色矩阵贴附于阵列基板10)，BOA 可以解决上下基板10错位导致遮光区域不匹配的问题。本实施例中，所述反馈行100被配置为无彩色滤光片设置，且反馈行100采用黑色矩阵设计，因此不管电压如何均不会影响显示屏的正常显示。
具体地，黑色矩阵的制作步骤为：步骤1、在反馈行100所对应的基板10上设置数个对位标记；步骤2、提供黑色矩阵光阻体系，在反馈行100所对应的基板10上涂布所述黑色矩阵光阻体系，形成光阻层，所述光阻层覆盖所述反馈行100；所述黑色矩阵光阻体系至少包含以下两种成分：负性光刻胶、及金属卤化物；所述金属卤化物在未照光时为低光密度值材料，从而使得所述光阻层在未曝光时呈透明状态；步骤3、利用对位标记进行精确对位后，按照黑色矩阵的设计图形通过一道光罩对所述光阻层进行曝光；照光区域的光阻层中的金属卤化物分解形成金属微粒，使得照光区域的光阻层呈现黑色，同时照光区域的光阻层变得不溶于显影液；步骤4、对所述光阻层进行显影制程，移除被光罩遮挡的未照光区域的光阻层，形成黑色矩阵。
可选地，请参照图4，为了可选地提高显示面板显示效果的均匀性，本申请一实施例中，所述扇出区12内设有多条扇出导线30，所述扇出导线30的一端连接所述源极驱动芯片13，所述扇出导线30的另一端连接所述源极线20；所述扇出导线30关于所述扇出区12长度方向的中部呈对称设置。由于扇出导线30关于扇出区12长度方向的中部呈对称设置，因此能够使得扇出区12两侧的信号延迟作用相近，因此能够改善显示面板显示效果的均匀性。
在一实施例中，考虑到扇出导线30的长度在远离扇出区12中部的位置逐渐增大，扇出导线30的长度越长，扇出导线30的信号延迟作用越强，为了使得不同位置的扇出导线30的延迟作用相近，本申请一实施例中，所述扇出导线30的电阻值在靠近所述扇出区12长度方向的中部呈递增设置，由于靠近扇出区中部的扇出导线30的长度短，扇出导线30的长度越长、扇出导线30的电阻越大，扇出导线30的信号延迟作用越强，因此将长度短的扇出导线30设置为电阻大能够使得不同位置的扇出导线30的延迟作用相近，从而能够可选地改善显示面板显示效果的均匀性。
本申请还提出一种显示装置，该显示装置包括所述显示面板，所述显示面板的具体结构参照上述实施例，由于本申请提出的显示装置采用了上述所有实施例的全部技术方案，因此至少具有上述实施例的技术方案所带来的所有优点，在此不再一一赘述。具体地，所述显示装置可以但不限于电视机、显示器等。具体地，在一实施例中，所述显示装置为液晶显示器；在其他实施例中，显示装置还可以为OLED显示器（Organic Light-Emitting Diode, 有机电致发光二极管显示器）等。
以上所述仅为本申请的优选实施例，并非因此限制本申请的专利范围，凡是在本申请的发明构思下，利用本申请说明书及附图内容所作的等效结构变换，或直接/间接运用在其他相关的技术领域均包括在本申请的专利保护范围内。

Claims (20)

  1. 一种显示面板，其中，包括：
    基板，所述基板上设置有显示区、扇出区和源极驱动芯片；所述显示区内设有反馈行；
    所述源极驱动芯片具有第一状态和第二状态，当所述源极驱动芯片处于所述第一状态时，所述源极驱动芯片向所述反馈行输入第一数据信号，当所述源极驱动芯片处于所述第二状态时，所述反馈行的电压反馈至所述源极驱动芯片，以使所述源极驱动芯片向所述显示区的其余行输出第二数据信号，每列所述第一数据信号与所述第二数据信号的总和呈相等设置。
  2. 如权利要求1所述的显示面板，其中，所述源极驱动芯片包括：
    运算放大器，所述运算放大器具有第一输入端、第二输入端和第一输出端，所述第一输出端与所述第二输入端相连，所述第一输出端设置为连接所述显示区；
    数模转换模块，与所述第一输入端相连；
    电压电流转换模块，所述电压电流转换模块具有第三输入端和第二输出端，所述第三输入端与所述第一输出端相连，所述第二输出端与所述第二输入端相连；以及，
    开关单元和控制器，当所述源极芯片处于所述第一状态时，所述控制器设置为控制所述开关单元连通所述运算放大器的第一输出端和所述显示区，当所述源极芯片处于所述第二状态时，所述控制器设置为控制所述开关单元连通所述显示区、所述电压电流转换模块和所述运算放大器的第二输入端。
  3. 如权利要求2所述的显示面板，其中，所述开关单元包括第一开关和第二开关，所述第一开关设于所述第一输出端和所述显示区之间，所述第二开关设于所述显示区和所述电压电流转换模块的第三输入端之间；
    当所述第一开关导通，所述第二开关断开时，所述源极驱动芯片处于所述第一状态；所述控制器为计时器，当所述计时器达到预设时长时，所述第二开关导通，所述第一开关断开，所述源极驱动芯片处于所述第二状态。
  4. 如权利要求1所述的显示面板，其中，所述反馈行被配置为无彩色滤光片设置且所述反馈行采用黑色矩阵设计，以使所述反馈行成为无效行。
  5. 如权利要求4所述的显示面板，其中，所述反馈行采用黑色矩阵设计包括如下步骤：在反馈行所对应的基板上设置数个对位标记；提供黑色矩阵光阻体系，在反馈行所对应的基板上涂布所述黑色矩阵光阻体系，形成光阻层，所述光阻层覆盖所述反馈行。
  6. 如权利要求1所述的显示面板，其中，所述显示区内设有多条源极线和多条栅极线，所述源极线和所述栅极线交叉形成多个像素单元，所述显示区内的第一行像素单元设置为所述反馈行。
  7. 如权利要求6所述的显示面板，其中，多个所述源极线将所述反馈行分隔为多个像素单元，每一所述像素单元连接一个所述运算放大器的第一输出端。
  8. 如权利要求6所述的显示面板，其中，所述扇出区内设有多条扇出导线，所述扇出导线的一端连接所述源极驱动芯片，所述扇出导线的另一端连接所述源极线；
    所述扇出导线关于所述扇出区长度方向的中部呈对称设置。
  9. 如权利要求8所述的显示面板，其中，所述扇出导线的电阻值在靠近所述扇出区长度方向的中部呈递增设置。
  10. 如权利要求2所述的显示面板，其中，所述反馈行被配置为无彩色滤光片设置且所述反馈行采用黑色矩阵设计，以使所述反馈行成为无效行。
  11. 如权利要求10所述的显示面板，其中，所述反馈行采用黑色矩阵设计包括如下步骤：在反馈行所对应的基板上设置数个对位标记；提供黑色矩阵光阻体系，在反馈行所对应的基板上涂布所述黑色矩阵光阻体系，形成光阻层，所述光阻层覆盖所述反馈行。
  12. 如权利要求2所述的显示面板，其中，所述显示区内设有多条源极线和多条栅极线，所述源极线和所述栅极线交叉形成多个像素单元，所述显示区内的第一行像素单元设置为所述反馈行。
  13. 如权利要求12所述的显示面板，其中，多个所述源极线将所述反馈行分隔为多个像素单元，每一所述像素单元连接一个所述运算放大器的第一输出端。
  14. 如权利要求12所述的显示面板，其中，所述扇出区内设有多条扇出导线，所述扇出导线的一端连接所述源极驱动芯片，所述扇出导线的另一端连接所述源极线；
    所述扇出导线关于所述扇出区长度方向的中部呈对称设置。
  15. 如权利要求14所述的显示面板，其中，所述扇出导线的电阻值在靠近所述扇出区长度方向的中部呈递增设置。
  16. 一种显示装置，其中，所述显示装置包括显示面板，所述显示面板包括：
    基板，所述基板上设置有显示区、扇出区和源极驱动芯片；所述显示区内设有反馈行；
    所述源极驱动芯片具有第一状态和第二状态，当所述源极驱动芯片处于所述第一状态时，所述源极驱动芯片向所述反馈行输入第一数据信号，当所述源极驱动芯片处于所述第二状态时，所述反馈行的电压反馈至所述源极驱动芯片，以使所述源极驱动芯片向所述显示区的其余行输出第二数据信号，每列所述第一数据信号与所述第二数据信号的总和呈相等设置。
  17. 如权利要求16所述的显示装置，其中，所述源极驱动芯片包括：
    运算放大器，所述运算放大器具有第一输入端、第二输入端和第一输出端，所述第一输出端与所述第二输入端相连，所述第一输出端设置为连接所述显示区；
    数模转换模块，与所述第一输入端相连；
    电压电流转换模块，所述电压电流转换模块具有第三输入端和第二输出端，所述第三输入端与所述第一输出端相连，所述第二输出端与所述第二输入端相连；以及，
    开关单元和控制器，当所述源极芯片处于所述第一状态时，所述控制器设置为控制所述开关单元连通所述运算放大器的第一输出端和所述显示区，当所述源极芯片处于所述第二状态时，所述控制器设置为控制所述开关单元连通所述显示区、所述电压电流转换模块和所述运算放大器的第二输入端。
  18. 如权利要求17所述的显示装置，其中，所述开关单元包括第一开关和第二开关，所述第一开关设于所述第一输出端和所述显示区之间，所述第二开关设于所述显示区和所述电压电流转换模块的第三输入端之间；
    当所述第一开关导通，所述第二开关断开时，所述源极驱动芯片处于所述第一状态；所述控制器为计时器，当所述计时器达到预设时长时，所述第二开关导通，所述第一开关断开，所述源极驱动芯片处于所述第二状态。
  19. 如权利要求16所述的显示装置，其中，所述反馈行被配置为无彩色滤光片设置且所述反馈行采用黑色矩阵设计，以使所述反馈行成为无效行。
  20. 如权利要求16所述的显示装置，其中，所述显示区内设有多条源极线和多条栅极线，所述源极线和所述栅极线交叉形成多个像素单元，所述显示区内的第一行像素单元设置为所述反馈行。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101727866A (zh) * 2008-10-30 2010-06-09 三星电子株式会社 显示装置
TW201251308A (en) * 2011-06-02 2012-12-16 Fitipower Integrated Tech Inc Negative feedback circuit and stability increase method thereof and source driver with the negative feedback circuit and control method thereof
CN104678626A (zh) * 2015-02-13 2015-06-03 厦门天马微电子有限公司 一种液晶显示器、其驱动方法及显示装置
JP2015175860A (ja) * 2014-03-13 2015-10-05 三菱電機株式会社 液晶表示装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5955073B2 (ja) * 2012-04-23 2016-07-20 キヤノン株式会社 表示装置及び表示装置の駆動方法
CN103886844A (zh) * 2013-12-31 2014-06-25 深圳市华星光电技术有限公司 显示面板组件及其调节方法、显示装置
CN104965339B (zh) * 2015-07-24 2018-05-29 武汉华星光电技术有限公司 一种彩色滤光板和液晶显示面板
CN106531068A (zh) * 2016-12-27 2017-03-22 北京集创北方科技股份有限公司 有机电致发光显示装置
KR102402421B1 (ko) * 2017-09-11 2022-05-27 삼성디스플레이 주식회사 표시 장치 및 표시 장치의 데이터 보상 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101727866A (zh) * 2008-10-30 2010-06-09 三星电子株式会社 显示装置
TW201251308A (en) * 2011-06-02 2012-12-16 Fitipower Integrated Tech Inc Negative feedback circuit and stability increase method thereof and source driver with the negative feedback circuit and control method thereof
JP2015175860A (ja) * 2014-03-13 2015-10-05 三菱電機株式会社 液晶表示装置
CN104678626A (zh) * 2015-02-13 2015-06-03 厦门天马微电子有限公司 一种液晶显示器、其驱动方法及显示装置

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