WO2020103613A1 - 半导体激光器芯片及其制备方法 - Google Patents

半导体激光器芯片及其制备方法

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Publication number
WO2020103613A1
WO2020103613A1 PCT/CN2019/111425 CN2019111425W WO2020103613A1 WO 2020103613 A1 WO2020103613 A1 WO 2020103613A1 CN 2019111425 W CN2019111425 W CN 2019111425W WO 2020103613 A1 WO2020103613 A1 WO 2020103613A1
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WIPO (PCT)
Prior art keywords
finished product
heat sink
chip
epitaxial wafer
sink substrate
Prior art date
Application number
PCT/CN2019/111425
Other languages
English (en)
French (fr)
Inventor
郑兆祯
陈长安
Original Assignee
深圳市中光工业技术研究院
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Publication date
Application filed by 深圳市中光工业技术研究院 filed Critical 深圳市中光工业技术研究院
Priority to US17/296,142 priority Critical patent/US20220059986A1/en
Publication of WO2020103613A1 publication Critical patent/WO2020103613A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0233—Mounting configuration of laser chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/023—Mount members, e.g. sub-mount members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/0215—Bonding to the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0201—Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
    • H01S5/0202—Cleaving
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0235—Method for mounting laser chips
    • H01S5/02355—Fixing laser chips on mounts
    • H01S5/0236—Fixing laser chips on mounts using an adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0265—Intensity modulators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/1021—Coupled cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/0217—Removal of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0235—Method for mounting laser chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/024—Arrangements for thermal management
    • H01S5/02469—Passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active cooling element like a TEC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/028—Coatings ; Treatment of the laser facets, e.g. etching, passivation layers or reflecting layers

Definitions

  • the present application relates to the field of lasers, and in particular, to a semiconductor laser chip and a preparation method thereof.
  • the all-solid-state laser pumped by a semiconductor laser is a new type of laser that appeared in the late 1980s. Its overall efficiency is at least 10 times higher than that of lamp pumps. Due to the reduced thermal load per unit output, it can obtain higher power. The system life and reliability are about 100 times that of flash pump systems. Therefore, semiconductor laser pumping technology It injects new vitality and vitality into the solid-state laser, so that the all-solid-state laser has the dual characteristics of the solid-state laser and the semiconductor laser chip. Its emergence and maturity are a revolution of the solid-state laser and the development direction of the solid-state laser.
  • the existing semiconductor line array lasers for side pump sources on the market are often composed of four or more independent laser chips.
  • the preparation process of this semiconductor laser is first to cut and spray the entire laser chip, which will be extended
  • the sheet is cut into one laser bar structure, the laser bar structure is coated with a high reflection film along the rear cavity surface of the cavity, and the AR coating is coated on the front cavity surface, and then the P side of the laser bar is facing down one by one Welding on the heat sink substrate; for the preparation of some high-power lasers, it is necessary to weld multiple laser bars on the heat sink substrate to ensure the output power of the high-power semiconducting laser.
  • the existing preparation methods cannot achieve the simultaneous welding of multiple lasers
  • the bar is on the heat sink substrate
  • the conventional process is the laser bar is fixed on the heat sink substrate one by one by multiple welding, it is obvious that this process cannot meet the production efficiency of high-power semiconductor lasers and ultra-high-power semiconductor lasers Therefore, a new method for preparing semiconductor laser chips is urgently needed.
  • the present application provides a semiconductor laser chip and a preparation method thereof, which can solve the problems of complicated preparation and high cost of the prior art semiconductor laser chip preparation process.
  • a technical solution adopted in the present application is to provide a method for preparing a semiconductor laser chip.
  • the method includes: S11: providing an epitaxial wafer, the epitaxial wafer includes a plurality of resonant cavities arranged in parallel; S12: providing a heat sink substrate , Including a first surface and a second surface that are disposed oppositely; S13: attaching the epitaxial wafer to the first surface of the heat sink substrate to form a first chip semi-finished product; S14: perpendicular to the resonance Performing a first division of the first chip semi-finished product in the direction of the cavity to divide the first chip semi-finished product into a plurality of second chip semi-finished products; S15: the second chip in a direction parallel to the resonant cavity The semi-finished product is subjected to a second division to divide the second chip semi-finished product into a plurality of semiconductor laser chips, so that the semiconductor laser chip includes at least one laser bar.
  • the step S14 includes: first cutting the heat sink substrate of the first chip semi-finished product in a direction perpendicular to the resonant cavity to form a first cutting slit;
  • the step S14 further includes: performing a first cleavage on the epitaxial wafer of the first chip semi-finished product along the direction of the first cutting slit to form a plurality of second chip semi-finished products Cleave the face.
  • the step S14 includes: forming a resonant cavity on the cleavage surface of the second chip semi-finished product, wherein an antireflection film is coated on the front cavity surface of the resonant cavity, The rear cavity surface of the resonant cavity is coated with a reflective film.
  • the depth of the first cutting slit is greater than or equal to the thickness of the heat sink substrate.
  • the step S15 includes: secondly dividing the epitaxial wafer of the second chip semi-finished product in a direction parallel to the resonant cavity to form a second dicing slit.
  • the step S15 includes: cutting the heat sink substrate of the second chip semi-finished product along the direction of the second cutting slit to form a plurality of the semiconductor laser chips.
  • the depth of the second cutting slit is greater than or equal to the thickness of the epitaxial wafer, and the width of the second cutting slit is less than 20um.
  • the step S15 includes: forming a resonant cavity on the surface of the resonant cavity cavity of the second chip semi-finished product, wherein an antireflection film is coated on the front cavity surface of the resonant cavity, The rear cavity surface of the resonant cavity is plated with a reflective film.
  • the step S13 includes: thinning and polishing the surface of the epitaxial wafer facing away from the heat sink substrate.
  • the heat sink substrate is one of a metal substrate, a ceramic substrate, or a sapphire substrate.
  • a semiconductor laser chip device including a heat sink substrate; at least one laser bar, the laser bar includes a resonant cavity; In the direction of the resonant cavity, the length of the heat sink substrate is less than the length of the laser bar; in the direction perpendicular to the resonant cavity, the length of the heat sink substrate is greater than the length of the laser bar.
  • this application provides a semiconductor laser chip and a preparation method thereof, by first bonding the epitaxial wafer and the heat sink substrate to form the first chip semi-finished product, and then according to specific needs
  • semiconductor laser chips of different models and sizes can be obtained as needed, and further, by setting the cutting direction, width and depth to obtain excellent semiconductor laser chips.
  • FIG. 1 is a schematic flow chart of a method for manufacturing a semiconductor laser chip of this application
  • FIG. 2 is a schematic flowchart of S14 of the method for manufacturing a semiconductor laser chip of the present application
  • FIG. 3 is a schematic flowchart of S15 of the method for manufacturing a semiconductor laser chip of the present application
  • FIG. 4 is a schematic structural diagram of a first chip semi-finished product prepared in this application.
  • FIG. 5 is a schematic diagram of a cutting structure of the first chip semi-finished product prepared in the present application.
  • FIG. 6 is a schematic structural diagram of a second chip semi-finished product prepared in this application.
  • FIG. 7 is a schematic structural view of the second-step cutting of the second chip semi-finished product prepared in this application.
  • FIG. 8 is a schematic structural view of a semiconductor laser chip prepared in this application.
  • FIG. 9 is a schematic structural diagram of a semiconductor laser chip provided by the present application.
  • the directional indicator is only used to explain a specific posture (as shown in the figure (Shown) the relative positional relationship between the various components, the movement, etc., if the specific posture changes, the directional indication will change accordingly.
  • first”, “second”, etc. are for descriptive purposes only, and cannot be understood as instructions or It implies its relative importance or implicitly indicates the number of technical features indicated.
  • the features defined with “first” and “second” may include at least one of the features either explicitly or implicitly.
  • the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of those skilled in the art to realize. When the combination of technical solutions contradicts or cannot be realized, it should be considered that the combination of such technical solutions does not exist , Nor within the scope of protection required by this utility model.
  • FIG. 1 is a schematic flowchart of a first implementation method of a semiconductor preparation method of the present application. The specific method includes the following steps:
  • an epitaxial wafer 100 is provided.
  • the epitaxial wafer 100 includes a plurality of resonant cavities 110 arranged in parallel.
  • the epitaxial wafer includes a substrate, which is used for epitaxial growth of various layers of laser materials thereon; a buffer layer, the buffer layer is provided on the substrate, the purpose is to form a high The quality epitaxial surface reduces the stress between the substrate and other layers and eliminates the propagation of substrate defects to other layers to facilitate the growth of the materials of other layers of the device; N-type lower confinement layer, the N-type lower layer The confinement layer is arranged on the buffer layer, and its purpose is to limit the expansion of the transverse mode of the light field to the buffer layer and the substrate, reduce the loss of light, and also limit the diffusion of carriers and reduce the hole leakage current to reduce the device Threshold current, improve efficiency; lower waveguide layer, the lower waveguide layer is placed on the lower confinement layer, its purpose is to strengthen the restriction of the optical field, reduce the far-field divergence angle of the beam, improve the beam quality of the device, using lightly doped Materials to reduce the light absorption loss of this layer; and
  • the epitaxial wafer 100 further includes a resonant cavity 110 formed by etching above the confinement layer, the depth of the etching does not exceed the confinement layer, that is, part of the waveguide layer and the confinement layer on both sides are etched away , Leaving the unetched waveguide layer and confinement layer in the middle, that is, the resonant cavity.
  • the advantage of setting the resonant cavity is to form a certain refractive index step on the side of the epitaxial wafer, which has a certain limiting effect on the lateral light.
  • such a resonant cavity also serves as a filter for mode selection.
  • the etching method, the etching depth, and the width of the resonant cavity are conventional technologies in the art, and will not be repeated here.
  • the material of the epitaxial wafer 100 may specifically be one or more of GaAs, AlGaAs, InAs, InGaAs, GaInP, GaInAsP, AlGaInP, GaN, GaInN, AlGaN, AlGaInN.
  • a heat sink substrate 200 which includes a first surface and a second surface.
  • the heat sink substrate 200 provided by the present application may be a metal substrate, which itself has good thermal conductivity and electrical conductivity, including a first surface and a second surface that are arranged oppositely; or a double-layer thermally conductive substrate, which is close to the first surface
  • the first layer is a metal plate, the one near the second surface is a heat sink, or it can be a ceramic substrate with better heat dissipation performance.
  • the linear thermal expansion coefficient of the heat sink substrate 200 and the linear thermal expansion coefficient of the epitaxial wafer material are better matched. If the heat generated during the operation of the semiconductor laser chip cannot be taken away in time, the temperature of the entire semiconductor laser chip will rise and the expansion coefficient will be different. , Different thermal deformation, Stress is generated between the epitaxial wafer material and the heat sink substrate material, and the smile effect is easy to occur, which will damage the semiconductor laser chip and degrade the photoelectric characteristics of the semiconductor laser chip; If the stress is too large, it may even cause the laser The chip breaks, causing a sudden failure of the semiconductor laser chip. Therefore, high thermal conductivity materials such as metallic copper, graphene, or ceramics are usually used as heat sink substrates.
  • the length of the heat sink substrate 200 in one direction is slightly larger than the length of the epitaxial wafer 100, and in the other direction, the length of the heat sink substrate 200 is slightly smaller than the length of the epitaxial wafer 100.
  • the length and width of the heat sink substrate 200 is greater than the length and width of the epitaxial wafer 100; the specific length and width of the heat sink substrate 200 is selected according to the material of the epitaxial wafer and the subsequent process yield, It is not repeated here.
  • the P surface of the epitaxial wafer 100 is bonded to the first surface of the heat sink substrate 200. Since the heat sink substrate 200 is a metal substrate, the heat sink substrate 200 can be used as a heat dissipation structure of the epitaxial wafer 100. At the same time, it can also be used as the P surface electrode of the semiconductor laser chip, that is, the positive electrode.
  • the N surface of the epitaxial wafer 100 may be thinned and polished so that its N surface has relatively high flatness and smoothness, and at the same time, the N surface of the epitaxial wafer 100 is vapor-deposited and sputtered to form
  • the N-face electrode, that is, the negative electrode may be specifically patterned with copper foil or used as a negative electrode through a gold wire.
  • S14 Firstly divide the first chip semi-finished product 10 from the second surface of the heat sink substrate in a direction perpendicular to the resonant cavity 110 to divide the first chip semi-finished product 10 into a plurality of second chip semi-finished products 20.
  • the first chip semi-finished product 10 needs to be divided according to specific requirements to obtain a laser chip of a desired model and size.
  • FIG. 2 is a specific embodiment of a method S14 for preparing a semiconductor laser chip of the present application, which specifically includes:
  • S141 First cut the first chip semi-finished product 10 with a first width and a first depth from the second surface of the heat sink substrate in a direction perpendicular to the resonant cavity.
  • the first chip semi-finished product 10 is oriented in a direction perpendicular to the resonance cavity
  • the heat sink substrate 200 is cut, and the width of the cut is the first width, the first width is less than 20um, specifically 19um, 18um, etc.
  • the cutting depth is the first depth, where the first depth is greater than or equal to the thickness of the heat sink substrate 200, that is, in a specific scene, the layer that needs to be cut to the epitaxial wafer 100 may also allow partial errors before and after it.
  • it is exactly equal to the thickness of the heat sink substrate 200, that is, the surface of the epitaxial wafer 100 is just cut out.
  • processing such as thinning and polishing of the epitaxial wafer 100 may also be processed after S141, which is not limited herein.
  • a plurality of parallel first cutting slits are formed on the first chip semi-finished product 10.
  • S142 Split the first chip semi-finished product 10 along the direction of the first dicing slit to form a plurality of second chip semi-finished products 20.
  • the first chip semi-finished product 10 is first split along the direction of the first cutting slit from the second surface, and the cleaving direction In the same direction as the first cutting, the center line of the split basically coincides with the center line of the first cutting slit. It can also be assisted by a diamond knife for splitting.
  • the lattice along the epitaxial wafer 100 can be relatively easy Separate and produce a flat and smooth cleavage surface. Dry etching or wet etching can also be used, and other processing can be used to produce a flat and smooth cavity surface.
  • cleavage may also be performed from the third surface along the direction of the first cutting slit.
  • the splitting width is the second width
  • the depth is the second depth, wherein the second width is smaller than the first width, and the depth is greater than or equal to the thickness of the epitaxial wafer 100.
  • the length of the epitaxial wafer 100 in the direction parallel to the resonant cavity 110 of the formed second chip semi-finished product 20 is greater than the length of the heat sink substrate 200.
  • the cleavage surface (cleavage surface) of the second chip semi-finished product 20 in the direction of the resonant cavity is coated, including an AR coating on the front cavity surface (light exit surface), and a reflective film on the rear cavity surface (rear surface).
  • the resonant cavity coating may be formed after the second chip semi-finished product 20 is formed, or in other steps after cleaving to form a cleavage surface in this application.
  • the second chip semi-finished product 20 is further divided according to actual needs.
  • the division may be performed on multiple second chip semi-finished products 20 or a single second chip semi-finished product. 20.
  • FIG. 3 is a schematic flowchart of a specific implementation manner of S15 of the method for manufacturing a semiconductor laser chip of the present application, and it is specifically a sub-step of S15 in FIG. 1, which specifically includes:
  • the second epitaxial wafer 100 of the second chip semi-finished product 20 is divided into a second width and a third depth in a direction parallel to the resonant cavity 110 to form a second cutting slit, and the first surface of the heat sink substrate 200 is leaked.
  • the epitaxial wafer 100 of the second chip semi-finished product 20 is divided into a second width and a third depth in a direction parallel to the resonant cavity 110 to form a second cutting slit, the cutting direction of which is perpendicular to the direction of the first cutting
  • the cutting line is parallel to the resonance cavity, and the center line of the cutting slit coincides with the center lines of the two adjacent resonance cavities.
  • the cutting width is a third width
  • the cutting depth is a third depth
  • the third width is smaller than the distance between two adjacent resonant cavities
  • the third depth is equal to or greater than the thickness of the epitaxial wafer 100, thereby forming at least one
  • the depth is the third depth and the width is the second cutting slit of the third width, and since the heat sink substrate 200 has been cut, the first surface of the heat sink substrate 200 is leaked.
  • each laser bar includes a resonant cavity 110, that is, the epitaxial wafer 100 has been cut into a plurality of resonant cavity 110 Laser bar.
  • the cleavage surface (cleavage surface) of the second chip semi-finished product 20 in the direction of the resonant cavity is coated, including an AR coating on the front cavity surface (light exit surface), and a reflective film on the rear cavity surface (rear surface). In order to form a resonance cavity that stimulates the photons of stimulated radiation.
  • the heat sink substrate 200 of the second chip semi-finished product 20 is subjected to a second cutting with a fourth width and a fourth depth along the direction of the second cutting slit to form a plurality of semiconductor laser chips 30.
  • the second chip semi-finished product 20 is further cut.
  • the second chip semi-finished product 20 may be subjected to a fourth width and a second The four-depth splitting or cutting is similar to the above, the fourth cutting width is smaller than the third cutting width, and the fourth depth is greater than or equal to the thickness of the heat sink substrate 200.
  • the obtained semiconductor laser chip 30 includes a required number of laser bars
  • some semiconductor laser chips 30 include one laser bar
  • some semiconductor laser chips include multiple laser bars, which are in line with the existing one-bar bar-bar welding method.
  • the preparation of the multi-laser bar semiconductor laser chip can be completed, which saves the welding process and further improves the production efficiency.
  • All of the above cutting can use photolithography, laser cutting, waterjet, or etching, or other conventional processing methods.
  • the above refers to the cutting depth of the epitaxial wafer 100, that is, the second depth and the third depth are determined according to specific operations. If the epitaxial wafer 100 is thinned in advance, the depth is the thickness of the current epitaxial wafer 100 , That is, the thickness after thinning.
  • FIG. 9 is a schematic structural diagram of a semiconductor laser chip provided by the present application, that is, a schematic structural diagram of a semiconductor laser chip 30 prepared by the above process, which includes a heat sink substrate 200 and a heat sink substrate 200 provided on the heat sink substrate 200
  • the laser bar 120 wherein the laser bar 120 includes a resonant cavity 110.
  • the length of the heat sink substrate 200 is less than the length of the laser bar, so that the laser bar is slightly protruded from the heat sink substrate 200, and the advantage of this design is the subsequent stacked bar
  • the shadow effect of the coating caused by the heat sink substrate blocking can be reduced, which is beneficial to improve the uniformity of the coating on the front and rear cavity surfaces of the resonant cavity, thereby improving the stability and service life of the laser.
  • the length of the heat sink substrate 200 is greater than the length of the laser bar, which makes the area of the heat sink substrate 200 relatively large, thereby increasing the entire heat dissipation area and enhancing the heat dissipation effect.
  • the present application provides a method for preparing a semiconductor laser chip.
  • a semiconductor laser chip containing multiple laser bars is prepared, which saves the process and further improves Production efficiency.
  • the semiconductor laser chip of the present application can complete the preparation of multi-laser bar semiconductor laser chips at the same time. Compared with the existing multi-laser bar semiconductor laser chip process, the post-fixation will not affect the connection of the previously fixed laser bar Problems, thereby enhancing the quality and life of the entire semiconductor laser chip.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

一种半导体激光器芯片及其制备方法，方法包括：提供一外延片（100），外延片（100）包括平行设置的多个共振腔（110）；提供一热沉基板（200），包括相对设置的第一表面与第二表面；将外延片（100）贴合在热沉基板（200）的第一表面上以形成第一芯片半成品（10）；沿垂直于共振腔（110）的方向上对第一芯片半成品（10）进行第一分割以将第一芯片半成品（10）分割为多个第二芯片半成品（20）；沿平行于共振腔（110）的方向上对第二芯片半成品（20）进行第二分割以将第二芯片半成品（20）分割为多个半导体激光器芯片（30），以使得半导体激光器芯片（30）包括至少一个激光巴条。通过先对外延片（100）与热沉基板（200）进行固定，然后根据具体的需要可以对其进行分割，从而可以按需得到不同型号大小的半导体激光器芯片（30）。

Description

半导体激光器芯片及其制备方法 技术领域
本申请涉及激光器领域，特别涉及到一种半导体激光器芯片及其制备方法。
背景技术
半导体激光泵浦的全固态激光器是20世纪80年代末期出现的新型激光器。其总体效率至少要比灯泵浦高10倍，由于单位输出的热负荷降低，可获取更高的功率，系统寿命和可靠性大约是闪光灯泵浦系统的100倍，因此，半导体激光器泵浦技术为固体激光器注入了新的生机和活力，使全固态激光器同时具有固体激光器和半导体激光器芯片的双重特点，它的出现和逐渐成熟是固体激光器的一场革命，也是固体激光器的发展方向。并且，它已渗透到各个学科领域，例如：激光信息存储与处理、激光材料加工、激光医学及生物学、激光通讯、激光印刷、激光光谱学、激光化学、激光分离同位素、激光核聚变、激光投影显示、激光检测与计量及军用激光技术等，极大地促进了这些领域的技术进步和前所未有的发展。
现有市场上侧面泵浦源用的半导体线阵激光器，常常由四个或多个独立激光芯片组成，目前，这种半导体激光器的制备工艺首先是对整个激光器芯片进行切割和喷涂工艺，将外延片切割成一个一个激光巴条结构，在激光巴条结构沿着腔体的后腔面镀高反射膜、前腔面镀增透膜，然后将激光巴条的P面朝下一个隔一个的焊接在热沉基板上；对于制备一些大功率激光器时，需要焊接多个激光巴条在热沉基板上以保证大功率半导激光器的输出功率，现有的制备方法无法实现同时焊接多个激光巴条在热沉基板上，常规工艺均是激光巴条一个一个通过多次焊接的方式固定在热沉基板上，很显然此种工艺是无法满足大功率半导体激光器以及超大功率半导体激光器的生产效率要求的，因此急需一种新型的半导体激光器芯片制备方 法。
发明内容
本申请提供一种半导体激光器芯片及其制备方法，能够解决现有技术半导体激光器芯片制备工艺较为复杂，且成本高的问题。
本申请采用的一个技术方案是：提供一种半导体激光器芯片的制备方法，其方法包括：S11:提供一外延片，所述外延片包括平行设置的多个共振腔；S12:提供一热沉基板，包括相对设置的第一表面与第二表面；S13:将所述外延片贴合在所述热沉基板的所述第一表面上以形成第一芯片半成品；S14:沿垂直于所述共振腔的方向上对所述第一芯片半成品进行第一分割以将所述第一芯片半成品分割为多个第二芯片半成品；S15:沿平行于所述共振腔的方向上对所述第二芯片半成品进行第二分割以将所述第二芯片半成品分割为多个半导体激光器芯片，以使得所述半导体激光器芯片包括至少一个激光巴条。
根据本申请一实施方式，所述步骤S14包括：沿垂直于所述共振腔的方向对所述第一芯片半成品的所述热沉基板进行第一切割以形成第一切割缝；
根据本申请一实施方式，所述步骤S14还包括：沿所述第一切割缝方向对所述第一芯片半成品的所述外延片进行第一劈裂以形成多个所述第二芯片半成品的解理面。
根据本申请一实施方式，所述步骤S14包括：对所述第二芯片半成品的所述解理面镀膜形成共振腔，其中对所述共振腔的前腔面镀增透膜，对对所述共振腔的后腔面镀反射膜。
根据本申请一实施方式，所述第一切割缝的深度大于或等于所述热沉基板的厚度。
根据本申请一实施方式，所述步骤S15包括：沿平行于所述共振腔的方向上对所述第二芯片半成品的所述外延片进行第二分割以形成第二切割缝。
根据本申请一实施方式，所述步骤S15包括：沿所述第二切割缝方 向对所述第二芯片半成品的所述热沉基板进行切割以形成多个所述半导体激光器芯片。
根据本申请一实施方式，所述第二切割缝的深度大于或等于所述外延片的厚度，所述第二切割缝的宽度小于20um。
根据本申请一实施方式，所述步骤S15包括：对所述第二芯片半成品的所述共振腔腔面镀膜形成共振腔，其中对所述共振腔的前腔面镀增透膜，对对所述共振腔的后腔面镀反射膜。
根据本申请一实施方式，所述步骤S13包括：对所述外延片的背离所述热沉基板的一面进行减薄和抛光处理。
根据本申请一实施方式，所述热沉基板为金属基板、陶瓷基板或蓝宝石基板中的一种。
为解决上述技术问题，本申请采用的另一个技术方案是：提供一种半导体激光器芯片装置，其包括热沉基板；至少一激光巴条，所述激光巴条包括共振腔；在平行于所述共振腔方向上，所述热沉基板的长度小于所述激光巴条的长度；在垂直于所述共振腔方向上，所述热沉基板的长度大于所述激光巴条的长度。
本申请的有益效果是：区别于现有技术，本申请提供半导体激光器芯片及其制备方法，通过先将外延片与热沉基板进行贴合形成第一芯片半成品，然后根据具体的需要可以对其进行分割，从而可以按需得到不同型号大小的半导体激光器芯片，并进一步通过设定切割的方向、宽度以及深度从而得到优良的半导体激光器芯片。
附图说明
为了更清楚地说明实用新型实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是实用新型的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的情况下，还可以根据这些附图获得其他的附图，其中：
图1是本申请半导体激光器芯片的制备方法流程示意图；
图2是本申请半导体激光器芯片的制备方法的S14的具体流程示意图；
图3是本申请半导体激光器芯片的制备方法的S15的具体流程示意图；
图4是本申请的制备的第一芯片半成品结构示意图；
图5是本申请的制备的第一芯片半成品进行切割结构示意图；
图6是本申请的制备的第二芯片半成品的结构示意图；
图7是本申请制备的第二芯片半成品进行第二步切割的结构示意图；
图8是本申请的制备成半导体激光器芯片的结构示意图；
图9是本申请提供的一种半导体激光器芯片的结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
需要说明，若本实用新型实施例中有涉及方向性指示(诸如上、下、左、右、前、后……)，则该方向性指示仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等，如果该特定姿态发生改变时，则该方向性指示也相应地随之改变。
另外，若本实用新型实施例中有涉及“第一”、“第二”等的描述，则该“第一”、“第二”等的描述仅用于描述目的，而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外，各个实施例之间的技术方案可以相互结合，但是必须是以本领域普通技术人员能够实现为基础，当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在，也不在本实用新型要求的保护范围之内。
请参阅图1，图1是本申请半导体的制备方法的第一实施方式流程示意图，具体的方法包括如下步骤：
S11，提供一外延片100，外延片100包括平行设置的多个共振腔110。
请参阅图1与图2，该外延片包括了衬底，该衬底用于在其上进行激光器各层材料的外延生长；缓冲层，该缓冲层设置在衬底上，其目的是形成高质量的外延表面，减小衬底与其它各层之间的应力，消除衬底的缺陷向其它各层的传播，以利于器件其它各层材料的生长；N型下限制层，该N型下限制层设置在缓冲层上，其目的是限制光场横模向缓冲层和衬底的扩展，减小光的损耗，同时也限制载流子的扩散，减小空穴漏电流，以降低器件的阈值电流，提高效率；下波导层，该下波导层设置在下限制层上，其目的是加强对光场的限制，减小光束的远场发散角，提高器件光束质量，采用轻掺杂的材料以减少该层对光的吸收损耗；以及有源层，该有源层设置在下波导层上，其作用是作为激光器的有源区，提供足够的光增益，并决定器件的激射波长以及器件的使用寿命；上波导层，该上波导层设置在有源层上，其目的是加强对光场的限制，减小光束的远场发散角，提高器件光束质量，采用轻掺杂的材料以减少该层对光的吸收损耗；P型上限制层，该P型上限制层设置在上波导层上，其目的是限制光场横模向缓冲层和衬底的扩展，减小光的损耗，同时也限制载流子的扩散，减小空穴漏电流，以降低器件的阈值电流，提高效率；过渡层，该过渡层设置在P型上限制层上，其目的是减小上限制层与电极接触层的应力，实现从上限制层向电极接触层的过渡,可理解的是，在一变更实施例，限制层与电极层材料的粘接适配度良好的情况，无需设置过渡层。
在具体的实施方式中，所述外延片100还包括一共振腔110，共振腔110通过在限制层上方蚀刻形成，蚀刻的深度不超过限制层，即蚀刻掉两侧的部分波导层和限制层，留下中间未蚀刻的波导层和限制层，即共振腔，设置共振腔的好处是在外延片的侧向形成一定的折射率台阶，对侧向光有一定的限制作用，另外在一些大功率激光器中，此种共振腔也作为模式选择的过滤器，关于共振腔的蚀刻方法、蚀刻深度及共振腔的宽度设计为本领域的常规技术，此处不再赘述。
其外延片100的材料具体可以是GaAs、AlGaAs、InAs、InGaAs、GaInP、GaInAsP、AlGaInP、GaN,GaInN,AlGaN,AlGaInN中的一种或者多种。
S12，提供一热沉基板200，其包括第一表面与第二表面。
本申请提供的热沉基板200可以是金属基板，其本身具有良好的导热性能与导电性能，包括有相对设置的第一表面与第二表面；也可以是双层导热基板，其靠近第一表面的一层为金属板，靠近第二表面的一层为散热板，也可以是散热性能较好的陶瓷基板。
其中，热沉基板200的线性热膨胀系数与外延片材料线性热膨胀系数匹配性要好，如果不能及时将半导体激光器芯片工作时产生的热量带走，就会使得整个半导体激光器芯片温度升高，膨胀系数不同，受热形变量不同，在外延片材料与热沉基板材料之间产生应力，容易出现smile效应，从而拉伤半导体激光器芯片芯片，劣化半导体激光器芯片的光电特性；如果应力过大，甚至会使激光器芯片断裂，造成半导体激光器芯片突然失效，因此通常用金属铜、石墨烯或陶瓷等高导热材料作为热沉基板。
在具体的实施例中，热沉基板200在某一方向的长度要略大于外延片100的长度，在另外一方向上，热沉基板200的长度要略小于外延片100的长度。
可以理解的是，在其它实施方式中，热沉基板200的长宽大于外延片100的长宽；具体的热沉基板200的长宽是根据外延片的材料及后续的工艺良率来选择，此处不在赘述。
S13，将外延片100贴合在热沉基板200的第一表面上以形成第一芯片半成品10。
如图4，将外延片100的P面与热沉基板200的第一表面进行贴合，其中由于热沉基板200为金属基板，因此热沉基板200一方面可作为外延片100的散热结构，同时又可作为半导体激光器芯片的P面电极，即正极。
进一步的，可以对外延片100的N面进行减薄与抛光处理，以使得其N面具有比较高的平整度和光滑度，并同时对外延片100的N面进行蒸镀、溅射以形成N面电极，即负电极，具体可以是铜箔进行图案化或者通过金 线作为负电极。
S14，从热沉基板的第二表面沿垂直于共振腔110的方向上对第一芯片半成品10进行第一分割以将所述第一芯片半成品10分割为多个第二芯片半成品20。
如图5和6，在具体实施例中，需要按照具体的需求对第一芯片半成品10进行分割以得到所需要型号与大小的激光器芯片。
请参阅图2，图2是是本申请半导体激光器芯片的制备方法S14的具体实施方式，其具体包括：
S141，从热沉基板的第二表面上沿垂直于共振腔的方向对第一芯片半成品10进行第一宽度和第一深度的第一切割。
如图5所示，在形成第一芯片半成品10后，从热沉基板200的第二表面即热沉基板200背离外延片100的一面开始，沿垂直于共振腔的方向对第一芯片半成品10的热沉基板200进行切割，其切割的宽度为第一宽度，第一宽度要小于20um，具体可以是19um，18um等等。其切割的深度为第一深度，其中，第一深度要大于或等于热沉基板200的厚度，即在具体场景中，需要切割到外延片100的那一层，其前后也可以允许部分误差。优选的，即正好等于热沉基板200的厚度，即正好切割漏出外延片100的表面。
在其他实施例，对于外延片100的减薄与抛光等处理也可以在S141后进行处理，这里不做限定。
进行第一切割后，在第一芯片半成品10上会形成多条平行的第一切割缝。
S142，沿第一切割缝方向对第一芯片半成品10进行劈裂，以形成多个第二芯片半成品20。
如图5和6，获得具有多条平行切割缝的第一芯片半成品10后，进而从第二表面沿着第一切割缝的方向对第一芯片半成品10进行第一劈裂，其劈裂方向与第一切割的方向相同，其劈裂的中心线与第一切割缝的中心线基本重合，其也可以通过钻石刀进行辅助配合进行劈裂，沿着外延片100的晶格可以较为容易的分开，并产生平整光滑的解理面，也可以采用 乾式刻蚀或湿式刻蚀等，并通过其他处理以产生平整光滑的共振腔腔面。
在一变更实施例中，也可以从第三表面沿着第一切割缝方向进行劈裂。
具体的，其劈裂的宽度为第二宽度，深度为第二深度，其中，第二宽度要小于第一宽度，其深度大于或等于外延片100的厚度。
如图7，由于第二宽度要小于第一宽度，则形成的第二芯片半成品20在平行于共振腔110方向上的外延片100的长度要大于热沉基板200的长度，此结构的优势在于减少后续的共振腔共振腔面镀膜时的阴影效应，有利于提高共振腔前后腔面的镀膜均匀性。
进一步对第二芯片半成品20的共振腔方向的解理面(劈裂面)进行镀膜，包括对前腔面(出光面)镀增透膜，对后腔面(后端面)镀反射膜等，以形成使受激辐射光子增生的共振腔。可以理解的是，共振腔镀膜可以在形成第二芯片半成品20后，也可以在本申请劈裂形成解理面后的其它步骤中。
S15，沿平行于共振腔110的方向上对第二芯片半成品20进行第二分割以将第二芯片半成品20分割为多个半导体激光器芯片30，以使得半导体激光器芯片30至少包括一个激光巴条。
如图7和8，在获得第二芯片半成品20后，根据实际的需求进一步对第二芯片半成品20进行分割，这里的分割可以对多个第二芯片半成品20，也可以对单个第二芯片半成品20。
请参阅图3，图3是是本申请半导体激光器芯片的制备方法的S15的具体实施方式流程示意图，且其具体是图1中S15的子步骤，其具体包括：
S151，沿平行于共振腔110的方向对第二芯片半成品20的外延片100进行第三宽度与第三深度的第二分割形成第二切割缝，且漏出热沉基板200的第一表面。
如图7，沿平行于共振腔110的方向对第二芯片半成品20的外延片100进行第三宽度与第三深度的第二分割形成第二切割缝，其切割方向与第一切割的方向垂直，其切割线与共振腔平行，且其切割缝的中心线与相邻两共振腔的中心线重合。
具体的，其切割宽度为第三宽度，切割深度为第三深度，其第三宽度 要小于相邻两共振腔的距离，其第三深度要等于或大于外延片100的厚度，从而形成至少一条深度为第三深度，宽度为第三宽度的第二切割缝，且由于已经切割到了热沉基板200，则漏出了热沉基板200的第一表面。
此时第二芯片半成品20的热沉基板200表面形成有多个激光巴条，每一激光巴条包含有一共振腔110，即此时外延片100已经被切割成多个包含有共振腔110的激光巴条。进一步对第二芯片半成品20的共振腔方向的解理面(劈裂面)进行镀膜，包括对前腔面(出光面)镀增透膜，对后腔面(后端面)镀反射膜等，以形成使受激辐射光子增生的共振腔。
S152，沿第二切割缝方向对第二芯片半成品20的热沉基板200进行第四宽度和第四深度的第二切割以形成多个半导体激光器芯片30。
如图8，在获得具有第二切割缝的第二芯片半成品20后，进一步对第二芯片半成品20进行切割，具体可以是沿着第二切割缝对第二芯片半成品20进行第四宽度与第四深度的劈裂或者切割，与上述类似，其第四切割宽度要小于第三切割宽度，其第四深度大于或等于热沉基板200的厚度。
可以理解的是，在进行具体切割时，其可以根据实际的规格需求进行切割，从而得到所需型号的半导体激光器芯片30，以使得得到的半导体激光器芯片30包含有所需求个数的激光巴条等，具体的，有些半导体激光器芯片30包含有一个激光器巴条，有些半导体激光器芯片包含有多个激光巴条，与现有的一个巴条一个巴条焊接方式形成的多巴条半导体激光器芯片相比，通过对外延片的切割工艺流程的改善就可完成多激光巴条半导体激光器芯片的制备，节省了焊接工艺，进一步提升生产效率。
上述的切割均可以采用光刻、激光切割、水刀、或蚀刻等或其他常规的工艺手段。
且上述涉及到对外延片100的切割深度，即第二深度与第三深度是按照具体的操作而决定的，如提前对外延片100进行减薄处理后，则深度是当前外延片100的厚度，也就是减薄后的厚度。
请参阅图9，图9是本申请提供的一种半导体激光器芯片的结构示意图，也就是上述工艺制备的半导体激光器芯片30的结构示意图，其包括 热沉基板200及设置在热沉基板200上的激光巴条120，其中激光巴条120包括共振腔110。
如图9所示，在共振腔110方向上，热沉基板200的长度小于激光巴条的长度，这样使得激光巴条要略凸出于热沉基板200，这样设计的好处是后续的叠巴条镀膜工艺中，可减少热沉基板遮挡引发的镀膜阴影效应，有利于提高共振腔前后腔面的镀膜均匀性，进而提高激光器的稳定性和使用寿命。
在垂直于共振腔110方向的长度上，热沉基板200的长度大于激光巴条的长度，这样使得热沉基板200面积相对较大，从而增大整个散热的面积，增强散热效果。
综上，本申请提供一种半导体激光器芯片的制备方法，通过对外延片与热沉基板的切割工艺流程的改善，以形成包含多个激光巴条的半导体激光器芯片制备，节省了工艺，进一步提升了生产效率。另外本申请的半导体激光器芯片可同时完成多激光巴条半导体激光器芯片的制备，与现有多激光巴条半导体激光器芯片工艺相比，不会产生后固定影响到前面已经固定的激光巴条的连接性的问题，从而增强了整个半导体激光器芯片的质量与寿命。
以上仅为本申请的实施方式，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结果或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (12)

  1. 一种半导体激光器芯片的制备方法，其特征在于，所述方法包括以下步骤：
    S11:提供一外延片，所述外延片包括平行设置的多个共振腔；
    S12:提供一热沉基板，包括相对设置的第一表面与第二表面；
    S13:将所述外延片贴合在所述热沉基板的所述第一表面上以形成第一芯片半成品；
    S14:沿垂直于所述共振腔的方向上对所述第一芯片半成品进行第一分割以将所述第一芯片半成品分割为多个第二芯片半成品；
    S15:沿平行于所述共振腔的方向上对所述第二芯片半成品进行第二分割以将所述第二芯片半成品分割为多个半导体激光器芯片，以使得所述半导体激光器芯片包括至少一个激光巴条。
  2. 根据权利要求1所述的制备方法，其特征在于，所述步骤S14包括：
    沿垂直于所述共振腔的方向对所述第一芯片半成品的所述热沉基板进行第一切割以形成第一切割缝；
  3. 根据权利要求2所述的制备方法，其特征在于，所述步骤S14还包括：
    沿所述第一切割缝方向对所述第一芯片半成品的所述外延片进行第一劈裂以形成多个所述第二芯片半成品的解理面。
  4. 根据权利要求3所述的制备方法，其特征在于，所述步骤S14包括：对所述第二芯片半成品的所述解理面镀膜形成共振腔，其中对所述共振腔的前腔面镀增透膜，对对所述共振腔的后腔面镀反射膜。
  5. 根据权利要求2所述的制备方法，其特征在于，所述第一切割缝的深度大于或等于所述热沉基板的厚度。
  6. 根据权利要求1所述的制备方法，其特征在于，所述步骤S15包括：
    沿平行于所述共振腔的方向上对所述第二芯片半成品的所述外延片 进行第二分割以形成第二切割缝。
  7. 根据权利要求6所述的制备方法，其特征在于，所述步骤S15包括：
    沿所述第二切割缝方向对所述第二芯片半成品的所述热沉基板进行切割以形成多个所述半导体激光器芯片。
  8. 根据权利要求6所述的制备方法，其特征在于，所述第二切割缝的深度大于或等于所述外延片的厚度，所述第二切割缝的宽度小于20um。
  9. 根据权利要求1所述的制备方法，其特征在于，所述步骤S15包括：对所述第二芯片半成品的所述共振腔腔面镀膜形成共振腔，其中对所述共振腔的前腔面镀增透膜，对对所述共振腔的后腔面镀反射膜。
  10. 根据权利要求1所述的制备方法，其特征在于，所述步骤S13包括：对所述外延片的背离所述热沉基板的一面进行减薄和抛光处理。
  11. 根据权利要求1所述的制备方法，其特征在于，所述热沉基板为金属基板、陶瓷基板或蓝宝石基板中的一种。
  12. 一种半导体激光器芯片装置，其特征在于，包括：
    热沉基板；
    至少一激光巴条，所述激光巴条包括共振腔；
    其特征在于，在平行于所述共振腔方向上，所述热沉基板的长度小于所述激光巴条的长度；在垂直于所述共振腔方向上，所述热沉基板的长度大于所述激光巴条的长度。
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