WO2020088501A1 - 一种相控光波导芯片的封装方法 - Google Patents

一种相控光波导芯片的封装方法 Download PDF

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Publication number
WO2020088501A1
WO2020088501A1 PCT/CN2019/114263 CN2019114263W WO2020088501A1 WO 2020088501 A1 WO2020088501 A1 WO 2020088501A1 CN 2019114263 W CN2019114263 W CN 2019114263W WO 2020088501 A1 WO2020088501 A1 WO 2020088501A1
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Prior art keywords
optical waveguide
waveguide chip
double
sided
packaging
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PCT/CN2019/114263
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English (en)
French (fr)
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刘敬伟
仝飞
姜磊
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国科光芯(海宁)科技股份有限公司
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Publication of WO2020088501A1 publication Critical patent/WO2020088501A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12004—Combinations of two or more optical elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12135—Temperature control
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12147—Coupler

Definitions

  • the present disclosure relates to the field of chip packaging technology, and in particular to a method for packaging a phased optical waveguide chip.
  • the chip is electrically and optically connected to external signals through the contacts on the chip, and then the chip is wrapped by the shell or the plastic package to form a whole with a specific function.
  • This process is called chip packaging.
  • the purpose of packaging is to prevent the chip from being affected by moisture, extra heat, and noise, and to provide a medium for the electrical connection between the chip and external circuits.
  • phased optical waveguide chip Since the principle of the phased optical waveguide chip is to control the deflection of the optical output through the change of the electrical signal, the chip itself requires multiple signal inputs, which also determines that it has a multi-pin output control, so the traditional TO type cannot be used. Encapsulation needs to be encapsulated inside the shell with pins, and the interconnection between various materials brings great difficulty to the encapsulation.
  • the present disclosure aims to solve at least one of the above technical problems.
  • an object of the present disclosure is to propose a method for packaging a phased optical waveguide chip, which achieves the extraction of electrical signals and the input of optical signals of the phased optical waveguide chip at relatively low cost, and has Maneuverability and good reliability.
  • the second object of the present disclosure is to propose a device.
  • the third object of the present disclosure is to propose a non-volatile computer storage medium.
  • an embodiment of the first aspect of the present disclosure discloses a method for packaging a phased optical waveguide chip, including the following steps: welding the optical waveguide chip and a semiconductor refrigerator together to cover the semiconductor refrigerator A heat generating area of the waveguide chip; a first double-sided metal ceramic substrate and a second double-sided metal ceramic substrate with a circuit structure, the semiconductor refrigerator with the optical waveguide chip, a mirror holder and an optical fiber pad
  • the blocks are welded to the inside of the case together in a predetermined order, the pads of the first double-sided cermet substrate and the pads of the optical waveguide chip are interconnected by leads, and the two ends of the semiconductor refrigerator are led Interconnect the pads on the first double-sided cermet substrate and the second double-sided cermet substrate with leads; install on the mirror bracket on the case corresponding to the position of the optical waveguide chip Reflector; the pads on the optical waveguide chip are interconnected with the first double-sided cermet substrate and the second double-sided cermet substrate through leads, and the The pads
  • the electrical signals of the phase-controlled optical waveguide chip and the input of the optical signals are realized at relatively low cost, and have operability and good reliability .
  • packaging method of the phased optical waveguide chip according to the above embodiments of the present disclosure may also have the following additional technical features:
  • the step of welding the optical waveguide chip and the semiconductor refrigerator together specifically includes: using a preformed solder tab, and welding the optical waveguide chip and the semiconductor refrigerator using a vacuum and a reducing gas .
  • the maximum welding temperature for welding the optical waveguide chip and the semiconductor refrigerator is 320 ° C, and is maintained for 15 to 20 seconds.
  • the method further includes: a thermistor between the bonding pad of the first double-sided cermet substrate and the bonding pad of the optical waveguide chip.
  • the bonding pads on the optical waveguide chip are connected to the first double-sided cermet substrate and the second double-sided cermet substrate by means of gold wire bonding.
  • the step of coupling the optical path of the optical waveguide chip specifically includes: using an optical fiber with a glass pigtail to pass through the case, and leaving the glass block of the pigtail inside the case for performing Optical path coupling; fix the glass pigtail through tooling; apply a layer of optical glue evenly on the surface of the fiber pad; fix the fixture on a high-precision manual adjustment table for position adjustment and monitor the light output
  • the power is used to adjust the position of the envelope; after the position adjustment is completed, ultraviolet light is irradiated and cured; after removing the jig, glue is added to enhance the coupling strength of the optical path of the optical waveguide chip.
  • an embodiment of the second aspect of the present disclosure discloses a device, including: one or more processors; a memory; one or more programs, the one or more programs are stored in the memory, When executed by the one or more processors, the packaging method of the phased optical waveguide chip of the above-described embodiments of the present disclosure is performed.
  • the electrical signal extraction and the optical signal input of the phased optical waveguide chip are realized at a relatively low cost, and it has operability and good reliability.
  • an embodiment of the third aspect of the present disclosure discloses a non-volatile computer storage medium, where the computer storage medium stores one or more programs, and when the one or more programs are executed by one device At this time, the device is caused to perform the packaging method of the phased optical waveguide chip described in the above embodiments of the present disclosure.
  • the electrical signal extraction and the optical signal input of the phased optical waveguide chip are realized at a relatively low cost, and it has operability and good reliability.
  • FIG. 1 is a flowchart of a method for packaging a phased optical waveguide chip according to an embodiment of the present disclosure
  • FIG. 2 is a schematic structural view of an optical waveguide chip and a semiconductor refrigerator after welding according to an embodiment of the present disclosure
  • FIG. 3 is a schematic structural diagram of a double-sided cermet substrate welded to a case according to an embodiment of the present disclosure
  • FIG. 4 is a schematic structural view of the first double-sided cermet substrate after welding the thermistor according to an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of a semiconductor refrigerator connected to a double-sided cermet substrate according to an embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of installing a reflector in a bulb according to an embodiment of the present disclosure
  • FIG. 7 is a schematic view of a wire bonding of a waveguide chip and a double-sided cermet substrate according to an embodiment of the present disclosure
  • FIG. 8 is a schematic diagram of a tube structure of an embodiment of the present disclosure after optical path coupling
  • FIG. 9 is a schematic structural view of a package structure of an embodiment of the present disclosure after packaging a filter.
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a removable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a removable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • connection should be understood in a broad sense, for example, it can be a fixed connection or a removable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • FIG. 1 is a flowchart of a method for packaging a phased optical waveguide chip according to an embodiment of the present disclosure. As shown in FIG. 1, the method for packaging a phased optical waveguide chip according to an embodiment of the present disclosure includes the following steps:
  • S1 Solder the optical waveguide chip and the semiconductor refrigerator together so that the semiconductor refrigerator covers the heat generation area of the waveguide chip.
  • the waveguide chip 1 and the semiconductor refrigerator 2 are soldered together by high-temperature solder.
  • the metal plating on the back of the chip is gold, and the metal plating on the surface of the semiconductor refrigerator is gold.
  • the pre-formed solder tabs of Au80Sn20 are used to weld them together.
  • vacuum and reducing gas are used for welding, and the maximum welding temperature is 320 ° C., which is maintained for 15 to 20 s.
  • FIG. 2 is a schematic view of the structure of an optical waveguide chip and a semiconductor refrigerator after welding according to an embodiment of the present disclosure.
  • the area of the semiconductor refrigerator 2 may cover the chip heating area, or the lower surface of the waveguide chip 1 may be completely covered.
  • S2 The first double-sided cermet substrate 3 and the second double-sided cermet substrate 4 with circuit structure, the semiconductor refrigerator 2 with the optical waveguide chip 1, the mirror holder 7 and the optical fiber spacer 5 are preset Welded to the inside of the case 6 in sequence, interconnecting the first double-sided cermet substrate and the pads of the optical waveguide chip 1 through leads, and connecting the two ends of the semiconductor refrigerator 2 to the first double-sided cermet substrate 3 and The pads of the second double-sided cermet substrate 5 are interconnected by leads.
  • FIG. 3 is a schematic structural view of a double-sided cermet substrate after being welded to a case according to an embodiment of the present disclosure.
  • a first double-sided cermet substrate 3 and a second double-sided cermet substrate 4 with a circuit structure, a semiconductor refrigerator 2 with an optical waveguide chip 1, and a mirror holder 7 (with Sn Plating layer) and the fiber pad 5 (with Sn plating layer) are welded to the inside of the shell 6 together in a preset order.
  • the solder uses Sn77.2In20Ag2.8 preformed soldering pieces, and the soldering is also performed by vacuum plus reducing gas.
  • the maximum temperature of the soldering is 200 °C, and it is maintained for 15 to 20s.
  • the double-sided metal-ceramic substrate has a circuit structure on the front, and the solder pads correspond one-to-one to the pads on the inner wall of the case and also correspond to the solder pads on the optical waveguide chip.
  • it further includes: soldering the thermistor 8 between the pad of the first double-sided cermet substrate 3 and the pad of the optical waveguide chip 1.
  • 4 is a schematic structural view of the first double-sided cermet substrate after welding the thermistor according to an embodiment of the present disclosure. As shown in FIG. 4, the thermistor 8 is soldered between the pads of the first double-sided cermet substrate with Sn77.2In20Ag2.8 solder paste.
  • FIG. 5 is a schematic diagram of a semiconductor refrigerator connected to a double-sided cermet substrate according to an embodiment of the present disclosure. As shown in FIG. 5, the leads 9 at both ends of the semiconductor refrigerator 1 are soldered to the first double-sided cermet substrate 3 and the second double-sided cermet substrate 4 using Sn77.2In20Ag2.8 solder paste.
  • FIG. 6 is a schematic diagram of installing a reflecting mirror in a bulb according to an embodiment of the present disclosure. As shown in FIG. 6, the mirror 10 is adhered to the mirror holder 7, and in this embodiment, silica gel with good adhesiveness is used for bonding.
  • FIG. 7 is a schematic diagram of gold wire bonding of a waveguide chip and a double-sided cermet substrate according to an embodiment of the present disclosure. As shown in Figure 7.
  • the bonding pads on the optical waveguide chip 1 and the first double-sided cermet substrate 3 and the second double-sided cermet substrate 4 are connected by a gold wire 11 by means of gold wire bonding.
  • FIG. 8 is a schematic diagram of the tube structure of an embodiment of the present disclosure after optical path coupling.
  • step S5 specifically includes: optical coupling using an end face manner, and using an optical fiber with a glass pigtail 12 to perform end face coupling with a phased optical waveguide chip, the optical fiber is passed through first After passing through the bulb, the glass block of the glass pigtail 12 is left inside the bulb 6 for optical path coupling, as shown in Figure 8 below. Fix the glass pigtail 12 through the tooling, and then fix the clamp on the high-precision manual adjustment table to adjust the position, and monitor the output power of the light to determine whether the adjusted position is appropriate.
  • the fiber pad 5 The thickness should be slightly smaller than the thickness of the glass sheet and the phase-controlled optical waveguide chip 1 in the glass pigtail 12, and before adjustment, the surface of the optical fiber pad 5 should be evenly coated with a layer of optical glue (in this embodiment, ultraviolet glue is used for Bonding), in this way, during the adjustment process, the bottom of the glass block in the glass pigtail 12 is in contact with the ultraviolet glue, but it is not cured, and ultraviolet light irradiation and curing are performed after the adjustment is completed. After removing the fixture, perform the second glue application to ensure the strength of the coupling.
  • a layer of optical glue in this embodiment, ultraviolet glue is used for Bonding
  • FIG. 9 is a schematic structural view of a package structure of an embodiment of the present disclosure after packaging a filter. As shown in Fig. 9, the airtightness is good after sealing and welding.
  • the optical fiber and the phase-controlled optical waveguide chip are coupled by means of end-face coupling; the thermistor is packaged inside the case, and the temperature inside the case can be real-time Monitoring, so as to adjust the temperature of the module; add a block under the fiber glass block to compensate for the height of the fiber.
  • the embodiments of the present disclosure disclose a device including: one or more processors; a memory; one or more programs, one or more programs stored in the memory, when processed by one or more When the device is executed, the packaging method of the phased optical waveguide chip described in the above embodiments of the present disclosure is performed.
  • the device realizes the extraction of electrical signals and the input of optical signals of the phased optical waveguide chip at a relatively low cost, and has operability and good reliability.
  • an embodiment of the present disclosure discloses a non-volatile computer storage medium that stores one or more programs.
  • the device When one or more programs are executed by a device, the device causes the device to execute the above The packaging method of the phased optical waveguide chip described in the embodiments.
  • the non-volatile computer storage medium realizes the extraction of electrical signals and the input of optical signals of the phased optical waveguide chip at a relatively low cost, and has operability and good reliability.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optical Couplings Of Light Guides (AREA)
  • Optical Integrated Circuits (AREA)

Abstract

一种相控光波导芯片（1）的封装方法，包括：将光波导芯片（1）与半导体制冷器（2）焊接在一起；将带有电路结构的第一双面金属陶瓷基板（3）和第二双面金属陶瓷基板（4）、带有光波导芯片（1）的半导体制冷器（2）、反射镜支架（7）及光纤垫块（5）一起焊接到管壳（6）内部；在管壳（6）上对应光波导芯片（1）的位置上的反射镜支架（7）上安装反射镜（10）；将光波导芯片（1）上的焊盘与第一双面金属陶瓷基板（3）和第二双面金属陶瓷基板（4）通过引线进行互联，将第一双面金属陶瓷基板（3）和第二双面金属陶瓷基板（4）上的焊盘与管壳（6）上的焊盘通过引线进行互联；对光波导芯片（1）的光路进行耦合；将耦合后的管壳（6）表面进行滤波片的封焊。可以在相对较低的成本下实现相控光波导芯片（1）的耦合及封装，并具有可操作性和良好的可靠性。

Description

一种相控光波导芯片的封装方法
相关申请的交叉引用
本公开要求国科光芯(海宁)科技股份有限公司于2018年10月30日提交的、发明名称为“一种相控光波导芯片的封装方法”的、中国专利申请号“201811279116.8”的优先权。
技术领域
本公开涉及芯片封装技术领域，具体涉及一种相控光波导芯片的封装方法。
背景技术
芯片通过芯片上的接点与外部讯号进行电学、光学连接，再通过外壳或塑封体将芯片包裹，形成一个具有特定功能的整体，这个过程叫做芯片的封装。封装的目的在于防止芯片受到潮气、额外热量、噪声的影响，并提供芯片与外部电路之间电性连接的媒介。
光学元件在封装制造过程中，又增加了进一步的光纤与光电芯片之间的耦合，一般而言，芯片大多采用光纤的点对点的耦合，且多为TO型的封装，鲜有端面光耦合的方式，如果没有合适的支撑很难保证耦合精度达到最佳状态。
由于相控光波导芯片的原理是通过电信号的改变来控制光输出的偏转，因此芯片本身需要多路信号输入，也决定了其本身存在多管脚的输出控制，因此无法采用传统的TO型封装，需要封装于带有管脚的管壳内部，多种材料之间的互联为封装带来了很大的难度。
发明内容
本公开旨在至少解决上述技术问题之一。
为此，本公开的一个目的在于提出一种相控光波导芯片的封装方法，该方法在相对较低的成本下实现了相控光波导芯片的电学信号的引出及光信号的输入，并具有可操作性和良好的可靠性。
为此，本公开的第二个目的在于提出一种设备。
为此，本公开的第三个目的在于提出一种非易失性计算机存储介质。
为了实现上述目的，本公开第一方面的实施例公开了一种相控光波导芯片的封装方法，包括以下步骤：将光波导芯片与半导体制冷器焊接在一起，以使所述半导体制冷器覆盖所述波导芯片的发热区域；将带有电路结构的第一双面金属陶瓷基板和第二双面金属陶瓷基板、带有所述光波导芯片的所述半导体制冷器、反射镜支架及光纤垫块按预设顺序一起焊 接到管壳内部，将所述第一双面金属陶瓷基板的焊盘与所述光波导芯片的焊盘通过引线进行互联，并将所述半导体制冷器的两端引线与所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板上的焊盘通过引线进行互联；在所述管壳上对应所述光波导芯片的位置上的反射镜支架上安装反射镜；将所述光波导芯片上的焊盘与所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板通过引线进行互联，将所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板上的焊盘与所述管壳上的焊盘引线互联；对所述光波导芯片的光路进行光纤耦合；将耦合后的管壳表面进行滤波片的封焊，以保持所述管壳内部结构的气密性。
根据本公开实施例的相控光波导芯片的封装方法，在相对较低的成本下实现了相控光波导芯片的电学信号的引出及光信号的输入，并具有可操作性和良好的可靠性。
另外，根据本公开上述实施例的相控光波导芯片的封装方法还可以具有如下附加的技术特征：
可选地，所述将光波导芯片与半导体制冷器焊接在一起的步骤，具体包括：采用预成型焊片，并采用真空加还原性气体将所述光波导芯片和所述半导体制冷器进行焊接。
可选地，将所述光波导芯片和所述半导体制冷器进行焊接的焊接最高温度为320℃，维持15～20秒。
可选地，还包括：所述第一双面金属陶瓷基板的焊盘与所述光波导芯片的焊盘焊接之间热敏电阻。
可选地，采用金丝键合的方式将将所述光波导芯片上的焊盘与所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板连接。
可选地，所述将所述光波导芯片的光路进行耦合的步骤，具体包括：使用带有玻璃尾纤的光纤穿过管壳，将尾纤的玻璃块留在管壳内部，用来进行光路耦合；通过工装将所述玻璃尾纤固定；在所述光纤垫块的表面均匀涂一层光学胶；将夹具固定在高精度手动调整台上进行位置上的调整，并通过监测光的输出功率以调整所述管壳的位置；在位置调整完毕后进行紫外光照射固化；移除夹具后进行补胶，以提升所述光波导芯片的光路的耦合强度。
为了实现上述目的，本公开第二方面的实施例公开了一种设备，包括：一个或者多个处理器；存储器；一个或者多个程序，所述一个或者多个程序存储在所述存储器中，当被所述一个或者多个处理器执行时，执行本公开上述实施例的相控光波导芯片的封装方法。
根据本公开实施例的设备，在相对较低的成本下实现了相控光波导芯片的电学信号的引出及光信号的输入，并具有可操作性和良好的可靠性。
为了实现上述目的，本公开第三方面的实施例公开了一种非易失性计算机存储介质，所述计算机存储介质存储有一个或者多个程序，当所述一个或者多个程序被一个设备执行 时，使得所述设备执行本公开上述实施例所述的相控光波导芯片的封装方法。
根据本公开实施例的非易失性计算机存储介质，在相对较低的成本下实现了相控光波导芯片的电学信号的引出及光信号的输入，并具有可操作性和良好的可靠性。
本公开的附加方面和优点将在下面的描述中部分给出，部分将从下面的描述中变得明显，或通过本公开的实践了解到。
附图说明
本公开的上述和/或附加的方面和优点从结合下面附图对实施例的描述中将变得明显和容易理解，其中：
图1是本公开一个实施例的相控光波导芯片的封装方法的流程图；
图2是本公开一个实施例的光波导芯片与半导体制冷器焊接后的结构示意图；
图3是本公开一个实施例的将双面金属陶瓷基板焊接到管壳后的结构示意图；
图4是本公开一个实施例的第一双面金属陶瓷基板焊接热敏电阻后的结构示意图；
图5是本公开一个实施例的半导体制冷器与双面金属陶瓷基板连接的示意图；
图6是本公开一个实施例的在管壳内安装反射镜的示意图；
图7是本公开一个实施例的波导芯片与双面金属陶瓷基板进行金丝键合的示意图；
图8是本公开一个实施例的管壳结构进行光路耦合后的示意图；
图9是本公开一个实施例的管壳结构进行滤波片封装后的结构示意图。
具体实施方式
下面详细描述本公开的实施例，所述实施例的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施例是示例性的，仅用于解释本公开，而不能理解为对本公开的限制。
在本公开的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本公开和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性。
在本公开的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相 连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本公开中的具体含义。
参照下面的描述和附图，将清楚本公开的实施例的这些和其他方面。在这些描述和附图中，具体公开了本公开的实施例中的一些特定实施方式，来表示实施本公开的实施例的原理的一些方式，但是应当理解，本公开的实施例的范围不受此限制。相反，本公开的实施例包括落入所附加权利要求书的精神和内涵范围内的所有变化、修改和等同物。
以下结合附图描述本公开。
图1是本公开一个实施例的相控光波导芯片的封装方法的流程图。如图1所示，本公开实施例的相控光波导芯片的封装方法，包括以下步骤：
S1：将光波导芯片与半导体制冷器焊接在一起，以使半导体制冷器覆盖波导芯片的发热区域。
具体地，将波导芯片1与半导体制冷器2通过高温焊料焊接在一起。芯片背面镀层金属为金，半导体制冷器表面镀层金属为金，一般采用Au80Sn20的预成型焊片将其焊接在一起。
在本公开的一个实施例中，为保证焊接质量，采用真空加还原性气体进行焊接，焊接最高温度为320℃，维持15～20s。
图2是本公开一个实施例的光波导芯片与半导体制冷器焊接后的结构示意图。如图2所示，半导体制冷器2面积可覆盖芯片发热区域即可，也可以将波导芯片1的下表面完全覆盖。
S2：将带有电路结构的第一双面金属陶瓷基板3和第二双面金属陶瓷基板4、带有光波导芯片1的半导体制冷器2、反射镜支架7及光纤垫块5按预设顺序一起焊接到管壳6内部，将第一双面金属陶瓷基板与光波导芯片1的焊盘通过引线进行互联，并将半导体制冷器2的两端引线与第一双面金属陶瓷基板3和第二双面金属陶瓷基板5的焊盘通过引线进行互。
图3是本公开一个实施例的将双面金属陶瓷基板焊接到管壳后的结构示意图。如图3所示，将带有电路结构的第一双面金属陶瓷基板3和第二双面金属陶瓷基板4、带有光波导芯片1的半导体制冷器2、反射镜支架7(带有Sn镀层)及光纤垫块5(带有Sn镀层)按预设顺序一起焊接到管壳6内部。焊料采用Sn77.2In20Ag2.8预成型焊片，焊接同样采用真空加还原性气体进行焊接，焊接最高温度为200℃，维持15～20s。双面金属陶瓷基板正面带有电路结构，焊片与管壳内壁的焊盘一一对应且与光波导芯片上的焊片也一一对应。
在本公开的一个实施例中，还包括：第一双面金属陶瓷基板3的焊盘与光波导芯片1的焊盘之间焊接热敏电阻8。图4是本公开一个实施例的第一双面金属陶瓷基板焊接热敏 电阻后的结构示意图。如图4所示，用Sn77.2In20Ag2.8焊膏将热敏电阻8焊接在第一双面金属陶瓷基板的焊盘之间。
图5是本公开一个实施例的半导体制冷器与双面金属陶瓷基板连接的示意图。如图5所示，半导体制冷器1两端的引线9与第一双面金属陶瓷基板3和第二双面金属陶瓷基板4采用Sn77.2In20Ag2.8焊膏焊接。
S3：在管壳6上对应光波导芯片1位置上的反射镜支架7上安装反射镜10。
图6是本公开一个实施例的在管壳内安装反射镜的示意图。如图6所示，将反射镜10粘接到反射镜支架7上，在本实施例中，采用粘接性较好的硅胶进行粘接。
S4：将光波导芯片1上的焊盘与第一双面金属陶瓷基板3和第二双面金属陶瓷基板4通过引线进行互联，将第一双面金属陶瓷基板3和第二双面金属陶瓷基板4上的焊盘与管壳6上的焊盘引线互联。
图7是本公开一个实施例的波导芯片与双面金属陶瓷基板进行金丝键合的示意图。如图7所示。在本公开的一个实施例中，采用金丝键合的方式将光波导芯片1上的焊盘与第一双面金属陶瓷基板3和第二双面金属陶瓷基板4通过金丝11连接。
S5：对光波导芯片1的光路进行光纤耦合。
图8是本公开一个实施例的管壳结构进行光路耦合后的示意图。如图8所示，在本公开的一个实施例中，步骤S5具体包括：采用端面的方式进行光耦合，使用带有玻璃尾纤12的光纤与相控光波导芯片进行端面耦合，光纤先穿过管壳，将玻璃尾纤12的玻璃块留在管壳6内部，用来进行光路耦合，如下图8。通过工装将玻璃尾纤12固定，然后将夹具固定在高精度手动调整台上进行位置上的调整，并通过监测光的输出功率来确定调整的位置是否合适，需要注意的是光纤垫块5的厚度应略小于玻璃尾纤12中玻璃片与相控光波导芯片1对其的厚度，并在调整前应当现在光纤垫块5的表面均匀涂一层光学胶(本实施例中采用紫外胶进行粘接)，这样，在调整的过程中，玻璃尾纤12中的玻璃块底部与紫外胶接触，但并没有固化，待调整完毕再进行紫外光照射固化。移除夹具后再进行二次补胶，确保耦合的强度。
S6：将耦合后的管壳6表面进行滤波片的封焊，以保持管壳6内部结构的气密性。
图9是本公开一个实施例的管壳结构进行滤波片封装后的结构示意图。如图9所示，封焊以后气密性良好。
根据本公开实施例的相控光波导芯片的封装方法，采用端面耦合的方式进行光纤与相控光波导芯片进行耦合；将热敏电阻封装在管壳内部，可以对管壳内部的温度进行实时监测，从而对模块进行温度调节；光纤玻璃块下方加垫块来对光纤的高度进行补偿，封装前先在垫块表面涂上光学胶，再进行耦合，保证尾纤玻璃块下表面与胶接触，这样，在调整 到合适的位置时可以直接对光学胶进行固化保证耦合精度。
进一步地，本公开的实施例公开了一种设备，该设备包括：一个或者多个处理器；存储器；一个或者多个程序，一个或者多个程序存储在存储器中，当被一个或者多个处理器执行时，执行本公开上述实施例所描述的相控光波导芯片的封装方法。该设备在相对较低的成本下实现了相控光波导芯片的电学信号的引出及光信号的输入，并具有可操作性和良好的可靠性。
进一步地，本公开的实施例公开了一种非易失性计算机存储介质，该计算机存储介质存储有一个或者多个程序，当一个或者多个程序被一个设备执行时，使得设备执行本公开上述实施例所描述的相控光波导芯片的封装方法。该非易失性计算机存储介质在相对较低的成本下实现了相控光波导芯片的电学信号的引出及光信号的输入，并具有可操作性和良好的可靠性。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本公开的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不一定指的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
尽管已经示出和描述了本公开的实施例，本领域的普通技术人员可以理解：在不脱离本公开的原理和宗旨的情况下可以对这些实施例进行多种变化、修改、替换和变型，本公开的范围由权利要求及其等同限定。

Claims (9)

  1. 一种相控光波导芯片的封装方法，其特征在于，包括以下步骤：
    将光波导芯片与半导体制冷器焊接在一起，以使所述半导体制冷器覆盖所述波导芯片的发热区域；
    将带有电路结构的第一双面金属陶瓷基板和第二双面金属陶瓷基板、带有所述光波导芯片的所述半导体制冷器、反射镜支架及光纤垫块按预设顺序一起焊接到管壳内部，将所述第一双面金属陶瓷基板的焊盘与所述光波导芯片的焊盘通过引线进行互联，并将所述半导体制冷器的两端引线与所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板上的焊盘通过引线进行互联；
    在所述管壳上对应所述光波导芯片位置上的反射镜支架上安装反射镜；
    将所述光波导芯片上的焊盘与所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板通过引线进行互联，将所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板上的焊盘与所述管壳上的焊盘引线互联；
    对所述光波导芯片的光路进行光纤耦合；
    将耦合后的管壳表面进行滤波片的封焊，以保持所述管壳内部结构的气密性。
  2. 根据权利要求1所述的相控光波导芯片的封装方法，其特征在于，所述将光波导芯片与半导体制冷器焊接在一起的步骤，具体包括：
    采用预成型焊片，并采用真空加还原性气体将所述光波导芯片和所述半导体制冷器进行焊接。
  3. 根据权利要求2所述的相控光波导芯片的封装方法，其特征在于，将所述光波导芯片和所述半导体制冷器进行焊接，焊接最高温度为320℃，维持15～20秒。
  4. 根据权利要求1所述的相控光波导芯片的封装方法，其特征在于，还包括：所述第一双面金属陶瓷基板的焊盘与所述光波导芯片的焊盘之间焊接热敏电阻。
  5. 根据权利要求1所述的相控光波导芯片的封装方法，其特征在于，采用硅胶将所述反射镜粘接在所述管壳上对应所述光波导芯片位置上的反射镜支架上。
  6. 根据权利要求1所述的相控光波导芯片的封装方法，其特征在于，采用金丝键合的方式将将所述光波导芯片上的焊盘与所述第一双面金属陶瓷基板和所述第二双面金属陶瓷基板连接。
  7. 根据权利要求1所述的相控光波导芯片的封装方法，其特征在于，所述将所述光波导芯片的光路进行光纤耦合的步骤，具体包括：
    使用带有玻璃尾纤的毛细管光纤穿过管壳，将尾纤的玻璃块留在管壳内部，用来进行 光路耦合；
    通过工装将所述玻璃尾纤固定；
    在所述光纤垫块的表面均匀涂一层光学胶；
    将夹具固定在高精度耦合调整台上进行位置上的调整，并通过监测光的输出功率以调整所述管壳与光纤的相对位置；
    在位置调整完毕后进行紫外光照射固化；
    移除夹具后进行补胶，以提升所述光波导芯片的光路的耦合强度。
  8. 一种设备，其特征在于，包括：
    一个或者多个处理器；
    存储器；
    一个或者多个程序，所述一个或者多个程序存储在所述存储器中，当被所述一个或者多个处理器执行时，执行如权利要求1-7任一项所述的相控光波导芯片的封装方法。
  9. 一种非易失性计算机存储介质，其特征在于，所述计算机存储介质存储有一个或者多个程序，当所述一个或者多个程序被一个设备执行时，使得所述设备执行如权利要求1-7任一项所述的相控光波导芯片的封装方法。
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CN111987076A (zh) * 2020-08-31 2020-11-24 中国电子科技集团公司第四十四研究所 一种近红外光与可见光的宽光谱光电探测器及其制作方法
CN111987076B (zh) * 2020-08-31 2023-06-16 中国电子科技集团公司第四十四研究所 一种近红外光与可见光的宽光谱光电探测器及其制作方法
CN112490813A (zh) * 2020-11-24 2021-03-12 成都圣世达科技有限公司 Tcc组模式滤波电连接器制备方法及tcc组模式滤波电连接器
CN112490813B (zh) * 2020-11-24 2024-05-28 成都圣世达科技有限公司 Tcc组模式滤波电连接器制备方法及tcc组模式滤波电连接器
CN115083924A (zh) * 2022-06-14 2022-09-20 东莞先导先进科技有限公司 芯片封装模块制造方法、装置、设备及可读存储介质
CN115083924B (zh) * 2022-06-14 2024-03-29 东莞先导先进科技有限公司 芯片封装模块制造方法、装置、设备及可读存储介质

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