WO2020077848A1 - 一种高纯碳化硅单晶衬底及其制备方法 - Google Patents

一种高纯碳化硅单晶衬底及其制备方法 Download PDF

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WO2020077848A1
WO2020077848A1 PCT/CN2018/123710 CN2018123710W WO2020077848A1 WO 2020077848 A1 WO2020077848 A1 WO 2020077848A1 CN 2018123710 W CN2018123710 W CN 2018123710W WO 2020077848 A1 WO2020077848 A1 WO 2020077848A1
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Prior art keywords
silicon carbide
carbide single
single crystal
crystal substrate
purity silicon
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English (en)
French (fr)
Chinese (zh)
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高超
柏文文
张红岩
窦文涛
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SICC CO Ltd
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SICC CO Ltd
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Priority claimed from CN201811205277.2A external-priority patent/CN109234802B/zh
Priority claimed from CN201811204666.3A external-priority patent/CN109338463B/zh
Application filed by SICC CO Ltd filed Critical SICC CO Ltd
Priority to JP2019571537A priority Critical patent/JP7239182B2/ja
Priority to KR1020197037937A priority patent/KR102345680B1/ko
Priority to EP18922090.8A priority patent/EP3666935B1/en
Publication of WO2020077848A1 publication Critical patent/WO2020077848A1/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/36—Carbides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02—Heat treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers

Definitions

  • the application relates to a high-purity silicon carbide single crystal substrate and a preparation method thereof, which belong to the field of semiconductor materials.
  • Semi-insulating silicon carbide (silicon carbide) single crystal substrate is the preferred semiconductor base material for the preparation of GaN high-frequency microwave devices. This aspect depends on the excellent properties such as high resistivity of semi-insulating silicon carbide single crystal substrate, and can be prepared with excellent performance Electronic device; on the other hand, it depends on the higher matching degree of the lattice constant of silicon carbide and GaN, which can make the heteroepitaxial layer obtain good crystal quality.
  • the preparation of the semi-insulating silicon carbide single crystal substrate has two implementation methods of doping and high purity.
  • doping a high concentration of vanadium By doping a high concentration of vanadium, a large number of deep level centers are introduced, and the Fermi level is pinned to the center of the forbidden band to achieve semi-insulating characteristics.
  • high-concentration vanadium doping will trap electrons in the fabricated devices, causing back-gate effects, resulting in device performance degradation or even failure.
  • the effective carrier concentration in the crystal is reduced by reducing the concentration of shallow level impurities in the crystal, and a certain number of intrinsic point defects are introduced as compensation for the center of the deep level to achieve high purity of semi-insulating characteristics
  • Semi-insulating silicon carbide single crystal substrates have become mainstream.
  • GaN uses silicon carbide single crystal substrates for epitaxy
  • the introduction of point defects will lead to an increase in the lattice fit between GaN and silicon carbide. This further reduces the quality of the GaN epitaxial layer.
  • the present application provides a high-purity silicon carbide single crystal substrate.
  • the high-purity silicon carbide single crystal substrate of the present application balances the relationship between the crystal quality of the GaN epitaxial layer and the electrical characteristics of the high-purity silicon carbide crystal, and improves the quality of the high-purity silicon carbide single crystal substrate and its epitaxy with GaN
  • the lattice matching degree of the layer does not affect the physical performance of the high-purity semi-insulating silicon carbide single crystal substrate.
  • the high-purity silicon carbide single crystal substrate is characterized in that the high-purity silicon carbide single crystal substrate includes at least a surface layer of a silicon carbide single crystal substrate and a main layer of a silicon carbide single crystal substrate, and the silicon carbide single crystal
  • the intrinsic point defect concentration of the substrate surface layer is less than the intrinsic point defect concentration of the body layer of the silicon carbide single crystal substrate, and the silicon carbide single crystal substrate has a semi-insulating property.
  • the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the body layer of the silicon carbide single crystal substrate is 1: 4-25.
  • the high-purity silicon carbide single crystal substrate is composed of a silicon carbide single crystal substrate surface layer and a silicon carbide single crystal substrate body layer. Further, the high-purity silicon carbide single crystal substrate is composed of the surface of the silicon carbide single crystal substrate and the main layer of the silicon carbide single crystal substrate.
  • the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is not greater than 31%. Further, the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is 9% -31%. Furthermore, the lower limit of the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is selected from 10%, 15%, 20%, 25% or 30%, and the upper limit is selected from 10%, 15%, 20%, 25% or 30%.
  • the thickness of the semi-insulating silicon carbide single crystal substrate is 490-510 ⁇ m.
  • the intrinsic point defect concentration of the surface layer of the silicon carbide single crystal substrate at room temperature is not higher than 1 ⁇ 10 13 cm ⁇ 3 .
  • the concentration of the intrinsic point defects at the room temperature of the surface layer of the silicon carbide single crystal substrate is not higher than 1 ⁇ 10 12 cm ⁇ 3 .
  • the concentration of the intrinsic point defects of the main layer of the silicon carbide single crystal substrate is 1 ⁇ 10 14 ⁇ 1 ⁇ 10 16 cm ⁇ 3 .
  • the concentration of the intrinsic point defects of the main layer of the silicon carbide single crystal substrate is 1 ⁇ 10 14 to 1 ⁇ 10 15 cm ⁇ 3 .
  • the thickness of the surface layer of the semi-insulating silicon carbide single crystal substrate is not greater than 150 ⁇ m.
  • the thickness of the semi-insulating silicon carbide single crystal surface layer is 20-150 ⁇ m.
  • the surface layer of the high-purity silicon carbide single crystal substrate after annealing treatment has a thickness of 50-150 ⁇ m.
  • the lower limit of the surface layer thickness of the high-purity silicon carbide single crystal substrate subjected to the annealing treatment is selected from 55 ⁇ m, 70 ⁇ m, 90 ⁇ m, 110 ⁇ m, 130 ⁇ m or 140 ⁇ m
  • the upper limit is selected from 55 ⁇ m, 70 ⁇ m, 90 ⁇ m, 110 ⁇ m, 130 ⁇ m or 140 ⁇ m
  • the thickness of the surface layer of the high-purity silicon carbide single crystal substrate after annealing treatment is 80-120 ⁇ m.
  • the surface layer of the silicon carbide single crystal substrate does not substantially contain intrinsic point defects at room temperature, and the concentration of the intrinsic point defects of the main layer of the silicon carbide single crystal substrate makes the high purity silicon carbide single The crystal substrate has semi-insulating properties.
  • the surface layer of the silicon carbide single crystal substrate contains only the intrinsic point defects inherent at the temperature at room temperature, and the concentration of the intrinsic point defects of the main layer of the silicon carbide single crystal substrate makes the high
  • the pure silicon carbide single crystal substrate has semi-insulating properties.
  • the surface layer of the silicon carbide single crystal substrate does not substantially contain intrinsic point defects at room temperature, and the concentration of the intrinsic point defects of the main layer of the silicon carbide single crystal substrate is 1 ⁇ 10 14 ⁇ 1 ⁇ 10 16 cm -3 , the thickness ratio of the surface layer of the silicon carbide single crystal substrate and the main body layer of the silicon carbide single crystal substrate in the high-purity silicon carbide single crystal substrate is 1: 4-25.
  • the surface layer of the silicon carbide single crystal substrate basically does not contain intrinsic point defects at room temperature.
  • the concentration of intrinsic point defects is extremely low. Unless in absolute zero, the intrinsic point defects always exist in the crystal, and the defect concentration is the lowest within a certain thickness. .
  • the lattice of the silicon carbide single crystal on the surface layer of the silicon carbide single crystal substrate has complete integrity.
  • the concentration of the shallow-level impurities in the silicon carbide single crystal substrate is 1 ⁇ 10 14 to 1 ⁇ 10 16 cm ⁇ 3 .
  • the shallow-level impurities include at least one of N, B, and Al.
  • the high-purity silicon carbide single crystal substrate is prepared by a method including the following steps: subjecting the high-purity silicon carbide single wafer to high-temperature rapid heat treatment and surface annealing treatment, that is, to obtain the high-purity carbonization Silicon single crystal substrate.
  • the high-temperature rapid heat treatment includes a rapid temperature increase heating stage and a rapid temperature decrease stage.
  • the rapid temperature-rise heating stage includes the following processing conditions: the temperature is raised to 1800-2300 ° C at a rate of 30-100 ° C / s, and maintained for 60-600s; the rapid temperature-lowering stage includes the following treatment conditions: at 50-150 ° C / s rate cooling to room temperature quickly.
  • the heating rate of the rapid heating step is 50-80 ° C / s.
  • the holding temperature in the rapid heating-up heating stage is 2000-2200 ° C, and the holding time is 100s-500s. Furthermore, the holding temperature in the rapid heating-up heating stage is 2100-2000 ° C, and the holding time is 150s-200s.
  • the rapid cooling stage includes: rapid cooling at a rate of 100-150 ° C / s. Further, the rapid cooling stage includes: rapid cooling at a rate of 100-150 ° C / s.
  • the rapid cooling stage described above can freeze the intrinsic point defects injected in the rapid heating and heating stage in the crystal.
  • the high-temperature rapid heat treatment of the present application injects a certain number of intrinsic point defects into the silicon carbide single wafer to avoid excessive annihilation of intrinsic point defects in the subsequent surface annealing process, affecting the prepared silicon carbide single crystal substrate Semi-insulating characteristics.
  • the surface temperature of the silicon carbide single wafer controlled by the surface annealing treatment is 1200-1800 ° C, and the annealing treatment time is 30-90 min.
  • the lower limit of the surface temperature of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is selected from 1250 ° C, 1300 ° C, 1400 ° C, 1500 ° C, 1600 ° C, 1700 ° C, or 1750 ° C
  • the upper limit is selected from 1250 ° C, 1300 °C, 1400 °C, 1500 °C, 1600 °C, 1700 °C or 1750 °C.
  • the lower limit of the time of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is selected from 35 min, 45 min, 55 min, 65 min, 75 min or 85 min, and the upper limit is selected from 35 min, 45 min, 55 min, 65 min, 75 min or 85 min.
  • the surface temperature of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is 1400-1600 ° C., and the annealing treatment time is 45-60 minutes. Furthermore, the surface temperature of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is 1500-1600 ° C.
  • the surface annealing treatment is to use a surface laser to heat the surface of the silicon carbide single wafer after high temperature rapid heat treatment;
  • the step of laser heating includes: performing reciprocating surface scanning with a laser to scan the surface of the silicon carbide single wafer after high temperature rapid heat treatment Annealing treatment, the laser moving speed is 0.5-3000mm / s.
  • the lower limit of the moving speed of the laser is selected from 1 mm / s, 1000 mm / s, 1500 mm / s, 2000 mm / s or 2500 mm / s
  • the upper limit is selected from 5 mm / s, 1000 mm / s, 1500 mm / s, 2000 mm / s Or 2500mm / s.
  • the moving speed of the laser is 0.5-5 mm / s. The moving speed of the laser enables the laser to heat the substrate surface to a preset temperature but the temperature will not be quickly conducted to the inside of the silicon carbide single crystal substrate, thereby achieving the annealing effect on the surface of the silicon carbide single crystal substrate.
  • the surface annealing treatment includes annealing at least one surface of the silicon carbide single wafer. Further, the surface annealing treatment includes annealing the contact surface with the GaN crystal when growing the GaN crystal on the silicon carbide single crystal substrate.
  • the surface annealing treatment uses a laser to heat the surface of the silicon carbide single wafer after high temperature rapid heat treatment.
  • the wavelength of the laser is less than 352 nm, the pulse width is not greater than 60 ns, and the energy density is not greater than 150 mJ / cm 2 .
  • the wavelength of the laser is less than 352 nm, the pulse width is 20-60 ns, and the energy density is 70-110 mJ / cm 2 .
  • the parameters of the laser of the present application are used to process the surface of the high-purity silicon carbide single wafer with high uniformity.
  • a semiconductor device comprising the high-purity silicon carbide single crystal substrate according to any one of the above.
  • the semiconductor device is an epitaxial wafer or a transistor.
  • the semiconductor device is an epitaxial wafer or a transistor.
  • a method for preparing a high-quality semi-insulating silicon carbide single crystal substrate is provided.
  • the preparation method of the present application balances the relationship between the crystal quality of the GaN epitaxial layer and the electrical characteristics of the high-purity silicon carbide crystal.
  • the preparation method of the new high-purity semi-insulating silicon carbide substrate improves the quality of the semi-insulating silicon carbide single crystal substrate and its lattice matching degree with the GaN epitaxial layer, while not affecting the high-purity semi-insulating silicon carbide single crystal
  • the physical properties of the substrate are realized.
  • the high-purity silicon carbide single wafer is subjected to high-temperature rapid heat treatment and surface annealing treatment, that is, the high-quality semi-insulating silicon carbide single crystal substrate is prepared; the high-quality semi-insulating silicon carbide single crystal substrate It includes at least a surface layer of a silicon carbide single crystal substrate and a body layer of a silicon carbide single crystal substrate.
  • the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is not greater than 31%. Further, the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is 9% -31%. Furthermore, the lower limit of the ratio of the thickness of the surface layer of the silicon carbide single crystal substrate to the thickness of the silicon carbide single crystal substrate is selected from 10%, 15%, 20%, 25% or 30%, and the upper limit is selected from 10%, 15%, 20%, 25% or 30%.
  • the thickness of the semi-insulating silicon carbide single crystal substrate is 490-510 ⁇ m.
  • the thickness of the semi-insulating silicon carbide single crystal surface layer is not greater than 150 ⁇ m.
  • the thickness of the surface layer of the semi-insulating silicon carbide single crystal substrate after annealing treatment is 20-150 ⁇ m.
  • the thickness of the surface layer of the semi-insulating silicon carbide single crystal substrate after annealing treatment is 50-150 ⁇ m.
  • the lower limit of the thickness of the annealed surface layer of the semi-insulating silicon carbide single crystal substrate is selected from 55 ⁇ m, 70 ⁇ m, 90 ⁇ m, 110 ⁇ m, 130 ⁇ m or 140 ⁇ m
  • the upper limit is selected from 55 ⁇ m, 70 ⁇ m, 90 ⁇ m, 110 ⁇ m, 130 ⁇ m or 140 ⁇ m
  • the thickness of the surface layer of the semi-insulating silicon carbide single crystal substrate after annealing treatment is 80-120 ⁇ m.
  • the high-temperature rapid heat treatment includes a rapid heating-up heating stage, and the rapid heating-up heating stage includes: heating to 1800-2300 ° C at a rate of 30-100 ° C / s and maintaining it for 60-600s.
  • the heating rate of the rapid heating step is 50-80 ° C / s.
  • the holding temperature in the rapid heating-up heating stage is 2000-2200 ° C., and the holding time is 100-500 s. Furthermore, the holding temperature in the rapid heating-up heating stage is 2000-2100 ° C., and the holding time is 150-200 s.
  • the high-temperature rapid heat treatment further includes a rapid cooling stage, and the rapid cooling stage includes rapid cooling at a rate of 50-150 ° C / s. Further, the rapid cooling stage includes: rapid cooling at a rate of 100-150 ° C / s.
  • the rapid cooling stage described above can freeze the intrinsic point defects injected in the rapid heating and heating stage in the crystal.
  • the high-temperature rapid heat treatment of the present application injects a certain number of intrinsic point defects into a high-purity silicon carbide single wafer to avoid excessive annihilation of intrinsic point defects during subsequent surface annealing, which affects the preparation of semi-insulating silicon carbide single The semi-insulating properties of the crystal substrate.
  • the surface temperature of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is 1200-1800 ° C, and the annealing treatment time is 30-90 min.
  • the lower limit of the surface temperature of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is selected from 1250 ° C, 1300 ° C, 1400 ° C, 1500 ° C, 1600 ° C, 1700 ° C, or 1750 ° C
  • the upper limit is selected from 1250 ° C, 1300 °C, 1400 °C, 1500 °C, 1600 °C, 1700 °C or 1750 °C.
  • the lower limit of the time of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is selected from 35 min, 45 min, 55 min, 65 min, 75 min or 85 min, and the upper limit is selected from 35 min, 45 min, 55 min, 65 min, 75 min or 85 min.
  • the surface temperature of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is 1400-1600 ° C., and the annealing treatment time is 45-60 minutes. Furthermore, the surface temperature of the high-purity silicon carbide single wafer controlled by the surface annealing treatment is 1500-1600 ° C.
  • the surface annealing treatment includes annealing at least one surface of the high-purity silicon carbide single wafer. Further, the surface annealing treatment includes annealing the contact surface with the GaN crystal when the high purity silicon carbide single crystal substrate grows the GaN crystal.
  • the surface annealing treatment uses a laser to heat the surface of the high-purity silicon carbide single wafer after high-temperature rapid heat treatment.
  • the heating step of the laser includes: reciprocating surface scan of a high-purity silicon carbide single wafer subjected to high-temperature rapid heat treatment by a laser for surface annealing treatment, and the moving speed of the laser is 0.5-3000 mm / s.
  • the lower limit of the moving speed of the laser is selected from 1 mm / s, 1000 mm / s, 1500 mm / s, 2000 mm / s or 2500 mm / s
  • the upper limit is selected from 5 mm / s, 1000 mm / s, 1500 mm / s, 2000 mm / s Or 2500mm / s.
  • the moving speed of the laser is 0.5-5 mm / s.
  • the moving speed of the laser enables the laser to heat the surface of the substrate to a preset temperature but the temperature will not be quickly conducted to the inside of the semi-insulating silicon carbide single crystal substrate, thereby achieving the annealing effect on the surface of the semi-insulating silicon carbide single crystal substrate.
  • the wavelength of the laser is less than 352 nm, the pulse width is not greater than 60 ns, and the energy density is not greater than 150 mJ / cm 2 .
  • the wavelength of the laser is less than 352 nm, the pulse width is 20-60 ns, and the energy density is 70-110 mJ / cm 2 .
  • the parameters of the laser of the present application are used to process high-purity silicon carbide single wafers with high surface uniformity.
  • the step 1) a method for preparing a high-purity silicon carbide single wafer includes the following steps: after the high-purity silicon carbide single crystal is prepared through the impurity removal and growth phases of silicon carbide powder, cutting, grinding and polishing are performed To produce high-purity silicon carbide single wafers.
  • the low concentration of intrinsic point defects in the surface layer of the high-purity silicon carbide single crystal substrate of the present application makes the lattice matching degree of GaN and silicon carbide single crystal higher when the high-purity silicon carbide single crystal is used as the epitaxial substrate for GaN epitaxy , So that the quality of the prepared GaN epitaxial layer is higher; and the main layer of the high purity silicon carbide single crystal has a certain concentration of internal point defects, which can maintain the semi-insulating characteristics of the high purity silicon carbide single crystal substrate.
  • the preparation of the high-purity silicon carbide single crystal substrate of the present application uses high-temperature rapid heat treatment technology and surface laser annealing technology to remove the point defects introduced into a certain area on the surface of the high-purity semi-insulating silicon carbide substrate while keeping the distance from the substrate The internal point defects on the surface, so as to achieve a clean area on the surface of the substrate without defects and retain the semi-insulating characteristics of the high-purity silicon carbide single crystal substrate, so that the GaN epitaxial layer obtains the best quality.
  • the high-purity semi-insulating silicon carbide substrate of the present application balances the relationship between the crystal quality of the GaN epitaxial layer and the electrical properties of the high-purity silicon carbide crystal, and improves the quality of the high-purity silicon carbide single crystal substrate and its relationship with the GaN epitaxial layer
  • the lattice matching degree does not affect the physical properties of high-purity semi-insulating silicon carbide single crystal substrate.
  • FIG. 1 is a schematic diagram of high-temperature rapid heat treatment for preparing a high-purity silicon carbide single crystal substrate of the present application.
  • FIG. 2 is a schematic diagram of surface annealing treatment for preparing a high-purity silicon carbide single crystal substrate of the present application.
  • FIG. 3 is a schematic diagram showing the concentration of intrinsic point defects in a high-purity silicon carbide single wafer prepared by the present application, a high-purity silicon carbide single wafer subjected to high-temperature rapid heat treatment and a high-purity silicon carbide single crystal substrate.
  • the resistivity test uses Semimap's COREMA-WT non-contact semi-insulation resistivity tester.
  • the crystal type test adopts the HR800 type confocal Raman spectrometer of Horiba Company.
  • the surface test of silicon carbide single crystal substrate adopts MicroProf @ TTV200 type automatic surface tester of FRT company.
  • the element content test uses Cameca's IMS 7f-Auto secondary ion mass spectrometry instrument.
  • the preparation of the high-purity silicon carbide single wafer of the present application may be prepared by a method in the art, and the following preparation method of the high-purity silicon carbide single wafer may be used.
  • the method includes the following steps:
  • the purity of silicon carbide powder should be above 99.9999%, and the concentration of shallow-level donor impurities such as nitrogen contained in it should be below 1 ⁇ 10 16 cm -3 ,
  • the sum of the acceptor impurities such as boron and aluminum in the shallow energy level should be less than 1 ⁇ 10 16 cm -3 ;
  • the furnace pressure is increased to 10-100 mbar at a rate of 30-50 mbar / h, and the temperature in the furnace is increased to 2100-2200 °C at a rate of 10-20 °C / h, and maintained at this temperature for 50-100 h, Complete the growth process of silicon carbide single crystal;
  • a method for preparing a high-purity silicon carbide single wafer includes the following steps:
  • the purity of silicon carbide powder should be above 99.9999%, and the concentration of shallow-level donor impurities such as nitrogen contained in it should be below 1 ⁇ 10 16 cm -3 ,
  • the sum of the acceptor impurities such as boron and aluminum in the shallow energy level should be less than 1 ⁇ 10 16 cm -3 ;
  • the high-purity silicon carbide single wafer 1 # prepared by the above method is used to prepare a high-purity silicon carbide single crystal substrate.
  • the preparation method includes the following steps:
  • the obtained high-purity silicon carbide single wafer is subjected to high-temperature rapid heat treatment and a laser is used to perform reciprocating scanning annealing on the surface of the high-purity silicon carbide single wafer to obtain a high-purity silicon carbide single crystal substrate.
  • the temperature of the surface of the high-purity silicon carbide single wafer is controlled by controlling the power of the laser, the amount of defocus and the area of laser heat treatment.
  • FIG. 1 The schematic diagram of the high-temperature rapid heat treatment for preparing a high-purity silicon carbide single crystal substrate of this embodiment is shown in FIG. 1, where T is temperature and t is time.
  • FIG. 2 The schematic diagram of the surface annealing process for preparing a high-purity silicon carbide single crystal substrate of this embodiment is shown in FIG. 2, 1 is a laser, 2 is a high-purity silicon carbide single wafer, and the laser 1 is on the surface of the high-purity silicon carbide single wafer 2 The surface of the high-purity silicon carbide single wafer 2 is heated by reciprocating at a certain rate.
  • FIG. 3 The schematic diagram of the change in the concentration of intrinsic point defects from the semi-insulating silicon carbide single wafer to the high purity silicon carbide single crystal substrate product in this application is shown in FIG. 3, in which the high purity silicon carbide single wafer, high purity after high temperature rapid heat treatment
  • the concentration schematic diagrams of the intrinsic point defects in the silicon carbide single wafer and the high-purity silicon carbide single crystal substrate are shown in FIGS. 3a, 3b, and 3c, respectively.
  • 3 in FIG. 3 represents intrinsic point defects
  • 4 is the surface layer of the high-purity silicon carbide single crystal substrate
  • 5 is the main layer of the high-purity silicon carbide single crystal.
  • the high-temperature rapid heat treatment of the present application implants a certain number of intrinsic point defects 3 (as shown in FIG.
  • the high-purity silicon carbide single crystal substrate is annealed using KrF pulse laser irradiation to control the energy density of the high-purity silicon carbide single crystal substrate to be no more than 150 mJ / cm 2 .
  • High purity silicon carbide single crystal substrate 1 #, high purity silicon carbide single crystal substrate 1 #, high purity silicon carbide single crystal substrate 2 #, high purity silicon carbide were prepared according to the above method and the specific parameters shown in Table 1 Single crystal substrate 3 #, high purity silicon carbide single crystal substrate 4 # and high purity silicon carbide single crystal substrate 5 #.
  • the specific preparation parameters and substrate properties of high-purity silicon carbide single crystal substrate 1 # -5 # are shown in Table 1.
  • the intrinsic point defect concentration of the surface layer of the silicon carbide single crystal substrate of the high purity silicon carbide single crystal substrate 1 # -5 # is smaller than the intrinsic point defect concentration of the body layer of the silicon carbide single crystal substrate, and the prepared silicon carbide The single crystal substrate 1 # -5 # is semi-insulating.
  • the high-purity silicon carbide single crystal substrate 1 # surface layer has a very low concentration of spot defect defects, and has good lattice integrity.
  • the high-purity silicon carbide single crystal substrate 1 # main layer has an intrinsic point defect concentration that makes the The high-purity silicon carbide single crystal substrate has semi-insulating properties.
  • the concentration of intrinsic point defects in the surface layer of silicon carbide single crystal substrate is extremely low at room temperature. Unless in absolute zero, intrinsic point defects always exist in the crystal, and the concentration of intrinsic point defects is the lowest within a certain thickness.
  • the resistivity of the 4-12 inch semi-insulating silicon carbide single crystal substrate prepared in this application can reach more than 2 ⁇ 10 11 ⁇ ⁇ cm, and the radial distribution of resistivity is controlled within 2 orders of magnitude, so as to realize the semi-insulating silicon carbide single
  • the resistivity of the crystal substrate is evenly distributed.
  • the curvature and warpage are tested, and the curvature and warpage can be controlled within 45 ⁇ m.
  • the same size of high-purity silicon carbide single crystal substrate 1 # -5 # and high-purity silicon carbide single wafer 1 # prepared in Example 1 were used as the substrates for preparing GaN single crystal epitaxial wafers respectively. method.
  • the crystal quality of the GaN single crystal made from the high purity silicon carbide single crystal substrate 1 # -5 # is higher than that of the GaN single crystal epitaxial wafer made with the high purity silicon carbide single wafer 1 # as the base, specific data As shown in table 2.

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