WO2020022255A1 - Dispositif de mesure et procédé de génération de tension - Google Patents

Dispositif de mesure et procédé de génération de tension Download PDF

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Publication number
WO2020022255A1
WO2020022255A1 PCT/JP2019/028632 JP2019028632W WO2020022255A1 WO 2020022255 A1 WO2020022255 A1 WO 2020022255A1 JP 2019028632 W JP2019028632 W JP 2019028632W WO 2020022255 A1 WO2020022255 A1 WO 2020022255A1
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Prior art keywords
waveform
phase
current
voltage
phase difference
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PCT/JP2019/028632
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English (en)
Japanese (ja)
Inventor
高橋　真吾
滋 河本
鈴木　亮太
ムルトゥザ ペトラードワラー
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日本電気株式会社
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Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP2020532377A priority Critical patent/JP7111163B2/ja
Publication of WO2020022255A1 publication Critical patent/WO2020022255A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00—Arrangements for measuring electric power or power factor
    • G01R21/06—Arrangements for measuring electric power or power factor by measuring current and voltage
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R25/00—Arrangements for measuring phase angle between a voltage and a current or between voltages or currents

Definitions

  • the present invention is based on the priority claim of Japanese Patent Application No. 2018-137655 (filed on Jul. 23, 2018), the entire contents of which are incorporated herein by reference. Shall be.
  • the present invention relates to a measuring device and a voltage generation method.
  • ⁇ A technique is used in which the power consumption and current consumption waveforms are monitored by sensors installed on the distribution board, and the power consumption and operating state of each electric device are estimated based on the characteristic amount and the like.
  • the current waveform In order to compare and analyze the current waveform in a time series, it is necessary to measure the current waveform based on the phase of the voltage. In measuring the current waveform, it is preferable to accurately grasp the phase delay with respect to the voltage waveform. It is known that, when the phase delay with respect to the voltage waveform is inaccurate, the calculation cost for estimating the current waveform increases, and the estimation accuracy also decreases, which makes it impractical.
  • FIG. 14 schematically shows an example of a power measurement system in a three-phase four-wire connection system.
  • a current waveform and a voltage waveform are monitored by an ammeter 101 and a voltmeter 102 installed on a breaker 105 of a distribution board that supplies power to a load 104 such as an electric device.
  • a non-contact type sensor such as a CT (Current Transformer) is used for the ammeter 101.
  • CT Current Transformer
  • an alternating current (secondary current) flows through the secondary winding so as to cancel a magnetic flux generated in the magnetic core due to the alternating current flowing through the conductor (primary side).
  • FIG. 15 is a diagram showing an example of three-phase four-wire AC current waveforms I1, I2, I3 and voltage waveforms V1, V2, V3 to the load 104 measured by the ammeter 101 and the voltmeter 102 in FIG. is there.
  • Patent Document 1 a non-contact type voltage / current sensor using stray capacitance generated between the electric wire and the sensor converts the current waveform to a voltage waveform.
  • Patent Document 1 discloses a device and a method for estimating a phase delay between a voltage and a current for estimating a phase delay between a voltage waveform and a current waveform using a non-contact type voltage / current sensor. It has been disclosed.
  • a power factor between a measured current waveform and a voltage waveform having a phase delay is calculated, and a phase delay at which the power factor is maximized is estimated as a true value.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide an apparatus and a method capable of generating, from a measured AC current waveform, an AC voltage waveform corresponding to the AC current waveform. Is to do.
  • an oscillator that generates an AC voltage signal
  • a phase comparator that detects a phase difference between a waveform of an input AC current and a waveform of the AC voltage signal generated by the oscillator
  • a measuring apparatus including a phase locked loop circuit having a variable oscillation frequency of the oscillator based on the phase difference and controlling the phase difference to satisfy a predetermined condition.
  • a phase difference between a waveform of an AC current measured by an ammeter and a waveform of an AC voltage signal generated by an oscillator included in a phase locked loop is detected, and based on the phase difference, A voltage generation method is provided in which the oscillation frequency of the oscillator is varied and the phase difference is controlled so as to satisfy a predetermined condition.
  • an AC voltage waveform corresponding to the AC current waveform can be generated from the measured AC current waveform.
  • FIG. 3 is a diagram illustrating an exemplary embodiment of the present invention.
  • FIG. 3 is a diagram illustrating an exemplary embodiment of the present invention.
  • (A), (B) is a figure explaining a phase comparator.
  • FIG. 3 is a diagram illustrating a phase comparator.
  • FIG. 3 is a diagram illustrating a configuration of a phase comparator.
  • FIG. 3 is a diagram illustrating a configuration of a phase comparator.
  • FIG. 3 is a diagram illustrating a configuration of a VCO.
  • FIG. 4 is a diagram illustrating an operation of the first embodiment.
  • FIG. 2 is a diagram illustrating Embodiment 1.
  • FIG. 2 is a diagram illustrating Embodiment 1.
  • FIG. 6 is a diagram illustrating a configuration of a second embodiment.
  • FIG. 6 is a diagram illustrating a configuration of a second embodiment.
  • FIG. 6 is a diagram illustrating a configuration of a second embodiment. It is a figure explaining an example of a power measuring system.
  • FIG. 4 is a diagram illustrating current and voltage waveforms measured by the power measurement system.
  • FIG. 1 is a diagram illustrating an embodiment of the present invention.
  • FIG. 1 shows an example of a single-phase two-wire connection simply for simplicity of description.
  • a non-contact type ammeter 101 such as a CT (Current Transformer) detects, for example, an AC current flowing through a power supply line 106 from an AC power supply 103 and supplies the AC current to the measuring device 110 as, for example, a voltage between terminals of a resistor. I do.
  • the ammeter 101 detects the current flowing through the power supply line 106 of the breaker 105 of the distribution board in a non-contact manner.
  • the measuring device 110 detects a phase difference between a voltage waveform corresponding to the AC current waveform measured by the ammeter 101 and an AC voltage waveform generated by the oscillator, and adjusts the phase difference to a predetermined value (for example, zero).
  • the frequency of the AC voltage generated by the oscillator is variably controlled.
  • the measuring device 110 separates an AC current waveform (a voltage waveform corresponding to the AC current waveform) I measured by the ammeter 101 and an AC voltage waveform V synchronized in phase with the AC current waveform measured by the ammeter 101. Output as an AC current waveform and AC voltage waveform in the panel.
  • the ammeter 101 may be connected to the main breaker 105-1 in FIG. According to the present embodiment, an AC voltage waveform corresponding to the measured AC current waveform can be generated without measuring the voltage.
  • the breaker 105 of the distribution board may be a branch breaker or a main breaker.
  • FIG. 2 is a diagram illustrating the configuration of an embodiment of the present invention.
  • the ammeter 101 supplies an alternating current (secondary current) corresponding to the turns ratio to the secondary winding so as to cancel the magnetic flux generated in the magnetic core 1011 due to the alternating current flowing through the power supply line 106 (primary side). Then, a voltage (AC voltage) generated across the resistor RL due to the secondary current is output as the detected AC current.
  • the amplifier 111 amplifies the voltage between terminals (AC voltage) of the resistor RL.
  • a low-pass filter (Low-Pass-Filter: LPF) 112 blocks (attenuates) frequency components of the output voltage of the amplifier 111 that are equal to or higher than a predetermined frequency (cut-off frequency), and passes frequency components equal to or lower than the cut-off frequency.
  • LPF Low-Pass-Filter
  • the Phase Locked Loop (PLL) 120 includes a phase comparator 121, a loop filter (Loop Filter) 122 including a low-pass filter, and a voltage controlled oscillator (Voltage Controlled Oscillator: VCO) 123.
  • phase comparator 121 Phase comparator 121
  • loop Filter Loop Filter
  • VCO Voltage Controlled Oscillator
  • the phase comparator 121 detects the phase difference between the AC voltage signal waveform output from the LPF 112 and the AC voltage signal waveform (sine wave) output from the VCO 123, and outputs a voltage corresponding to the phase difference.
  • the loop filter 122 smoothes the output voltage from the phase comparator 121.
  • the loop filter 122 supplies the smoothed voltage to the VCO 123 as a control voltage.
  • the VCO 123 varies the oscillation frequency within a predetermined frequency range ⁇ ⁇ f according to the control voltage supplied from the loop filter 122, with the commercial power supply frequency as the center frequency fc.
  • the VCO 123 may include, for example, a sine wave oscillator, and vary the oscillation frequency according to a control voltage from the loop filter 122.
  • FIG. 3A is a diagram illustrating an example of the configuration of the zero-cross detection circuit 1211 of the AC voltage waveform in the phase comparator 121.
  • FIG. 3B is a diagram illustrating the operation of the zero-crossing detection circuit 1211 in FIG.
  • the comparator 1212 when the voltage of the non-inverting input terminal (+) is equal to or lower than the reference voltage (0 V) of the inverting terminal ( ⁇ ), the comparator 1212 outputs (comparisons) as shown in FIG. A low potential is output to Vout, and when the voltage at the non-inverting input terminal (+) exceeds the reference voltage (0), a high potential is output to the output Vout. Then, when the voltage of the non-inverting input terminal (+) becomes equal to or lower than the voltage obtained by dividing the High potential by the resistors R1 and R2, a Low potential is output to the output Vout.
  • FIG. 3A illustrates an example of the configuration of an analog circuit as the zero-cross detection circuit 1211; however, the zero-cross detection circuit 1211 is not limited to the analog circuit configuration. And the zero cross point may be detected based on the digital signal waveform.
  • FIG. 4 is a diagram illustrating an example of the configuration of the phase comparator 121 in FIG.
  • the voltage inputs Vin1 and Vin2 of the phase difference detection circuit 1214 are the output voltage of the VCO 123 and the output voltage of the LPF 112 (either may be used).
  • the zero-cross detection circuits 1211A and 1211B detect zero-crosses when the voltage inputs Vin1 and Vin2 input to each change from negative to positive.
  • the digital phase comparison circuit 1213 receives the output signals from the zero cross detection circuits 1211A and 1211B, detects the phase difference between the zero cross points at the voltage inputs Vin1 and Vin2, and when the phase of the voltage input Vin1 lags behind the voltage input Vin2. , UP signal, and if the phase is advanced, a DOWN signal is output.
  • the charge pump circuit 1215 turns on the switch SW1 and charges the capacitor C with the discharge current (source @ current) from the constant current source 1.
  • the switch SW2 is turned on, and the capacitor C is discharged by the sink current (sink current) from the constant current source 2.
  • the terminal voltage of the capacitor C is smoothed by the loop filter 122 and supplied to the VCO 123 as a control voltage.
  • FIG. 5 is a diagram for explaining the operation of the digital phase comparison circuit 1213 in FIG.
  • Vout1 and Vout2 are zero-cross detection results (digital signals) of the voltage inputs Vin1 and Vin2.
  • the digital phase comparison circuit 1213 detects rising edges of the zero-cross detection results (digital signals) Vout1 and Vout2 from Low to High. If the rising edge of Vout1 is ahead of Vout2, the rising edge of Vout2 rises at the rising edge of Vout1. An active DOWN signal is output for a time corresponding to the phase difference with respect to the edge. If the rising edge of Vout2 is ahead of Vout1, the UP signal that is active is output for a time corresponding to the phase difference between the rising edge of Vout2 and the rising edge of Vout1.
  • FIG. 6 is a diagram illustrating an example in which the phase comparator 121 of FIG. 2 is configured by an analog multiplier 1216. By multiplying the sine waves of Vin1 and Vin2 (same frequency: f 1 ) in FIG. Becomes
  • the analog multiplier 1216 is configured by, for example, a Gilbert multiplier.
  • the output signal from the analog multiplier 1216 is input to the loop filter 122 is a low-pass filter cuts off a frequency component of 2 ⁇ f 1.
  • a DC (direct current) component [cos ( ⁇ 1 ⁇ 2 )] / 2 (a frequency component equal to or lower than the cutoff frequency) of the output signal from the analog multiplier 1216 is extracted.
  • a DC (direct current) component [cos ( ⁇ 1 ⁇ 2 )] / 2 (a frequency component equal to or lower than the cutoff frequency) of the output signal from the analog multiplier 1216 is extracted.
  • FIG. 7 is a diagram schematically illustrating an example of the VCO 123 in FIG.
  • the VCO 123 includes a Wien bridge oscillation circuit configured with an operational amplifier (Operational Amplifier) 1231.
  • the oscillation frequency is given below.
  • a resistor R 2 constituted by CdS (cadmium sulfide) cells, etc., by varying the resistance value of the resistor R 2 in the light from the photodiode D 1 which current is varied in a control voltage (output voltage of the LPFs 122), the control voltage May be generated.
  • the control voltage is increased, the current flowing through the photodiode D 1 is increased (light emission amount increases), the resistance value of the resistor R 2 is decreased, the oscillation frequency f is increased.
  • the control voltage is lowered, the photodiode D 1 in the flowing current decreases (light emission amount decreases), the resistance R the resistance value of 2 is increased, the oscillation frequency f is lowered.
  • the VCO 123 is, of course, not limited to the configuration shown in FIG.
  • the VCO 123 is composed of a ring oscillator that varies the oscillation frequency with the power supply voltage by feeding back the output of the last stage of the odd-numbered inverter to the input of the first stage, and inputs a square wave from the ring oscillator to, for example, a band-pass filter. , And may be converted to a sine wave and output.
  • a signal obtained by dividing the output signal of the VCO 123 by a frequency divider may be fed back to the phase comparator 121 and output as an AC voltage V.
  • FIG. 8 is a diagram illustrating the operation of the first embodiment.
  • a waveform 141 in FIG. 8A is a current waveform (output voltage of the amplifier 111 in FIG. 2) flowing through the power supply line 106 measured by the ammeter 101.
  • a waveform 142 in FIG. 8B is a voltage waveform obtained by cutting a high frequency of the waveform 141 in FIG. 8A by the LPF 112 in FIG.
  • FIG. 8C is a diagram showing an AC voltage waveform 143 (output voltage waveform V of PLL 120 in FIG. 2) that is phase-synchronized with waveform 142 in FIG. 8B in PLL 120 in FIG.
  • FIG. 9 is a diagram illustrating an example in which the embodiment of FIG. 2 is applied to a three-phase four-wire power supply.
  • FIG. 11 is a diagram for explaining a second exemplary embodiment of the present invention. Referring to FIG. 11, the configuration of a phase locked loop (PLL) 130 is different from that of the phase locked loop (PLL) 120 of FIG.
  • PLL phase locked loop
  • the PLL 130 includes a PF (Power Factor) maximizing control circuit 131, a phase control circuit 132, a loop filter 122, and a VCO 123.
  • PF Power Factor
  • the PF maximization control circuit 131 obtains a phase ⁇ PFMAX of an AC voltage waveform having a maximum power factor with respect to (a voltage waveform corresponding to) the AC current waveform input via the ammeter 101, the amplifier 111, and the LPF 112. .
  • the phase control circuit 132 calculates the phase difference ⁇ between the AC voltage waveform (sine wave) output from the VCO 123 and the AC current waveform (corresponding to) from the LPF 112, and the phase output from the PF maximization control circuit 131. Compare ⁇ PFMAX . When ⁇ PFMAX is larger than the phase difference ⁇ , control is performed so as to increase the oscillation frequency of VCO 123 (the phase difference between the AC voltage waveform from VCO 123 and the AC current waveform from LPF 112 (corresponding to the AC current waveform from LPF 112) is increased. Do).
  • FIG. 12 is a diagram illustrating an example of the configuration of the PF maximization control circuit 131 and the phase control circuit 132 of FIG.
  • an alternating current waveform (a voltage waveform corresponding to) from the LPF 112 is input to Vin1
  • an alternating current waveform from the VCO 123 is input to Vin2.
  • the PF maximization control circuit 131 includes analog to digital converters (Analog to Digital Converters) 1311A and 1311B for converting analog voltages of the voltage inputs Vin1 and Vin2 into digital signals, and an AC current waveform obtained by converting the analog signals to digital signals.
  • PF maximizing phase calculation circuit 1312 for calculating the phase ⁇ PFMAX of the AC voltage waveform for maximizing the power factor.
  • the PF maximizing phase calculation circuit 1312 calculates the phase difference ⁇ between Vin1 and Vin2 based on the zero crossing point when Vin1 and Vin2 change from negative to positive.
  • PF maximizing phase calculation circuit 1312 for example, an AC current waveform obtained by converting an analog signal into a digital signal is represented by i (j), an AC voltage waveform obtained by converting the analog signal into a digital signal is represented by v (j), and the phase difference is represented by:
  • ⁇ and the number of samples are N, ⁇ (phase delay) that maximizes is obtained, and this may be set as ⁇ PFMAX .
  • the number of samples N depends on the conversion speed (sampling frequency) of the ADCs 1311A and 1311B, but may be the number of samples for a plurality of AC power supply cycles.
  • the phase control circuit 132 includes a phase comparison circuit 1321 and a charge pump circuit 1322.
  • the phase comparison circuit 1321 compares the phase difference ⁇ with ⁇ PFMAX .
  • FIG. 13A shows the positions of the voltage waveform 152 (sine wave) output from the VCO 123 and the voltage waveform 151 output from the LPF 112 (a waveform obtained by converting the current detected by the ammeter 101 in FIG. 11 into a voltage).
  • An example of the phase difference ⁇ is shown.
  • FIG. 13B shows an example of the phase difference ⁇ PFMAX of the voltage waveform with the maximum power factor for the voltage waveform 152 and the current waveform 151 from the VCO 123 .
  • phase comparison circuit 1321 When ⁇ PFMAX is larger than phase difference ⁇ (see FIGS. 13A and 13B), phase comparison circuit 1321 outputs an UP signal so as to increase the oscillation frequency of VCO 123.
  • phase comparison circuit 1321 when ⁇ PFMAX is smaller than the phase difference ⁇ , the phase comparison circuit 1321 outputs a DOWN signal so as to lower the oscillation frequency of the VCO 123.
  • the charge pump circuit 1322 When the UP signal from the phase comparison circuit 1321 is activated, the charge pump circuit 1322 turns on the switch SW1 and charges the capacitor C with the discharge current (source $ current) from the constant current source 1.
  • the charge pump circuit 1322 When the DOWN signal from the phase comparison circuit 1321 is activated, the charge pump circuit 1322 turns on the switch SW2 and discharges the capacitor C with a sink current (sink current) from the constant current source 2.
  • the terminal voltage of the capacitor C is smoothed by the loop filter 122 in FIG. 11 and supplied to the VCO 123 as a control voltage.
  • an AC voltage waveform corresponding to the AC current waveform measured by the distribution board can be generated without measuring the AC voltage at the distribution board.
  • the ammeter 101 and the measuring device 110 may be integrally formed. 2 and 11, the AC voltage waveform V and the AC current waveform I output from the measuring device 110 are not limited to analog signal waveforms, but may be digital signal waveforms (in this case, measurement
  • the device 110 may be configured to communicate and output a digital signal waveform).
  • Patent Document 1 is incorporated herein by reference. Modifications and adjustments of the embodiments or examples are possible within the framework of the entire disclosure (including the claims) of the present invention and based on the basic technical concept thereof. Further, various combinations or selections of various disclosed elements (including each element of each claim, each element of each embodiment, each element of each drawing, and the like) are possible within the scope of the claims of the present invention. . That is, the present invention naturally includes various variations and modifications that can be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.

Abstract

L'invention concerne un dispositif de mesure pouvant générer, à partir d'une forme d'onde de courant alternatif mesurée, une forme d'onde de tension de courant alternatif correspondant à la forme d'onde de courant alternatif. Le dispositif de mesure comprend : un oscillateur pour générer un signal de tension de courant alternatif; et un comparateur de phases pour détecter une différence de phase entre la forme d'onde d'un courant alternatif d'entrée et la forme d'onde du signal de tension de courant alternatif généré par l'oscillateur. Le dispositif de mesure comprend également un circuit de synchronisation de phases qui fait varier une fréquence d'oscillation de l'oscillateur en fonction de la différence de phase, et effectue un réglage tel que la différence de phase réponde à une condition prédéterminée.
PCT/JP2019/028632 2018-07-23 2019-07-22 Dispositif de mesure et procédé de génération de tension WO2020022255A1 (fr)

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JP2020532377A JP7111163B2 (ja) 2018-07-23 2019-07-22 測定装置及び電圧生成方法

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JP2018137655 2018-07-23
JP2018-137655 2018-07-23

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102513647B1 (ko) * 2022-06-29 2023-03-24 디지털파워넷 주식회사 위상차 없는 센서유닛을 이용한 사물인터넷 기반의 전기안전 원격 점검 및 제어장치

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JPH04372871A (ja) * 1991-06-24 1992-12-25 Fujitsu Denso Ltd 可変サンプリング測定装置
JP2011220953A (ja) * 2010-04-14 2011-11-04 Yokogawa Electric Corp ゼロクロス信号生成回路および位相測定器
JP2013009345A (ja) * 2011-05-20 2013-01-10 Semiconductor Energy Lab Co Ltd 位相同期回路および位相同期回路を用いた半導体装置
US9325324B1 (en) * 2014-12-17 2016-04-26 Stmicroelectronics International N.V. Phase locked loop (PLL) circuit with compensated bandwidth across process, voltage and temperature

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JPH0718895B2 (ja) * 1987-12-16 1995-03-06 日本車輌製造株式会社 交流電源の電圧変動検出装置
JP2581735B2 (ja) * 1988-02-29 1997-02-12 三菱電機株式会社 停電検出装置
JP6093332B2 (ja) * 2014-07-31 2017-03-08 日本電信電話株式会社 電圧・電流間の位相遅延推定装置およびその方法
JP2018112535A (ja) * 2017-01-13 2018-07-19 パナソニックＩｐマネジメント株式会社 電流計測システム、及び分電盤

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Publication number Priority date Publication date Assignee Title
JPH04372871A (ja) * 1991-06-24 1992-12-25 Fujitsu Denso Ltd 可変サンプリング測定装置
JP2011220953A (ja) * 2010-04-14 2011-11-04 Yokogawa Electric Corp ゼロクロス信号生成回路および位相測定器
JP2013009345A (ja) * 2011-05-20 2013-01-10 Semiconductor Energy Lab Co Ltd 位相同期回路および位相同期回路を用いた半導体装置
US9325324B1 (en) * 2014-12-17 2016-04-26 Stmicroelectronics International N.V. Phase locked loop (PLL) circuit with compensated bandwidth across process, voltage and temperature

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102513647B1 (ko) * 2022-06-29 2023-03-24 디지털파워넷 주식회사 위상차 없는 센서유닛을 이용한 사물인터넷 기반의 전기안전 원격 점검 및 제어장치

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