WO2020022255A1 - Measuring device, and voltage generating method - Google Patents

Measuring device, and voltage generating method Download PDF

Info

Publication number
WO2020022255A1
WO2020022255A1 PCT/JP2019/028632 JP2019028632W WO2020022255A1 WO 2020022255 A1 WO2020022255 A1 WO 2020022255A1 JP 2019028632 W JP2019028632 W JP 2019028632W WO 2020022255 A1 WO2020022255 A1 WO 2020022255A1
Authority
WO
WIPO (PCT)
Prior art keywords
waveform
phase
current
voltage
phase difference
Prior art date
Application number
PCT/JP2019/028632
Other languages
French (fr)
Japanese (ja)
Inventor
高橋 真吾
滋 河本
鈴木 亮太
ムルトゥザ ペトラードワラー
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP2020532377A priority Critical patent/JP7111163B2/en
Publication of WO2020022255A1 publication Critical patent/WO2020022255A1/en

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00Arrangements for measuring electric power or power factor
    • G01R21/06Arrangements for measuring electric power or power factor by measuring current and voltage
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R25/00Arrangements for measuring phase angle between a voltage and a current or between voltages or currents

Definitions

  • the present invention is based on the priority claim of Japanese Patent Application No. 2018-137655 (filed on Jul. 23, 2018), the entire contents of which are incorporated herein by reference. Shall be.
  • the present invention relates to a measuring device and a voltage generation method.
  • A technique is used in which the power consumption and current consumption waveforms are monitored by sensors installed on the distribution board, and the power consumption and operating state of each electric device are estimated based on the characteristic amount and the like.
  • the current waveform In order to compare and analyze the current waveform in a time series, it is necessary to measure the current waveform based on the phase of the voltage. In measuring the current waveform, it is preferable to accurately grasp the phase delay with respect to the voltage waveform. It is known that, when the phase delay with respect to the voltage waveform is inaccurate, the calculation cost for estimating the current waveform increases, and the estimation accuracy also decreases, which makes it impractical.
  • FIG. 14 schematically shows an example of a power measurement system in a three-phase four-wire connection system.
  • a current waveform and a voltage waveform are monitored by an ammeter 101 and a voltmeter 102 installed on a breaker 105 of a distribution board that supplies power to a load 104 such as an electric device.
  • a non-contact type sensor such as a CT (Current Transformer) is used for the ammeter 101.
  • CT Current Transformer
  • an alternating current (secondary current) flows through the secondary winding so as to cancel a magnetic flux generated in the magnetic core due to the alternating current flowing through the conductor (primary side).
  • FIG. 15 is a diagram showing an example of three-phase four-wire AC current waveforms I1, I2, I3 and voltage waveforms V1, V2, V3 to the load 104 measured by the ammeter 101 and the voltmeter 102 in FIG. is there.
  • Patent Document 1 a non-contact type voltage / current sensor using stray capacitance generated between the electric wire and the sensor converts the current waveform to a voltage waveform.
  • Patent Document 1 discloses a device and a method for estimating a phase delay between a voltage and a current for estimating a phase delay between a voltage waveform and a current waveform using a non-contact type voltage / current sensor. It has been disclosed.
  • a power factor between a measured current waveform and a voltage waveform having a phase delay is calculated, and a phase delay at which the power factor is maximized is estimated as a true value.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide an apparatus and a method capable of generating, from a measured AC current waveform, an AC voltage waveform corresponding to the AC current waveform. Is to do.
  • an oscillator that generates an AC voltage signal
  • a phase comparator that detects a phase difference between a waveform of an input AC current and a waveform of the AC voltage signal generated by the oscillator
  • a measuring apparatus including a phase locked loop circuit having a variable oscillation frequency of the oscillator based on the phase difference and controlling the phase difference to satisfy a predetermined condition.
  • a phase difference between a waveform of an AC current measured by an ammeter and a waveform of an AC voltage signal generated by an oscillator included in a phase locked loop is detected, and based on the phase difference, A voltage generation method is provided in which the oscillation frequency of the oscillator is varied and the phase difference is controlled so as to satisfy a predetermined condition.
  • an AC voltage waveform corresponding to the AC current waveform can be generated from the measured AC current waveform.
  • FIG. 3 is a diagram illustrating an exemplary embodiment of the present invention.
  • FIG. 3 is a diagram illustrating an exemplary embodiment of the present invention.
  • (A), (B) is a figure explaining a phase comparator.
  • FIG. 3 is a diagram illustrating a phase comparator.
  • FIG. 3 is a diagram illustrating a configuration of a phase comparator.
  • FIG. 3 is a diagram illustrating a configuration of a phase comparator.
  • FIG. 3 is a diagram illustrating a configuration of a VCO.
  • FIG. 4 is a diagram illustrating an operation of the first embodiment.
  • FIG. 2 is a diagram illustrating Embodiment 1.
  • FIG. 2 is a diagram illustrating Embodiment 1.
  • FIG. 6 is a diagram illustrating a configuration of a second embodiment.
  • FIG. 6 is a diagram illustrating a configuration of a second embodiment.
  • FIG. 6 is a diagram illustrating a configuration of a second embodiment. It is a figure explaining an example of a power measuring system.
  • FIG. 4 is a diagram illustrating current and voltage waveforms measured by the power measurement system.
  • FIG. 1 is a diagram illustrating an embodiment of the present invention.
  • FIG. 1 shows an example of a single-phase two-wire connection simply for simplicity of description.
  • a non-contact type ammeter 101 such as a CT (Current Transformer) detects, for example, an AC current flowing through a power supply line 106 from an AC power supply 103 and supplies the AC current to the measuring device 110 as, for example, a voltage between terminals of a resistor. I do.
  • the ammeter 101 detects the current flowing through the power supply line 106 of the breaker 105 of the distribution board in a non-contact manner.
  • the measuring device 110 detects a phase difference between a voltage waveform corresponding to the AC current waveform measured by the ammeter 101 and an AC voltage waveform generated by the oscillator, and adjusts the phase difference to a predetermined value (for example, zero).
  • the frequency of the AC voltage generated by the oscillator is variably controlled.
  • the measuring device 110 separates an AC current waveform (a voltage waveform corresponding to the AC current waveform) I measured by the ammeter 101 and an AC voltage waveform V synchronized in phase with the AC current waveform measured by the ammeter 101. Output as an AC current waveform and AC voltage waveform in the panel.
  • the ammeter 101 may be connected to the main breaker 105-1 in FIG. According to the present embodiment, an AC voltage waveform corresponding to the measured AC current waveform can be generated without measuring the voltage.
  • the breaker 105 of the distribution board may be a branch breaker or a main breaker.
  • FIG. 2 is a diagram illustrating the configuration of an embodiment of the present invention.
  • the ammeter 101 supplies an alternating current (secondary current) corresponding to the turns ratio to the secondary winding so as to cancel the magnetic flux generated in the magnetic core 1011 due to the alternating current flowing through the power supply line 106 (primary side). Then, a voltage (AC voltage) generated across the resistor RL due to the secondary current is output as the detected AC current.
  • the amplifier 111 amplifies the voltage between terminals (AC voltage) of the resistor RL.
  • a low-pass filter (Low-Pass-Filter: LPF) 112 blocks (attenuates) frequency components of the output voltage of the amplifier 111 that are equal to or higher than a predetermined frequency (cut-off frequency), and passes frequency components equal to or lower than the cut-off frequency.
  • LPF Low-Pass-Filter
  • the Phase Locked Loop (PLL) 120 includes a phase comparator 121, a loop filter (Loop Filter) 122 including a low-pass filter, and a voltage controlled oscillator (Voltage Controlled Oscillator: VCO) 123.
  • phase comparator 121 Phase comparator 121
  • loop Filter Loop Filter
  • VCO Voltage Controlled Oscillator
  • the phase comparator 121 detects the phase difference between the AC voltage signal waveform output from the LPF 112 and the AC voltage signal waveform (sine wave) output from the VCO 123, and outputs a voltage corresponding to the phase difference.
  • the loop filter 122 smoothes the output voltage from the phase comparator 121.
  • the loop filter 122 supplies the smoothed voltage to the VCO 123 as a control voltage.
  • the VCO 123 varies the oscillation frequency within a predetermined frequency range ⁇ ⁇ f according to the control voltage supplied from the loop filter 122, with the commercial power supply frequency as the center frequency fc.
  • the VCO 123 may include, for example, a sine wave oscillator, and vary the oscillation frequency according to a control voltage from the loop filter 122.
  • FIG. 3A is a diagram illustrating an example of the configuration of the zero-cross detection circuit 1211 of the AC voltage waveform in the phase comparator 121.
  • FIG. 3B is a diagram illustrating the operation of the zero-crossing detection circuit 1211 in FIG.
  • the comparator 1212 when the voltage of the non-inverting input terminal (+) is equal to or lower than the reference voltage (0 V) of the inverting terminal ( ⁇ ), the comparator 1212 outputs (comparisons) as shown in FIG. A low potential is output to Vout, and when the voltage at the non-inverting input terminal (+) exceeds the reference voltage (0), a high potential is output to the output Vout. Then, when the voltage of the non-inverting input terminal (+) becomes equal to or lower than the voltage obtained by dividing the High potential by the resistors R1 and R2, a Low potential is output to the output Vout.
  • FIG. 3A illustrates an example of the configuration of an analog circuit as the zero-cross detection circuit 1211; however, the zero-cross detection circuit 1211 is not limited to the analog circuit configuration. And the zero cross point may be detected based on the digital signal waveform.
  • FIG. 4 is a diagram illustrating an example of the configuration of the phase comparator 121 in FIG.
  • the voltage inputs Vin1 and Vin2 of the phase difference detection circuit 1214 are the output voltage of the VCO 123 and the output voltage of the LPF 112 (either may be used).
  • the zero-cross detection circuits 1211A and 1211B detect zero-crosses when the voltage inputs Vin1 and Vin2 input to each change from negative to positive.
  • the digital phase comparison circuit 1213 receives the output signals from the zero cross detection circuits 1211A and 1211B, detects the phase difference between the zero cross points at the voltage inputs Vin1 and Vin2, and when the phase of the voltage input Vin1 lags behind the voltage input Vin2. , UP signal, and if the phase is advanced, a DOWN signal is output.
  • the charge pump circuit 1215 turns on the switch SW1 and charges the capacitor C with the discharge current (source @ current) from the constant current source 1.
  • the switch SW2 is turned on, and the capacitor C is discharged by the sink current (sink current) from the constant current source 2.
  • the terminal voltage of the capacitor C is smoothed by the loop filter 122 and supplied to the VCO 123 as a control voltage.
  • FIG. 5 is a diagram for explaining the operation of the digital phase comparison circuit 1213 in FIG.
  • Vout1 and Vout2 are zero-cross detection results (digital signals) of the voltage inputs Vin1 and Vin2.
  • the digital phase comparison circuit 1213 detects rising edges of the zero-cross detection results (digital signals) Vout1 and Vout2 from Low to High. If the rising edge of Vout1 is ahead of Vout2, the rising edge of Vout2 rises at the rising edge of Vout1. An active DOWN signal is output for a time corresponding to the phase difference with respect to the edge. If the rising edge of Vout2 is ahead of Vout1, the UP signal that is active is output for a time corresponding to the phase difference between the rising edge of Vout2 and the rising edge of Vout1.
  • FIG. 6 is a diagram illustrating an example in which the phase comparator 121 of FIG. 2 is configured by an analog multiplier 1216. By multiplying the sine waves of Vin1 and Vin2 (same frequency: f 1 ) in FIG. Becomes
  • the analog multiplier 1216 is configured by, for example, a Gilbert multiplier.
  • the output signal from the analog multiplier 1216 is input to the loop filter 122 is a low-pass filter cuts off a frequency component of 2 ⁇ f 1.
  • a DC (direct current) component [cos ( ⁇ 1 ⁇ 2 )] / 2 (a frequency component equal to or lower than the cutoff frequency) of the output signal from the analog multiplier 1216 is extracted.
  • a DC (direct current) component [cos ( ⁇ 1 ⁇ 2 )] / 2 (a frequency component equal to or lower than the cutoff frequency) of the output signal from the analog multiplier 1216 is extracted.
  • FIG. 7 is a diagram schematically illustrating an example of the VCO 123 in FIG.
  • the VCO 123 includes a Wien bridge oscillation circuit configured with an operational amplifier (Operational Amplifier) 1231.
  • the oscillation frequency is given below.
  • a resistor R 2 constituted by CdS (cadmium sulfide) cells, etc., by varying the resistance value of the resistor R 2 in the light from the photodiode D 1 which current is varied in a control voltage (output voltage of the LPFs 122), the control voltage May be generated.
  • the control voltage is increased, the current flowing through the photodiode D 1 is increased (light emission amount increases), the resistance value of the resistor R 2 is decreased, the oscillation frequency f is increased.
  • the control voltage is lowered, the photodiode D 1 in the flowing current decreases (light emission amount decreases), the resistance R the resistance value of 2 is increased, the oscillation frequency f is lowered.
  • the VCO 123 is, of course, not limited to the configuration shown in FIG.
  • the VCO 123 is composed of a ring oscillator that varies the oscillation frequency with the power supply voltage by feeding back the output of the last stage of the odd-numbered inverter to the input of the first stage, and inputs a square wave from the ring oscillator to, for example, a band-pass filter. , And may be converted to a sine wave and output.
  • a signal obtained by dividing the output signal of the VCO 123 by a frequency divider may be fed back to the phase comparator 121 and output as an AC voltage V.
  • FIG. 8 is a diagram illustrating the operation of the first embodiment.
  • a waveform 141 in FIG. 8A is a current waveform (output voltage of the amplifier 111 in FIG. 2) flowing through the power supply line 106 measured by the ammeter 101.
  • a waveform 142 in FIG. 8B is a voltage waveform obtained by cutting a high frequency of the waveform 141 in FIG. 8A by the LPF 112 in FIG.
  • FIG. 8C is a diagram showing an AC voltage waveform 143 (output voltage waveform V of PLL 120 in FIG. 2) that is phase-synchronized with waveform 142 in FIG. 8B in PLL 120 in FIG.
  • FIG. 9 is a diagram illustrating an example in which the embodiment of FIG. 2 is applied to a three-phase four-wire power supply.
  • FIG. 11 is a diagram for explaining a second exemplary embodiment of the present invention. Referring to FIG. 11, the configuration of a phase locked loop (PLL) 130 is different from that of the phase locked loop (PLL) 120 of FIG.
  • PLL phase locked loop
  • the PLL 130 includes a PF (Power Factor) maximizing control circuit 131, a phase control circuit 132, a loop filter 122, and a VCO 123.
  • PF Power Factor
  • the PF maximization control circuit 131 obtains a phase ⁇ PFMAX of an AC voltage waveform having a maximum power factor with respect to (a voltage waveform corresponding to) the AC current waveform input via the ammeter 101, the amplifier 111, and the LPF 112. .
  • the phase control circuit 132 calculates the phase difference ⁇ between the AC voltage waveform (sine wave) output from the VCO 123 and the AC current waveform (corresponding to) from the LPF 112, and the phase output from the PF maximization control circuit 131. Compare ⁇ PFMAX . When ⁇ PFMAX is larger than the phase difference ⁇ , control is performed so as to increase the oscillation frequency of VCO 123 (the phase difference between the AC voltage waveform from VCO 123 and the AC current waveform from LPF 112 (corresponding to the AC current waveform from LPF 112) is increased. Do).
  • FIG. 12 is a diagram illustrating an example of the configuration of the PF maximization control circuit 131 and the phase control circuit 132 of FIG.
  • an alternating current waveform (a voltage waveform corresponding to) from the LPF 112 is input to Vin1
  • an alternating current waveform from the VCO 123 is input to Vin2.
  • the PF maximization control circuit 131 includes analog to digital converters (Analog to Digital Converters) 1311A and 1311B for converting analog voltages of the voltage inputs Vin1 and Vin2 into digital signals, and an AC current waveform obtained by converting the analog signals to digital signals.
  • PF maximizing phase calculation circuit 1312 for calculating the phase ⁇ PFMAX of the AC voltage waveform for maximizing the power factor.
  • the PF maximizing phase calculation circuit 1312 calculates the phase difference ⁇ between Vin1 and Vin2 based on the zero crossing point when Vin1 and Vin2 change from negative to positive.
  • PF maximizing phase calculation circuit 1312 for example, an AC current waveform obtained by converting an analog signal into a digital signal is represented by i (j), an AC voltage waveform obtained by converting the analog signal into a digital signal is represented by v (j), and the phase difference is represented by:
  • ⁇ and the number of samples are N, ⁇ (phase delay) that maximizes is obtained, and this may be set as ⁇ PFMAX .
  • the number of samples N depends on the conversion speed (sampling frequency) of the ADCs 1311A and 1311B, but may be the number of samples for a plurality of AC power supply cycles.
  • the phase control circuit 132 includes a phase comparison circuit 1321 and a charge pump circuit 1322.
  • the phase comparison circuit 1321 compares the phase difference ⁇ with ⁇ PFMAX .
  • FIG. 13A shows the positions of the voltage waveform 152 (sine wave) output from the VCO 123 and the voltage waveform 151 output from the LPF 112 (a waveform obtained by converting the current detected by the ammeter 101 in FIG. 11 into a voltage).
  • An example of the phase difference ⁇ is shown.
  • FIG. 13B shows an example of the phase difference ⁇ PFMAX of the voltage waveform with the maximum power factor for the voltage waveform 152 and the current waveform 151 from the VCO 123 .
  • phase comparison circuit 1321 When ⁇ PFMAX is larger than phase difference ⁇ (see FIGS. 13A and 13B), phase comparison circuit 1321 outputs an UP signal so as to increase the oscillation frequency of VCO 123.
  • phase comparison circuit 1321 when ⁇ PFMAX is smaller than the phase difference ⁇ , the phase comparison circuit 1321 outputs a DOWN signal so as to lower the oscillation frequency of the VCO 123.
  • the charge pump circuit 1322 When the UP signal from the phase comparison circuit 1321 is activated, the charge pump circuit 1322 turns on the switch SW1 and charges the capacitor C with the discharge current (source $ current) from the constant current source 1.
  • the charge pump circuit 1322 When the DOWN signal from the phase comparison circuit 1321 is activated, the charge pump circuit 1322 turns on the switch SW2 and discharges the capacitor C with a sink current (sink current) from the constant current source 2.
  • the terminal voltage of the capacitor C is smoothed by the loop filter 122 in FIG. 11 and supplied to the VCO 123 as a control voltage.
  • an AC voltage waveform corresponding to the AC current waveform measured by the distribution board can be generated without measuring the AC voltage at the distribution board.
  • the ammeter 101 and the measuring device 110 may be integrally formed. 2 and 11, the AC voltage waveform V and the AC current waveform I output from the measuring device 110 are not limited to analog signal waveforms, but may be digital signal waveforms (in this case, measurement
  • the device 110 may be configured to communicate and output a digital signal waveform).
  • Patent Document 1 is incorporated herein by reference. Modifications and adjustments of the embodiments or examples are possible within the framework of the entire disclosure (including the claims) of the present invention and based on the basic technical concept thereof. Further, various combinations or selections of various disclosed elements (including each element of each claim, each element of each embodiment, each element of each drawing, and the like) are possible within the scope of the claims of the present invention. . That is, the present invention naturally includes various variations and modifications that can be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

The present invention provides a measuring device capable of generating, from a measured alternating current waveform, an alternating current voltage waveform corresponding to the alternating current waveform. The measuring device includes an oscillator for generating an alternating current voltage signal, and a phase comparator for detecting a phase difference between the waveform of an input alternating current and the waveform of the alternating current voltage signal generated by the oscillator, and is provided with a phase synchronization circuit which varies an oscillation frequency of the oscillator on the basis of the phase difference, and performs control such that the phase difference satisfies a predetermined condition.

Description

測定装置及び電圧生成方法Measuring device and voltage generation method
 (関連出願についての記載)
 本発明は、日本国特許出願:特願2018-137655号(2018年07月23日出願)の優先権主張に基づくものであり、同出願の全記載内容は引用をもって本書に組み込み記載されているものとする。
 本発明は、測定装置及び電圧生成方法に関する。
(Description of related application)
The present invention is based on the priority claim of Japanese Patent Application No. 2018-137655 (filed on Jul. 23, 2018), the entire contents of which are incorporated herein by reference. Shall be.
The present invention relates to a measuring device and a voltage generation method.
 分電盤に設置したセンサで消費電力や消費電流波形をモニタし、その特徴量等に基づいて、各電気機器の消費電力や動作状態を推定する技術が用いられている。時系列的に電流波形を比較分析するためには、電圧の位相に基づいて電流波形を測定する必要がある。電流波形の測定にあたっては、電圧波形に対する位相遅延を正確に把握しておくことが好ましい。電圧波形に対する位相遅延が不正確の場合、電流波形の推定にかかる計算コストが増大する上に、推定精度も低下し、実用的とはなりえないことが知られている。 技術 A technique is used in which the power consumption and current consumption waveforms are monitored by sensors installed on the distribution board, and the power consumption and operating state of each electric device are estimated based on the characteristic amount and the like. In order to compare and analyze the current waveform in a time series, it is necessary to measure the current waveform based on the phase of the voltage. In measuring the current waveform, it is preferable to accurately grasp the phase delay with respect to the voltage waveform. It is known that, when the phase delay with respect to the voltage waveform is inaccurate, the calculation cost for estimating the current waveform increases, and the estimation accuracy also decreases, which makes it impractical.
 そこで、図14に示すように、電流と電圧を同時に測定することが望ましい。図14には、三相4線接続方式における電力測定システムの一例が模式的に示されている。電気機器等の負荷104に電力を供給する分電盤のブレーカ105に設置した電流計101や電圧計102で電流波形や電圧波形をモニタする。一般に、電流計101は、CT(Current Transformer)等の非接触型センサが用いられる。CTは、例えば導体(1次側)に流れる交流電流による磁気コア内に発生した磁束を打ち消すように2次側の巻線に巻数比に応じた交流電流(2次電流)が流れ、この2次電流により抵抗両端に発生した電圧(導体に流れる電流に比例)を測定する。なお、電流計101は、分岐配線でなく、分電盤の主幹に接続するようにしてもよい。図15は、図14の電流計101と電圧計102で測定された負荷104への三相4線式の交流電流波形I1、I2、I3と電圧波形V1、V2、V3の例を示す図である。 Therefore, it is desirable to measure current and voltage simultaneously, as shown in FIG. FIG. 14 schematically shows an example of a power measurement system in a three-phase four-wire connection system. A current waveform and a voltage waveform are monitored by an ammeter 101 and a voltmeter 102 installed on a breaker 105 of a distribution board that supplies power to a load 104 such as an electric device. Generally, a non-contact type sensor such as a CT (Current Transformer) is used for the ammeter 101. In the CT, for example, an alternating current (secondary current) according to the turns ratio flows through the secondary winding so as to cancel a magnetic flux generated in the magnetic core due to the alternating current flowing through the conductor (primary side). The voltage (proportional to the current flowing through the conductor) generated across the resistor due to the secondary current is measured. In addition, the ammeter 101 may be connected to the main trunk of the distribution board instead of the branch wiring. FIG. 15 is a diagram showing an example of three-phase four-wire AC current waveforms I1, I2, I3 and voltage waveforms V1, V2, V3 to the load 104 measured by the ammeter 101 and the voltmeter 102 in FIG. is there.
 図14の例のように、電圧計102で線間電圧を測定する場合、電源配線に触れること無く、精度よく測定することは困難である。そして、電圧測定用のケーブルの設置には電気工事士による工事が必要である。さらに、分電盤では電源コンセントがないことが多い。この場合、電源コンセントの新設工事が必要となる。 場合 When measuring the line voltage with the voltmeter 102 as in the example of FIG. 14, it is difficult to accurately measure the line voltage without touching the power supply wiring. In addition, installation of the cable for voltage measurement requires construction by an electrician. In addition, there are often no power outlets on distribution boards. In this case, new construction of a power outlet is required.
 分電盤における電圧計の設置の問題(有資格者等による工事が必要)に対して、電線とセンサ間に発生する浮遊容量を用いた非接触型の電圧・電流センサによって電流波形を電圧波形に同期して取得する方法が知られている(特許文献1)。 To solve the problem of installing a voltmeter in a distribution board (requires construction by a qualified person, etc.), a non-contact type voltage / current sensor using stray capacitance generated between the electric wire and the sensor converts the current waveform to a voltage waveform. There is known a method of acquiring in synchronization with the above (Patent Document 1).
 特許文献1には、電流波形を電圧波形に同期して測定することは可能であるが、浮遊容量が電線の太さや材質、さらに取り付け方によって値が変わってしまい、センサ設置後の位相遅延の値は一定となるが、その値は設置環境によって異なることが記載されている。そして、電流波形と電圧波形間の位相遅延については環境依存性があることから、非接触の測定結果のみからは知ることは難しいという課題が記載されている。この課題に対して、特許文献1では、非接触型の電圧・電流センサを用いて、電圧波形と電流波形との間の位相遅延を推定する電圧・電流間の位相遅延推定装置およびその方法が開示されている。特許文献1では、測定された電流波形と位相遅延を有する電圧波形との力率を計算し、その力率が最大となる位相遅延を真値と推定している。 According to Patent Document 1, it is possible to measure the current waveform in synchronization with the voltage waveform, but the stray capacitance varies depending on the thickness and material of the electric wire and the mounting method, and the phase delay after the sensor is installed is reduced. Although the value is constant, it is described that the value differs depending on the installation environment. In addition, there is a problem that it is difficult to know only from a non-contact measurement result because a phase delay between a current waveform and a voltage waveform has an environment dependency. To solve this problem, Patent Document 1 discloses a device and a method for estimating a phase delay between a voltage and a current for estimating a phase delay between a voltage waveform and a current waveform using a non-contact type voltage / current sensor. It has been disclosed. In Patent Literature 1, a power factor between a measured current waveform and a voltage waveform having a phase delay is calculated, and a phase delay at which the power factor is maximized is estimated as a true value.
特開2016-033488号公報JP 2016-033488 A
 前述したように、分電盤での電圧を測定するには、有資格者(電気工事士)による工事が必要である。また、特許文献1では、非接触型の電圧センサと電流センサを用いて、電圧波形と電流波形を測定し、これらの間の位相遅延を推定している。 よ う As mentioned above, to measure the voltage at the distribution board, construction by a qualified person (electrician) is required. In Patent Document 1, a voltage waveform and a current waveform are measured using a non-contact type voltage sensor and a current sensor, and a phase delay between them is estimated.
 本発明は、上記課題に鑑みて創案されたものであって、その目的は、測定した交流電流の波形から、該交流電流の波形に対応した交流電圧波形を生成可能とする装置、方法を提供することにある。 The present invention has been made in view of the above problems, and an object of the present invention is to provide an apparatus and a method capable of generating, from a measured AC current waveform, an AC voltage waveform corresponding to the AC current waveform. Is to do.
 本発明の一形態によれば、交流電圧信号を生成する発振器と、入力した交流電流の波形と、前記発振器で生成した前記交流電圧信号の波形との位相差を検出する位相比較器と、を有し、前記位相差に基づき前記発振器の発振周波数を可変させ、前記位相差が所定の条件を満たすように制御する位相同期回路を備えた測定装置が提供される。 According to one embodiment of the present invention, an oscillator that generates an AC voltage signal, a phase comparator that detects a phase difference between a waveform of an input AC current and a waveform of the AC voltage signal generated by the oscillator, There is provided a measuring apparatus including a phase locked loop circuit having a variable oscillation frequency of the oscillator based on the phase difference and controlling the phase difference to satisfy a predetermined condition.
 本発明の一形態によれば、電流計で測定した交流電流の波形と、位相同期ループに含まれる発振器で生成した交流電圧信号の波形との位相差を検出し、前記位相差に基づき、前記発振器の発振周波数を可変させ、前記位相差が所定の条件を満たすように制御する電圧生成方法が提供される。 According to one embodiment of the present invention, a phase difference between a waveform of an AC current measured by an ammeter and a waveform of an AC voltage signal generated by an oscillator included in a phase locked loop is detected, and based on the phase difference, A voltage generation method is provided in which the oscillation frequency of the oscillator is varied and the phase difference is controlled so as to satisfy a predetermined condition.
 本発明によれば、測定した交流電流の波形から、該交流電流の波形に対応した交流電圧波形を生成可能としている。 According to the present invention, an AC voltage waveform corresponding to the AC current waveform can be generated from the measured AC current waveform.
本発明の例示的な実施形態を説明する図である。FIG. 3 is a diagram illustrating an exemplary embodiment of the present invention. 本発明の例示的な実施形態を説明する図である。FIG. 3 is a diagram illustrating an exemplary embodiment of the present invention. (A)、(B)は位相比較器を説明する図である。(A), (B) is a figure explaining a phase comparator. 位相比較器を説明する図である。FIG. 3 is a diagram illustrating a phase comparator. 位相比較器の構成を説明する図である。FIG. 3 is a diagram illustrating a configuration of a phase comparator. 位相比較器の構成を説明する図である。FIG. 3 is a diagram illustrating a configuration of a phase comparator. VCOの構成を説明する図である。FIG. 3 is a diagram illustrating a configuration of a VCO. 実施形態1の動作を説明する図である。FIG. 4 is a diagram illustrating an operation of the first embodiment. 実施形態1を説明する図である。FIG. 2 is a diagram illustrating Embodiment 1. 実施形態1を説明する図である。FIG. 2 is a diagram illustrating Embodiment 1. 実施形態2の構成を説明する図である。FIG. 6 is a diagram illustrating a configuration of a second embodiment. 実施形態2の構成を説明する図である。FIG. 6 is a diagram illustrating a configuration of a second embodiment. 実施形態2の構成を説明する図である。FIG. 6 is a diagram illustrating a configuration of a second embodiment. 電力測定システムの一例を説明する図である。It is a figure explaining an example of a power measuring system. 電力測定システムで測定された電流、電圧波形を説明する図である。FIG. 4 is a diagram illustrating current and voltage waveforms measured by the power measurement system.
 本発明の例示的な実施形態について図面を参照して説明する。図1は、本発明の一実施形態を説明する図である。なお、図1では、単に説明の容易化のため、単相2線接続の例が示されている。CT(Current Transformer)等の非接触型の電流計101は、例えば、交流電源103からの電源ライン106に流れる交流電流を検出し、該交流電流を例えば抵抗の端子間電圧として測定装置110に供給する。なお、図1では、電流計101は、分電盤のブレーカ105の電源ライン106に流れる電流を非接触で検出する。 An exemplary embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating an embodiment of the present invention. FIG. 1 shows an example of a single-phase two-wire connection simply for simplicity of description. A non-contact type ammeter 101 such as a CT (Current Transformer) detects, for example, an AC current flowing through a power supply line 106 from an AC power supply 103 and supplies the AC current to the measuring device 110 as, for example, a voltage between terminals of a resistor. I do. In FIG. 1, the ammeter 101 detects the current flowing through the power supply line 106 of the breaker 105 of the distribution board in a non-contact manner.
 測定装置110では、電流計101で測定された交流電流波形に対応する電圧波形と、発振器で生成した交流電圧波形の位相差を検出し、位相差が所定値(例えばゼロ)となるように、該発振器で生成する交流電圧の周波数を可変制御する。測定装置110は、電流計101で測定された交流電流波形(交流電流波形に対応する電圧波形)Iと、電流計101で測定された交流電流波形と位相同期した交流電圧波形Vを、分電盤における交流電流波形交流電圧波形として出力する。 The measuring device 110 detects a phase difference between a voltage waveform corresponding to the AC current waveform measured by the ammeter 101 and an AC voltage waveform generated by the oscillator, and adjusts the phase difference to a predetermined value (for example, zero). The frequency of the AC voltage generated by the oscillator is variably controlled. The measuring device 110 separates an AC current waveform (a voltage waveform corresponding to the AC current waveform) I measured by the ammeter 101 and an AC voltage waveform V synchronized in phase with the AC current waveform measured by the ammeter 101. Output as an AC current waveform and AC voltage waveform in the panel.
 測定装置110から出力される交流電圧波形Vと、電流計101で測定された分電盤における交流電流波形Iに基づき、電力計算、機器毎の電力分離技術(disaggregation)等を行うようにしてもよい。なお、電流計101は、図14の主幹ブレーカ105-1に接続するようにしてもよい。本実施形態によれば、電圧を測定することなく、測定した交流電流波形に対応した交流電圧波形を生成可能としている。なお、図1において、分電盤のブレーカ105は、分岐ブレーカであっても主幹ブレーカであってもよい。 Based on the AC voltage waveform V output from the measuring device 110 and the AC current waveform I on the distribution board measured by the ammeter 101, power calculation, power separation technology (disaggregation) and the like for each device may be performed. Good. Note that the ammeter 101 may be connected to the main breaker 105-1 in FIG. According to the present embodiment, an AC voltage waveform corresponding to the measured AC current waveform can be generated without measuring the voltage. In FIG. 1, the breaker 105 of the distribution board may be a branch breaker or a main breaker.
 図2は、本発明の一実施形態の構成を説明する図である。電流計101は、電源ライン106(1次側)に流れる交流電流による磁気コア1011内に発生した磁束を打ち消すように2次側の巻線に巻数比に応じた交流電流(2次電流)が流れ、この2次電流により抵抗RLの両端に発生した電圧(交流電圧)を、検出した交流電流として出力する。測定装置110において、増幅器111は、抵抗RLの端子間電圧(交流電圧)を電圧増幅する。低域通過フィルタ(Low Pass Filter:LPF)112は、増幅器111の出力電圧の所定の周波数(遮断周波数)以上の周波数成分を遮断(減衰)させ、遮断周波数以下の周波数成分を通過させる。 FIG. 2 is a diagram illustrating the configuration of an embodiment of the present invention. The ammeter 101 supplies an alternating current (secondary current) corresponding to the turns ratio to the secondary winding so as to cancel the magnetic flux generated in the magnetic core 1011 due to the alternating current flowing through the power supply line 106 (primary side). Then, a voltage (AC voltage) generated across the resistor RL due to the secondary current is output as the detected AC current. In the measuring device 110, the amplifier 111 amplifies the voltage between terminals (AC voltage) of the resistor RL. A low-pass filter (Low-Pass-Filter: LPF) 112 blocks (attenuates) frequency components of the output voltage of the amplifier 111 that are equal to or higher than a predetermined frequency (cut-off frequency), and passes frequency components equal to or lower than the cut-off frequency.
 位相同期回路(Phase Locked Loop:PLL)120は、位相比較器121と、低域通過フィルタからなるループフィルタ(Loop Filter)122と、電圧制御発振器(Voltage Controlled Oscillator:VCO)123を備えている。 The Phase Locked Loop (PLL) 120 includes a phase comparator 121, a loop filter (Loop Filter) 122 including a low-pass filter, and a voltage controlled oscillator (Voltage Controlled Oscillator: VCO) 123.
 位相比較器121は、LPF112から出力される交流電圧信号波形と、VCO123から出力される交流電圧信号波形(正弦波)との位相差を検出し、該位相差に対応した電圧を出力する。 The phase comparator 121 detects the phase difference between the AC voltage signal waveform output from the LPF 112 and the AC voltage signal waveform (sine wave) output from the VCO 123, and outputs a voltage corresponding to the phase difference.
 ループフィルタ122は、位相比較器121からの出力電圧を平滑化する。ループフィルタ122は、該平滑化した電圧をVCO123に制御電圧として供給する。VCO123は、商用電源周波数を中心周波数fcとして、ループフィルタ122から供給される制御電圧に応じて、所定周波数範囲±Δfで発振周波数を可変させる。特に制限されないが、VCO123は、例えば、正弦波発振器を備え、その発振周波数をループフィルタ122からの制御電圧にしたがって可変させる構成としてもよい。 The loop filter 122 smoothes the output voltage from the phase comparator 121. The loop filter 122 supplies the smoothed voltage to the VCO 123 as a control voltage. The VCO 123 varies the oscillation frequency within a predetermined frequency range ± Δf according to the control voltage supplied from the loop filter 122, with the commercial power supply frequency as the center frequency fc. Although not particularly limited, the VCO 123 may include, for example, a sine wave oscillator, and vary the oscillation frequency according to a control voltage from the loop filter 122.
 図3(A)は、位相比較器121における交流電圧波形のゼロクロス検出回路1211の構成の一例を説明する図である。図3(B)は、図3(A)のゼロクロス検出回路1211の動作を説明する図である。 FIG. 3A is a diagram illustrating an example of the configuration of the zero-cross detection circuit 1211 of the AC voltage waveform in the phase comparator 121. FIG. 3B is a diagram illustrating the operation of the zero-crossing detection circuit 1211 in FIG.
 図3(A)において、コンパレータ1212は、非反転入力端子(+)の電圧が、反転端子(-)の基準電圧(0V)以下の場合、図3(B)に示すように、出力(比較結果出力)VoutにLow電位を出力し、非反転入力端子(+)の電圧が基準電圧(0)を超えると、出力VoutにHigh電位を出力する。そして、非反転入力端子(+)の電圧が、High電位を抵抗R1とR2で分圧した電圧以下となると、出力VoutにLow電位を出力する。 In FIG. 3A, when the voltage of the non-inverting input terminal (+) is equal to or lower than the reference voltage (0 V) of the inverting terminal (−), the comparator 1212 outputs (comparisons) as shown in FIG. A low potential is output to Vout, and when the voltage at the non-inverting input terminal (+) exceeds the reference voltage (0), a high potential is output to the output Vout. Then, when the voltage of the non-inverting input terminal (+) becomes equal to or lower than the voltage obtained by dividing the High potential by the resistors R1 and R2, a Low potential is output to the output Vout.
 なお、図3(A)では、ゼロクロス検出回路1211としてアナログ回路の構成例を示したが、ゼロクロス検出回路1211はアナログ回路構成に制限されるものでなく、アナログデジタル変換器でアナログ信号をデジタル信号に変換し、デジタル信号波形に基づき、ゼロクロス点を検出するようにしてもよい。 Note that FIG. 3A illustrates an example of the configuration of an analog circuit as the zero-cross detection circuit 1211; however, the zero-cross detection circuit 1211 is not limited to the analog circuit configuration. And the zero cross point may be detected based on the digital signal waveform.
 図4は、図2の位相比較器121の構成の一例を説明する図である。位相差検出回路1214の電圧入力Vin1、Vin2はVCO123の出力電圧とLPF112の出力電圧である(どちらであってもよい)。ゼロクロス検出回路1211A、1211Bは、それぞれに入力された電圧入力Vin1、Vin2の負から正への変化時のゼロクロスを検出する。デジタル位相比較回路1213は、ゼロクロス検出回路1211A、1211Bからの出力信号を受け、電圧入力Vin1、Vin2におけるゼロクロス点の位相差を検出し、電圧入力Vin1の位相が電圧入力Vin2よりも遅れている場合、UP信号、位相が進んでいる場合、DOWN信号を出力する。 FIG. 4 is a diagram illustrating an example of the configuration of the phase comparator 121 in FIG. The voltage inputs Vin1 and Vin2 of the phase difference detection circuit 1214 are the output voltage of the VCO 123 and the output voltage of the LPF 112 (either may be used). The zero-cross detection circuits 1211A and 1211B detect zero-crosses when the voltage inputs Vin1 and Vin2 input to each change from negative to positive. The digital phase comparison circuit 1213 receives the output signals from the zero cross detection circuits 1211A and 1211B, detects the phase difference between the zero cross points at the voltage inputs Vin1 and Vin2, and when the phase of the voltage input Vin1 lags behind the voltage input Vin2. , UP signal, and if the phase is advanced, a DOWN signal is output.
 チャージポンプ回路1215は、位相差検出回路1214からのUP信号が活性化されると、スイッチSW1がオンし、定電流源1からの吐出電流(source current)で容量Cを充電する。位相差検出回路1214からのDOWN号が活性化されると、スイッチSW2がオンし、定電流源2から吸込電流(sink current)で容量Cを放電する。容量Cの端子電圧が、ループフィルタ122で平滑化されてVCO123に制御電圧として供給される。 (4) When the UP signal from the phase difference detection circuit 1214 is activated, the charge pump circuit 1215 turns on the switch SW1 and charges the capacitor C with the discharge current (source @ current) from the constant current source 1. When the DOWN signal from the phase difference detection circuit 1214 is activated, the switch SW2 is turned on, and the capacitor C is discharged by the sink current (sink current) from the constant current source 2. The terminal voltage of the capacitor C is smoothed by the loop filter 122 and supplied to the VCO 123 as a control voltage.
 図5は、図4のデジタル位相比較回路1213の動作を説明する図である。図5において、Vout1、Vout2は、電圧入力Vin1、Vin2のゼロクロス検出結果(デジタル信号)である。デジタル位相比較回路1213は、ゼロクロス検出結果(デジタル信号)Vout1、Vout2のLowからHighへの立ち上がりエッジを検出し、Vout1の立ち上がりエッジがVout2よりも進んでいる場合、Vout1の立ち上がりエッジのVout2の立ち上がりエッジに対する位相差に対応する時間、アクティブとなるDOWN信号を出力する。Vout2の立ち上がりエッジがVout1よりも進んでいる場合、Vout2の立ち上がりエッジのVout1の立ち上がりエッジに対する位相差に対応する時間、アクティブとなるUP信号を出力する。 FIG. 5 is a diagram for explaining the operation of the digital phase comparison circuit 1213 in FIG. In FIG. 5, Vout1 and Vout2 are zero-cross detection results (digital signals) of the voltage inputs Vin1 and Vin2. The digital phase comparison circuit 1213 detects rising edges of the zero-cross detection results (digital signals) Vout1 and Vout2 from Low to High. If the rising edge of Vout1 is ahead of Vout2, the rising edge of Vout2 rises at the rising edge of Vout1. An active DOWN signal is output for a time corresponding to the phase difference with respect to the edge. If the rising edge of Vout2 is ahead of Vout1, the UP signal that is active is output for a time corresponding to the phase difference between the rising edge of Vout2 and the rising edge of Vout1.
 図6は、図2の位相比較器121をアナログ乗算器1216で構成した例を説明する図である。図6のVin1とVin2の正弦波(同一周波数:f)を乗算すると、
Figure JPOXMLDOC01-appb-I000001
となる。
FIG. 6 is a diagram illustrating an example in which the phase comparator 121 of FIG. 2 is configured by an analog multiplier 1216. By multiplying the sine waves of Vin1 and Vin2 (same frequency: f 1 ) in FIG.
Figure JPOXMLDOC01-appb-I000001
Becomes
 アナログ乗算器1216は、例えばギルバート(Gilbert)乗算器で構成される。アナログ乗算器1216からの出力信号は、低域通過フィルタであるループフィルタ122に入力され、2×fの周波数成分をカットオフする。この結果、アナログ乗算器1216からの出力信号のうちのDC(direct current)成分[cos(θ-θ)]/2(カットオフ周波数以下の周波数成分)が抽出される。なお、Vin1とVin2の正弦波の周波数がf、fと異なる場合、
Figure JPOXMLDOC01-appb-I000002
から、(f+f2)の周波数成分をカットオフし、
Figure JPOXMLDOC01-appb-I000003
を低域通過フィルタ(ループフィルタ122)で平滑化した電圧が出力される。
The analog multiplier 1216 is configured by, for example, a Gilbert multiplier. The output signal from the analog multiplier 1216 is input to the loop filter 122 is a low-pass filter cuts off a frequency component of 2 × f 1. As a result, a DC (direct current) component [cos (θ 1 −θ 2 )] / 2 (a frequency component equal to or lower than the cutoff frequency) of the output signal from the analog multiplier 1216 is extracted. When the frequencies of the sine waves of Vin1 and Vin2 are different from f 1 and f 2 ,
Figure JPOXMLDOC01-appb-I000002
Cuts off the frequency component of (f 1 + f 2 ) from
Figure JPOXMLDOC01-appb-I000003
Is output by a low-pass filter (loop filter 122).
 図7は、図2のVCO123の一例を模式的に説明する図である。図7の例では、VCO123は、オペアンプ(Operational Amplifier)1231で構成したウイーンブリッジ発振回路からなる。発振周波数は、以下で与えられる。
Figure JPOXMLDOC01-appb-I000004
FIG. 7 is a diagram schematically illustrating an example of the VCO 123 in FIG. In the example of FIG. 7, the VCO 123 includes a Wien bridge oscillation circuit configured with an operational amplifier (Operational Amplifier) 1231. The oscillation frequency is given below.
Figure JPOXMLDOC01-appb-I000004
 例えば抵抗RをCdS(硫化カドミウム)セル等で構成し、制御電圧(LPF122の出力電圧)で電流が可変されるフォトダイオードDからの光で抵抗Rの抵抗値を可変させ、制御電圧に応じた周波数の交流電圧を生成するようにしてもよい。制御電圧が高くなると、フォトダイオードDに流れる電流が増大し(発光量が増大する)、抵抗Rの抵抗値が減少し、発振周波数fが増大する。制御電圧が低くなると、フォトダイオードDに流れる電流が減少し(発光量が減少する)、抵抗Rの抵抗値が増大し、発振周波数fが下がる。 For example a resistor R 2 constituted by CdS (cadmium sulfide) cells, etc., by varying the resistance value of the resistor R 2 in the light from the photodiode D 1 which current is varied in a control voltage (output voltage of the LPFs 122), the control voltage May be generated. When the control voltage is increased, the current flowing through the photodiode D 1 is increased (light emission amount increases), the resistance value of the resistor R 2 is decreased, the oscillation frequency f is increased. When the control voltage is lowered, the photodiode D 1 in the flowing current decreases (light emission amount decreases), the resistance R the resistance value of 2 is increased, the oscillation frequency f is lowered.
 なお、VCO123は、図7の構成等に制限されるものでないことは勿論である。例えば、VCO123を、奇数段のインバータの最終段出力を初段の入力に帰還させ電源電圧で発振周波数を可変させるリングオシレータで構成し、このリングオシレータからの方形波を、例えばバンドパスフィルタ等に入力して正弦波に変換して出力する構成としてもよい。また、VCO123の出力信号を分周器(不図示)で分周した信号を位相比較器121に帰還入力し、交流電圧Vとして出力してもよい。 The VCO 123 is, of course, not limited to the configuration shown in FIG. For example, the VCO 123 is composed of a ring oscillator that varies the oscillation frequency with the power supply voltage by feeding back the output of the last stage of the odd-numbered inverter to the input of the first stage, and inputs a square wave from the ring oscillator to, for example, a band-pass filter. , And may be converted to a sine wave and output. Alternatively, a signal obtained by dividing the output signal of the VCO 123 by a frequency divider (not shown) may be fed back to the phase comparator 121 and output as an AC voltage V.
 図8は、実施形態1の動作を説明する図である。図8(A)の波形141は、電流計101で計測した電源ライン106に流れる電流波形(図2の増幅器111の出力電圧)である。 FIG. 8 is a diagram illustrating the operation of the first embodiment. A waveform 141 in FIG. 8A is a current waveform (output voltage of the amplifier 111 in FIG. 2) flowing through the power supply line 106 measured by the ammeter 101.
 図8(B)の波形142は、図2のLPF112で図8(A)の波形141の高域をカットした電圧波形である。図8(C)は、図2のPLL120において、図8(B)の波形142と位相同期した交流電圧波形143(図2のPLL120の出力電圧波形V)を示す図である。 波形 A waveform 142 in FIG. 8B is a voltage waveform obtained by cutting a high frequency of the waveform 141 in FIG. 8A by the LPF 112 in FIG. FIG. 8C is a diagram showing an AC voltage waveform 143 (output voltage waveform V of PLL 120 in FIG. 2) that is phase-synchronized with waveform 142 in FIG. 8B in PLL 120 in FIG.
 図9は、三相4線式の電源に図2の実施形態を適用した例を説明する図である。三相電源の電源ラインL1、L2、L3に、非接触型の電流計101-1~101-3が配置され、測定装置110-1~110-3から、電流波形Ii(i=1~3)と、電流波形Iiに位相同期した電圧波形Vi(i=1~3)が出力される。  FIG. 9 is a diagram illustrating an example in which the embodiment of FIG. 2 is applied to a three-phase four-wire power supply. Non-contact type ammeters 101-1 to 101-3 are arranged on power lines L1, L2, and L3 of the three-phase power supply, and current waveforms Ii (i = 1 to 3) are supplied from measuring devices 110-1 to 110-3. ) And a voltage waveform Vi (i = 1 to 3) synchronized with the current waveform Ii.
 図10は、測定装置110-1~110-3から出力される三相の電流波形Ii(i=1~3)と、三相の電圧波形Vi(i=1~3)を例示する図である。 FIG. 10 is a diagram illustrating a three-phase current waveform Ii (i = 1 to 3) output from the measuring devices 110-1 to 110-3 and a three-phase voltage waveform Vi (i = 1 to 3). is there.
 図11は、本発明の例示的な第2の実施形態を説明する図である。図11を参照すると、位相同期回路(PLL)130の構成が、図2の位相同期回路(PLL)120と相違している。 FIG. 11 is a diagram for explaining a second exemplary embodiment of the present invention. Referring to FIG. 11, the configuration of a phase locked loop (PLL) 130 is different from that of the phase locked loop (PLL) 120 of FIG.
 図11を参照すると、PLL130は、PF(Power Factor:力率)最大化制御回路131と、位相制御回路132と、ループフィルタ122とVCO123を備えている。 参照 Referring to FIG. 11, the PLL 130 includes a PF (Power Factor) maximizing control circuit 131, a phase control circuit 132, a loop filter 122, and a VCO 123.
 PF最大化制御回路131は、電流計101、増幅器111、LPF112を介して入力した交流電流波形(に対応する電圧波形)に対して、力率が最大となる交流電圧波形の位相ΔθPFMAXを求める。 The PF maximization control circuit 131 obtains a phase Δθ PFMAX of an AC voltage waveform having a maximum power factor with respect to (a voltage waveform corresponding to) the AC current waveform input via the ammeter 101, the amplifier 111, and the LPF 112. .
 位相制御回路132は、VCO123から出力される交流電圧波形(正弦波)とLPF112からの交流電流波形(に対応する電圧波形)との位相差Δθと、PF最大化制御回路131から出力された位相ΔθPFMAXを比較する。ΔθPFMAXの方が位相差Δθよりも大きい場合、VCO123の発振周波数を上げるように制御する(VCO123からの交流電圧波形の、LPF112からの交流電流波形(に対応する電圧波形)に対する位相差を大きくする)。ΔθPFMAXの方が位相差Δθよりも小さい場合、VCO123の発振周波数を下げるように制御する(VCO123からの交流電圧波形の、LPF112からの交流電流波形(に対応する電圧波形)に対する位相差を小さくする)。 The phase control circuit 132 calculates the phase difference Δθ between the AC voltage waveform (sine wave) output from the VCO 123 and the AC current waveform (corresponding to) from the LPF 112, and the phase output from the PF maximization control circuit 131. Compare Δθ PFMAX . When Δθ PFMAX is larger than the phase difference Δθ, control is performed so as to increase the oscillation frequency of VCO 123 (the phase difference between the AC voltage waveform from VCO 123 and the AC current waveform from LPF 112 (corresponding to the AC current waveform from LPF 112) is increased. Do). When Δθ PFMAX is smaller than the phase difference Δθ, control is performed so as to lower the oscillation frequency of the VCO 123 (the phase difference between the AC voltage waveform from the VCO 123 and the voltage waveform corresponding to the AC current waveform from the LPF 112) is reduced. Do).
 図12は、図11のPF最大化制御回路131と、位相制御回路132の構成の一例を示す図である。図12において、Vin1には、LPF112からの交流電流波形(に対応する電圧波形)が入力され、Vin2には、VCO123からの交流電流波形が入力される。PF最大化制御回路131は、電圧入力Vin1、Vin2のアナログ電圧をデジタル信号に変換するアナログデジタル変換器(Analog to Digital Converter:ADC)1311A、1311Bと、アナログ信号をデジタル信号に変換した交流電流波形に対して、力率を最大化する交流電圧波形の位相ΔθPFMAXを計算するPF最大化位相計算回路1312を備えている。PF最大化位相計算回路1312は、Vin1とVin2の負から正への変化時におけるゼロクロス点に基づき、Vin1とVin2の位相差Δθを計算する。 FIG. 12 is a diagram illustrating an example of the configuration of the PF maximization control circuit 131 and the phase control circuit 132 of FIG. In FIG. 12, an alternating current waveform (a voltage waveform corresponding to) from the LPF 112 is input to Vin1, and an alternating current waveform from the VCO 123 is input to Vin2. The PF maximization control circuit 131 includes analog to digital converters (Analog to Digital Converters) 1311A and 1311B for converting analog voltages of the voltage inputs Vin1 and Vin2 into digital signals, and an AC current waveform obtained by converting the analog signals to digital signals. PF maximizing phase calculation circuit 1312 for calculating the phase Δθ PFMAX of the AC voltage waveform for maximizing the power factor. The PF maximizing phase calculation circuit 1312 calculates the phase difference Δθ between Vin1 and Vin2 based on the zero crossing point when Vin1 and Vin2 change from negative to positive.
 PF最大化位相計算回路1312では、例えば、アナログ信号をデジタル信号に変換した交流電流波形をi(j)とし、アナログ信号をデジタル信号に変換した交流電圧波形をv(j)とし、位相差をτとし、サンプル数をNとしたとき、
Figure JPOXMLDOC01-appb-I000005
を最大化するτ(位相遅延)を求め、これをΔθPFMAXとしてもよい。
In the PF maximizing phase calculation circuit 1312, for example, an AC current waveform obtained by converting an analog signal into a digital signal is represented by i (j), an AC voltage waveform obtained by converting the analog signal into a digital signal is represented by v (j), and the phase difference is represented by: When τ and the number of samples are N,
Figure JPOXMLDOC01-appb-I000005
Τ (phase delay) that maximizes is obtained, and this may be set as Δθ PFMAX .

Figure JPOXMLDOC01-appb-I000006

Figure JPOXMLDOC01-appb-I000006
 なお、サンプル数NはADC1311A、1311Bの変換速度(サンプリング周波数)等にもよるが、交流電源周期の複数サイクル分のサンプル数であってもよい。 The number of samples N depends on the conversion speed (sampling frequency) of the ADCs 1311A and 1311B, but may be the number of samples for a plurality of AC power supply cycles.
 位相制御回路132は、位相比較回路1321とチャージポンプ回路1322を備えている。位相比較回路1321は、位相差ΔθとΔθPFMAXを比較する。図13(A)は、VCO123から出力される電圧波形152(正弦波)と、LPF112から出力される電圧波形151(図11の電流計101で検出された電流を電圧に変換した波形)の位相差Δθの例を示している。図13(B)は、VCO123からの電圧波形152と電流波形151について、力率が最大となる電圧波形の位相差ΔθPFMAXの例を示している。 The phase control circuit 132 includes a phase comparison circuit 1321 and a charge pump circuit 1322. The phase comparison circuit 1321 compares the phase difference Δθ with Δθ PFMAX . FIG. 13A shows the positions of the voltage waveform 152 (sine wave) output from the VCO 123 and the voltage waveform 151 output from the LPF 112 (a waveform obtained by converting the current detected by the ammeter 101 in FIG. 11 into a voltage). An example of the phase difference Δθ is shown. FIG. 13B shows an example of the phase difference Δθ PFMAX of the voltage waveform with the maximum power factor for the voltage waveform 152 and the current waveform 151 from the VCO 123 .
 位相比較回路1321は、ΔθPFMAXの方が位相差Δθよりも大きい場合(図13(A)、(B)参照)、VCO123の発振周波数を上げるように、UP信号を出力する。 When Δθ PFMAX is larger than phase difference Δθ (see FIGS. 13A and 13B), phase comparison circuit 1321 outputs an UP signal so as to increase the oscillation frequency of VCO 123.
 一方、ΔθPFMAXの方が位相差Δθよりも小さい場合、位相比較回路1321は、VCO123の発振周波数を下げるようにDOWN信号を出力する。 On the other hand, when Δθ PFMAX is smaller than the phase difference Δθ, the phase comparison circuit 1321 outputs a DOWN signal so as to lower the oscillation frequency of the VCO 123.
 チャージポンプ回路1322は、位相比較回路1321からのUP信号が活性化されると、スイッチSW1がオンし、定電流源1からの吐出電流(source current)で容量Cを充電する。 When the UP signal from the phase comparison circuit 1321 is activated, the charge pump circuit 1322 turns on the switch SW1 and charges the capacitor C with the discharge current (source $ current) from the constant current source 1.
 チャージポンプ回路1322は、位相比較回路1321からのDOWN号が活性化されると、スイッチSW2がオンし、定電流源2から吸込電流(sink current)で容量Cを放電する。容量Cの端子電圧が、図11のループフィルタ122で平滑化されてVCO123に制御電圧として供給される。本実施形態によれば、分電盤での交流電圧を測定することなく、分電盤で測定した交流電流波形に対応した交流電圧波形を生成可能としている。なお、図2、図11において、電流計101と測定装置110を一体で構成してもよいことは勿論である。また、図2、図11において、測定装置110から出力される交流電圧波形Vと交流電流波形Iはアナログ信号波形に制限されるものでなく、デジタル信号波形であってもよい(この場合、測定装置110はデジタル信号波形を通信出力する構成としてもよい)。 When the DOWN signal from the phase comparison circuit 1321 is activated, the charge pump circuit 1322 turns on the switch SW2 and discharges the capacitor C with a sink current (sink current) from the constant current source 2. The terminal voltage of the capacitor C is smoothed by the loop filter 122 in FIG. 11 and supplied to the VCO 123 as a control voltage. According to the present embodiment, an AC voltage waveform corresponding to the AC current waveform measured by the distribution board can be generated without measuring the AC voltage at the distribution board. Note that, in FIGS. 2 and 11, the ammeter 101 and the measuring device 110 may be integrally formed. 2 and 11, the AC voltage waveform V and the AC current waveform I output from the measuring device 110 are not limited to analog signal waveforms, but may be digital signal waveforms (in this case, measurement The device 110 may be configured to communicate and output a digital signal waveform).
 なお、上記の特許文献1の開示を、本書に引用をもって繰り込むものとする。本発明の全開示(請求の範囲を含む)の枠内において、さらにその基本的技術思想に基づいて、実施形態ないし実施例の変更・調整が可能である。また、本発明の請求の範囲の枠内において種々の開示要素(各請求項の各要素、各実施例の各要素、各図面の各要素等を含む)の多様な組み合わせ乃至選択が可能である。すなわち、本発明は、請求の範囲を含む全開示、技術的思想にしたがって当業者であればなし得るであろう各種変形、修正を含むことは勿論である。 The disclosure of Patent Document 1 is incorporated herein by reference. Modifications and adjustments of the embodiments or examples are possible within the framework of the entire disclosure (including the claims) of the present invention and based on the basic technical concept thereof. Further, various combinations or selections of various disclosed elements (including each element of each claim, each element of each embodiment, each element of each drawing, and the like) are possible within the scope of the claims of the present invention. . That is, the present invention naturally includes various variations and modifications that can be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.
101、101-1~101-3 電流計
102 101-2~103-3 電圧計
103 電源
104 負荷
105 ブレーカ
105-1 主幹ブレーカ
105-2 分岐ブレーカ
106 電源ライン
110、110-1~110-3 測定装置
111 増幅器
112 LPF
120、130 PLL
121 位相比較器
122 ループフィルタ
123 VCO
131 PF最大化制御回路
132 位相制御回路
141、142、151 電流波形
143、152 電圧波形
1011 磁気コア
1211、1211A、1211B ゼロクロス検出回路
1212 コンパレータ
1213 デジタル位相比較回路
1214 位相差検出回路
1215 チャージポンプ回路 
1216 アナログ乗算器
1231 オペアンプ
1311A、1311B ADC
1312 PF最大化位相計算回路
1321 位相比較回路
1322 チャージポンプ回路 
101, 101-1 to 101-3 Ammeter 102 101-2 to 103-3 Voltmeter 103 Power supply 104 Load 105 Breaker 105-1 Main breaker 105-2 Branch breaker 106 Power supply line 110, 110-1 to 110-3 Measurement Device 111 Amplifier 112 LPF
120, 130 PLL
121 Phase comparator 122 Loop filter 123 VCO
131 PF maximization control circuit 132 Phase control circuits 141, 142, 151 Current waveforms 143, 152 Voltage waveforms 1011 Magnetic cores 1211, 1211A, 1211B Zero cross detection circuit 1212 Comparator 1213 Digital phase comparison circuit 1214 Phase difference detection circuit 1215 Charge pump circuit
1216 Analog multiplier 1231 Operational amplifiers 1311A, 1311B ADC
1312 PF maximization phase calculation circuit 1321 phase comparison circuit 1322 charge pump circuit

Claims (8)

  1.  交流電圧信号を生成する発振器と、
     入力した交流電流の波形と、前記発振器で生成した前記交流電圧信号の波形との位相差を検出する位相比較器と、
     を有し、前記位相差に基づき前記発振器の発振周波数を可変させ、前記位相差が所定の条件を満たすように制御する位相同期回路を備えた、ことを特徴とする測定装置。
    An oscillator for generating an AC voltage signal;
    A phase comparator that detects a phase difference between a waveform of the input AC current and a waveform of the AC voltage signal generated by the oscillator,
    And a phase synchronization circuit that varies an oscillation frequency of the oscillator based on the phase difference and controls the phase difference so as to satisfy a predetermined condition.
  2.  前記位相同期回路は、前記交流電流の波形と、前記発振器で生成した前記交流電圧信号の波形の位相が一致するように制御する、ことを特徴とする請求項1に記載の測定装置。 2. The measuring apparatus according to claim 1, wherein the phase synchronization circuit controls the waveform of the AC current and the phase of the waveform of the AC voltage signal generated by the oscillator so as to coincide with each other. 3.
  3.  前記位相同期回路は、前記交流電流の波形に対して力率を最大化する交流電圧信号波形となる第一の位相差を検出する回路をさらに備え、
     前記交流電流の波形と、前記発振器で生成した前記交流電圧信号の波形との前記位相差が、前記力率を最大化する前記第一の位相差となるように制御する、ことを特徴とする請求項1に記載の測定装置。
    The phase-locked loop circuit further includes a circuit that detects a first phase difference that is an AC voltage signal waveform that maximizes a power factor for the AC current waveform,
    The phase difference between the waveform of the AC current and the waveform of the AC voltage signal generated by the oscillator is controlled so as to be the first phase difference that maximizes the power factor. The measuring device according to claim 1.
  4.  電流計で測定された前記交流電流の波形を入力し、前記位相同期回路で前記交流電流の波形に位相同期させた前記交流電圧信号を、前記測定装置の出力信号として出力する、ことを特徴とする請求項1乃至3のいずれか1項に記載の測定装置。 A waveform of the AC current measured by an ammeter is input, and the AC voltage signal whose phase is synchronized with the waveform of the AC current by the phase synchronization circuit is output as an output signal of the measuring device. The measuring device according to any one of claims 1 to 3,
  5.  前記電流計は、分電盤の給電線の電流を非接触で検出する、ことを特徴とする請求項4に記載の測定装置。 The measurement device according to claim 4, wherein the ammeter detects a current of a power supply line of the distribution board in a non-contact manner.
  6.  電流計で測定した交流電流の波形と、位相同期ループに含まれる発振器で生成した交流電圧信号の波形との位相差を検出し、前記位相差に基づき前記発振器の発振周波数を可変させ、前記位相差が所定の条件を満たすように制御する、ことを特徴とする電圧生成方法。 The phase difference between the waveform of the AC current measured by the ammeter and the waveform of the AC voltage signal generated by the oscillator included in the phase locked loop is detected, and the oscillation frequency of the oscillator is varied based on the phase difference. A voltage generation method, wherein the phase difference is controlled so as to satisfy a predetermined condition.
  7.  前記交流電流の波形と、前記発振器で生成した前記交流電圧信号の波形の位相が一致するように制御する、ことを特徴とする請求項6に記載の電圧生成方法。 7. The voltage generation method according to claim 6, wherein the control is performed such that the waveform of the AC current and the waveform of the AC voltage signal generated by the oscillator match in phase.
  8.  前記交流電流の波形に対して力率を最大化する交流電圧信号波形となる第一の位相差を検出し、
     前記交流電流の波形と、前記発振器で生成した前記交流電圧信号の波形との前記位相差が、前記力率を最大化する前記第一の位相差となるように制御する、ことを特徴とする請求項6に記載の電圧生成方法。
    Detecting a first phase difference that becomes an AC voltage signal waveform that maximizes a power factor with respect to the waveform of the AC current,
    The phase difference between the waveform of the AC current and the waveform of the AC voltage signal generated by the oscillator is controlled so as to be the first phase difference that maximizes the power factor. The voltage generation method according to claim 6.
PCT/JP2019/028632 2018-07-23 2019-07-22 Measuring device, and voltage generating method WO2020022255A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2020532377A JP7111163B2 (en) 2018-07-23 2019-07-22 Measuring device and voltage generation method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-137655 2018-07-23
JP2018137655 2018-07-23

Publications (1)

Publication Number Publication Date
WO2020022255A1 true WO2020022255A1 (en) 2020-01-30

Family

ID=69182229

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2019/028632 WO2020022255A1 (en) 2018-07-23 2019-07-22 Measuring device, and voltage generating method

Country Status (2)

Country Link
JP (1) JP7111163B2 (en)
WO (1) WO2020022255A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102513647B1 (en) * 2022-06-29 2023-03-24 디지털파워넷 주식회사 IoT-based electric safety remote inspection and control device using a phase difference-free sensor unit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04372871A (en) * 1991-06-24 1992-12-25 Fujitsu Denso Ltd Variable sampling measuring apparatus
JP2011220953A (en) * 2010-04-14 2011-11-04 Yokogawa Electric Corp Zero-cross signal generation circuit and phase measuring instrument
JP2013009345A (en) * 2011-05-20 2013-01-10 Semiconductor Energy Lab Co Ltd Phase synchronization circuit, and semiconductor device using the same
US9325324B1 (en) * 2014-12-17 2016-04-26 Stmicroelectronics International N.V. Phase locked loop (PLL) circuit with compensated bandwidth across process, voltage and temperature

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0718895B2 (en) * 1987-12-16 1995-03-06 日本車輌製造株式会社 AC power supply voltage fluctuation detection device
JP2581735B2 (en) * 1988-02-29 1997-02-12 三菱電機株式会社 Power failure detection device
JP6093332B2 (en) * 2014-07-31 2017-03-08 日本電信電話株式会社 Apparatus and method for estimating phase delay between voltage and current
JP2018112535A (en) * 2017-01-13 2018-07-19 パナソニックIpマネジメント株式会社 Current measurement system and panelboard

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04372871A (en) * 1991-06-24 1992-12-25 Fujitsu Denso Ltd Variable sampling measuring apparatus
JP2011220953A (en) * 2010-04-14 2011-11-04 Yokogawa Electric Corp Zero-cross signal generation circuit and phase measuring instrument
JP2013009345A (en) * 2011-05-20 2013-01-10 Semiconductor Energy Lab Co Ltd Phase synchronization circuit, and semiconductor device using the same
US9325324B1 (en) * 2014-12-17 2016-04-26 Stmicroelectronics International N.V. Phase locked loop (PLL) circuit with compensated bandwidth across process, voltage and temperature

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102513647B1 (en) * 2022-06-29 2023-03-24 디지털파워넷 주식회사 IoT-based electric safety remote inspection and control device using a phase difference-free sensor unit

Also Published As

Publication number Publication date
JP7111163B2 (en) 2022-08-02
JPWO2020022255A1 (en) 2021-08-02

Similar Documents

Publication Publication Date Title
US9350162B2 (en) Determination of the fault current component of a differential current
JP6126081B2 (en) Thyristor starter
US20140043880A1 (en) Method and Apparatus for Determining a Fault Current Portion in a Differential Current
CN109789554A (en) The detection of angle rotary transformer imbalance
CN113161995A (en) Apparatus and method for fault current detection
WO2020022255A1 (en) Measuring device, and voltage generating method
JP2758402B2 (en) Anti-phase component detector for continuous wave frequency converter
JP2020201060A (en) Insulation resistance monitoring device for ac non-ground circuit
US4486706A (en) Power flow direction detector
US20130300428A1 (en) Determination of a Stray Capacitance of an AC Current Generator
RU189666U1 (en) DEVICE FOR MEASURING THE FREQUENCY OF THREE-PHASE SINUSOIDAL VOLTAGE
WO2012073582A1 (en) Grid-connected power conditioner
JP2962244B2 (en) PCB passive element isolation measurement circuit
JP3287121B2 (en) Voltage drop detection circuit
US9455642B2 (en) Digital frequency selective transformer-rectifier unit ripple fault detection
US20170016942A1 (en) Electric power measuring system
JP2018119944A (en) Voltage measuring device and voltage measuring method
JP7070681B2 (en) Measuring equipment and method
KR20150108133A (en) Digital logic signal generating circuit for frequency measurement
CN112020655A (en) Electricity meter comprising a current measuring circuit and a voltage measuring circuit
US12132384B2 (en) Current measuring circuit for a converter, converter circuit and converter
RU189665U1 (en) DEVICE FOR MEASURING THE FREQUENCY OF THREE-PHASE SINUSOIDAL VOLTAGE
RU204749U1 (en) DEVICE FOR MEASURING THE FREQUENCY OF THREE-PHASE SINUSOID VOLTAGE
RU204691U1 (en) DEVICE FOR MEASURING THE FREQUENCY OF THREE-PHASE SINUSOID VOLTAGE
JPH0862261A (en) Error correction device for electronic wattmeter

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19840189

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2020532377

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19840189

Country of ref document: EP

Kind code of ref document: A1