JP2962244B2 - PCB passive element isolation measurement circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a PCB (Prin)
The present invention relates to a technique for separating and measuring the impedance of a passive element mounted on a ted circuit board (Ted circuit Board), and more specifically, accurately separates and detects the actual impedance value of the passive element using a novel phase difference measurement method, and performs ICT.
The present invention relates to a circuit for separating and measuring passive elements of a PCB, which can be applied to (In-circuit Tester) equipment.

[0002]

2. Description of the Related Art Generally, in order to determine whether a passive element in a circuit of R, L, C (resistance R, coil L, capacitor C) in a PCB is defective, an actual impedance value of the passive element must be measured. However, passive components in the PCB do not exist independently and are connected in series or in parallel with other components, making measurement impossible using measurement equipment such as an RLC meter. It has been almost impossible in terms of quantity and time to measure the actual impedance value of each passive element when determining the presence or absence of an abnormality in a PCB during production.

The ICT equipment has been proposed as an apparatus for automatically measuring and inspecting many components mounted on a PCB. In this case, the passive elements of the R, L, and C circuits are separately measured. Therefore, advanced technology for detecting a phase difference between an input signal and an output signal of a PCB is required, and implementation of such an accurate phase difference detection circuit has greatly affected the performance of ICT equipment.

In such a conventional phase difference detecting circuit, as shown in FIG. 3, a frequency selector 20 for selecting a predetermined frequency, and a sine wave is generated in accordance with the frequency selected from the frequency selector 20. Sine wave generator 21
And an amplification unit 22 for amplifying the output of the sine wave generator 2.
A current / voltage converter 24 for converting a current signal output from the PCB 23 with a delay into a voltage signal;
2, a multiplier 25 for integrating the output of the current / voltage converter 24 and the output of the current / voltage converter 24, a low-pass filter 26 for removing an AC component from the output signal of the multiplier 25, An RMS (Root Mean S) for calculating the impedance by measuring the maximum value of the output of the voltage converter 24
quare) calculation unit 27, an A / D converter 28 that converts each output of the RMS calculation unit 27 and the low-pass filter 26 into a digital signal, and mounted on the PCB 23 by the output of the A / D converter 28. And a PC 29 for calculating the value of the resistor R, the coil L, and the capacitor C.

The operation of the phase difference detection circuit thus configured will be described with reference to the drawings.

Normally, when determining whether or not a passive element mounted on the PCB 23 is defective, the frequency selector 2 of the AC signal source determines whether or not the passive element is defective based on the phase difference of the AC signal.
Zero and sine wave generators 21 are used.

First, when a user selects a frequency through the frequency selector 20, a sine wave generator 21 generates a sine wave having a predetermined frequency, and an amplifier 22 converts the generated sine wave to an appropriate level. And outputs it to the PCB 23. At this time, the output voltage of the amplifying unit 22 is set to V (t) =
Vs sin Wt, the voltage signal V (t) is P
Since the phase is delayed by θ while passing through the RLC circuit of the CB 23, the current signal I (t) = si
n (Wt + θ) is output.

Next, the current signal I (t) = sin (W
t + θ) is the voltage signal V ′ (t) in the current / voltage converter 24.
= −Rf Im sin (Wt + θ) (Rf is a current-voltage conversion resistor), and the multiplier 25
And each output voltage V (t), V 'of the current / voltage converter 24.
(T) is integrated and output.

That is, the output signal of the multiplier 25 is as follows: V (t) V '(t) = Vs sin Wt-Rf Im sin (Wt + θ) =-1/2 ｛Rf Vs Im cos θ-Rf Vs Im cos (2Wt + θ)}, and the output signal of the multiplier 25 has the AC component removed from the low-pass filter 26 and the DC component | V (t) V ′ (t) | = 1 /
Only 2 Rf Vs Im cos θ remains. The left side of the equation is an output signal of the multiplier 25 from which the AC component is removed through the low-pass filter 26 and only the DC component is left.

Therefore, the phase difference (θ) is detected by the following equation.

(Equation 1) This equation represents the phase difference between the PCB input voltage and the output voltage V ′ (t) output from the PCB and output through the current / voltage converter.

Next, the detected phase difference (θ) is A /
The signal is converted into a digital signal by the D converter 28 and supplied to the PC 29.

Further, the RMS calculation unit 27 is connected to the amplification unit 22.
The maximum value is measured from the output signal V (t) of the current / voltage converter 24 and the output signal V ′ (t) of the current / voltage converter 24 to calculate Vs and Im, and the magnitude of the impedance is calculated from the equation Vs = | Z | Im. The calculated value is output to the PC 29 via the A / D converter 28.

Accordingly, the PC 29 creates an approximate expression based on the data and calculates the values of the resistor R, the coil L, and the capacitor C.

[0014]

However, in such a conventional phase difference detection method, since the AC component is not completely removed due to the error generated by the multiplier and the delay time generated by the low-pass filter, the width of the error is reduced. Increases and RLC
Since the value of the passive element is measured according to the approximate formula in the range unit by the combination of the above, there is an inconvenience that an accurate measured value at the boundary cannot be detected.

In addition, such a problem is disadvantageous in that an incorrect value is calculated as the number of measurements is increased.

An object of the present invention is to detect the maximum values of the PCB input signal and the response signal, respectively, and to detect the voltage values of the input signal and the response signal of the PCB using the sampling clock signal synchronized at any time. It is an object of the present invention to provide a PCB passive element separation / measurement circuit capable of calculating a phase difference using the detected value.

[0017]

In the circuit for separating and measuring passive elements of a PCB according to the present invention, a sine wave having a frequency of a predetermined magnitude is generated and supplied to the PCB in accordance with a frequency selected by a user. A signal input unit for outputting a sample / hold clock signal CLKsh at an arbitrary time synchronized with the sine wave; and a peak voltage (Vin-max) (Vout-max) for the input signal Vin and the response signal Vout of the PCB. At a given point in time in synchronization with the sample / hold clock signal CLKsh output from the signal input unit.
Input signal Vin and the voltage value Vi of the response signal Vout
a response signal processing unit for detecting n '(T) and Vout' (T), respectively, and a peak voltage (Vin-max) (Vout-max) output from the response signal processing unit and detection from an arbitrary time point Voltage value Vin '(T), Vout'
(T) and a control logic unit for digitally converting each of them and supplying them to the PC.

[0018]

Embodiments of the present invention will be described below.

As shown in FIG. 1, in the circuit for measuring passive components of a PCB according to the present invention, a sine wave having a predetermined frequency is generated in accordance with a frequency selected by a user.
B200, a signal input unit 100 for supplying a sample / hold clock signal CLKsh at an arbitrary time synchronized with the sine wave, and a peak voltage (V) for the input signal Vin and the response signal Vout of the PCB 200.
in-max) and (Vout-max), respectively, and the input signal Vin and the response signal Vo of the PCB 200 at any time in synchronization with the sample / hold clock signal CLKsh output from the signal input unit 100.
a response signal processing unit 300 for detecting the voltage values Vin ′ (T) and Vout ′ (T) of the output signal out, respectively, and the response signal processing unit 3
00, the peak voltage (Vin-max) (V
out-max) and voltage values Vin ′ (T) and Vout ′ (T) detected from an arbitrary point in time are respectively converted into digital signals and supplied to a PC (not shown).
And 00.

In the signal input section 100,
A frequency selector 10 for selecting a predetermined frequency, a sine wave generator 11 for generating a sine wave having a frequency of a predetermined magnitude according to the frequency selected from the frequency selector 10, and a sine wave from the sine wave generator 11 And a clock synchronizing unit 12 that outputs a rectangular wave signal synchronized with the sine wave at an arbitrary time, and adjusts the width and hold time of the rectangular wave signal output from the clock synchronizing unit 12 to sample / hold. A sample / hold controller 13 that outputs a clock signal CLKsh, and an amplifier 14 that amplifies the sine wave output from the sine wave generator 11 and outputs the amplified signal to the PCB 200 and the response signal processor 300, respectively. .

In the response signal processing unit 300, a current / voltage converter 30 for converting the response signal I output from the PCB 200 to a voltage signal V, and a voltage signal of the current / voltage converter 30 A response signal amplifying unit 31 that amplifies V to an appropriate level and outputs a response signal Vout, and an input signal amplifying unit 32 that amplifies an input signal Vs output from the amplifying unit 14 and input to the PCB 200 and outputs an input signal Vin. Receiving the output signal of the response signal amplifier 31 and the output signal of the input signal amplifier 32,
a peak value detector 33 for measuring n-max and Vout-max, and the sample / hold clock controller 13
Sample / hold clock signal CLK output from
a sample / hold unit 34 that calculates the voltage values Vin ′ (T) and Vout ′ (T) based on the output signal of the response signal amplifying unit 31 and the output signal of the input signal amplifying unit 32 at any time in synchronization with sh, It has.

Further, in the control logic section 400, the peak voltages Vin-max and Vout-max output from the peak value detector 33 and the voltage values Vin '(T) output from the sample / hold section 34, Vo
A / D converter 40 for receiving and receiving digital signals ut '(T), and a PC interface unit 41 for supplying an output signal of the A / D converter 40 to a PC (not shown) and outputting a control signal. And the PC interface unit 4
A data controller 42 that outputs an A / D conversion start signal and an end state signal to the A / D converter 40 under the control of 1;
A command controller 43 for controlling various analog switches and relays under the control of the PC interface unit 41
And

The operation of the present invention thus configured will be described.

First, when a user selects an appropriate frequency through the frequency selector 10, the sine wave generator 11 generates a sine wave having a predetermined frequency, and the amplifying unit 14 receives the sine wave and receives an appropriate level signal. And outputs it to the PCB 200 and the response signal processing unit 300 as an input signal Vs.

The clock synchronizer 12 receives the sine wave output from the sine wave generator 11 and outputs a rectangular wave signal synchronized with the sine wave signal. The sample / hold clock controller 13 The sample / hold clock signal CLK is adjusted by adjusting the signal width and the hold time.
sh is output to the sample / hold unit 34.

At this time, the input signal Vs output from the amplifying unit 14 is expressed as Vs = Vsm sinWt.
The output Z of the RLC circuit in B200 is Z = | Z | ∠ (θ)
And the magnitude of the phase difference (θ) and impedance | Z |
Is represented by

Accordingly, the PCB 20 for the input signal Vs
The response characteristic of 0 is expressed as follows. Inside the PCB

In this case, the magnitude of the amplitude Vsm is equal to PCB2
A voltage of 0.2V or less is used to prevent other diodes in 00 from being turned on.

The current signal I = Im sin (Wt + θ) output from the PCB 200 is
Is converted into a voltage signal V through the current / voltage converter 30, and is expressed as follows. V = −Rf Im sin (Wt + θ) (1) (Rf is a current-voltage conversion resistor)

Next, the response signal amplifying section 31 outputs the current /
The voltage signal V converted by the voltage converter 30 is amplified by M times and output as a response signal Vout to the peak value detector 33 and the sample / hold unit 34, respectively.
2 amplifies the input signal Vs output from the amplifying unit 14 by m times and outputs the amplified signal to the peak value detector 33 and the sample / hold unit 34 as an amplified signal Vin, respectively. The equation in this case is as follows. Vout = M Rf Im sin (Wt + θ) (2) Vin = m Vsm sinWt (3)

Accordingly, the peak value detector 33 receives the outputs of the response signal amplifying unit 31 and the input signal amplifying unit 32, and receives the amplified signal Vin and the peak value Vin- of the response signal Vout.
max and Vout-max are detected respectively. At this time,
The M Rf Im in the formulas (2) and (3) is set to a peak value Vou.
Replace with t-max and replace m Vsm with peak value Vin-m
When each is replaced with ax, the result is as shown in FIG. 2 and is expressed by the following equation. Vin (t) = Vin-max sinWt (4) Vout (t) = Vout-max sin (Wt + θ) (5)

Further, the equations (4) and (5) are converted to an arbitrary time t according to the sample / hold clock signal CLKsh output from the sample / hold clock controller 13.
= T, the input voltage Vin '
(T) and the response voltage Vout ′ (T) are calculated as follows. Vin '(T) = Vin-max sinWT (6) Vout' (T) = Vout-max sin (WT + .theta.) (7) At this time, the sample / hold time point WT is determined by the following equation. Is done.

(Equation 2)

Further, when the above equation (7) is expressed in another form,

(Equation 3) Substituting the equation (8) into the equation (9),

(Equation 4) Becomes

Accordingly, the phase difference θ between the response signal Vout and the input signal Vin of the PCB 200 can be obtained.

The input signal output from the amplifying unit 14 is given by: Vs = Vsm sin Wt = Z Imsi
n (Wt + θ), Vsm = | Z | Im
The magnitude of the impedance | Z |

At this time, Vsm and Im are

(Equation 5) Determined by the formula.

Accordingly, the maximum values Vin-max, Vout of the input signal Vin and the response signal Vout of the PCB 200
-Max and PCB20 at any time (t = T)
0 of the input signal Vin and the voltage value Vi of the response signal Vout
Since the phase difference θ and the magnitude | Z | of the impedance can be calculated based on n ′ (T) and Vout ′ (T), it can be calculated from the R, L, C series circuit or parallel circuit built in the PCB 200. The actual impedance value of each element can be detected.

For example,

(Equation 6) The formula is as follows.

[0039]

As described above, the PCB according to the present invention is used.
In the passive element separation measuring circuit, the maximum value of the input signal and the response signal of the PCB is detected, and the voltage value of the input signal and the response signal of the PCB is detected at an arbitrary time by using a synchronized sampling clock signal. After that, since the phase difference is calculated using them, there is an effect that the actual impedance value of the passive element can be accurately and quickly detected.

[Brief description of the drawings]

FIG. 1 is a block diagram of a PCB passive element isolation measurement circuit according to the present invention.

FIG. 2 is a waveform diagram showing the voltage values of the input signal and response signal of the PCB according to the present invention and the input signal and response signal of the PCB at an arbitrary time.

FIG. 3 is a block diagram of a conventional phase difference detection circuit.

[Explanation of symbols]

 Reference Signs List 10 frequency selector 11 sine wave generator 12 clock synchronizing unit 13 sample / hold controller 14 amplifying unit 30 current / voltage converter 31 response signal amplifying unit 32 input signal amplifying unit 33 peak detector 34 sample / hold unit 40 A / D converter 41 PC interface unit 42 Data controller 43 Command controller 100 Signal input unit 200 PCB 300 Response signal processing unit 400 Control logic unit CLKsh Sample / hold clock signal Vin Input signal Vout Response signal Vs Input signal Vin Amplified signal

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁶ , DB name) G01R 27/02

Claims (4)

(57) [Claims] 1. A sine wave having a frequency of a predetermined magnitude is generated according to a frequency selected by a user to generate a sine wave.
0), and outputs a sample / hold clock signal (CLKsh) at an arbitrary time synchronized with the sine wave (100), an input signal (Vin) and a response signal (Vin) of the PCB (200). Vout) vs. peak voltage (Vin-max)
(Vout-max) is measured, and the PC at any time is synchronized with the sample / hold clock signal (CLKsh) output from the signal input unit (100).
B (200) input signal (Vin) and response signal (Vo)
ut), a response signal processing unit (300) for detecting the voltage values Vin ′ (T) and Vout ′ (T), respectively, and a peak voltage (Vin−max) (Vout) output from the response signal processing unit (300). -Max) and voltage values Vin ′ (T), Vout ′ detected from any time point
And a control logic section (400) for digitally converting (T) and supplying it to the PC, respectively. 2. The signal input unit (100) includes: a frequency selector (10) for selecting a predetermined frequency; and a sine wave having a frequency of a predetermined magnitude according to the frequency selected from the frequency selector (10). A generated sine wave generator (11);
A clock synchronizer (12) for receiving a sine wave from the sine wave generator (11) and outputting a rectangular wave signal synchronized with the sine wave at an arbitrary time; and a clock synchronizer (12). A sample / hold controller (13) for outputting a sample / hold clock signal (CLKsh) by adjusting the width and hold time of the rectangular wave signal, and amplifying the sine wave output from the sine wave generator (11). 2. The circuit for measuring passive components of a PCB according to claim 1, further comprising: an amplifying unit (14) for outputting to the PCB (200) and a response signal processing unit (300) respectively. 3. The response signal processing unit (300) includes a PC
A current / voltage converter (30) for converting the response signal (I) delayed from B (200) into a voltage signal (V), and the voltage signal (V) of the current / voltage converter (30) is properly adjusted. A response signal amplifying section (31) for amplifying to a level and outputting a response signal (Vout); and P output from the amplifying section (14).
An input signal amplifier (32) that amplifies an input signal (Vs) input to the CB (200) and outputs an amplified signal (Vin);
Receiving the output signal of the response signal amplifying section (31) and the output signal of the input signal amplifying section (32), and receiving the peak voltage (Vi
a peak value detector (33) for measuring (n-max) (Vout-max), and an arbitrary time in synchronization with a sample / hold clock signal (CLKsh) output from the sample / hold clock controller (13). From the output signal of the response signal amplifying unit (31) and the output signal of the input signal amplifying unit (32), the voltage values Vin ′ (T) and Vou
sample / hold unit (34) for calculating t '(T)
The circuit for measuring passive element isolation of a PCB according to claim 1, further comprising: 4. The control logic section (400) includes a peak voltage Vi output from the peak value detector (33).
n-max, Vout-max and voltage values Vin '(T), Vo output from the sample / hold unit (34)
an A / D converter (40) that receives and converts the output signal from the A / D converter (40) to a digital signal, and converts the output signal of the A / D converter (40) into a PC.
A PC interface unit (41) for supplying a control signal to the PC interface unit and outputting the control signal to the PC interface unit (41)
The data controller (4) which outputs an A / D conversion start signal and an end state signal to the A / D converter (40) by the control of (4).
2. The circuit for measuring passive element separation of a PCB according to claim 1, comprising: 2); and a command controller (43) for controlling various analog switches and relays under the control of the PC interface section (41).