CN1155082A - Passive-element testing circuit for printed circuit - Google Patents
Passive-element testing circuit for printed circuit Download PDFInfo
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- CN1155082A CN1155082A CN96122717A CN96122717A CN1155082A CN 1155082 A CN1155082 A CN 1155082A CN 96122717 A CN96122717 A CN 96122717A CN 96122717 A CN96122717 A CN 96122717A CN 1155082 A CN1155082 A CN 1155082A
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- 238000012360 testing method Methods 0.000 title claims abstract description 37
- 238000005070 sampling Methods 0.000 claims abstract description 29
- 238000012545 processing Methods 0.000 claims abstract description 13
- 230000001360 synchronised effect Effects 0.000 claims abstract description 9
- 238000012423 maintenance Methods 0.000 claims description 15
- 238000006243 chemical reaction Methods 0.000 claims description 10
- NCGICGYLBXGBGN-UHFFFAOYSA-N 3-morpholin-4-yl-1-oxa-3-azonia-2-azanidacyclopent-3-en-5-imine;hydrochloride Chemical group Cl.[N-]1OC(=N)C=[N+]1N1CCOCC1 NCGICGYLBXGBGN-UHFFFAOYSA-N 0.000 description 4
- 238000001514 detection method Methods 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000007634 remodeling Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
- G01R31/2813—Checking the presence, location, orientation or value, e.g. resistance, of components or conductors
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- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
Disclosed is a test circuit for a PCB passive component, comprising a signal input unit which is used to generate sine waves with preset frequency and amplitude and to send the sine waves to PCB for synchronous output sampling/ keeping clock signals with sine wave signals at a preset time; a response signal processing unit which is used to test peak voltage of the input signals sent to PCB and the peak voltage of the response signals from PCB and test voltage value of the input signals sent to PCB outputted by a signal input unit, synchronized with sampling/ keeping clock signal at the preset time and the voltage value outputted from PCB; and a control logical unit which is used to digitally convert the peak voltage and the output voltage value from a signal processing unit and send the voltage and the voltage value to a personal computer.
Description
The present invention relates to be used for the passive element test circuit of printed circuit board (PCB) (PCB), be particularly related to the improved passive element test circuit that is used for PCB, in order to make the passive element test circuit be applicable to interior circuit tester (ICT), it can be with the real signal value of new phase differential method of testing test from passive element.
Usually, for test is installed in passive element on the PCB, accurately test is from the real signal value of passive element.
But passive element is not to be arranged separately on the PCB.That is to say that passive element becomes series connection with other element or is connected in parallel.Thereby, can not use ohmer, inductometer and electric capacity meter (RLC) are tested the real signal value from passive element separately.At this moment,, promptly use the extremely short time to test the signal value of a large amount of passive elements because passive element produces, also need extremely long-time, thereby, reduced the production efficiency of passive element.
Thereby, for the signal value that comes with a large amount of different elements on automatic test of the short time PCB, and interior circuit tester (ZCT) has been introduced commercial production.
For test separately from such as R (resistance), L (inductance), the signal value of C different passive elements such as (electric capacity) requires to detect about the input of PCB and the phase differential of output signal with complicated technology.That is to say that the performance that provides accurate phase difference detecting circuit to improve ICT is of crucial importance.
Fig. 1 is conventional phase difference detecting circuit block scheme.As shown in the figure, phase difference detecting circuit routinely.Be provided with frequency selector 20.Be used to select the prearranged signal frequency; Sine-wave generator 21 is used for producing sinusoidal wave by the frequency that frequency selector 20 is selected; Amplifier 22.Be used to amplify the output signal of sine-wave generator 21; Current/voltage converter 24.Be used for and become voltage by PCB23 output and the current conversion that postpones; Multiplier 25 is used to make the output of multiplier 22 to take advantage of the output of current/voltage converter 24; Low-pass filter 26 is used for the AC compounent of the output signal of filtering multiplier 25, and root mean square (RMS) computing unit 27 is used for the maximal value of the output of test amplifier 22 and current/voltage converter 24 and computing impedance; A/D converter 28 is used for converting the output of RMS computing unit 27 and low-pass filter 26 to digital signal.With personal computer 29, be used for being output as the value that basic calculation goes out to be installed in the R.L.C element on the PCB23 with A/D converter 28.
Operation below with reference to the conventional phase difference detecting circuit of description of drawings.
Usually, when test is installed in passive element on the PCB23, owing to can not use direct current, and with the phase differential testing passive element of alternating current (AC) generation.Therefore, usually with frequency selector 20 with the sine-wave generator 21 in source takes place as ac current signal.
When the user when frequency selector 20 is selected the prearranged signal frequencies, sine-wave generator 21 produces the sine wave signal that preset frequency and amplitude are arranged.Amplifier 22 is amplified to this sine wave signal predetermined level and signal is passed to PCB23.
The output voltage signal V (t) that supposes amplifier 22 is ' Vs
*Sinewt " because voltage V (t) has been postponed phasing degree θ by the rlc circuit on the PCB23, therefore the electric current with PCB23 output is " I (t)=Sin (ω t+ θ) ".
With current/voltage converter 24 with electric current " I (t)=Sin (ω t+ θ) " convert to voltage " V ' (t)=-Rf
*ImSin (wt+ θ) ", Rf represents the resistance of current-voltage conversion in the formula.Multiplier 25 is with the output voltage V (t) of amplifier 22 and the output voltage V of current/voltage converter 24 ' (t) multiply each other, and the output voltage behind the output multiplication.
That is to say, can be represented by the formula the output signal of multiplier 25:
v(t)*v′(t)=Vs*sir?wt-Rf*Im?sin(wt+θ)
=-1/2*{(Rf*Vs*Im?cosθ)+(Rf*Vs*Im?cos(2wt+o))}
With the alternating current component in the output signal of low-pass filter 26 filtering multipliers 25, therefore, only by current component, " | v (t)
*V ' is (t) | and=1/2
*Rf
*Vs
*Im cos θ ".
Thereby, can detect the phase differential θ that is expressed from the next:
Detected phase differential θ converts digital signal to by A/D converter 28, and outputs to PC29.
Thereby PC29 calculates resistance value (R) approx according to above-mentioned value, inductance value (L) and electric capacity (C).
But, because the time delay that error that multiplier causes and low-pass filter cause.Therefore, make conventional phase difference detection method can not eliminate the alternating current component basically, thereby error strengthen.In addition, the value of testing passive element on the approximate expression basis of the scope radix that R.L and C combination is arranged.Therefore, can not detect the test value of frontier district.
And along with the increase of test quantity, owing to there are the problems referred to above, calculated value is out of true more.
Thereby, the objective of the invention is, a kind of passive element test circuit that is used to test PCB that has overcome the conventional passive element test circuit defective that is used to test PCB is provided.
Another object of the present invention is, the passive element test circuit of a kind of PCB of being used for is provided, it can detect the input signal of supplying with PCB and big from the value of the response signal of PCB, can use the magnitude of voltage of the response signal that detects the input signal of supplying with PCB with synchronous sampling clock signal of the schedule time and come from PCB, and can calculate phase differential with detected value.
For achieving the above object, the passive element test circuit of a kind of PCB of being used for is provided, it comprises signal input unit, be used to produce the sine wave signal of preset frequency and amplitude, and this sine wave signal is added to printed circuit board (PCB), and export sampling/maintenance clock signal synchronously at predetermined instant and sine wave signal; The response signal processing unit, be used to test with respect to the input signal of giving PCB with from the crest voltage of the response signal of PCB, and detect the predetermined instant and the sampling/maintenance clock signal of signal input unit output synchronous to the applied signal voltage value of PCB with from the response signal voltage value of PCB, with the steering logic unit, the magnitude of voltage that is used for the digital conversion crest voltage and exports from the response signal processing unit, and with voltage and magnitude of voltage supply personal computer (PC).
To more be expressly understood other advantage, purpose and feature of the present invention by following explanation.
Invention will be more fully understood from following detailed description and accompanying drawing, and accompanying drawing only is used for illustrating the present invention, so the present invention is not limited.
Fig. 1 is conventional phase difference detecting circuit block scheme;
Fig. 2 is the block scheme by the passive element test circuit of the PCB of being used for of the present invention;
Fig. 3 be from PCB the input of common point and response signal waveform and at predetermined point from the input of PCB and the oscillogram of response signal.
Fig. 2 is the block scheme by the passive element test circuit of the PCB of being used for of the present invention.
In passive element test circuit of the present invention, signal input unit 100 is connected with printed circuit board (PCB) (PCB) 200, the signal frequency that is used for selecting by the user is supplied with the sine wave signal that PCB200 has preset frequency and amplitude, and exports sampling/maintenance clock signal clk sh by the sine wave signal that produces at predetermined instant.Connection response signal processing unit 300, be used to test maximal value Vin-max to the input signal Vin of PCB200, with maximal value Vout-max, and be used for by from the magnitude of voltage Vin (T) of the input signal Vin of sampling/maintenances clock signal clk sh detection predetermined instant of signal input block 100 outputs and the magnitude of voltage Vout (T) of response signal Vout from the response signal Vout of PCB200.Connect steering logic unit 400 and be used for digital conversion to the input crest voltage Vin-max of response signal processing unit 300 and the crest voltage Vout-max that exports from response signal processing unit 300, with at the detected magnitude of voltage Vout of predetermined instant (T), and voltage supplied with the personal computer (not shown).
Signal input unit 100 comprises the frequency selector 10 that is used to select preset frequency, be used for producing the sine-wave generator 11 of the sine wave signal that preset frequency and amplitude are arranged by the frequency that frequency selector 10 is selected, with be used to receive from the sine wave signal of sine-wave generator 11 and export the clock synchronization unit 12 of square-wave signal at predetermined instant and sine wave signal synchronously, be used to regulate by sampling/retentive control device 13 of the width of the square-wave signal of clock synchronization unit 12 outputs and duration and output sampling/maintenance clock signal clk sh and be used to amplify sine wave signal of exporting from sine-wave generator 11 and the amplifier 14 that amplifying signal Vs is outputed to PCB200 and response signal processing unit 300.
Response signal processing unit 300 comprises and will convert the current/voltage converter 30 of voltage (V) to from response signal (I) PCB200 output and that postpone, be used for to be amplified to the response signal amplifier 31 of predetermined level and output response signal Vuot from the voltage (V) of current/voltage converter 30, be used to amplify from amplifier 14 and also will be defeated by the output signal Vs of PCB200 and the input signal amplifier 32 of output one input signal Vin, be used to receive respectively from the output signal Vin of response signal amplifier 31 and input signal amplifier 32 and the peak detctor 33 of Vout, and be used to test crest voltage Vin-max and Vout-max, and sampling/holding unit 34, be used to calculate with the sampling/maintenance clock signal clk sh that exports from sampling/maintenance clock controller 13 synchronous at the magnitude of voltage of predetermined instant from response signal amplifier 31 and input signal amplifier 32
With
Steering logic unit 400 comprises A/D converter 40, be used for being received from respectively the crest voltage Vin-max and the Vout-max of peak detctor 33 outputs, certainly the magnitude of voltage Vi ' n (T) of sampling/holding unit 34 output, and be used for digital conversion voltage and magnitude of voltage, PC interface unit 41, be used for and will supply with the PC (not shown) from the output of A/D converter 40, and the output control signal; Recording controller 42 is used for A/D being changed start signal and the done state signal is defeated by A/D converter 40 by the control signal of PC interface unit 41; With control the instruction control unit 43 that various analog-converted and relaying are used by the control signal of interface unit 41.
The running of accompanying drawings passive element test circuit of the present invention now.
At first, when the user when frequency selector 10 is selected frequencies, sine-wave generator 11 produces the sine wave signal that preset frequency and amplitude are arranged, and amplifier 14 is amplified to predetermined level with sine wave signal, and gives PCB200 and response signal processor 300 output input signal Vs respectively.
Clock synchronization unit 12 is received from the sine wave signal of sine-wave generator 11 outputs and exports synchronously-square-wave signal with sine wave signal.Sampling/maintenance clock controller 13 is regulated square-wave signal width and duration, and the clock signal clk sh that will take a sample/keep is defeated by sampling/holding unit 34.
Here, the input signal Vs that is exported by amplifier 14 can be expressed as " Vs=VsmSin wt ", and the output impedance of the rlc circuit on the PCB200 (Z) can be expressed as " Z=|Z|<θ ", and θ is a phase differential in the formula, | Z| is the impedance absolute value.
The level of requirement is provided for the amplitude of giving Vsm here, and the voltage with being lower than 0.2v forwards conducting to prevent the diode on the PCB200.
In addition, convert voltage (V) by the electric current " I=ImSin (ω t+ θ) " of PCB200 output to by the current/voltage converter 30 of response signal processing unit 300, and be expressed as follows:
V=-Rf*Im?sin(wt+θ) --------------- (1)
Rf is a current-voltage conversion resistance in the formula.
Response signal amplifier 31 will amplify M doubly by the voltage (V) of current/voltage converter 30 conversions, response signal Vout is defeated by peak detctor 33 and sampling/holding unit 34 respectively, and input signal amplifier 32 will amplify m doubly from the input signal Vs of amplifier 14 outputs.And input signal Vin exported to peak detctor 33 and sampling/holding unit 34 respectively.Response signal Vout and input signal Vin are expressed as follows:
Vout=M*Rf*Im?sin(wt+θ)--------------(2)
Vin=m*Vsm?sin?wt---------------------(3)
Thereby peak detctor 33 receives the signal by response signal amplifier 31 and input signal amplifier 32 outputs, and detects the peak value Vin-max of input signal Vin and the peak value Vout-max of response signal Vout.
If in above-mentioned equation (2) and (3), replace M with peak value Vin-max
*Rf
*Im replaces m with peak value Vout-max
*Vsm then obtains waveform shown in Figure 3 and is expressed as follows:
Vin(t)=Yin-max
*sinwt-------------------(4)
Vout(t)=Vout-max
*sin(wt+θ)-----------(5)
When stipulating Vin (t) in the moment (t=T) sampling/freeze mode (4) and (5) and Vout (t) by the sampling/maintenance clock signal clk sh by sampling/maintenances clock controller 13 output, input voltage vin (T) and response voltage Vou (T) are calculated as follows:
Vin′?(T)=Yin-max?sin?wt---------------(6)
Vout′(T)=Vout-max?sin(wT+θ)---------(7)
Sampling/maintenance running is determined by following formula constantly.
In addition, equation (7) can be expressed as follows:
Therefore,
It is as follows that equation (8) substitution equation (9) is obtained phase differential:
Can obtain the phase differential θ of response signal Vout of the input signal Vin of relevant PCB200 thus.
Because the input signal (Vs) by amplifier 14 outputs can be expressed as " Vs=VsmSinwt=Z
*ImSin (wt+ θ) ", just can be from expression formula " Vsm=|Z|
*Im " calculate the size of impedance | Z|.
Here Vsm and Im determine on the basis of following formula.
Thereby, because from the maximal value Vout-max of the maximal value Vin-max of the input signal Vin of PCB200 and response signal Vout with at the magnitude of voltage of predetermined instant (t=T) from the input signal Vin of PCB200
Magnitude of voltage with response signal Vout
The basis on can express impedance | the size of Z| and phase differential θ, so, just can detect the actual value of each element in the R.L.C serial or parallel connection circuit that PCB200 go up to be provided with.For example:
As mentioned above, can be used in that the synchronous sampling clock signal of predetermined instant directly detects the input signal maximal value that adds to PCB and from the response signal maximal value of PCB by the passive element test circuit that is used for printed circuit board (PCB) of the present invention, detect the applied signal voltage value of input PCB and from the magnitude of voltage of the response signal of PCB, and calculate phase differential with above-mentioned value, more promptly detect the actual value of passive element thus.
Although disclose the preferred embodiments of the present invention for ease of explanation, those skilled in the art should understand and also have various remodeling, increases and replaces.But these all do not break away from the claimed scope of spirit of the present invention and claims.
Claims (4)
1, a kind of passive element test circuit that is used for printed circuit board (PCB) comprises:
Signal input unit is used to produce the sine wave signal of preset frequency and amplitude, and sine wave signal is supplied with printed circuit board (PCB), in predetermined instant output and the synchronous sampling/maintenance clock signal of sine wave signal;
The response signal processing unit, be used to test the crest voltage of the input signal of being defeated by PCB and by the crest voltage of the response signal of PCB output, and detect at the magnitude of voltage of predetermined instant with the response signal of exporting by the magnitude of voltage of the synchronous input signal of being defeated by PCB of sampling/the maintenances clock signal of signal output unit output with from PCB; With
The steering logic unit, the magnitude of voltage that is used for the digital conversion crest voltage and exports by the response signal processing unit, and with voltage and magnitude of voltage supply personal computer (PC).
2, by the circuit of claim 1, wherein, described signal input unit comprises:
Frequency selector is used to select preset frequency;
Sine-wave generator, the signal frequency that is used for selecting by frequency selector produces the sine wave signal that predetermined amplitude and frequency are arranged;
The clock synchronization unit is used to receive the sine wave signal from sine-wave generator, and exports synchronously-square-wave signal at predetermined instant and sine wave signal;
Sampling/retentive control device, be used to regulate the output of self-clock lock unit square-wave signal width and duration and be used for output sampling/holding signal; With
Amplifier is used to amplify the sine wave signal from sine-wave generator output.
3, by the circuit of claim 1, wherein, described response signal processing unit comprises:
Current/voltage converter is used for converting the response signal from PCB output and delay to voltage;
The response signal amplifier is used to amplify the voltage that comes from current/voltage converter, and output response signal;
Input signal amplifier is used to amplify the sine wave signal from the output of signal input block.
Peak detctor is used for being received from the signal of response signal amplifier and input signal amplifier output respectively and measuring its crest voltage; With
Sampling/holding unit is used for by the synchronous output calculating voltage value by response signal amplifier and input signal amplifier of sampling/maintenance clock signal in predetermined instant and sampling/maintenance clock controller output.
4, by the circuit of claim 1, wherein, described steering logic unit comprises:
A/D converter is used for crest voltage and the magnitude of voltage of digital conversion from the output of response signal unit;
Personal computer interface is used for personal computer is supplied with in the output of A/D converter, and the output control signal;
Recording controller is used for supplying with mould/number conversion signal and done state signal by the control signal from the personal computer interface unit to A/D converter; With
Instruction control unit is used for controlling various analog-converted and relaying by the control signal of personal computer interface unit.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950032106A KR0157943B1 (en) | 1995-09-27 | 1995-09-27 | Passive parts measurement circuit in pcb |
KR32106/95 | 1995-09-27 | ||
KR32106/1995 | 1995-09-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1155082A true CN1155082A (en) | 1997-07-23 |
CN1105920C CN1105920C (en) | 2003-04-16 |
Family
ID=19427992
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN96122717A Expired - Fee Related CN1105920C (en) | 1995-09-27 | 1996-09-27 | Passive-element testing circuit for printed circuit |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2962244B2 (en) |
KR (1) | KR0157943B1 (en) |
CN (1) | CN1105920C (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103190907A (en) * | 2013-04-17 | 2013-07-10 | 深圳大学 | Impedance-analysis-based vocal cord detecting device and impedance-analysis-based signal detecting method |
CN108362993A (en) * | 2018-01-20 | 2018-08-03 | 江苏本川智能电路科技股份有限公司 | A kind of measuring device and its measurement method for multilayer wire girth sheets |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100476740B1 (en) * | 2001-06-09 | 2005-03-16 | 고윤석 | Method for testing rlc parallel circuit on the printed circuit board |
US20050060109A1 (en) * | 2003-09-17 | 2005-03-17 | Analog Devices, Inc. | Measuring circuit and a method for determining a characteristic of the impedance of a complex impedance element for facilitating characterization of the impedance thereof |
CN101226222B (en) * | 2008-02-02 | 2013-03-20 | 上海盈龙电子科技有限公司 | PCB multifunctional test system and implementing method |
JP5485618B2 (en) * | 2009-08-26 | 2014-05-07 | パナソニック株式会社 | Sensor device |
JP5431105B2 (en) * | 2009-10-15 | 2014-03-05 | 日置電機株式会社 | Four-terminal resistance measuring device |
KR101112621B1 (en) * | 2010-03-05 | 2012-02-16 | 삼성전기주식회사 | Abnormality judgment method for printed circuit board having passive component therein |
-
1995
- 1995-09-27 KR KR1019950032106A patent/KR0157943B1/en not_active IP Right Cessation
-
1996
- 1996-09-26 JP JP8273938A patent/JP2962244B2/en not_active Expired - Fee Related
- 1996-09-27 CN CN96122717A patent/CN1105920C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103190907A (en) * | 2013-04-17 | 2013-07-10 | 深圳大学 | Impedance-analysis-based vocal cord detecting device and impedance-analysis-based signal detecting method |
CN108362993A (en) * | 2018-01-20 | 2018-08-03 | 江苏本川智能电路科技股份有限公司 | A kind of measuring device and its measurement method for multilayer wire girth sheets |
Also Published As
Publication number | Publication date |
---|---|
JP2962244B2 (en) | 1999-10-12 |
CN1105920C (en) | 2003-04-16 |
KR0157943B1 (en) | 1999-03-20 |
KR970016592A (en) | 1997-04-28 |
JPH09166631A (en) | 1997-06-24 |
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