JP4227756B2 - Smoothing capacitor characteristic measurement device - Google Patents

Smoothing capacitor characteristic measurement device Download PDF

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JP4227756B2
JP4227756B2 JP2002090462A JP2002090462A JP4227756B2 JP 4227756 B2 JP4227756 B2 JP 4227756B2 JP 2002090462 A JP2002090462 A JP 2002090462A JP 2002090462 A JP2002090462 A JP 2002090462A JP 4227756 B2 JP4227756 B2 JP 4227756B2
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voltage
capacitor
current
equivalent series
measured
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JP2003287556A (en
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浩一 平沢
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Koa Corp
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Koa Corp
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Description

【0001】
【発明の属する技術分野】
本発明は、パーソナルコンピュータの電源回路等に用いられるDC/DCコンバータの平滑用コンデンサに係り、特にその等価直列抵抗、等価直列インダクタンス、等価直列静電容量を測定する測定装置及びその測定方法に関する。特に、上記諸定数を高精度で測定することが出来て、測定確度の高い測定装置に関する。
【0002】
【従来の技術】
昨今、特にノート型パーソナルコンピュータ等は、CPUチップの低電圧化が進んでいるが、直流電源からは、+10〜+15V程度の比較的高い直流電圧が供給される。このため、図1に示すように鋸歯状波電流を用いたDC/DCコンバータ11により、CPUチップ12に好適な低い直流電圧に変換して、平滑用コンデンサ13で電圧を平滑化すると共に電力を蓄積し、CPUチップ12に電力を供給している。このような用途のDC/DCコンバータ11は、低電圧大電流化が進んでおり、低損失化を図るため、平滑用コンデンサ13の低損失化が要求されている。
【0003】
DC/DCコンバータに用いられる平滑用コンデンサ13は、図2に示すように、等価直列抵抗Rs、等価直列インダクタンスLs、等価直列静電容量Cからなる等価回路で表される。従来、これらの諸定数は、LCRメータやインピーダンスアナライザによって測定されていた。しかしながら、LCRメータやインピーダンスアナライザの測定波形は正弦波であり、電流も数十mA以下と小さい。ところが、実際のDC/DCコンバータの平滑用コンデンサに流れる電流は周波数の高い鋸歯状波であり、その値も数〜数十Aに及ぶ。このため、LCRメータやインピーダンスアナライザで得られた等価直列抵抗Rs、等価直列インダクタンスLs、等価直列静電容量Cは、実使用時とは条件がはるかに異なる状態で測定されたものである。
【0004】
さらに、LCRメータやインピーダンスアナライザは正弦波の電流、電圧、位相差から等価直列抵抗、等価直列インダクタンス、等価直列静電容量を算出しているため、特にDC/DCコンバータに用いられる平滑用コンデンサでは、損失に直接影響する等価直列抵抗の測定確度が悪いという問題がある。
【0005】
【発明が解決しようとする課題】
パーソナルコンピュータ等の直流電源回路に用いられる平滑用コンデンサの等価直列抵抗、等価直列インダクタンス、等価直列静電容量を、実使用時に近い状態で高精度で測定することができる測定装置を提供することを目的とする。
【0006】
【課題を解決するための手段】
上記の課題を解決するため、本発明の測定装置は、鋸歯状波電流を発生する鋸歯状波電流源と、該鋸歯状波電流を電圧に変換し波形表示装置へ出力する電流電圧変換器と、被測定コンデンサを搭載する基板と、該被測定コンデンサの両端の電圧を増幅し波形表示装置へ出力する電圧検出器とを備え、上記鋸歯状波電流を被測定コンデンサへ導く電流パターンと被測定コンデンサの両端の電圧波形を観測または測定に導く電圧検出パターンを有し、該電圧検出パターンを介して観測されたまたは測定された電圧波形を鋸歯状波電流の上昇区間または下降区間の2等分点の時刻を中心軸とした対称成分と非対称成分に分解して、 該対称成分と非対称成分の値より、被測定コンデンサの等価直列抵抗と、等価直列インダクタンスと、等価直列静電容量とを算出することを特徴とする。
【0007】
上記電圧検出パターンの出力端に抵抗とコンデンサからなる低域フィルタを配置して、該抵抗の両端の電圧波形を出力して変化分(AC分)のみの波形を出力することが好ましい。これにより、観測・測定のダイナミックレンジを広げることができる。
【0008】
また、コンデンサの等価直列抵抗または等価直列インダクタンスまたは等価直列静電容量を測定する測定装置は、基板の表面と裏面に交差して形成された一対の導体パターンである電圧検出パターンを有し、または、基板上に形成された導体平面パターンと補正コイルから構成され、該補正コイルは上記電流パターンと磁気的に結合する位置に配置された電圧検出パターンを有し、または基板上に立体的に形成され一対の交差する構造体で構成された電圧検出パターンを有することが好ましい。これにより、等価直列インダクタンスによって発生する電圧の影響を相殺して、等価直列抵抗Rsを精度よく測定することが可能となる。
【0009】
また、上記電流電圧変換器の出力を入力とする第一のサンプルホールド回路と、該第一のサンプルホールド回路の出力を入力とする第一のA/D変換器と、上記電圧検出器の出力を入力とする第二のサンプルホールド回路と、該第二のサンプルホールド回路の出力を入力とする第二のA/D変換器とを備え、上記コンデンサの諸定数をデジタル演算により算出することが好ましい。これにより、コンデンサの等価直列抵抗または等価直列インダクタンスまたは等価直列静電容量を、デジタルで演算し自動的に求めることが可能となる。
【0010】
【発明の実施の形態】
以下、本発明の実施形態について、図3乃至図18を参照して説明する。
【0011】
本発明では、以下の原理でコンデンサの等価直列静電容量C、等価直列インダクタンスLs、等価直列抵抗Rsを測定する。まず、コンデンサに鋸歯状波電流を流した場合の端子電圧を想定する。
図3に示すように、等価直列静電容量C、等価直列インダクタンスLs、等価直列抵抗Rsの各成分に電流i(t)を供給すると、これに対応する電圧Vc(t)(Cに対応する)、VL(t)(Lsに対応する)、VR(t)(Rsに対応する)は、図4のようにそれぞれ特徴ある波形を示す。もちろん、静電容量C、等価直列インダクタンスLs、等価直列抵抗Rsは、被測定コンデンサ内にそれぞれ集中してあるわけではなく、全体に分布していると考えられるが、それぞれの成分の大小により、どのように電圧波形V(t)が変化するのかを考察する上では、分離して考えることができる。
【0012】
図4に示すように、被測定コンデンサに(1)電流波形のような鋸歯状波電流を流すと、(2)キャパシタンス成分両端電圧V(t)、(3)インダクタンス成分両端電圧VL(t)、(4)抵抗成分両端電圧VR(t)のような各成分に応じた電圧が現れる。これらの加算合計が(5)平滑コンデンサ両端電圧V(t)になる。ここで、注目すべきは、各成分がV(t)に与える波形上の特徴である。
【0013】
図4のtaは、電流i(t)が上昇から下降に転じる時刻、tbは逆に下降から上昇に転じる時刻である。tcは再び下降に転じる時刻で、定常状態ではi(ta)=i(tc)、Vc(ta)=Vc(tc)、VL(ta)=VL(tc)、VR(ta)=VR(tc)、V(ta)=V(tc)となる、また、tmはtaとtbの2等分点の時刻、tnはtbとtcの2等分点の時刻である。Vc(t)及びVL(t)はtmまたはtnを中心軸として線対称となり、VR(t)のみが非対称である。
【0014】
従って、Vc(t)、VL(t)、VR(t)の単純加算であるV(t)のtmまたはtnの非対称成分はVR(t)に起因すると考えてよい。既知の電流i(t)を被測定コンデンサに通電した場合、Vc(t)、VL(t)、VR(t)は独立して測定することはできないが、V(t)の波形を観測し、非対称性に着目して、Vc(t)、VL(t)、VR(t)の各成分に分解することが可能である。
【0015】
この原理より、各成分は下式のように算出できる。
Rsについて:
【数1】

Figure 0004227756
【0016】
Lsについて:
【数2】
Figure 0004227756
【0017】
Cについて:
【数3】
Figure 0004227756
この計算は、i(t)下降時のV(t)から各成分を算出する方法であるが、もちろん時刻tnを中心としてi(t)上昇時のV(t)から各成分を算出することも同様に可能である。
【0018】
図5は、既知の鋸歯状波電流i(t)を被測定コンデンサに流し、V(t)を測定する装置の構成を示す。これは、オシロスコープなどの波形観測機器24によりV(tm−τ)とV(tm+τ)を読み取る場合を示している。図5の電流電圧変換器23は、カレントトランス、カレントプローブ、電流検出抵抗器と差動増幅器で構成したものなどを用いる。
【0019】
この装置においては、鋸歯状波電流源21より上記鋸歯状波電流を被測定コンデンサ13に供給する。そして、その両端に生じる電圧V(t)を電圧検出器22にて検出し、波形表示装置24に入力する。また、鋸歯状波電流i(t)を上記電流電圧変換器23にて検出し、電流i(t)に比例した電圧として波形表示装置24に入力する。従って、波形表示装置24では、被測定コンデンサ13に流れる電流i(t)と、その両端に生じる電圧V(t)とを、対比して表示することができる。
【0020】
図6は、サンプリング回路を付加して、自動測定する場合の構成である。即ち、波形表示装置24に代えて、サンプルホールド回路25a,25bおよびA/Dコンバータ26a,26bおよびデジタル演算表示回路27を用いたものである。電流電圧変換器23で検出された鋸歯状波電流i(t)は、サンプルホールド回路25aによりサンプルホールドされたアナログ値がA/Dコンバータ26aによりデジタル値に変換され、デジタル演算表示回路27に入力される。また、電圧変換器22で検出された被測定コンデンサ13の両端電圧V(t)は、同様にサンプルホールド回路25bによりサンプルホールドされたアナログ値がA/Dコンバータ26bによりデジタル値に変換され、デジタル演算表示回路27に入力される。これにより、図4および上記計算式に示す、各測定値が演算表示回路27により自動的に演算して表示される。ここで、発振回路およびタイミング調整回路28は、鋸歯状波電流源21および演算表示回路27をタイミング制御する。
【0021】
図7は、このサンプリング及び演算、表示のタイミング例を示す。図示するように、電流i(t)および電圧V(t)は、時刻ta、tm、tbの近傍でサンプリングされ、図4に示すのと等価なデータがデジタル演算により得られる。
【0022】
次に、被測定コンデンサを実装して測定に供する基板上の導体パターンについて述べる。
図8は基本的な接続パターンの構成例を示す。比較的大電流で微小な直列等価抵抗Rsなどを測定するため、電流パターン31a,31bと、電圧検出パターン32a,32bを分離した4端子測定を行う必要がある。図8のRとCは被測定コンデンサ13の交流成分のみを取り出すフィルタであり、差動増幅器22を図8のように接続することにより、V(t)の交流成分のみを増幅する。これは、測定のダイナミックレンジを上げるための構成である。
等価直列インダクタンスLsを正確に測定するためには、電圧検出パターン32a,32bの間隔dは、被測定コンデンサ13の電極幅にとるのが望ましいが、後述のように等価直列インダクタンスLsが大きいと等価直列抵抗Rsの測定精度が上がらないため、等価直列抵抗Rs測定時には後述の別パターンを使用することが望ましい。
【0023】
図9は、等価直列インダクタンスLsの影響によるコンデンサ両端電圧波形例を示す。等価直列インダクタンスによる電圧は電流変化点での段差ΔVLとなって現れる。
等価直列インダクタンスLsが大きく、等価直列抵抗Rsが比較的に小さいと、図9の上段に示すように、V(tm+τ)−V(tm−τ)の値がVp-pに比較して小さくなってしまう。これに対して、等価直列インダクタンスLsが小さく、等価直列抵抗Rsが相対的に大きくなると、図9の下段に示すように、V(tm+τ)−V(tm−τ)の値がVp-pに比較して大きくなる。従って、V(t)を増幅する増幅器のダイナミックレンジを考慮すると、なるべく等価直列インダクタンスLs成分の影響を小さくしたほうが図9の下段に示すように等価直列抵抗Rsの測定精度が向上する。
【0024】
次に、等価直列インダクタンスLsの影響を低減するための電圧検出パターンの構成例について述べる。
図10は、電圧を検出する導体パターン33a,33bを回路基板の表裏面に、交差するように配置してある。電圧検出パターン33a,33bを交差させることにより、コンデンサを流れる電流変化di(t)/dtが等価直列インダクタンスLsによって発生させるVL(t)を、i(t)に磁気的に結合した電圧検出パターンに誘起する電圧で相殺することができる。
【0025】
次に、図11は交差する電圧検出パターン34a,34bを平面状ではなく立体的に構成したものである。図示するように、電圧検出導体34a,34bが三次元的に配置され、コンデンサ電極に接続された二本の導体が互いに磁気的に結合するように配置されている。図10の平面パターンより結合を上げられるので相殺の効率が高い。ただし、渦電流が発生しないように電流パターンに水平な部分はなるべく細い導体で籠状に構成するのが望ましい。
【0026】
図12は、等価直列インダクタンスLsの影響を打ち消すための補正コイル35を設けた構成例である。補正コイル35は電流パターン31a,31bを流れる電流が作る磁束と図中矢印Mで示す向きで磁気結合させる。
【0027】
図13は、補正コイル35に加え、不平衡増幅器36を用いた構成例である。この例では、電流パターン31a側のGNDと増幅器36のGNDの間のパターン抵抗が、測定すべき被測定コンデンサの等価直列抵抗Rsより十分に小さくなければならない。
【0028】
図14は、補正用コイル35の電圧を独立した差動増幅器37a,37bで増幅した後、加算器38によりV(t)と加算するものである。差動増幅器のダイナミックレンジは広くなければならないが、差動増幅器37a,37bのゲインを調節することによりΔVLの大きさが任意に決められる利点を有する。
【0029】
図15は、不平衡型の増幅器36a,36bで図14と同様の補正をかける構成である。この場合、電流パターン31a側のGNDと増幅器36bのGNDの間のパターン抵抗が、測定すべき被測定コンデンサの等価直列抵抗Rsより十分に小さくなければならない。
【0030】
次に、被測定コンデンサ13を基板に実装せずに、テストフィクスチャーを使用する場合の、電流電極について述べる。この構造は、被測定コンデンサ13の電極14a,14bにプローブ40を用いて接続するものである。電流を電極14a,14bへなるべく均一に流すため、複数のコンタクトピン(プローブ)40を用いることが望ましいが、ピン先端と電極間の接触抵抗rにぱらつきが生じると各ピンに均一の電流が流れない。そこで、図16(c)に示すように、電流プローブ40に直列に電流均一化抵抗Rを接続して電流の均一化を図ることが望ましい。電流均一化抵抗Rは接触抵抗rに対して十分大きい必要がある。
【0031】
図17は、針状の電流プローブ40の代わりに水銀などのきわめて導電性の良い液体41を使用する例である。これにより、接触電位差を極めて小さくすることが可能である。
【0032】
図18に他の実施形態の測定回路を示す。スイッチング制御回路で2つのFETを交互にON/OFFして鋸歯状波電流源21を構成し、被測定コンデンサ13に鋸歯状波電流を流す。疑似負荷44は、安定に定常電流を流す目的と、被測定コンデンサ13に直流バイアス電圧をかける目的で挿入されている。
【0033】
これまで本発明の一実施形態について説明したが、本発明は上述の実施形態に限定されず、その技術的思想の範囲内において種々異なる形態にて実施されてよいことは言うまでもない。
【0034】
【発明の効果】
本発明によれば、鋸歯状波電流を被測定コンデンサへ導く電流パターンと、これに分離して被測定コンデンサの両端の電圧波形を観測または測定に供する電圧検出パターンを設けて、観測されたまたは測定された電圧波形を対称成分と非対称成分に分解して、該成分の値よりコンデンサの等価直列抵抗または等価直列インダクタンスまたは等価直列静電容量を算出している。このことにより、実際のコンピュータ直流電源等に用いられるDC/DCコンバータと同様の動作状態での、平滑用コンデンサの等価直列抵抗、等価直列インダクタンス、等価直列静電容量の測定が可能となる。特に、損失評価に必要な等価直列抵抗の値を正確に測定できる。
【図面の簡単な説明】
【図1】CPU直流電源用DC/DCコンバータの基本回路を示す図である。
【図2】平滑コンデンサの等価回路(その1)を示す図である。
【図3】平滑コンデンサの等価回路(その2)を示す図である。
【図4】平滑コンデンサに流す鋸歯状波電流波形及び各部の電圧波形を示す図である。
【図5】本発明の実施形態の測定装置のブロック構成(波形)を示す図である。
【図6】図5の変形例の測定装置を示す図である。
【図7】サンプリングおよび演算、表示のタイミングを示す図である。
【図8】被測定コンデンサを実装した図(基本図)であり、(a)は側面図であり、(b)は上面図である。
【図9】検出された電圧波形例を示す波形図である。
【図10】等価直列抵抗Rs測定精度向上のための変形実施例を示す図で、(a)は側面図であり、(b)は上面図であり、(c)は等価回路図である。
【図11】等価直列抵抗Rs測定精度向上のための変形実施例を示す図で、(a)は側面図であり、(b)は上面図であり、(c)は等価回路図である。
【図12】等価直列抵抗Rs測定精度向上のための変形実施例を示す図で、(a)は側面図であり、(b)は上面図であり、(c)はその等価回路である。
【図13】等価直列抵抗Rs測定精度向上のための変形実施例を示す図で、(a)は側面図であり、(b)は上面図であり、(c)はその等価回路である。
【図14】等価直列抵抗Rs測定精度向上のための変形実施例を示す図で、(a)は側面図であり、(b)は上面図であり、(c)はその等価回路である。
【図15】等価直列抵抗Rs測定精度向上のための変形実施例を示す図で、(a)は側面図であり、(b)は上面図であり、(c)はその等価回路である。
【図16】デストフィクスチャを使用する場合の、電流を供給する接続構造を説明する図であり、(a)は側面図であり、(b)は上面図であり、(c)は電流均一化のため抵抗Rを接続した図である。
【図17】図16の変形例を説明する図である。
【図18】本発明の他の実施例の測定回路を示す図である。
【符号の説明】
11 DC/DCコンバータ
12 CPU
13 平滑用コンデンサ
21 鋸歯状波電流源
22 電圧検出器
23 電流電圧変換器
24 波形表示装置[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a smoothing capacitor of a DC / DC converter used in a power supply circuit of a personal computer, and more particularly to a measuring apparatus and a measuring method for measuring the equivalent series resistance, equivalent series inductance, and equivalent series capacitance. In particular, the present invention relates to a measuring apparatus that can measure the above-mentioned constants with high accuracy and has high measurement accuracy.
[0002]
[Prior art]
In recent years, especially in notebook personal computers and the like, the voltage of CPU chips has been lowered, but a relatively high DC voltage of about +10 to +15 V is supplied from a DC power supply. Therefore, as shown in FIG. 1, the DC / DC converter 11 using the sawtooth current is converted into a low DC voltage suitable for the CPU chip 12, and the voltage is smoothed and smoothed by the smoothing capacitor 13. Accumulating and supplying power to the CPU chip 12. The DC / DC converter 11 for such a use has a low voltage and a large current, and in order to reduce the loss, the smoothing capacitor 13 is required to have a low loss.
[0003]
As shown in FIG. 2, the smoothing capacitor 13 used in the DC / DC converter is represented by an equivalent circuit including an equivalent series resistance Rs, an equivalent series inductance Ls, and an equivalent series capacitance C. Conventionally, these constants have been measured by an LCR meter or an impedance analyzer. However, the measurement waveform of the LCR meter or the impedance analyzer is a sine wave, and the current is as small as several tens of mA or less. However, the current flowing through the smoothing capacitor of an actual DC / DC converter is a sawtooth wave having a high frequency, and its value ranges from several to several tens of A. For this reason, the equivalent series resistance Rs, equivalent series inductance Ls, and equivalent series capacitance C obtained with an LCR meter or an impedance analyzer are measured under conditions that are far different from those in actual use.
[0004]
Furthermore, since LCR meters and impedance analyzers calculate equivalent series resistance, equivalent series inductance, and equivalent series capacitance from sinusoidal current, voltage, and phase difference, especially with smoothing capacitors used in DC / DC converters. There is a problem that the measurement accuracy of the equivalent series resistance that directly affects the loss is poor.
[0005]
[Problems to be solved by the invention]
To provide a measuring apparatus capable of measuring the equivalent series resistance, equivalent series inductance, and equivalent series capacitance of a smoothing capacitor used in a DC power supply circuit of a personal computer or the like with high accuracy in a state close to actual use. Objective.
[0006]
[Means for Solving the Problems]
In order to solve the above problems, a measuring apparatus of the present invention includes a sawtooth wave current source that generates a sawtooth wave current, a current-voltage converter that converts the sawtooth wave current into a voltage, and outputs the voltage to a waveform display device. A current pattern for guiding the sawtooth wave current to the capacitor to be measured and a device to be measured, comprising: a substrate on which the capacitor to be measured is mounted; and a voltage detector that amplifies the voltage across the capacitor to be measured and outputs it to the waveform display device. It has a voltage detection pattern that leads to observation or measurement of the voltage waveform at both ends of the capacitor, and the voltage waveform observed or measured through the voltage detection pattern is divided into two equal parts of the rising or falling period of the sawtooth current It is broken down into a symmetric component and an asymmetric component with the time of the point as the central axis, and the equivalent series resistance, equivalent series inductance, and equivalent series capacitance of the measured capacitor are determined from the values of the symmetric component and the asymmetric component . And calculating the quantity .
[0007]
It is preferable to arrange a low-pass filter composed of a resistor and a capacitor at the output end of the voltage detection pattern, and output a voltage waveform at both ends of the resistor to output only a change (AC component) waveform. Thereby, the dynamic range of observation and measurement can be expanded.
[0008]
Further, the measuring device for measuring the equivalent series resistance or equivalent series inductance or equivalent series capacitance of the capacitor has a voltage detection pattern that is a pair of conductor patterns formed to intersect the front surface and the back surface of the substrate, or The correction coil is composed of a conductor plane pattern formed on the substrate and a correction coil, and the correction coil has a voltage detection pattern arranged at a position magnetically coupled to the current pattern, or is three-dimensionally formed on the substrate. It is preferable to have a voltage detection pattern composed of a pair of intersecting structures. Thereby, it is possible to accurately measure the equivalent series resistance Rs by canceling the influence of the voltage generated by the equivalent series inductance.
[0009]
A first sample-and-hold circuit that receives the output of the current-voltage converter; a first A / D converter that receives the output of the first sample-and-hold circuit; and an output of the voltage detector. And a second A / D converter having the output of the second sample and hold circuit as an input, and calculating the constants of the capacitor by digital calculation. preferable. As a result, the equivalent series resistance, equivalent series inductance, or equivalent series capacitance of the capacitor can be digitally calculated and automatically obtained.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 3 to 18.
[0011]
In the present invention, the equivalent series capacitance C, equivalent series inductance Ls, and equivalent series resistance Rs of the capacitor are measured according to the following principle. First, a terminal voltage when a sawtooth current is passed through a capacitor is assumed.
As shown in FIG. 3, when a current i (t) is supplied to each component of the equivalent series capacitance C, equivalent series inductance Ls, and equivalent series resistance Rs, the voltage Vc (t) (C) corresponding to this current is supplied. ), VL (t) (corresponding to Ls), and VR (t) (corresponding to Rs) indicate characteristic waveforms as shown in FIG. Of course, the capacitance C, the equivalent series inductance Ls, and the equivalent series resistance Rs are not concentrated in the capacitor to be measured, but are considered to be distributed throughout, but depending on the size of each component, In considering how the voltage waveform V (t) changes, it can be considered separately.
[0012]
As shown in FIG. 4, when a sawtooth wave current such as a current waveform is passed through a capacitor to be measured, (2) a capacitance component both-ends voltage V C (t), (3) an inductance component both-ends voltage VL (t ), (4) A voltage corresponding to each component such as a resistance component both-end voltage VR (t) appears. The sum of these becomes (5) the voltage V (t) across the smoothing capacitor. What should be noted here is the waveform feature that each component gives to V (t).
[0013]
In FIG. 4, ta is a time when the current i (t) turns from rising to falling, and tb is a time when the current i (t) turns from falling to rising. tc is the time when it starts to fall again. In a steady state, i (ta) = i (tc), Vc (ta) = Vc (tc), VL (ta) = VL (tc), VR (ta) = VR (tc ), V (ta) = V (tc), tm is the time of the bisector of ta and tb, and tn is the time of the bisector of tb and tc. Vc (t) and VL (t) are axisymmetric with respect to tm or tn as the central axis, and only VR (t) is asymmetric.
[0014]
Therefore, the asymmetric component of tm or tn of V (t), which is a simple addition of Vc (t), VL (t), and VR (t), may be attributed to VR (t). When a known current i (t) is applied to the measured capacitor, Vc (t), VL (t), and VR (t) cannot be measured independently, but the waveform of V (t) is observed. Focusing on the asymmetry, it can be decomposed into Vc (t), VL (t), and VR (t) components.
[0015]
Based on this principle, each component can be calculated as follows.
About Rs:
[Expression 1]
Figure 0004227756
[0016]
About Ls:
[Expression 2]
Figure 0004227756
[0017]
About C:
[Equation 3]
Figure 0004227756
This calculation is a method of calculating each component from V (t) when i (t) is lowered. Of course, each component is calculated from V (t) when i (t) is increased around time tn. Is possible as well.
[0018]
FIG. 5 shows a configuration of an apparatus for measuring V (t) by passing a known sawtooth wave current i (t) through a capacitor to be measured. This shows a case where V (tm−τ) and V (tm + τ) are read by a waveform observation device 24 such as an oscilloscope. The current-voltage converter 23 of FIG. 5 uses a current transformer, a current probe, a current detection resistor and a differential amplifier.
[0019]
In this apparatus, the sawtooth current is supplied from the sawtooth current source 21 to the capacitor 13 to be measured. The voltage V (t) generated at both ends is detected by the voltage detector 22 and input to the waveform display device 24. The sawtooth wave current i (t) is detected by the current-voltage converter 23 and input to the waveform display device 24 as a voltage proportional to the current i (t). Therefore, the waveform display device 24 can display the current i (t) flowing through the capacitor to be measured 13 and the voltage V (t) generated at both ends thereof in comparison.
[0020]
FIG. 6 shows a configuration in the case where a sampling circuit is added and automatic measurement is performed. That is, instead of the waveform display device 24, sample hold circuits 25a and 25b, A / D converters 26a and 26b, and a digital arithmetic display circuit 27 are used. The sawtooth wave current i (t) detected by the current-voltage converter 23 is converted into a digital value by the A / D converter 26 a after the analog value sampled and held by the sample-and-hold circuit 25 a is input to the digital arithmetic display circuit 27. Is done. Similarly, the voltage V (t) across the capacitor 13 to be measured detected by the voltage converter 22 is converted into a digital value by the analog value sampled and held by the sample and hold circuit 25b by the A / D converter 26b. It is input to the calculation display circuit 27. Thereby, each measured value shown in FIG. 4 and the above calculation formula is automatically calculated and displayed by the calculation display circuit 27. Here, the oscillation circuit and timing adjustment circuit 28 controls the timing of the sawtooth current source 21 and the calculation display circuit 27.
[0021]
FIG. 7 shows an example of timing of this sampling, calculation and display. As shown in the figure, the current i (t) and the voltage V (t) are sampled in the vicinity of the times ta, tm, and tb, and data equivalent to that shown in FIG. 4 is obtained by digital calculation.
[0022]
Next, a description will be given of a conductor pattern on a substrate to be measured by mounting a capacitor to be measured.
FIG. 8 shows a configuration example of a basic connection pattern. In order to measure a small series equivalent resistance Rs and the like with a relatively large current, it is necessary to perform four-terminal measurement in which the current patterns 31a and 31b and the voltage detection patterns 32a and 32b are separated. R and C in FIG. 8 is a filter for extracting only AC Ingredient of the measured capacitor 13, by connecting a differential amplifier 22 as shown in FIG. 8, to amplify only the AC component of V (t). This is a configuration for increasing the dynamic range of measurement.
In order to accurately measure the equivalent series inductance Ls, the distance d between the voltage detection patterns 32a and 32b is preferably set to the electrode width of the capacitor 13 to be measured, but it is equivalent if the equivalent series inductance Ls is large as will be described later. Since the measurement accuracy of the series resistance Rs does not increase, it is desirable to use another pattern described later when measuring the equivalent series resistance Rs.
[0023]
FIG. 9 shows an example of the voltage waveform across the capacitor due to the influence of the equivalent series inductance Ls. The voltage due to the equivalent series inductance appears as a step ΔVL at the current change point.
When the equivalent series inductance Ls is large and the equivalent series resistance Rs is relatively small, the value of V (tm + τ) −V (tm−τ) becomes smaller than Vp-p as shown in the upper part of FIG. End up. On the other hand, when the equivalent series inductance Ls is small and the equivalent series resistance Rs is relatively large, the value of V (tm + τ) −V (tm−τ) becomes Vp-p as shown in the lower part of FIG. It becomes large compared. Therefore, considering the dynamic range of the amplifier that amplifies V (t), the measurement accuracy of the equivalent series resistance Rs is improved as shown in the lower part of FIG. 9 if the influence of the equivalent series inductance Ls component is reduced as much as possible.
[0024]
Next, a configuration example of a voltage detection pattern for reducing the influence of the equivalent series inductance Ls will be described.
In FIG. 10, conductor patterns 33a and 33b for detecting a voltage are arranged on the front and back surfaces of the circuit board so as to intersect with each other. A voltage detection pattern in which VL (t) generated by the equivalent series inductance Ls by the current change di (t) / dt flowing through the capacitor is magnetically coupled to i (t) by intersecting the voltage detection patterns 33a and 33b. Can be canceled by the voltage induced in the.
[0025]
Next, FIG. 11 shows a configuration in which the intersecting voltage detection patterns 34a and 34b are three-dimensional rather than planar. As shown in the figure, the voltage detection conductors 34a and 34b are three-dimensionally arranged so that the two conductors connected to the capacitor electrode are magnetically coupled to each other. Since the coupling can be raised from the planar pattern of FIG. 10, the cancellation efficiency is high. However, it is desirable that the horizontal portion of the current pattern is formed in a bowl shape with as thin a conductor as possible so that eddy currents are not generated.
[0026]
FIG. 12 is a configuration example in which a correction coil 35 for canceling the influence of the equivalent series inductance Ls is provided. The correction coil 35 is magnetically coupled with the magnetic flux generated by the current flowing through the current patterns 31a and 31b in the direction indicated by the arrow M in the figure.
[0027]
FIG. 13 shows a configuration example using an unbalanced amplifier 36 in addition to the correction coil 35. In this example, the pattern resistance between the GND on the current pattern 31a side and the GND of the amplifier 36 must be sufficiently smaller than the equivalent series resistance Rs of the capacitor to be measured.
[0028]
In FIG. 14, the voltage of the correction coil 35 is amplified by independent differential amplifiers 37 a and 37 b and then added to V (t) by an adder 38. Although the dynamic range of the differential amplifier must be wide, there is an advantage that the magnitude of ΔVL can be arbitrarily determined by adjusting the gains of the differential amplifiers 37a and 37b.
[0029]
FIG. 15 shows a configuration in which the same correction as that of FIG. 14 is performed by the unbalanced amplifiers 36a and 36b. In this case, the pattern resistance between the GND on the current pattern 31a side and the GND of the amplifier 36b must be sufficiently smaller than the equivalent series resistance Rs of the capacitor to be measured.
[0030]
Next, the current electrode when the test fixture is used without mounting the measured capacitor 13 on the substrate will be described. This structure is connected to the electrodes 14 a and 14 b of the capacitor 13 to be measured using the probe 40. It is desirable to use a plurality of contact pins (probes) 40 in order to flow the current to the electrodes 14a and 14b as uniformly as possible. Absent. Therefore, as shown in FIG. 16C, it is desirable to connect the current equalizing resistor R in series with the current probe 40 to equalize the current. The current equalizing resistance R needs to be sufficiently larger than the contact resistance r.
[0031]
FIG. 17 shows an example in which a highly conductive liquid 41 such as mercury is used instead of the needle-like current probe 40. Thereby, the contact potential difference can be made extremely small.
[0032]
FIG. 18 shows a measurement circuit according to another embodiment. The sawtooth wave current source 21 is configured by alternately turning on and off the two FETs by the switching control circuit, and a sawtooth wave current is passed through the capacitor 13 to be measured. The pseudo load 44 is inserted for the purpose of flowing a steady current stably and for applying a DC bias voltage to the capacitor 13 to be measured.
[0033]
Although one embodiment of the present invention has been described so far, it is needless to say that the present invention is not limited to the above-described embodiment, and may be implemented in various forms within the scope of the technical idea.
[0034]
【The invention's effect】
According to the present invention, a current pattern for leading a sawtooth wave current to the capacitor to be measured and a voltage detection pattern for separating or observing the voltage waveform at both ends of the capacitor to be measured are provided. The measured voltage waveform is decomposed into a symmetric component and an asymmetric component, and the equivalent series resistance, equivalent series inductance, or equivalent series capacitance of the capacitor is calculated from the value of the component. This makes it possible to measure the equivalent series resistance, equivalent series inductance, and equivalent series capacitance of the smoothing capacitor in the same operating state as a DC / DC converter used in an actual computer DC power supply or the like. In particular, the value of the equivalent series resistance necessary for loss evaluation can be accurately measured.
[Brief description of the drawings]
FIG. 1 is a diagram showing a basic circuit of a DC / DC converter for CPU DC power supply.
FIG. 2 is a diagram illustrating an equivalent circuit (part 1) of a smoothing capacitor.
FIG. 3 is a diagram showing an equivalent circuit (part 2) of the smoothing capacitor.
FIG. 4 is a diagram illustrating a sawtooth current waveform flowing through a smoothing capacitor and a voltage waveform of each part.
FIG. 5 is a diagram showing a block configuration (waveform) of the measuring apparatus according to the embodiment of the present invention.
6 is a view showing a measuring apparatus according to a modification of FIG.
FIG. 7 is a diagram illustrating timings of sampling, calculation, and display.
8A and 8B are diagrams (basic view) in which a capacitor to be measured is mounted, in which FIG. 8A is a side view and FIG. 8B is a top view.
FIG. 9 is a waveform diagram showing an example of a detected voltage waveform.
10A and 10B are diagrams showing a modified embodiment for improving the measurement accuracy of the equivalent series resistance Rs, where FIG. 10A is a side view, FIG. 10B is a top view, and FIG. 10C is an equivalent circuit diagram.
11A and 11B are diagrams showing a modified embodiment for improving the measurement accuracy of the equivalent series resistance Rs, where FIG. 11A is a side view, FIG. 11B is a top view, and FIG. 11C is an equivalent circuit diagram.
12A and 12B are diagrams showing a modified embodiment for improving the measurement accuracy of the equivalent series resistance Rs, where FIG. 12A is a side view, FIG. 12B is a top view, and FIG. 12C is an equivalent circuit thereof.
13A and 13B are diagrams showing a modified embodiment for improving the measurement accuracy of the equivalent series resistance Rs, where FIG. 13A is a side view, FIG. 13B is a top view, and FIG. 13C is an equivalent circuit thereof.
14A and 14B are diagrams showing a modified embodiment for improving the measurement accuracy of the equivalent series resistance Rs, where FIG. 14A is a side view, FIG. 14B is a top view, and FIG. 14C is an equivalent circuit thereof.
FIGS. 15A and 15B are diagrams showing a modified embodiment for improving the measurement accuracy of the equivalent series resistance Rs, where FIG. 15A is a side view, FIG. 15B is a top view, and FIG. 15C is an equivalent circuit thereof.
FIGS. 16A and 16B are diagrams for explaining a connection structure for supplying a current when a destination fixture is used; FIG. 16A is a side view, FIG. 16B is a top view, and FIG. It is the figure which connected resistance R for conversion.
FIG. 17 is a diagram illustrating a modification of FIG.
FIG. 18 is a diagram showing a measurement circuit according to another embodiment of the present invention.
[Explanation of symbols]
11 DC / DC converter 12 CPU
13 Smoothing Capacitor 21 Sawtooth Wave Current Source 22 Voltage Detector 23 Current-Voltage Converter 24 Waveform Display Device

Claims (6)

鋸歯状波電流を発生する鋸歯状波電流源と、
該鋸歯状波電流を電圧に変換し波形表示装置へ出力する電流電圧変換器と、
被測定コンデンサを搭載する基板と、
該被測定コンデンサの両端の電圧を増幅し波形表示装置へ出力する電圧検出器とを備え、
上記鋸歯状波電流を被測定コンデンサへ導く電流パターンと被測定コンデンサの両端の電圧波形を観測または測定に導く電圧検出パターンを有し、
該電圧検出パターンを介して観測されたまたは測定された電圧波形を鋸歯状波電流の上昇区間または下降区間の2等分点の時刻を中心軸とした対称成分と非対称成分に分解して、
対称成分と非対称成分の値より、被測定コンデンサの等価直列抵抗と、等価直列インダクタンスと、等価直列静電容量とを算出することを特徴とする平滑用コンデンサの特性測定装置。
A sawtooth current source for generating a sawtooth current;
A current-voltage converter for converting the sawtooth current into a voltage and outputting the voltage to a waveform display device;
A substrate on which the capacitor to be measured is mounted;
A voltage detector that amplifies the voltage across the capacitor to be measured and outputs it to the waveform display device;
A current pattern that leads the sawtooth current to the capacitor to be measured and a voltage detection pattern that leads to observation or measurement of the voltage waveform at both ends of the capacitor to be measured;
The voltage waveform observed or measured via the voltage detection pattern is decomposed into a symmetric component and an asymmetric component with the time at the bisection point of the rising or falling section of the sawtooth current as the central axis ,
An apparatus for measuring characteristics of a smoothing capacitor, wherein an equivalent series resistance, an equivalent series inductance, and an equivalent series capacitance of a capacitor to be measured are calculated from the values of the symmetric component and the asymmetric component.
上記電圧検出パターンの出力端に抵抗とコンデンサからなる低域周波数成分を通過するフィルタを配置して、該抵抗の両端の電圧波形を出力することを特徴とする請求項1に記載の平滑用コンデンサの特性測定装置。The smoothing capacitor according to claim 1, wherein a filter that passes a low- frequency component composed of a resistor and a capacitor is disposed at an output end of the voltage detection pattern, and a voltage waveform at both ends of the resistor is output. Characteristic measuring device. 上記電圧検出パターンが、基板の表面と裏面に交差して形成された一対の導体パターンであることを特徴とする請求項1に記載の平滑用コンデンサの特性測定装置。  2. The smoothing capacitor characteristic measuring apparatus according to claim 1, wherein the voltage detection pattern is a pair of conductor patterns formed so as to intersect the front surface and the back surface of the substrate. 上記電圧検出パターンが、基板上に形成された導体平面パターンと補正コイルから構成され、該補正コイルは上記電流パターンと磁気的に結合する位置に配置されていることを特徴とする請求項1に記載の平滑用コンデンサの特性測定装置。  2. The voltage detection pattern includes a conductor plane pattern formed on a substrate and a correction coil, and the correction coil is disposed at a position magnetically coupled to the current pattern. The characteristic measuring apparatus of the smoothing capacitor as described. 上記電圧検出パターンが、基板上に立体的に形成された一対の交差する構造体であることを特徴とする請求項1に記載の平滑用コンデンサの特性測定装置。  2. The characteristic measuring apparatus for a smoothing capacitor according to claim 1, wherein the voltage detection pattern is a pair of intersecting structures formed three-dimensionally on a substrate. 上記電流電圧変換器の出力を入力とする第一のサンプルホールド回路と、該第一のサンプルホールド回路の出力を入力とする第一のA/D変換器と、上記電圧検出器の出力を入力とする第二のサンプルホールド回路と、該第二のサンプルホールド回路の出力を入力とする第二のA/D変換器とを備え、
上記コンデンサの諸定数をデジタル演算により算出することを特徴とする請求項1に記載の平滑用コンデンサの特性測定装置。
A first sample-and-hold circuit that receives the output of the current-voltage converter, a first A / D converter that receives the output of the first sample-and-hold circuit, and an output of the voltage detector A second sample-and-hold circuit, and a second A / D converter that receives the output of the second sample-and-hold circuit.
2. The smoothing capacitor characteristic measuring apparatus according to claim 1, wherein various constants of the capacitor are calculated by digital calculation.
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