WO2020012916A1 - 積層構造体及びその製造方法並びに半導体デバイス - Google Patents
積層構造体及びその製造方法並びに半導体デバイス Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000000956 alloy Substances 0.000 claims abstract description 181
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 171
- 239000011669 selenium Substances 0.000 claims abstract description 25
- 150000001787 chalcogens Chemical group 0.000 claims abstract description 21
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 19
- 229910052714 tellurium Inorganic materials 0.000 claims abstract description 19
- 229910052787 antimony Inorganic materials 0.000 claims abstract description 17
- 229910052717 sulfur Inorganic materials 0.000 claims abstract description 14
- 229910052711 selenium Inorganic materials 0.000 claims abstract description 13
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 claims abstract description 9
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract description 7
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 claims abstract description 5
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 claims abstract description 5
- 239000011593 sulfur Substances 0.000 claims abstract description 5
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910052797 bismuth Inorganic materials 0.000 claims abstract description 4
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 claims abstract description 4
- 239000013078 crystal Substances 0.000 claims description 22
- 238000010438 heat treatment Methods 0.000 claims description 4
- 229910052798 chalcogen Inorganic materials 0.000 claims description 3
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- 125000004429 atom Chemical group 0.000 description 131
- 229910005900 GeTe Inorganic materials 0.000 description 56
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- 238000002441 X-ray diffraction Methods 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 238000003917 TEM image Methods 0.000 description 1
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- MWRJCEDXZKNABM-UHFFFAOYSA-N germanium tungsten Chemical compound [Ge].[W] MWRJCEDXZKNABM-UHFFFAOYSA-N 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
- C01B19/00—Selenium; Tellurium; Compounds thereof
- C01B19/007—Tellurides or selenides of metals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8828—Tellurides, e.g. GeSbTe
-
- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
- C01B19/00—Selenium; Tellurium; Compounds thereof
- C01B19/04—Binary compounds including binary selenium-tellurium compounds
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/231—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
- H10N70/235—Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect between different crystalline phases, e.g. cubic and hexagonal
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8822—Sulfides, e.g. CuS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8825—Selenides, e.g. GeSe
Definitions
- the present invention relates to a laminated structure in which two alloy layers are laminated, a method of manufacturing the same, and a semiconductor device having the laminated structure.
- a ternary alloy (hereinafter, referred to as a “GST alloy”) composed of germanium (Ge) -antimony (Sb) -tellurium (Te) is used.
- a recording process called “SET” for changing the state to a crystalline phase and an erasing process called “RESET” for returning from the crystalline phase to the amorphous phase are changed by changing the intensity and application time of a current pulse.
- SET for changing the state to a crystalline phase
- REET erasing process
- a laminated structure type phase change memory using a laminated structure in which a GeTe alloy layer having a thickness of about 1 nm and an SbTe alloy layer having a thickness of 1 nm to 4 nm are alternately laminated in a crystalline state has been proposed.
- a first crystal phase having a low resistance state (SET phase) and a second crystal phase having a high resistance state (RESET phase) are generated by applying a current pulse to the laminated structure.
- the valence of Ge atoms in the GeTe alloy layer is exchanged with the position of adjacent Te atoms, so that the high-resistance state crystal phase and the low-resistance state crystal phase are exchanged, and the ON-state is changed.
- Obtaining the OFF state is the recording principle.
- the GeTe alloy layer forms an uneven atomic layer in which Ge atoms and Te atoms are alternately arranged vertically, and the thickness of the atomic layer is about 0.4 nm.
- GeTe alloy layer in which two atomic layers are stacked four types of arrangements can be taken depending on the arrangement in the thickness direction of the layers. Specifically, a Ge—Te—Ge—Te arrangement (see FIG. 1) and a reverse arrangement thereof, ie, a Te—Ge—Te—Ge arrangement (FIG. 1) ), A Ge-Te-Te-Ge sequence (see FIG. 2), and a Te-Ge-Ge-Te sequence (see FIG. 3).
- the Ge—Te—Ge—Te arrangement (see FIG. 1) can be further grown, and the number of repetitions can be increased as in Ge—Te—Ge—Te—Ge—Te.
- FIG. 1 is a schematic diagram (1) showing an example of a laminated structure in a low-resistance state
- FIG. 2 is a schematic diagram (2) showing an example of a laminated structure in a low-resistance state.
- FIG. 2 is a schematic diagram showing an example of a laminated structure in a high resistance state.
- ⁇ indicates a Te atom
- ⁇ indicates a Ge atom
- ⁇ indicates an Sb atom
- Sb 2 Te 3 alloy layer composed of a composition ratio of Sb 2 Te 3 has a particularly stable structure, configured to overlap the 5 atomic layers 1 It is known to have a layer structure of layers (see FIGS. 1 to 3). As shown in FIGS. 1 to 3, the Sb 2 Te 3 alloy layer has a Te—Sb—Te—Sb—Te arrangement in the order from the bottom surface of the layer toward the thickness direction.
- the Sb 2 Te 3 alloy layer has a hexagonal crystal structure in which Te atoms and Sb atoms in the layer are strongly bonded by covalent bonds (see Non-Patent Document 4).
- the five-atom layer that is a constituent unit of the Sb 2 Te 3 alloy layer is referred to as a QL (quintuple layer).
- the GeTe alloy layer and the Sb 2 Te 3 alloy layer constitute, for example, the laminated structure in which these layers are alternately and repeatedly laminated with the crystal axes aligned. Specifically, the ⁇ 111> crystal face of the GeTe alloy layer and the ⁇ 0001> crystal face of the Sb 2 Te 3 alloy layer are shared to form the laminated structure (see FIG. 1). Further, in the GeTe alloy layer and the Sb 2 Te 3 alloy layer, Te atoms are weakly bonded to each other by van der Waals bonds (see Patent Document 1 and Non-Patent Document 4). Analysis results by cross-sectional transmission electron micrographs have also been reported (see Non-Patent Document 5). The horizontal lines in FIGS. 1 to 3 indicate the interface where the van der Waals coupling acts, and the same applies to the subsequent drawings.
- the laminated structure is manufactured using a vacuum film forming apparatus. There is a sequence of film formation in the production, and it is necessary to form a thin Sb 2 Te 3 alloy layer on the substrate first. Further, the Sb 2 Te 3 alloy layer is preferably formed of 3QL to 5QL, and when formed in this manner, a beautiful laminated film can be obtained (see Patent Document 1). When the Sb 2 Te 3 alloy layer is formed, the terminal ends on a Te atomic surface. Therefore, when the GeTe alloy layer is successively laminated, Ge—Te—Ge is applied in the thickness direction of the layer from the Te atomic surface side.
- thermodynamic phase stability there is a phase transition temperature around 230 ° C., below which the Te—Ge—Ge—Te phase, and above that the Ge—Te—Ge— phase. It is known that the Te phase is stable. It is known that a Ge—Te—Te—Ge phase is formed in addition to a Te—Ge—Ge—Te phase from around 160 ° C. to room temperature (see Non-Patent Document 5).
- the laminated structure is manufactured from a repeating structure of these basic configurations.
- the electric resistance is high. Is as low as 1 k ⁇ to 10 k ⁇ , and when a large number of Te—Ge—Ge—Te phases (see FIG. 3) are present, it is reported that the electric resistance is as high as 1 M ⁇ to 10 M ⁇ (see Non-Patent Document 6).
- a phase change occurs between these phases, and a memory operation is realized.
- This phenomenon is necessary for the memory operation because the energy of the electron beam applied to the laminated structure was absorbed and Ge atoms and Sb atoms moved between atoms during the observation with the scanning transmission electron microscope. This means that the atomic arrangement of the laminated structure is easily destroyed by absorption of external energy.
- an object of the present invention is to provide a laminated structure having excellent atomic arrangement stability, a method for manufacturing the same, and a semiconductor device using the laminated structure.
- the present inventors have conducted intensive studies in order to solve the above problems, and obtained the following knowledge.
- the cause of the laminate structure losing the function of phase change is that Ge atoms in the GeTe alloy layer involved in the phase change diffuse toward the QL.
- a concentration gradient of Ge atoms and Sb atoms which are atoms other than Te atoms, exists at an interface between the two and is caused by the concentration gradient between the two. Since a chemical potential is generated, the Ge atom and the Sb atom tend to mutually diffuse to the side where they should not exist (see FIG. 4).
- FIG. 4 is an explanatory diagram (A) for explaining the state of mutual diffusion of Ge atoms and Sb atoms.
- (1) shows the chemical potential of Te atoms
- (2a) shows the lower side in the diagram.
- (2b) the chemical potential of the Sb atom in the QL shown in the upper part of the figure
- (3a) the chemical potential of the Ge atom in the GeTe alloy layer shown in the lower part of the figure
- (3b) shows the chemical potential of Ge atoms in the GeTe alloy layer shown in the upper part of the figure.
- the laminated structure absorbs external energy such as energy required for phase change and energy of an electron beam irradiated at the time of observation by the scanning transmission electron microscope, first, the Te-Sb in the QL Is released, and the Sb atoms in the QL diffuse into the GeTe alloy layer.
- the bond-dissociation energy between Te and Sb is about 120 kJ / mol smaller than the bond-dissociation energy between Ge and Te.
- FIG. 5 is an explanatory view (B) for explaining the interdiffusion state of Ge atoms and Sb atoms.
- (1) shows the chemical potential of Te atoms
- (2a) shows the lower side in the figure.
- (2b) is a chemical potential corresponding to Sb atoms before mutual diffusion in the QL
- (3a) is a lower potential in the figure.
- (3b) is a chemical potential corresponding to Ge atoms before mutual diffusion in the GeTe alloy layer shown in the upper part of the figure, and a chemical potential corresponding to Ge atoms before mutual diffusion in the GeTe alloy layer. The figure shows that the chemical potentials decrease as compared with before the mutual diffusion.
- Table 1 below is a table showing the bond dissociation energy between two atoms, and is based on Reference Document 1 below. Reference 1: Luo, Y.R., Comprehensive Handbook of Chemical Bond Energys, CRC Press, Boca Raton, FL, 2007.
- the bond between the S atom, which is a chalcogen atom belonging to the same group 16 as the Te atom, and the Ge atom is such that the bond dissociation energy between Ge—S is about twice as large as the bond dissociation energy between Te—Sb. High and more difficult to break than the bond between Te and Ge atoms (see Table 1 above). Also, the bond between the Se atom and the Ge atom, which are also chalcogen atoms, is harder to be broken than the bond between the Te atom and the Ge atom from the comparison of bond dissociation energies (see Table 1 above).
- FIG. 6 is an explanatory diagram (C) illustrating the state of mutual diffusion of Ge atoms and Sb atoms.
- (1) shows the chemical potential of Te atoms
- (2a) shows the lower side in the figure.
- (2b) the chemical potential of the Sb atom in the QL shown in the upper part of the figure
- (3a) the chemical potential of the Ge atom in the GeTe alloy layer shown in the lower part of the figure
- (3b) shows the chemical potential of Ge atoms in the GeTe alloy layer shown in the upper part of the figure.
- an S atom is taken as an example of an atom to be introduced, and the S atom is indicated by “ ⁇ ” in the figure.
- the bond between the Sb atom and the S atom is less likely to be broken than the bond between the Sb atom and the Te atom from the comparison of bond dissociation energies (see Table 1 above).
- the bond between the Sb atom and the Se atom is also less likely to be broken than the bond between the Sb atom and the Te atom. Therefore, when the S atom or Se atom is introduced into the QL and a part of the Te atom is replaced with the S atom or Se atom to form a Sb—S or Sb—Se bond, It is considered that the diffusion of Ge atoms in the GeTe alloy layer to the QL side is suppressed as compared with.
- the diffusion of Ge atoms in the GeTe alloy layer to the QL side is induced by the diffusion of Sb atoms in the QL to the GeTe alloy layer side, so that Sb—S or Sb—Se If the bonding suppresses the diffusion of Sb atoms in the QL to the GeTe alloy layer side, the diffusion of Ge atoms in the GeTe alloy layer to the QL side is also suppressed.
- the SbTe alloy layer has been described as an example, but the same description can be applied to a BiTe alloy layer using Bi atoms belonging to the same Group 15 as Sb atoms.
- the description has been given by taking the laminated structure phase change memory as an example, the same description can be applied to any semiconductor device that performs a device operation using the phase change of the laminated structure.
- the present invention is based on the above findings, and means for solving the above problems are as follows. That is, ⁇ 1> An alloy layer A formed mainly of germanium and tellurium, and an alloy layer B formed mainly of one of antimony and bismuth and tellurium, wherein the alloy layer A and the alloy A laminated structure, wherein at least one of the layers B contains at least one of chalcogen atoms of sulfur and selenium. ⁇ 2> The multilayer structure according to ⁇ 1>, wherein the chalcogen atom is contained in the alloy layer A. ⁇ 3> The multilayer structure according to any one of ⁇ 1> to ⁇ 2>, wherein the content of chalcogen in the alloy layer A is 0.05 at% to 10.0 at%.
- the alloy layer A has a cubic crystal structure
- the alloy layer B has a hexagonal crystal structure
- the alloy layer A has a structure in which the alloy layer A is laminated on the alloy layer B.
- ⁇ 6> The method for producing a laminated structure according to any one of ⁇ 1> to ⁇ 5>, including a step of heating each of the alloy layers A and B at a temperature of 200 ° C to 300 ° C.
- a method for manufacturing a laminated structure characterized in that: ⁇ 7> A semiconductor device comprising the laminated structure according to any one of ⁇ 1> to ⁇ 5>.
- the said problem in prior art can be solved and the laminated structure excellent in the stability of an atomic arrangement, its manufacturing method, and the semiconductor device using the said laminated structure can be provided. .
- FIG. 4 is a diagram showing an X-ray diffraction chart of each laminated structure according to Example 1 and Comparative Example 1.
- FIG. 4 is a diagram showing an X-ray diffraction chart of each laminated structure according to Example 1 and Comparative Example 1.
- FIG. 3 is a view showing an electron microscope image of the laminated structure according to Example 1.
- FIG. 9 is a view showing an electron microscope image of the laminated structure according to Comparative Example 1.
- FIG. 9 is an explanatory diagram illustrating a configuration of a semiconductor device according to a third embodiment.
- FIG. 14 is a diagram illustrating voltage-electrical resistance characteristics of each semiconductor device according to Example 3 and Comparative Example 5 from a high resistance state (RESET phase) to a low resistance state (SET phase).
- FIG. 14 is a diagram illustrating voltage-electrical resistance characteristics of each semiconductor device according to Example 3 and Comparative Example 5 from a low resistance state (SET phase) to a high resistance state (RESET phase).
- the laminated structure of the present invention has an alloy layer A and an alloy layer B.
- the alloy layer A is formed with germanium (Ge) and tellurium (Te) as main components.
- germanium (Ge) and tellurium (Te) two phases having different properties called a SET phase and a RESET phase are given to the laminated structure by an atomic arrangement of germanium atoms and tellurium atoms, and a voltage is applied to the laminated structure. This causes a phase transition between the two phases.
- the “main component” indicates an atom forming a basic unit cell of a layer, and the layer is formed of at least one of chalcogen atoms (S atom and Se atom) of sulfur and selenium. When it contains, it shows that it is the said chalcogen atom (S atom, Se atom) and the said atom which forms the said basic unit cell.
- the alloy layer A is not particularly limited, but is preferably a layer in which the crystal orientation is oriented in a fixed direction.
- the alloy layer A has a cubic crystal structure, and its (111) plane is the same as that of the alloy layer B. It is preferable that they are arranged on adjacent surfaces.
- the crystal layer has a face-centered cubic crystal structure and that the (111) plane is oriented in a plane adjacent to the alloy layer B.
- the method of forming the alloy layer A is not particularly limited and may be appropriately selected depending on the purpose. Examples thereof include a sputtering method, a molecular beam epitaxy method, an ALD (Atomic Layer Deposition) method, and a CVD (Chemical Vapor Deposition). And the like.
- the thickness of the alloy layer A is not particularly limited, but is preferably more than 0 nm and 4 nm or less. When the thickness exceeds 4 nm, independent and unique characteristics may be exhibited, which may affect the characteristics of the laminated structure.
- the alloy layer B is formed mainly of one of antimony (Sb) and bismuth (Bi) and tellurium (Te).
- the alloy layer B is not particularly limited, and includes a layer formed of SbTe or BiTe having an atomic composition ratio of 1: 1 and a layer formed with another atomic composition ratio. In view of the stability of the compound, it is preferable to be formed of any one of Sb 2 Te 3 and Bi 2 Te 3 whose atomic composition ratio is 2: 3.
- the alloy layer B is not particularly limited, but is preferably a layer in which the crystal orientation is oriented in a fixed direction. Among them, the alloy layer B has a hexagonal crystal structure and its c-axis is oriented in the stacking direction. Is more preferred. With such a crystal structure, a layer to be laminated next becomes a template for generating an orientation with this layer as a base, and a superlattice structure of these laminates is easily obtained.
- the method for forming the alloy layer B is not particularly limited and can be appropriately selected depending on the purpose. Examples thereof include a sputtering method, a molecular beam epitaxy method, an ALD method, and a CVD method.
- the thickness of the alloy layer B is not particularly limited, but is preferably 2 nm to 10 nm because a c-axis oriented crystal structure is easily obtained.
- the laminated structure is not particularly limited, but preferably has a structure in which the alloy layers A and the alloy layers B are alternately and repeatedly laminated from the viewpoint of easily causing the phase transition.
- the alloy layer A is laminated on the alloy layer B using the alloy layer B as a base layer (the lowermost layer), and the alloy layers A and It is preferable that the alloy layers B are alternately and repeatedly laminated.
- the alloy layer B is provided as the outermost layer of the multilayer structure, it functions as an antioxidant layer for the multilayer structure.
- the number of layers in the multilayer structure is not particularly limited, and may be about 10 to 50 when each of the alloy layers A and B is counted as one layer.
- an orientation control layer formed of any of germanium, silicon, tungsten, germanium-silicon, germanium-tungsten, and silicon-tungsten as a base of the laminated structure is provided.
- the laminated structure can be produced on the orientation control layer.
- At least one of the alloy layer A and the alloy layer B contains at least one of chalcogen atoms of sulfur (S) and selenium (Se).
- S sulfur
- Se selenium
- the chalcogen atoms (S atoms, Se atoms) are replaced with Te atoms in each of the alloy layers A and B. Te atoms belong to Group 16 like the chalcogen atoms (S atoms, Se atoms). However, if the amount of substitution from the Te atom to the chalcogen atom (S atom, Se atom) is too large, the properties of the laminated structure that causes the phase transition are impaired. It becomes difficult to suppress the diffusion of Ge atoms to the alloy layer B side. Therefore, the content of the chalcogen atoms is preferably 0.05 at% to 10.0 at% with respect to each of the alloy layer A and the alloy layer B.
- the chalcogen atom may be contained in at least one of the alloy layer A and the alloy layer B, but effectively prevents Ge atoms in the alloy layer A from diffusing to the alloy layer B side. From the viewpoint of suppression, it is preferably contained in the alloy layer A, and particularly preferably contained in the alloy layer A at a content of 0.05 at% to 10.0 at%.
- the method for adding the chalcogen atoms to each of the alloy layers A and B is not particularly limited, and the chalcogen atoms may be added to the material for forming the alloy layers A and B to form the alloy. Any method of forming the layer A and the alloy layer B can be used.
- the method for producing a laminated structure of the present invention is a method for producing the laminated structure of the present invention, wherein at least each of the alloy layers A and B is heated at a temperature of 200 ° C. to 300 ° C. including.
- the alloy layer A and the alloy layer B the matters described for the laminated structure including the forming method can be applied.
- each layer of the alloy layer A and the alloy layer B is heated at a temperature of 200 ° C. to 300 ° C. It is important to heat. That is, by heating at such a temperature, the laminated structure having excellent orientation can be obtained.
- a semiconductor device is configured to include the laminated structure according to the present invention.
- the laminated structure can undergo a phase transition between two phases having different characteristics called the SET phase and the RESET phase, and can be used for various devices by utilizing this phase transition phenomenon.
- the device characteristics of the original atomic arrangement can be stably exhibited.
- the semiconductor device is not particularly limited as long as it has the laminated structure.
- Japanese Patent No. 4599598, Japanese Patent No. 4621897 (Patent Document 1), Japanese Patent No. 5750791, and Japanese Patent No. 6124320 can be used.
- Example 1 First, a 200 ⁇ m-thick sapphire substrate (manufactured by Shinko Co., Ltd.) was transferred to a sputtering apparatus (manufactured by Shibaura Mechatronics, Inc., 4 EP-LL, three 3-inch targets), and a vacuum back pressure of 1.0 ⁇ 10 ⁇ 4 Pa, Sputtering was performed using a silicon material (Mitsubishi Materials Corporation, B-doped Si) as a target under the conditions of an Ar film forming gas pressure of 0.5 Pa, a temperature of 25 ° C., and an RF power of 100 W, on the sapphire substrate. An amorphous silicon layer as a base layer was formed with a thickness of 40 nm.
- a silicon material Mitsubishi Materials Corporation, B-doped Si
- the Sb 2 Te 3 alloy material manufactured by Mitsubishi Materials Corporation, purity: 99.9%
- the Sb 2 Te 3 alloy material under the conditions of maintaining a vacuum back pressure, an Ar film forming gas pressure of 0.5 Pa, a temperature of 25 ° C., and an RF power of 20 W was used as a target to form a Sb 2 Te 3 alloy layer (first layer) with a thickness of 3.0 nm on the amorphous silicon layer.
- the Sb 2 Te 3 alloy layer was crystallized by heating at 210 ° C.
- the RF power is set to 20 W
- the S atom-added GeTe alloy material (Ge 50 Te 47 S 3 , Mitsubishi Materials Sputtering using a target of purity 99.9%)
- a GeTe alloy layer (first layer) containing S atoms at a content of 3 at% with a thickness of 0.8 nm on the Sb 2 Te 3 alloy layer. And crystallized.
- the Sb 2 Te 3 alloy layer and the GeTe alloy layer are alternately formed under the same conditions as the first layer, respectively.
- the Sb 2 Te 3 alloy layer and the GeTe alloy layer were alternately laminated by 10 layers each other to form a laminated structure having a total laminated structure of 20 layers.
- the thickness of the second and subsequent layers of the Sb 2 Te 3 alloy layer was changed to 1.0 nm from 3.0 nm of the first layer. That is, in the configuration of the ten Sb 2 Te 3 alloy layers, the thickness of the first layer is 3.0 nm, and the thickness of each of the second to tenth layers is 1.0 nm.
- the GeTe alloy layer serving as the outermost layer of the multilayer structure was replaced with an Sb 2 Te 3 alloy layer as an antioxidant layer under the same conditions as the first layer. Formed on top and crystallized. As described above, the laminated structure according to Example 1 was manufactured.
- Comparative Example 1 The target material was changed from an S atom-added GeTe alloy material (Ge 50 Te 47 S 3 ) to a GeTe alloy material (Mitsubishi Materials Corp., purity 99.9%) to which S atoms were not added, and the GeTe alloy layer was formed in the same manner as in Example 1 except that the layered structure did not contain S atoms, thereby producing a multilayer structure according to Comparative Example 1.
- S atom-added GeTe alloy material Ge 50 Te 47 S 3
- GeTe alloy material Mitsubishi Materials Corp., purity 99.9%
- the multilayer structure according to Example 1 has a smaller half-width of each diffraction peak than the multilayer structure according to Comparative Example 1, and has higher crystallinity. It is confirmed. Note that the arrows shown in FIG. 7 indicate the peak shift of the diffraction peak of the multilayer structure according to Example 1 as viewed from the multilayer structure according to Comparative Example 1.
- FIG. 8 shows an electron microscope image of the laminated structure according to the first embodiment.
- a van der Waals is located between a 9-unit structural unit composed of Ge 2 Te 2 and Sb 2 Te 3 and an adjacent structural unit. The gap based on the connection (see the dark horizontal line in the figure) is clearly confirmed.
- FIG. 9 shows an electron microscope image of the laminated structure according to Comparative Example 1.
- the multilayer structure according to Comparative Example 1 in which S atoms are added and the multilayer structure according to Comparative Example 1 in which S atoms are not added, a stack having a stable atomic arrangement by adding S atoms is shown. It is confirmed that a structure can be obtained and diffusion of Ge atoms can be suppressed.
- Example 2 The target material is changed from an S atom-added GeTe alloy material (Ge 50 Te 47 S 3 ) to a Se atom added GeTe alloy material (Ge 50 Te 47 Se 3 , manufactured by Mitsubishi Materials Corporation, purity: 99.9%).
- S atom-added GeTe alloy material Ge 50 Te 47 S 3
- Se atom added GeTe alloy material Ge 50 Te 47 Se 3 , manufactured by Mitsubishi Materials Corporation, purity: 99.9%
- Example 2 When the same structural analysis as in Example 1 was performed on the laminated structure according to Example 2, the same analysis result as in Example 1 was obtained. Even when Se atoms were added instead of S atoms, It was confirmed that a laminated structure having a stable atomic arrangement was obtained and that diffusion of Ge atoms could be suppressed.
- Comparative Example 2 The target material is changed from an S atom-added GeTe alloy material (Ge 50 Te 47 S 3 ) to an Al atom-added GeTe alloy material (Ge 50 Te 47 Al 3 , manufactured by Mitsubishi Materials Corporation, purity: 99.9%).
- S atom-added GeTe alloy material Ge 50 Te 47 S 3
- Al atom-added GeTe alloy material Ga 50 Te 47 Al 3 , manufactured by Mitsubishi Materials Corporation, purity: 99.9%.
- a laminated structure according to Comparative Example 2 was manufactured in the same manner as in Example 1, except that Al atoms were added to the GeTe alloy layer.
- Example 3 The target material was changed from an S atom-added GeTe alloy material (Ge 50 Te 47 S 3 ) to a Ge atom alloy material (Mitsubishi Materials Corp., purity 99.9%) to which S atoms were not added, and sputtering was performed during sputtering.
- S atom-added GeTe alloy material Ge 50 Te 47 S 3
- Ge atom alloy material Mitsubishi Materials Corp., purity 99.9%
- Comparative Example 4 A laminated structure according to Comparative Example 4 was manufactured in the same manner as in Comparative Example 3 except that nitrogen gas was used instead of oxygen gas and N atoms were added to the GeTe alloy layer.
- Example 3 A semiconductor device according to Example 3 was manufactured according to the configuration of the semiconductor device 10 shown in FIG. Specific manufacturing conditions will be described below.
- FIG. 10 is an explanatory diagram illustrating the configuration of the semiconductor device according to the third embodiment.
- the structure on the bottom surface side of the laminated structure 18 a structure in which a lower electrode in which a W layer 13 and a TiN layer 14 were laminated in this order on an SiO 2 layer 12 on a silicon substrate 11 was used. Note that the diameter of the TiN layer 14 is 90 nm.
- the first Sb 2 Te 3 alloy layer in the multilayer structure according to Example 1 was changed.
- the underlayer 15 made of the Sb 2 Te 3 alloy was formed according to the method described in the above.
- a GeTe alloy layer 16 was formed on the underlayer 15 according to the first GeTe alloy layer in the multilayer structure according to the first embodiment.
- Sb was formed according to the second Sb 2 Te 3 alloy layer in the multilayer structure according to the first embodiment. to form a 2 Te 3 alloy layer 17.
- the GeTe alloy layers 16 and the Sb 2 Te 3 alloy layers 17 are alternately and repeatedly laminated, and the GeTe alloy layers 16 and the Sb 2 Te 3 alloy layers 17 are alternately laminated by eight layers each.
- a laminated structure 18 having a 17-layer laminated structure was produced.
- sputtering is performed using Ti and N as targets (composition ratio: 1: 1) using the sputtering apparatus, and a TiN layer 19 is formed on the Sb 2 Te 3 alloy layer 17 constituting the outermost layer of the multilayer structure 18. Was formed. This TiN layer 19 forms an upper electrode.
- S atoms are added to each GeTe alloy layer 16 at a concentration of 3 at%.
- Comparative Example 5 A semiconductor device according to Comparative Example 5 was manufactured in the same manner as in Example 3 except that each GeTe alloy layer 16 was formed according to the GeTe layer in the multilayer structure according to Comparative Example 1 in which S atoms were not added. did.
- FIG. 11 shows the voltage-electrical resistance characteristics of each semiconductor device according to Example 3 and Comparative Example 5 from the high resistance state (RESET phase) to the low resistance state (SET phase).
- FIG. 12 shows the voltage-electrical resistance characteristics of each semiconductor device according to Example 3 and Comparative Example 5 from the low resistance state (SET phase) to the high resistance state (RESET phase).
- the voltage-electrical resistance characteristic when changing the phase from the high resistance state (RESET phase) to the low resistance state (SET phase) is between the two semiconductor devices according to Example 3 and Comparative Example 5. , There is no significant difference.
- the voltage-electrical resistance characteristics when the phase is changed from the high resistance state (RESET phase) to the low resistance state (SET phase) are as shown in FIG.
- the phase change can be performed at a voltage value that is 39% lower than that of the semiconductor device according to the comparative example 5.
- the semiconductor device according to the third embodiment can change the phase at a current value that is 27% lower than that of the semiconductor device according to the comparative example 5.
- the semiconductor device even if external energy necessary for a memory operation is applied, the original atomic arrangement of Sb atoms and Ge atoms is stably maintained by the addition of S atoms. Is suppressed, and the inherent device characteristics (phase change characteristics) can be exhibited and maintained.
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Abstract
Description
しかし、前記消去過程では、前記アモルファス相を形成するため、一旦、前記GST合金に融点以上の温度を発生させる大電流を注入する必要があり、省電力の観点から問題があった(非特許文献1,2参照)。
この提案によれば、低抵抗状態を持つ第一の結晶相(SET相)と高抵抗状態を持つ第二の結晶相(RESET相)とを電流パルスを前記積層構造体に加えることで発生させ、構成合金の融点を経ることなく融点未満の温度で結晶-結晶間相転移を実現することで、従来比で1/10以下の省電力化が達成される。
前記積層構造型相変化メモリでは、GeTe合金層にあるGe原子の原子価を隣接するTe原子の位置と交換することで、高抵抗状態結晶相と低抵抗状態結晶相とを往来させ、ON-OFF状態を得ることを記録原理とする。
前記GeTe合金層は、Ge原子とTe原子とが上下交互に配置された凸凹状の原子層を形成しており、前記原子層一層の厚みは、約0.4nmである。
この原子層が二枚重ねられた状態の前記GeTe合金層では、層の厚み方向での配列の仕方により、4通りの配列をとり得る。具体的には、層の底面側から厚み方向に向けた順で、Ge-Te-Ge-Te配列(図1参照)と、その逆配列であるTe-Ge-Te-Ge配列(図1中の両矢印参照)と、Ge-Te-Te-Ge配列(図2参照)と、Te-Ge-Ge-Te配列(図3参照)との4通りの配列が存在する。特に、Ge-Te-Ge-Te配列(図1参照)は、更に成長が可能で、Ge-Te-Ge-Te-Ge-Te・・・のように繰返し数を増やすことができ、その結晶構造は、立方晶である(非特許文献4参照)。
なお、図1は、低抵抗状態の積層構造体の例を示す模式図(1)であり、図2は、低抵抗状態の積層構造体の例を示す模式図(2)であり、図3は、高抵抗状態の積層構造体の例を示す模式図である。各図中、「◆」は、Te原子を示し、「▼」は、Ge原子を示し、「▲」は、Sb原子を示しており、以降の図においても同様である。
前記Sb2Te3合金層は、図1~図3に示すように、層の底面側から厚み方向に向けた順で、Te-Sb-Te-Sb-Te配列を持つ。また、前記Sb2Te3合金層は、層内のTe原子とSb原子とが共有結合によって強く結合し、六方晶の結晶構造を持つ(非特許文献4参照)。
なお、以下では、前記Sb2Te3合金層の構成単位となる前記5原子層のことをQL(quintuple layer)と称する。
また、前記GeTe合金層と前記Sb2Te3合金層とでは、Te原子同士がファンデルワールス結合によって弱く結合し(特許文献1、非特許文献4参照)、実際に作製した前記積層構造体に対する断面透過電子顕微鏡写真による解析結果も報告されている(非特許文献5参照)。
なお、図1~3中の横線は、前記ファンデルワールス結合が作用する界面を示しており、以降の図においても同様である。
作製には成膜の順番があり、基板に対して先に前記Sb2Te3合金層を薄く成膜する必要がある。また、このSb2Te3合金層としては、3QL~5QLで形成することが好ましく、このように形成すると綺麗な積層膜を得ることができる(特許文献1参照)。
前記Sb2Te3合金層を形成すると、終端がTe原子面となるため、引き続き、前記GeTe合金層を積層する場合、前記Te原子面側から層の厚み方向に向けて、Ge-Te-Ge-Te配列、Te-Ge-Te-Ge配列、Ge-Te-Te-Ge配列及びTe-Ge-Ge-Te配列の原子層が形成される。熱力学的な相の安定性を計算すると、約230℃付近に相転移温度が存在し、それ以下の温度でTe-Ge-Ge-Te相が、それ以上の温度でGe-Te-Ge-Te相が安定であることが知られている。また、160℃付近から室温まではTe-Ge-Ge-Te相の他にGe-Te-Te-Ge相が生成することが知られている(非特許文献5参照)。
前記積層構造体は、これらの基本構成の繰り返し構造から作製される。
前記積層構造型相変化メモリでは、これらの相の間で相変化を生じさせ、メモリ動作が実現される。
先ず、原子レベルで解析が可能な高解像の走査型透過電子顕微鏡を用いた解析結果として、前記QLと前記GeTe合金層との間で相互拡散が発生し、本来Ge原子が存在しなければならない位置に多数のSb原子が置き換わった構造配列が観察されることが報告されている(非特許文献7参照)。置換されたSb原子は、メモリ動作に必要な前記相変化に関与しないことから、Sb原子への置換により前記GeTe合金層からGe原子の数が減少すると、前記相変化による電気抵抗の変化が次第に小さくなり、メモリ動作が実行できなくなる。
次に、Ge2Te2層とSb2Te3層とを繰り返し積層した積層構造体を高解像度の走査型透過電子顕微鏡で観察すると、一部のGe原子が本来存在すべき場所と異なる場所に移動し、Ge原子の正確な位置情報が得られないことが報告されている(非特許文献8参照)。この現象は、前記走査型透過電子顕微鏡による観察の際、前記積層構造体に照射された電子ビームのエネルギーを吸収してGe原子及びSb原子が原子間移動したことに起因し、メモリ動作に必要な前記積層構造体の原子配列が外部エネルギーの吸収により崩れ易いことを意味している。
前記積層構造体が相変化の機能を失う原因は、相変化に関与する前記GeTe合金層中のGe原子が前記QL側に拡散することにある。
前記積層構造体メモリにおける前記GeTe合金層と前記QL間では、Te原子以外の原子であるGe原子及びSb原子の濃度勾配が両者の界面を境にして存在し、両者間で濃度勾配に起因する化学ポテンシャルが生じるため、Ge原子及びSb原子の各原子が本来存在すべきでない側に相互拡散し易い状況にある(図4参照)。
なお、図4は、Ge原子及びSb原子の相互拡散状況を説明する説明図(A)であり、図中、(1)がTe原子の化学ポテンシャル、(2a)が図中下側に示される前記QLにおけるSb原子の化学ポテンシャル、(2b)が図中上側に示される前記QLにおけるSb原子の化学ポテンシャル、(3a)が図中下側に示される前記GeTe合金層におけるGe原子の化学ポテンシャル、(3b)が図中上側に示される前記GeTe合金層におけるGe原子の化学ポテンシャルを示している。
前記QL中のSb原子が前記GeTe合金層に拡散すると、この拡散に誘起される形で前記GeTe合金層中のGe-Te間の結合が解かれ、前記GeTe合金層中のGe原子が前記QLに拡散する。濃度勾配の低下に伴う前記QL中のSb原子の化学ポテンシャルの低下に誘起される形で、前記GeTe合金層中の相互拡散前のGe原子に相当する化学ポテンシャルが下がり、前記積層構造体全体の系の自由エネルギーをより低い状態に保持しようとする作用が働くためである。
その結果、前記GeTe合金層と前記QL間で、相互拡散に伴うSb原子とGe原子との置換が生じることとなる(図5参照)。
また、Sb原子及びGe原子の相互拡散に伴い、Te原子間の界面に生じていたファンデルワールス結合(図1~図3参照)による弱い結合に基づくTe原子間の隙間が消失する(図5参照)。
なお、図5は、Ge原子及びSb原子の相互拡散状況を説明する説明図(B)であり、図中、(1)がTe原子の化学ポテンシャル、(2a)が図中下側に示される前記QLにおける相互拡散前のSb原子に相当する化学ポテンシャル、(2b)が図中上側に示される前記QLにおける相互拡散前のSb原子に相当する化学ポテンシャル、(3a)が図中下側に示される前記GeTe合金層における相互拡散前のGe原子に相当する化学ポテンシャル、(3b)が図中上側に示される前記GeTe合金層における相互拡散前のGe原子に相当する化学ポテンシャルであり、濃度勾配の低下に伴い、相互拡散前に比べて、各化学ポテンシャルが低下する様子を示している。
また、下記表1は、二原子間の結合解離エネルギーを示す表であり、下記参考文献1に基づく。
参考文献1:Luo, Y . R ., Comprehensive Handbook of Chemical Bond Energies, CRC Press, Boca Raton, FL, 2007.
したがって、S原子やSe原子を前記GeTe合金層に導入して、Te原子の一部をS原子やSe原子で置換し、Ge-SやGe-Seの結合を形成すれば、置換しない場合と比べて、Ge原子の前記QL側への拡散を抑制することができると考えられる。即ち、Ge-S間及びGe-Se間の強い結合に基づき、Ge原子及びSb原子の高い濃度勾配が維持されることで、Ge原子の前記QL側への拡散が抑制されることとなる(図6参照)。
なお、図6は、Ge原子及びSb原子の相互拡散状況を説明する説明図(C)であり、図中、(1)がTe原子の化学ポテンシャル、(2a)が図中下側に示される前記QLにおけるSb原子の化学ポテンシャル、(2b)が図中上側に示される前記QLにおけるSb原子の化学ポテンシャル、(3a)が図中下側に示される前記GeTe合金層におけるGe原子の化学ポテンシャル、(3b)が図中上側に示される前記GeTe合金層におけるGe原子の化学ポテンシャルを示している。また、導入する原子としてS原子を例とし、図中、S原子を「■」で示している。
よって、S原子やSe原子を前記QLの方に導入して、Te原子の一部をS原子やSe原子で置換し、Sb-SやSb-Seの結合を形成した場合も、置換しない場合と比べて、前記GeTe合金層中のGe原子の前記QL側への拡散が抑制されると考えられる。
即ち、前記GeTe合金層中のGe原子の前記QL側への拡散は、前記QL中のSb原子が前記GeTe合金層側に拡散することにより誘起されることから、Sb-SやSb-Seの結合により前記QL中のSb原子が前記GeTe合金層側へ拡散することを抑制すれば、併せて、前記GeTe合金層中のGe原子の前記QL側への拡散も抑制されることとなる。
また、前記積層構造体相変化メモリを例に挙げて説明をしたが、前記積層構造体の相変化を利用してデバイス動作させる半導体デバイスであれば、同様の説明を適用することができる。
<1> ゲルマニウムとテルルとを主成分として形成される合金層Aと、アンチモン及びビスマスのいずれかとテルルとを主成分として形成される合金層Bと、を有し、前記合金層A及び前記合金層Bの少なくともいずれかの層に硫黄及びセレンの少なくともいずれかのカルコゲン原子が含まれることを特徴とする積層構造体。
<2> カルコゲン原子が合金層Aに含まれる前記<1>に記載の積層構造体。
<3> 合金層Aにおけるカルコゲンの含有量が0.05at%~10.0at%である前記<1>から<2>のいずれかに記載の積層構造体。
<4> 合金層Aと合金層Bとが交互に繰返し積層される構造を有する前記<1>から<3>のいずれかに記載の積層構造体。
<5> 合金層Aが立方晶の結晶構造を有するとともに合金層Bが六方晶の結晶構造を有し、前記合金層B上に前記合金層Aが積層された構造を有し、前記合金層Bのc軸が積層方向に配向され、前記合金層Aの(111)面が前記合金層Bとの隣接面に配向される前記<1>から<4>のいずれかに記載の積層構造体。
<6> 前記<1>から<5>のいずれかに記載の積層構造体の製造方法であって、合金層A及び合金層Bの各層を200℃~300℃の温度で加熱する工程を含むことを特徴とする積層構造体の製造方法。
<7> 前記<1>から<5>のいずれかに記載の積層構造体を有して構成されることを特徴とする半導体デバイス。
本発明の積層構造体は、合金層Aと、合金層Bとを有する。
前記合金層Aは、ゲルマニウム(Ge)とテルル(Te)とを主成分として形成される。
前記合金層Aでは、ゲルマニウム原子とテルル原子との原子配列により、前記積層構造体に対して、SET相及びRESET相と呼ばれる特性の異なる二つの相を付与し、前記積層構造体に電圧を印加することで、二つの相間で相転移を生じさせる。
なお、本明細書において「主成分」とは、層の基本単位格子を形成する原子であることを示し、また、前記層が硫黄及びセレンの少なくともいずれかのカルコゲン原子(S原子、Se原子)を含む場合、前記カルコゲン原子(S原子、Se原子)と前記基本単位格子を形成する前記原子であることを示す。
このような結晶構造を有すると、その次に積層される層が、この層を下地として配向を生み出すテンプレートとなって、これら積層体の超格子構造が得られやすい。
前記合金層Aの厚みとしては、特に制限はないが、0nmを超え4nm以下であることが好ましい。前記厚みが4nmを超えると、独立した固有の特性を示すことがあり、前記積層構造体の特性に影響を及ぼすことがある。
前記合金層Bは、アンチモン(Sb)及びビスマス(Bi)のいずれかとテルル(Te)とを主成分として形成される。
前記合金層Bとしては、特に制限はなく、原子組成比が1:1とされるSbTeやBiTeで形成される層やこの他の原子組成比で形成される層を含むが、中でも、原子配列の安定性の観点から、原子組成比が2:3とされるSb2Te3及びBi2Te3のいずれかにより形成されることが好ましい。
このような結晶構造を有すると、その次に積層される層が、この層を下地として配向を生み出すテンプレートとなって、これら積層体の超格子構造が得られやすい。
また、前記合金層Bの厚みとしては、特に制限はないが、c軸配向の結晶構造が得られ易いことから、2nm~10nmであることが好ましい。
この場合、前記積層構造体に配向性を付与する観点から、前記合金層Bを下地層(最下層)として前記合金層B上に前記合金層Aを積層させ、この順で前記合金層A及び前記合金層Bとが交互に繰返し積層されることが好ましい。また、前記積層構造体の最表層として、前記合金層Bを配すると前記積層構造体に対する酸化防止層として機能する。
また、前記積層構造体における積層数としては、特に制限はなく、前記合金層A及び前記合金層Bの各層を1層と計数したときに、10層~50層程度とすればよい。
前記積層構造体では、前記合金層A及び前記合金層Bの少なくともいずれかの層に硫黄(S)及びセレン(Se)の少なくともいずれかのカルコゲン原子が含まれる。
前記カルコゲン原子を含むことで前記合金層A中のGe原子が前記合金層B側に拡散することを抑制することができ、延いては、Ge原子及びTe原子の原子配列に基づく前記合金層Aの相変化を安定化させることができる。
しかしながら、Te原子から前記カルコゲン原子(S原子,Se原子)への置換量が多すぎると、前記相転移を生じさせる前記積層構造体の特性が損なわれ、少なすぎると、前記合金層A中のGe原子が前記合金層B側に拡散することを抑制しにくくなる。
したがって、前記カルコゲン原子の含有量としては、前記合金層A及び前記合金層Bの各層に対して、0.05at%~10.0at%であることが好ましい。
本発明の積層構造体の製造方法は、本発明の前記積層構造体を製造する方法であり、少なくとも、前記合金層A及び前記合金層Bの各層を200℃~300℃の温度で加熱する工程を含む。
前記合金層A及び前記合金層Bとしては、形成方法を含め、前記積層構造体について説明した事項を適用できるが、前記合金層A及び前記合金層Bの各層を200℃~300℃の温度で加熱することが肝要である。
即ち、このような温度で加熱を行うことで、優れた配向性を持つ前記積層構造体が得られる。
本発明の半導体デバイスは、本発明の前記積層構造体を有して構成される。
前記積層構造体は、前記SET相及び前記RESET相と呼ばれる特性の異なる二つの相間で相転移させることができ、この相転移現象を利用して種々のデバイスに利用することができる。特に、前記カルコゲン原子を含むことで本来の原子配列が持つデバイス特性を安定して発揮させることができる。
前記半導体デバイスとしては、前記積層構造体を有するものであれば特に制限はなく、例えば、特許第4599598号公報、特許第4621897号公報(特許文献1)、特許第5750791号公報、特許第6124320号公報、特許第6238495号公報、国際公開第2016/147802号公報等に開示される公知の相変化デバイスやスピン電子デバイスを挙げることができる。
(実施例1)
先ず、スパッタリング装置(芝浦メカトロニクス社製、4EP-LL、3インチターゲットを3個搭載)に厚みが200μmのサファイヤ基板(信光社製)を移し、真空背圧を1.0×10-4Pa、Arの成膜ガス圧0.5Pa、温度を25℃、RFパワーを100Wとする条件下でシリコン材(三菱マテリアル社製、BドープSi)をターゲットに用いたスパッタリングを行い、前記サファイヤ基板上に下地層としてのアモルファスシリコン層を40nmの厚みで形成した。
最後に、厚みを3.0nmから5.0nmに変更したこと以外は、一層目と同じ条件で酸化防止層としてのSb2Te3合金層を前記積層構造体の最表層となる前記GeTe合金層上に形成するとともに結晶化させた。
以上により、実施例1に係る積層構造体を製造した。
ターゲット材を、S原子添加GeTe合金材(Ge50Te47S3)から、S原子が添加されていないGeTe合金材(三菱マテリアル社製、純度99.9%)に変更し、前記GeTe合金層をS原子を含まない形で形成したこと以外は、実施例1と同様にして、比較例1に係る積層構造体を製造した。
X線回折装置(リガク社製、SmartLab)を用いて実施例1及び比較例1に係る各積層構造体のX線解析を2シータ/オメガ法で行った。
図7に実施例1及び比較例1に係る各積層構造体のX線回折チャートを示す。
また、図7に示す(003)、(006)、(009)、(0012)、(0015)及び(0018)の各回折ピークにおける半値幅(FWHM)を下記表2に示す。
なお、図7中に示す矢印は、比較例1に係る積層構造体からみた実施例1に係る積層構造体の回折ピークのピークシフトを示している。
先ず、図8に実施例1に係る積層構造体の電子顕微鏡像を示す。
図8に示されるように、実施例1に係る積層構造体では、Ge2Te2とSb2Te3とで構成される9原子の構造単位と、隣接する前記構造単位の間にファンデルワールス結合に基づく隙間(図中、暗色の横ライン参照)が明確に確認される。
更に、実施例1に係る積層構造体の一部をエネルギー分散型X線アナライザを用いて元素マッピングすると、Te-Sb-Te-Sb-Teからなる5原子層の上にGe-Te-Ge-Teの層が積層されていることが確認でき、この様子は、図1に示す原子配列モデルとよく一致した。即ち、外部エネルギーを付加して行う構造観察を実施しても、S原子が添加されることで、Ge原子及びSb原子の相互拡散が抑制された本来の原子配列が維持される。
図9に示されるように、比較例1に係る積層構造体では、Ge原子及びSb原子が相互拡散して一様な合金となっていることが確認される。
以上のS原子が添加された実施例1に係る積層構造体とS原子が添加されない比較例1に係る積層構造体との比較から、S原子を添加することで安定的な原子配列を持つ積層構造体が得られ、Ge原子の拡散を抑制することができることが確認される。
ターゲット材を、S原子添加GeTe合金材(Ge50Te47S3)から、Se原子添加GeTe合金材(Ge50Te47Se3、三菱マテリアル社製、純度99.9%)に変更することで、前記GeTe合金層にSe原子を添加したこと以外は、実施例1と同様にして、実施例2に係る積層構造体を製造した。
ターゲット材を、S原子添加GeTe合金材(Ge50Te47S3)から、Al原子添加GeTe合金材(Ge50Te47Al3、三菱マテリアル社製、純度99.9%)に変更することで、前記GeTe合金層にAl原子を添加したこと以外は、実施例1と同様にして、比較例2に係る積層構造体を製造した。
ターゲット材を、S原子添加GeTe合金材(Ge50Te47S3)から、S原子が添加されていないGeTe合金材(三菱マテリアル社製、純度99.9%)に変更するとともに、スパッタリング時にスパッタリングガス(Arガス)に酸素ガスを10:1(Arガス:酸素ガス)のガス流量比で添加し、前記GeTe合金層にO原子を添加したこと以外は、実施例1と同様にして、比較例3に係る積層構造体を製造した。
酸素ガスに代えて窒素ガスを用い、前記GeTe合金層にN原子を添加したこと以外は、比較例3と同様にして、比較例4に係る積層構造体を製造した。
(実施例3)
図10に示す半導体デバイス10の構成に従って実施例3に係る半導体デバイスを製造した。具体的な製造条件を以下説明する。なお、図10は、実施例3に係る半導体デバイスの構成を説明する説明図である。
次に、下地層15上に実施例1に係る積層構造体における一層目の前記GeTe合金層に準じてGeTe合金層16を形成した。
次に、GeTe合金層16上に、厚みを1.0nmから4.0nmに変更したこと以外は、実施例1に係る積層構造体における二層目の前記Sb2Te3合金層に準じてSb2Te3合金層17を形成した。
更に、これらGeTe合金層16及びSb2Te3合金層17を交互に繰返し積層し、GeTe合金層16とSb2Te3合金層17とが交互に8層ずつ積層され、下地層15を含め合計17層の積層構造を持つ積層構造体18を作製した。
最後に、前記スパッタリング装置を用いてTiとNをターゲット(組成比1:1)とするスパッタリングを行い、積層構造体18の最表層を構成するSb2Te3合金層17上に、TiN層19を形成した。このTiN層19は、上部電極を構成する。
以上により、実施例3に係る半導体デバイスを製造した。この実施例3に係る半導体デバイスでは、各GeTe合金層16中にS原子が3at%の濃度で添加される。
各GeTe合金層16を、S原子を添加しない比較例1に係る積層構造体における前記GeTe層に準じて形成したこと以外は、実施例3と同様にして、比較例5に係る半導体デバイスを製造した。
実施例3及び比較例5に係る各半導体デバイスに外部電源を接続し、前記上部電極-前記下部電極間に電圧を加え、デバイス特性の測定を行った。
図11に高抵抗状態(RESET相)から低抵抗状態(SET相)に至る実施例3及び比較例5に係る各半導体デバイスの電圧-電気抵抗特性を示す。
また、図12に低抵抗状態(SET相)から高抵抗状態(RESET相)に至る実施例3及び比較例5に係る各半導体デバイスの電圧-電気抵抗特性を示す。
図11に示されるように、高抵抗状態(RESET相)から低抵抗状態(SET相)に相変化させる際の電圧-電気抵抗特性は、実施例3及び比較例5に係る両半導体デバイス間で、大きな差がないことが確認される。
一方、高抵抗状態(RESET相)から低抵抗状態(SET相)に相変化させる際の電圧-電気抵抗特性は、図12に示されるように、実施例3及び比較例5に係る両半導体デバイス間で、大きな差が確認された。
即ち、実施例3に係る半導体デバイスでは、比較例5に係る半導体デバイスと比較して39%も低い電圧値で相変化させることができている。
また、図示しないものの、実施例3に係る半導体デバイスでは、比較例5に係る半導体デバイスと比較して27%も低い電流値で相変化させることができている。
したがって、実施例3に係る半導体デバイスでは、メモリ動作に必要な外部エネルギーを加えても、S原子の添加によりSb原子及びGe原子の本来の原子配列が安定的に維持されることから、Ge原子の拡散が抑制され、延いては、本来的に有するデバイス特性(相変化特性)を発揮、維持することができる。
11 シリコン基板
12 SiO2層
13 W層
14,19 TiN層
15 下地層
16 GeTe合金層
17 Sb2Te3合金層
18 積層構造体
Claims (7)
- ゲルマニウムとテルルとを主成分として形成される合金層Aと、
アンチモン及びビスマスのいずれかとテルルとを主成分として形成される合金層Bと、を有し、
前記合金層A及び前記合金層Bの少なくともいずれかの層に硫黄及びセレンの少なくともいずれかのカルコゲン原子が含まれることを特徴とする積層構造体。 - カルコゲン原子が合金層Aに含まれる請求項1に記載の積層構造体。
- 合金層Aにおけるカルコゲンの含有量が0.05at%~10.0at%である請求項1から2のいずれかに記載の積層構造体。
- 合金層Aと合金層Bとが交互に繰返し積層される構造を有する請求項1から3のいずれかに記載の積層構造体。
- 合金層Aが立方晶の結晶構造を有するとともに合金層Bが六方晶の結晶構造を有し、前記合金層B上に前記合金層Aが積層された構造を有し、前記合金層Bのc軸が積層方向に配向され、前記合金層Aの(111)面が前記合金層Bとの隣接面に配向される請求項1から4のいずれかに記載の積層構造体。
- 請求項1から5のいずれかに記載の積層構造体の製造方法であって、
合金層A及び合金層Bの各層を200℃~300℃の温度で加熱する工程を含むことを特徴とする積層構造体の製造方法。 - 請求項1から5のいずれかに記載の積層構造体を有して構成されることを特徴とする半導体デバイス。
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023062918A1 (ja) | 2021-10-15 | 2023-04-20 | 国立研究開発法人産業技術総合研究所 | 結晶化積層構造体の製造方法 |
US12029145B2 (en) | 2020-05-29 | 2024-07-02 | Kioxia Corporation | Memory device |
Families Citing this family (1)
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---|---|---|---|---|
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Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5750791B1 (ja) | 1971-05-11 | 1982-10-28 | ||
JPS6124320B2 (ja) | 1979-03-15 | 1986-06-10 | Shin Meiwa Ind Co Ltd | |
JPS6238495B2 (ja) | 1978-10-06 | 1987-08-18 | Komatsu Mfg Co Ltd | |
JP4599598B2 (ja) | 2009-03-04 | 2010-12-15 | 独立行政法人産業技術総合研究所 | 固体メモリ |
JP2010287744A (ja) * | 2009-06-11 | 2010-12-24 | Elpida Memory Inc | 固体メモリ、データ処理システム及びデータ処理装置 |
JP4621897B2 (ja) | 2007-08-31 | 2011-01-26 | 独立行政法人産業技術総合研究所 | 固体メモリ |
JP2013051245A (ja) * | 2011-08-30 | 2013-03-14 | Elpida Memory Inc | 結晶性化合物及びこれを用いた可変抵抗素子並びに電子デバイス |
JP2016111219A (ja) * | 2014-12-08 | 2016-06-20 | 公立大学法人大阪府立大学 | 光伝導素子、テラヘルツ波発生装置、テラヘルツ波検出装置、テラヘルツ波発生方法およびテラヘルツ波検出方法 |
WO2016147802A1 (ja) | 2015-03-16 | 2016-09-22 | 国立研究開発法人産業技術総合研究所 | マルチフェロイック素子の初期化方法 |
JP2017143153A (ja) * | 2016-02-09 | 2017-08-17 | 株式会社東芝 | 超格子メモリ及びクロスポイント型メモリ装置 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101150994B1 (ko) | 2004-11-11 | 2012-06-01 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체장치 |
US7750333B2 (en) | 2006-06-28 | 2010-07-06 | Intel Corporation | Bit-erasing architecture for seek-scan probe (SSP) memory storage |
US9984745B2 (en) | 2013-11-15 | 2018-05-29 | National Institute Of Advanced Industrial Science And Technology | Spin electronic memory, information recording method and information reproducing method |
JP6162031B2 (ja) * | 2013-11-26 | 2017-07-12 | 株式会社日立製作所 | 相変化メモリおよび半導体記録再生装置 |
KR102297252B1 (ko) * | 2014-01-17 | 2021-09-03 | 소니 세미컨덕터 솔루션즈 가부시키가이샤 | 스위치 소자 및 기억 장치 |
KR101882604B1 (ko) * | 2014-05-12 | 2018-08-24 | 내셔날 인스티튜트 오브 어드밴스드 인더스트리얼 사이언스 앤드 테크놀로지 | 결정 배향층 적층 구조체, 전자 메모리 및 결정 배향층 적층 구조체의 제조 방법 |
JP6567441B2 (ja) * | 2016-02-09 | 2019-08-28 | 株式会社東芝 | 超格子メモリ及びクロスポイント型メモリ装置 |
JP2018006557A (ja) | 2016-06-30 | 2018-01-11 | 東芝メモリ株式会社 | 記憶装置 |
KR102584288B1 (ko) * | 2016-08-03 | 2023-09-27 | 삼성전자주식회사 | 비휘발성 메모리 장치 |
JP6697366B2 (ja) * | 2016-10-20 | 2020-05-20 | キオクシア株式会社 | 超格子メモリ及びクロスポイント型メモリ装置 |
US10868245B1 (en) * | 2019-06-05 | 2020-12-15 | Sandisk Technologies Llc | Phase change memory device with crystallization template and method of making the same |
-
2019
- 2019-06-21 US US17/259,111 patent/US20210202839A1/en not_active Abandoned
- 2019-06-21 WO PCT/JP2019/024679 patent/WO2020012916A1/ja unknown
- 2019-06-21 KR KR1020207033698A patent/KR102452296B1/ko active IP Right Grant
- 2019-06-21 EP EP19833991.3A patent/EP3796372A4/en active Pending
- 2019-06-21 JP JP2020530068A patent/JP7416382B2/ja active Active
- 2019-07-08 TW TW108123922A patent/TWI713153B/zh active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5750791B1 (ja) | 1971-05-11 | 1982-10-28 | ||
JPS6238495B2 (ja) | 1978-10-06 | 1987-08-18 | Komatsu Mfg Co Ltd | |
JPS6124320B2 (ja) | 1979-03-15 | 1986-06-10 | Shin Meiwa Ind Co Ltd | |
JP4621897B2 (ja) | 2007-08-31 | 2011-01-26 | 独立行政法人産業技術総合研究所 | 固体メモリ |
JP4599598B2 (ja) | 2009-03-04 | 2010-12-15 | 独立行政法人産業技術総合研究所 | 固体メモリ |
JP2010287744A (ja) * | 2009-06-11 | 2010-12-24 | Elpida Memory Inc | 固体メモリ、データ処理システム及びデータ処理装置 |
JP2013051245A (ja) * | 2011-08-30 | 2013-03-14 | Elpida Memory Inc | 結晶性化合物及びこれを用いた可変抵抗素子並びに電子デバイス |
JP2016111219A (ja) * | 2014-12-08 | 2016-06-20 | 公立大学法人大阪府立大学 | 光伝導素子、テラヘルツ波発生装置、テラヘルツ波検出装置、テラヘルツ波発生方法およびテラヘルツ波検出方法 |
WO2016147802A1 (ja) | 2015-03-16 | 2016-09-22 | 国立研究開発法人産業技術総合研究所 | マルチフェロイック素子の初期化方法 |
JP2017143153A (ja) * | 2016-02-09 | 2017-08-17 | 株式会社東芝 | 超格子メモリ及びクロスポイント型メモリ装置 |
Non-Patent Citations (10)
Title |
---|
ANDRIY LOTNYKISOM HILMIULRICH ROSSBERND RAUSCHENBACH, NANO RESEARCH, vol. 11, 2018, pages 1676 - 1686 |
H. NAKAMURAI. RUGGERS. SANVITON. INOUEJ. TOMINAGAY. ASAI, NANOSCALE, vol. 9, 2017, pages 9386 - 9395 |
J. TOMINAGAA. V. KOLOBOVP. FONST. NAKANOS. MURAKAMI, ADV. MATER. INTERFACES, 2013 |
J. TOMINAGAA. V. KOLOBOVP. J. FONSX. WANGY. SAITOT. NAKANOM. HASES. MURAKAMIJ. HERFORTY. TAKAGAKI, SCI. TECHNOL. ADV. MATER., vol. 16, 2015, pages 014402 |
LUO, Y. R.: "Comprehensive Handbook of Chemical Bond Energies", 2007, CRC PRESS |
M. WUTTIGN. YAMADA, NATURE MATER, vol. 6, 2007, pages 824 - 832 |
R. SIMPSONP. FONSA. V. KOLOBOVT. FUKAYAM. KRBALT. YAGIJ. TOMINAGA, NATURE NANOTECHNOL, vol. 6, 2011, pages 501 |
RUINING WANGVALERIA BRAGAGLIAJOS E. BOSCHKERRAFFAELLA CALARCO, CRYST. GROWTH, vol. 16, 2016, pages 3596 - 3601 |
S. RAOUXM. WUTTIG: "Phase Change Materials", 2009, SPRINGER VERLAG |
See also references of EP3796372A4 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US12029145B2 (en) | 2020-05-29 | 2024-07-02 | Kioxia Corporation | Memory device |
WO2023062918A1 (ja) | 2021-10-15 | 2023-04-20 | 国立研究開発法人産業技術総合研究所 | 結晶化積層構造体の製造方法 |
KR20240049309A (ko) | 2021-10-15 | 2024-04-16 | 가부시키가이샤 알박 | 결정화 적층 구조체의 제조 방법 |
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KR20210002620A (ko) | 2021-01-08 |
JPWO2020012916A1 (ja) | 2021-07-15 |
CN112292758A (zh) | 2021-01-29 |
EP3796372A4 (en) | 2022-03-16 |
TW202017112A (zh) | 2020-05-01 |
JP7416382B2 (ja) | 2024-01-17 |
US20210202839A1 (en) | 2021-07-01 |
EP3796372A1 (en) | 2021-03-24 |
TWI713153B (zh) | 2020-12-11 |
KR102452296B1 (ko) | 2022-10-06 |
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