WO2019228258A1 - 光学传感器件及其制作方法、显示器件、显示设备 - Google Patents

光学传感器件及其制作方法、显示器件、显示设备 Download PDF

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WO2019228258A1
WO2019228258A1 PCT/CN2019/088299 CN2019088299W WO2019228258A1 WO 2019228258 A1 WO2019228258 A1 WO 2019228258A1 CN 2019088299 W CN2019088299 W CN 2019088299W WO 2019228258 A1 WO2019228258 A1 WO 2019228258A1
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region
layer
pin diode
igzo
film transistor
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PCT/CN2019/088299
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English (en)
French (fr)
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王国英
宋振
林奕呈
王玲
盖翠丽
徐攀
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京东方科技集团股份有限公司
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Priority to US16/652,039 priority Critical patent/US11404493B2/en
Publication of WO2019228258A1 publication Critical patent/WO2019228258A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/824—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/828—Transparent cathodes, e.g. comprising thin metal layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers

Definitions

  • the present disclosure relates to display technology, and in particular, to an optical sensor device and a manufacturing method thereof, a display device, and a display device.
  • the electrical compensation is used in a brightness compensation scheme of an OLED (Organic Light-Emitting Diode) display device.
  • the electrical compensation can only compensate the display Mura (the uneven brightness of the display, which causes various traces) caused by changes in the threshold voltage and mobility of the thin film transistor (TFT), but it cannot respond to the change in brightness caused by the aging of the OLED device. Compensation. Although the entire panel can be optically compensated once it is shipped from the factory, it cannot solve the Mura caused by the attenuation of the electroluminescence efficiency, that is, the optical real-time compensation cannot be achieved.
  • the present disclosure provides an optical sensor device and a manufacturing method thereof, a display device, and a display device to improve the performance of the display device and the display effect.
  • an embodiment of the present disclosure provides an optical sensor device including a thin film transistor and a PIN diode on a surface of a drain of the thin film transistor.
  • the material of the P region, the material of the I region, and the material of the N region of the PIN diode are oxides.
  • the material of the P region of the PIN diode is a P-type oxide; the material of the I region of the PIN diode is IGZO; the material of the N region of the PIN diode is IGZO; The oxygen content is lower than that of IGZO in the I region.
  • the P-type oxide specifically includes at least one of Cu 2 O and SnO.
  • an embodiment of the present disclosure provides a method for manufacturing an optical sensor device, including: manufacturing a thin film transistor including a gate electrode, a source electrode, and a drain electrode; and using oxidation on a surface of the drain electrode.
  • the objects form the P, I, and N regions of the PIN diode.
  • the step of forming an P region, an I region, and an N region of a PIN diode by using an oxide on a surface of the drain includes: sequentially depositing an N region IGZO layer and an I region on the surface of the drain.
  • the P-type oxide includes at least one of Cu 2 O and SnO.
  • the method before patterning an N-region IGZO layer, an I-region IGZO layer, and a P-region P-type oxide layer, thereby forming a PIN diode, the method further includes: on the P-region P-type oxide layer A first transparent conductive layer is deposited.
  • an embodiment of the present disclosure provides a display device including the optical sensor device as described in the first aspect.
  • the display device further includes: a black matrix on the thin film transistor; a color film covering a PIN diode and partially covering the black matrix; an organic cover layer on the black matrix and the color film A spacer layer on the organic covering layer; an auxiliary electrode on the spacer layer; and a transparent cathode covering the organic covering layer, the spacer layer, and the auxiliary electrode.
  • an embodiment of the present disclosure also provides a display device including the optical sensor device as described in the first aspect.
  • FIG. 1 is a schematic structural diagram of a PIN diode according to an embodiment of the present disclosure
  • FIG. 2 is a flowchart of a method for manufacturing an optical sensor device according to an embodiment of the present disclosure
  • FIG. 3 is a flowchart of a method for manufacturing a display device in a specific embodiment provided by an embodiment of the present disclosure.
  • 4 to 8 are schematic structural diagrams of a display device according to an embodiment of the present disclosure.
  • the inventors realized that in the brightness compensation scheme of the OLED display device, it is necessary to introduce built-in compensation of the optical sensor, that is, to arrange a photodiode (such as a PIN diode) near the OLED display device for real-time monitoring of the brightness change of the electroluminescent device.
  • Real-time optical compensation for the panel is calculated through peripheral IC (integrated circuit) calculations.
  • Photosensitive sensors can be used during the fabrication of thin film transistors.
  • amorphous silicon is used to form the P region, I region, and N region of a PIN diode.
  • a large amount of hydrogen is introduced during the preparation of the PIN diode. Hydrogen easily diffuses into the thin film transistor below it, which seriously affects the characteristics of the thin film transistor.
  • the wet-etching process in the subsequent preparation of the thin film transistor will damage the side wall of the PIN diode and increase the leakage current.
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • An embodiment of the present disclosure provides an optical sensor device.
  • the optical sensor device includes a thin film transistor and a PIN diode 9 on a surface of a drain electrode 8 of the thin film transistor.
  • the material of the P region 901, the I region 902, and the N region 903 of the PIN diode 9 are oxides.
  • PIN diodes are made of oxide and do not use amorphous silicon, hydrogen is not introduced. Therefore, it will not affect the performance of the thin film transistor, thereby achieving the improvement of the performance of the display device and the display effect.
  • Adding the optical sensor device with a photosensitive sensor (that is, a PIN diode) and an optical compensation control thin film transistor to the display device can realize real-time optical compensation, effectively solve the display Mura caused by the brightness change of the electroluminescent device, and improve the display effect.
  • a PIN diode may be located on a surface of a drain of a thin film transistor, and the PIN diode may also be located on a surface of a source of the thin film transistor.
  • the material of the P region of the PIN diode is a P-type oxide, such as Cu 2 O and / or SnO.
  • the material of the I region of the PIN diode is IGZO (indium gallium zinc oxide, indium gallium zinc oxide).
  • the material of the N region of the PIN diode is IGZO, and the IGZO oxygen content of the N region is lower than the IGZO oxygen content of the I region. That is, the material of the I region of the PIN diode is high-oxygen IGZO, and the material of the N region of the PIN diode is low-oxygen IGZO.
  • an embodiment of the present disclosure also provides a method for manufacturing an optical sensor device. As shown in FIG. 2, the manufacturing method includes the following steps.
  • a thin film transistor is fabricated.
  • the thin film transistor includes a gate, a source, and a drain.
  • Step S202 forming an P region, an I region, and an N region of the PIN diode by using an oxide on the surface of the drain.
  • the step of forming an P region, an I region, and an N region of the PIN diode by using an oxide on the surface of the drain may specifically include: sequentially depositing an N region IGZO layer, an I region IGZO layer, and a P region P-type oxide. Physical layer; the oxygen content of the IGZO layer in the N region is lower than that of the IGZO layer in the I region; and patterning the IGZO layer in the N region, the IGZO layer in the I region, and the P-type oxide layer in the P region to form a PIN diode.
  • the P-type oxide includes at least one of Cu 2 O and SnO. That is, the P-type oxide may be Cu 2 O and / or SnO.
  • the method further includes: depositing a first transparent conductive layer on the P region.
  • the material of the first transparent conductive layer may be ITO (Indium Tin Oxide). In this way, only one patterning process is needed to complete the patterning of the first transparent conductive layer while forming the PIN diode, reducing process steps and reducing process complexity.
  • a method for manufacturing a display device including an optical sensor device is described in detail below. As shown in FIG. 3, the manufacturing method may include the following steps.
  • Step S301 As shown in FIG. 4, a metal material is deposited on the glass cover plate 1, and then a photoresist is applied to etch the metal material to form a shield metal pattern 2.
  • the metal material may be a metal material such as Mo, Al, Ti, Au, Cu, Hf, Ta, or an alloy material such as AlNd, MoNb.
  • a buffer layer 3 and an active layer are sequentially deposited, and then the active layer 4 is wet-etched to form an active island.
  • the material of the buffer layer 3 may be an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.
  • the material of the active layer 4 may be a metal oxide material, such as IGZO.
  • Step S303 As shown in FIG. 4, a gate insulation (GI) layer 5 and a gate layer 6 are sequentially deposited, and a photoresist is applied. Using a mask, the gate layer 6 is wet-etched first, and then the gate insulation layer 5 is dry-etched.
  • the material of the gate insulating layer 5 may be an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.
  • the material of the gate layer 6 may be a metal material such as Mo, Al, Ti, Au, Cu, Hf, or Ta.
  • the Cu layer process can also be used to make the gate layer 6, and the material of the gate layer 6 can be MoNd / Cu / MoNd.
  • Step S304 As shown in FIG. 4, an interlayer dielectric (ILD) layer 7 is deposited, the interlayer dielectric layer 7 is lithographically formed to form an ILD hole, a source-drain metal layer is deposited and the source-drain metal layer is etched. , Thereby forming a source electrode 8 ′ and a drain electrode 8.
  • ILD interlayer dielectric
  • a low-oxygen IGZO in the N region, a high-oxygen IGZO in the I region, a P-type oxide Cu 2 O, SnO, etc. in the P region are sequentially deposited, and then a first transparent conductive layer 10 is deposited.
  • the first transparent conductive layer 10 can be deposited by a sputtering method. Only one mask is wet-etched to form the PIN diode 9 and the pattern of the first transparent conductive layer 10 on the PIN diode 9.
  • the first transparent conductive layer 10 is an electrode of the PIN diode 9.
  • Step S306 As shown in FIG. 6, a PVX layer 11 is deposited, a via is formed, a second transparent conductive layer 18 is deposited and patterned, and the second transparent conductive layer 18 is used as the first transparent conductive layer. 10 leads.
  • the production of the optical sensor device is completed.
  • the following steps 307-311 can be arranged.
  • Step S307. As shown in FIG. 7, a black matrix (BM) 12 is deposited and patterned so that the black matrix 12 covers the thin film transistor of the active matrix.
  • Step S308 As shown in FIG. 7, a color film (CF) is deposited. Each color film of R, G, and B was deposited when the CF layer 13 was prepared. The color film covers a part of the black matrix 12.
  • Step S309 As shown in FIG. 8, an organic coating (OC) layer 14 and an auxiliary electrode 15 are deposited and patterned.
  • Organic covering materials include, but are not limited to, resins (Resin), silicon-glass bonded structural materials (Silicon On Glass, SOG) and BCB (benzocyclobutene) and other planarization materials.
  • the material of the auxiliary electrode 15 may be metal materials such as Mo, Al, Ti, Au, Cu, Hf, Ta, or an alloy thereof such as AlNd, MoNb, etc., or a multilayer metal such as MoNb / Cu / MoNb, AlNd / Mo / AlNd et al.
  • Step S310 As shown in FIG. 8, a PS (Photo Spacer) layer 16 material is deposited and a spacer is formed.
  • a transparent conductive oxide (Transparent Conductive Oxide (TCO)) film is deposited as the transparent cathode 17.
  • Transparent conductive oxide materials include, but are not limited to, transparent conductive oxides, such as AZO, IZO, AZTO, or a combination thereof. They can also be thinner metal materials such as Mg / Ag, Ca / Ag, Sm / Ag, Al / Ag, Ba / Ag and other composite materials.
  • a control thin film transistor with a top-gate self-aligned structure is designed.
  • This technical solution is also applicable to structures such as an etch stop type (ESL), a back channel etch type (BCE), and the like.
  • Thin film transistor; the material of its active layer is IGZO oxide semiconductor, and it can also be amorphous silicon (a-Si).
  • An embodiment of the present disclosure further provides a display device including the optical sensor device provided by the embodiment of the present disclosure.
  • the display device may further include: a black matrix on the thin film transistor; a color film covering the PIN diode and partially covering the black matrix; an organic cover layer on the black matrix and the color film; A spacer layer on the organic cover layer; an auxiliary electrode on the spacer layer; and a transparent cathode covering the organic cover layer, the spacer layer, and the auxiliary electrode.
  • the embodiments of the present disclosure also provide a display device, which includes the optical sensor device provided by the embodiments of the present disclosure.
  • the display device is a top emission display device or a bottom emission display device.
  • An embodiment of the present disclosure provides an optical sensor device and a manufacturing method thereof, a display device, and a display device.
  • the optical sensor device includes a thin film transistor and a PIN diode on a surface of a drain of the thin film transistor, and a P region of the PIN diode , I and N regions are made of oxide. Since PIN diodes are made of oxide and do not use amorphous silicon, hydrogen is not introduced. Therefore, it will not affect the performance of the thin film transistor, thereby achieving the improvement of the performance of the display device and the display effect.

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Abstract

一种涉及显示技术的光学传感器件及其制作方法、显示器件和显示设备。所述光学传感器件包括：薄膜晶体管和位于所述薄膜晶体管的漏极（8）的表面上的PIN二极管（9）；其中，所述PIN二极管（9）的P区（901）的材料、I区（902）的材料和N区（903）的材料均为氧化物。由于采用氧化物制作PIN二极管（9），不使用非晶硅，不会引入氢，不会对薄膜晶体管的性能产生影响，进而实现提高显示器件的性能，提高显示效果。

Description

光学传感器件及其制作方法、显示器件、显示设备
相关申请
本申请要求保护在2018年6月1日提交的申请号为201810555446.9的中国专利申请的优先权，该申请的全部内容以引用的方式结合到本文中。
技术领域
本公开涉及显示技术，尤其涉及一种光学传感器件及其制作方法、显示器件、显示设备。
背景技术
典型地，电学补偿用于OLED(Organic Light-Emitting Diode，有机发光二极管)显示装置的亮度补偿方案中。电学补偿只能对薄膜晶体管(Thin Film Transistor，TFT)阈值电压和迁移率变化造成的显示Mura(显示器亮度不均匀，造成各种痕迹的现象)进行补偿，但是无法应对OLED器件老化引起的亮度变化的补偿。虽然可以在面板出厂时对面板整体进行一次光学补偿，但无法解决伴随电致发光(electroluminescence)效率衰减造成的Mura，即无法实现光学实时补偿。
发明内容
本公开提供了一种光学传感器件及其制作方法、显示器件、显示设备，以提高显示器件的性能，提高显示效果。
第一方面，本公开实施例提供了一种光学传感器件，包括：薄膜晶体管和位于所述薄膜晶体管的漏极的表面上的PIN二极管。所述PIN二极管的P区的材料、I区的材料和N区的材料均为氧化物。
在一些实施例中，所述PIN二极管的P区的材料是P型氧化物；所述PIN二极管的I区的材料是IGZO；所述PIN二极管的N区的材料是IGZO；N区的IGZO的氧含量低于I区的IGZO的氧含量。
在一些实施例中，所述P型氧化物具体包括包括Cu 2O和SnO的至少一者。
第二方面，本公开实施例提供了一种光学传感器件的制作方法，包括：制作薄膜晶体管，所述薄膜晶体管包括栅极、源极和漏极；以及在所述漏极的表面上采用氧化物形成PIN二极管的P区、I区和N区。
在一些实施例中，在所述漏极的表面上采用氧化物形成PIN二极管的P区、I区和N区的步骤包括：在所述漏极的表面上依次沉积N区IGZO层、I区IGZO层、P区P型氧化物层；所述N区IGZO层的氧含量低于所述I区IGZO层的氧含量；以及图形化N区IGZO层、I区IGZO层、P区P型氧化物层，从而形成PIN二极管。
在一些实施例中，所述P型氧化物包括Cu 2O和SnO的至少一者。
在一些实施例中，在图形化N区IGZO层、I区IGZO层、P区P型氧化物层，从而形成PIN二极管之前，所述方法还包括：在所述P区P型氧化物层上沉积第一透明导电层。
第三方面，本公开实施例提供了一种显示器件，包括如第一方面中所述的光学传感器件。
在一些实施例中，所述显示器件还包括：位于薄膜晶体管上的黑矩阵；覆盖PIN二极管并部分覆盖所述黑矩阵的彩膜；位于所述黑矩阵和所述彩膜上的有机覆盖层；位于所述有机覆盖层上的隔垫物层；位于所述隔垫物层上的辅助电极；以及覆盖所述有机覆盖层、所述隔垫物层和所述辅助电极的透明阴极。
第四方面，本公开实施例还提供了一种显示设备，包括如第一方面中所述的光学传感器件。
附图说明
为了更清楚地说明本公开实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本公开实施例提供的PIN二极管的结构示意图；
图2为本公开实施例提供的光学传感器件的制作方法的流程图；
图3为本公开实施例提供的具体实施例中显示器件的制作方法的 流程图；以及
图4-图8为本公开实施例提供的显示器件的结构示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
发明人意识到，在OLED显示装置的亮度补偿方案中需要引入光学传感器内置补偿，即在OLED显示器件附近布置光敏二极管(例如PIN二极管)，用于实时监控电致发光器件的亮度变化。通过外围IC(integrated circuit，集成电路)计算对面板进行实时光学补偿。
可以在薄膜晶体管的制作过程中做光敏传感器(例如PIN二极管)。一般采用非晶硅参杂形成PIN二极管的P区、I区、N区。但是，在制备PIN二极管的过程中会引入大量的氢。氢很容易扩散到其下部的薄膜晶体管，从而严重影响薄膜晶体管的特性。并且，在PIN二极管制作完成后，薄膜晶体管的后续制备过程中的湿刻工艺会使PIN二极管的侧壁受损，增加了漏电流。除此之外，一般采用PECVD(Plasma Enhanced Chemical Vapor Deposition，等离子体增强化学气相沉积)设备来制作PIN二极管，工艺复杂，生产效率低。这些问题阻碍了光学补偿的应用。
请参考图1和图5-8，本公开实施例提供了一种光学传感器件。所述光学传感器件包括：薄膜晶体管和位于薄膜晶体管的漏极8的表面上的PIN二极管9。其中，该PIN二极管9的P区901的材料、I区902的材料和N区903的材料均为氧化物。
由于采用氧化物制作PIN二极管，不使用非晶硅，所以不会引入氢。因此，不会对薄膜晶体管的性能产生影响，进而实现提高显示器件的性能，提高显示效果。在显示器件中添加该具有光敏传感器(即，PIN二极管)和光学补偿控制薄膜晶体管的光学传感器件，可以实现光学实时补偿，有效解决了电致发光器件的亮度变化造成的显示Mura，提高了显示效果。
本领域技术人员能够理解，薄膜晶体管的漏极和源极是可以互换的。也就是说，在本公开的上下文中，PIN二极管可以位于薄膜晶体管的漏极的表面上，所述PIN二极管也可以位于薄膜晶体管的源极的表面上。
在一些实施例中，PIN二极管的P区的材料是P型氧化物，例如Cu 2O和/或SnO。PIN二极管的I区的材料是IGZO(indium gallium zinc oxide，铟镓锌氧化物)。PIN二极管的N区的材料是IGZO且N区的IGZO氧含量低于I区的IGZO的氧含量。即，PIN二极管的I区的材料是高氧IGZO，PIN二极管的N区的材料是低氧IGZO。
当然，本领域技术人员也可以使用其它氧化物来制作PIN二极管，只要氧化物的特性满足PIN二极管相应区域的要求即可。
相应的，本公开实施例还相应提供一种光学传感器件的制作方法。如图2所示，所述制作方法包括以下步骤。
步骤S201、制作薄膜晶体管，所述薄膜晶体管包括栅极、源极和漏极。
步骤S202、在漏极的表面上采用氧化物形成PIN二极管的P区、I区和N区。
其中，步骤S202中，在漏极的表面上采用氧化物形成PIN二极管的P区、I区和N区的步骤具体可以包括：依次沉积N区IGZO层、I区IGZO层、P区P型氧化物层；N区IGZO层的氧含量低于I区IGZO层的氧含量；以及图形化N区IGZO层、I区IGZO层、P区P型氧化物层，从而形成PIN二极管。
在一些实施例中，所述P型氧化物包括Cu 2O和SnO的至少一者。即，所述P型氧化物可以是Cu 2O和/或SnO。
可选的，在漏极的表面上依次沉积N区IGZO层、I区IGZO层、P区P型氧化物层之后，在图形化N区IGZO层、I区IGZO层、P区P型氧化物层，从而形成PIN二极管之前，所述方法还包括：在P区上沉积第一透明导电层。第一透明导电层的材料可以是ITO(氧化铟锡)。这样，只需要一次图形化过程，即可在形成PIN二极管的同时完成第一透明导电层的图形化，减少了工艺步骤，减小了工艺复杂度。
下面对包括光学传感器件的显示器件制作方法进行详细说明，如图3所示，所述制作方法可以包括以下步骤。
步骤S301、如图4所示，在玻璃盖板1上沉积金属材料，之后涂覆光刻胶，刻蚀所述金属材料以形成遮光(Shield)金属图形2。金属材料可为Mo、Al、Ti、Au、Cu、Hf、Ta等金属材料，也可为AlNd、MoNb等合金材料。
步骤S302、如图4所示，依次沉积缓冲(Buffer)层3、有源(Active)层，然后湿刻有源层4形成有源岛。缓冲层3的材料可为氧化硅、氮化硅、氮氧化硅等绝缘材料。有源层4的材料可为金属氧化物材料，如IGZO。
步骤S303、如图4所示，依次沉积栅极绝缘(Gate Insulating，GI)层5、栅极(Gate)层6，涂覆光刻胶。利用一块掩膜版先湿刻栅极层6，然后干刻栅极绝缘层5。栅极绝缘层5的材料可为氧化硅、氮化硅、氮氧化硅等绝缘材料。栅极层6的材料可为Mo、Al、Ti、Au、Cu、Hf、Ta等金属材料。也可以采用Cu工艺制程来制作栅极层6，栅极层6的材料可为MoNd/Cu/MoNd。
步骤S304、如图4所示，沉积层间介质(ILD)层7，光刻所述层间介质层7以形成ILD孔，淀积源-漏金属层且刻蚀所述源-漏金属层，从而形成源极8′和漏极8。
步骤S305、如图5所示，依次沉积N区低氧IGZO、I区高氧IGZO、P区P型氧化物Cu 2O、SnO等，然后沉积第一透明导电层10。可以采用喷镀(Sputter)的方式沉积第一透明导电层10。只用一块掩膜板湿刻以形成PIN二极管9和PIN二极管9上面的第一透明导电层10图案，第一透明导电层10是PIN二极管9的电极。
步骤S306、如图6所示，沉积绝缘(PVX)层11，形成过孔(Via)，沉积一层第二透明导电层18并图形化，该第二透明导电层18作为第一透明导电层10的引线。
至此光学传感器件制作完成。为了制作顶发射玻璃盖板，可以布置例如以下的步骤307-311。
步骤S307、如图7所示，沉积黑矩阵(Black Matrix，BM)12并图形化，使得黑矩阵12覆盖有源矩阵的薄膜晶体管。
步骤S308、如图7所示，沉积彩膜(Color Film，CF)。制备CF层13时先后沉积R、G、B各彩膜。彩膜覆盖黑矩阵12的一部分。
步骤S309、如图8所示，沉积有机覆盖(Organic Coating，OC) 层14和辅助电极15并图形化。有机覆盖的材料包含但不限于树脂(Resin)、硅-玻璃键合结构材料(Silicon On Glass，SOG)和BCB(苯并环丁烯)等平坦化材料。辅助电极15的材料可为Mo、Al、Ti、Au、Cu、Hf、Ta等金属材料，或其合金如AlNd，MoNb等，也可为多层金属如MoNb/Cu/MoNb、AlNd/Mo/AlNd等。
步骤S310、如图8所示，沉积PS(Photo Spacer，隔垫物)层16材料并形成隔垫物。
步骤S311、如图8所示，淀积一层透明导电氧化物(Transparent Conductive Oxide，TCO)薄膜作为透明阴极17。透明导电氧化物材料包含但不限于透明导电氧化物，如AZO、IZO、AZTO或其组合，也可以是较薄的金属材料，如Mg/Ag、Ca/Ag、Sm/Ag、Al/Ag、Ba/Ag等复合材料。
通过以上步骤，薄膜晶体管的盖板部分制作完成。
通过该实施方案设计了顶栅自对准结构的控制薄膜晶体管，该技术方案同样适用于蚀刻阻挡型(Etch Stop Layer，ESL)、背沟道刻蚀型(Back Channel Etched，BCE)等结构的薄膜晶体管；其有源层材料为IGZO氧化物半导体，也可以是非晶硅(a-Si)等材料。
应当注意，尽管在附图中以特定顺序描述了本公开提供的方法的操作，但是，这并非要求或者暗示必须按照该特定顺序来执行这些操作，或是必须执行全部所示的操作才能实现期望的结果。相反，流程图中描绘的步骤可以改变执行顺序。附加地或备选地，可以省略某些步骤，将多个步骤合并为一个步骤执行，和/或将一个步骤分解为多个步骤执行。
本公开实施例还提供了一种显示器件，包括本公开实施例提供的光学传感器件。
该显示器件中，还可以包括：位于薄膜晶体管上的黑矩阵；覆盖PIN二极管并部分覆盖所述黑矩阵的彩膜；位于所述黑矩阵和所述彩膜上的有机覆盖层；位于所述有机覆盖层上的隔垫物层；位于所述隔垫物层上的辅助电极；以及覆盖所述有机覆盖层、所述隔垫物层和所述辅助电极的透明阴极。
本公开实施例还相应提供一种显示设备，包括本公开实施例提供的光学传感器件。
在一些实施例中，该显示设备为顶发射显示设备或者底发射显示设备。
本公开实施例提供一种光学传感器件及其制作方法、显示器件、显示设备，该光学传感器件中包括薄膜晶体管和位于薄膜晶体管的漏极的表面上的PIN二极管，且该PIN二极管的P区、I区和N区均采用氧化物制作。由于采用氧化物制作PIN二极管，不使用非晶硅，所以不会引入氢。因此，不会对薄膜晶体管的性能产生影响，进而实现提高显示器件的性能，提高显示效果。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此。任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种光学传感器件，包括：薄膜晶体管和位于所述薄膜晶体管的漏极的表面上的PIN二极管；
    其中，所述PIN二极管的P区的材料、I区的材料和N区的材料均为氧化物。
  2. 如权利要求1所述的光学传感器件，其中，所述PIN二极管的P区的材料是P型氧化物；
    所述PIN二极管的I区的材料是IGZO；
    所述PIN二极管的N区的材料是IGZO；N区的IGZO的氧含量低于I区的IGZO的氧含量。
  3. 如权利要求2所述的光学传感器件，其中，所述P型氧化物包括Cu 2O和SnO的至少一者。
  4. 一种光学传感器件的制作方法，包括：
    制作薄膜晶体管，所述薄膜晶体管包括栅极、源极和漏极；以及
    在所述漏极的表面上采用氧化物形成PIN二极管的P区、I区和N区。
  5. 如权利要求4所述的方法，其中，在所述漏极的表面上采用氧化物依次形成PIN二极管的P区、I区和N区，包括：
    在所述漏极的表面上依次沉积N区IGZO层、I区IGZO层、P区P型氧化物层；所述N区IGZO层的氧含量低于所述I区IGZO层的氧含量；以及
    图形化N区IGZO层、I区IGZO层、P区P型氧化物层，从而形成PIN二极管。
  6. 如权利要求5所述的方法，其中，所述P型氧化物包括Cu 2O和SnO的至少一者。
  7. 如权利要求5所述的方法，其中，在图形化N区IGZO层、I区IGZO层、P区P型氧化物层，从而形成PIN二极管之前，所述方法还包括：
    在所述P区P型氧化物层上沉积第一透明导电层。
  8. 一种显示器件，包括如权利要求1-3任一所述的光学传感器件。
  9. 如权利要求8所述的显示器件，还包括：
    位于薄膜晶体管上的黑矩阵；
    覆盖PIN二极管并部分覆盖所述黑矩阵的彩膜；
    位于所述黑矩阵和所述彩膜上的有机覆盖层；
    位于所述有机覆盖层上的隔垫物层；
    位于所述隔垫物层上的辅助电极；以及
    覆盖所述有机覆盖层、所述隔垫物层和所述辅助电极的透明阴极。
  10. 一种显示设备，包括如权利要求1-3任一所述的光学传感器件。
PCT/CN2019/088299 2018-06-01 2019-05-24 光学传感器件及其制作方法、显示器件、显示设备 WO2019228258A1 (zh)

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