WO2019184153A1 - 像素电极、阵列基板及液晶显示面板 - Google Patents

像素电极、阵列基板及液晶显示面板 Download PDF

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Publication number
WO2019184153A1
WO2019184153A1 PCT/CN2018/096507 CN2018096507W WO2019184153A1 WO 2019184153 A1 WO2019184153 A1 WO 2019184153A1 CN 2018096507 W CN2018096507 W CN 2018096507W WO 2019184153 A1 WO2019184153 A1 WO 2019184153A1
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Prior art keywords
trapezoidal
liquid crystal
sub
pixel electrode
intermediate portion
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PCT/CN2018/096507
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English (en)
French (fr)
Inventor
宋文庆
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武汉华星光电技术有限公司
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Priority to US16/120,463 priority Critical patent/US20190302544A1/en
Publication of WO2019184153A1 publication Critical patent/WO2019184153A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned

Definitions

  • the present application relates to the field of liquid crystal display technology, and in particular, to a pixel electrode, an array substrate, and a liquid crystal display panel.
  • Fringe Field Switch (Fringe Field Switching, FFS) liquid crystal displays have the advantages of high penetration, wide viewing angle, etc., and have been widely used in small and medium size displays.
  • the FFS type liquid crystal display uses a boundary electric field to rotate the liquid crystal molecules in the liquid crystal cell in a plane parallel to the substrate, thereby generating an optical path difference, thereby achieving the display effect.
  • the existing FFS liquid crystal display performs well in screen display, color, and viewing angle, the response time is relatively slow, and the virtual reality (VR) has a great influence when used at normal temperature, and there is a serious dynamic blur effect;
  • VR virtual reality
  • the influence of temperature on it becomes large, because the liquid crystal molecules in the low-temperature environment rotate more slowly, causing a delay in response, thereby causing a serious dynamic blurring effect.
  • the technical problem to be solved by the present application is to provide a pixel electrode, an array substrate, and a liquid crystal display panel.
  • the pixel electrode of the present application can make the liquid crystal molecules reach the maximum twist angle faster, thereby improving the response speed of the liquid crystal display.
  • the first technical solution adopted by the present application is to provide a pixel electrode including a plurality of sub-pixel electrodes and an intermediate portion, the plurality of sub-pixel electrodes being connected to each other through an intermediate portion, and each of the sub-pixel electrodes is The middle portion extends toward both sides in a tapered manner.
  • the second technical solution adopted by the present application is to provide an array substrate, the array substrate includes a pixel unit, the pixel unit includes a plurality of sub-pixels, each sub-pixel includes a pixel electrode, and each pixel electrode includes a plurality of The sub-pixel electrode and the intermediate portion are connected to each other through the intermediate portion, and each of the sub-pixel electrodes extends from the intermediate portion toward both sides.
  • the third technical solution adopted by the present application is to provide a liquid crystal display panel, the liquid crystal display includes an array substrate, the array substrate includes a pixel unit, the pixel unit includes a plurality of sub-pixels, and each sub-pixel includes a pixel electrode.
  • the pixel electrode includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through an intermediate portion, and each of the sub-pixel electrodes extends from the intermediate portion toward both sides.
  • the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended, and the liquid crystal molecules can be divided into more and smaller units in the active area of the pixel electrode, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby improving the liquid crystal display.
  • the speed of response is: different from the prior art, the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended, and the liquid crystal molecules can be divided into more and smaller units in the active area of the pixel electrode, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby
  • FIG. 1A is a schematic structural view of an embodiment of a pixel electrode provided by the present application.
  • FIG. 1B is a schematic top plan view showing an arrangement of electric field control liquid crystal molecules formed after the pixel electrode of FIG. 1A is energized;
  • FIG. 2A is a schematic structural view of an embodiment of an array substrate provided by the present application.
  • 2B is a schematic structural view of a top view of an embodiment of an array substrate provided by the present application.
  • FIG 3 is a schematic structural view of an embodiment of a liquid crystal display panel provided by the present application.
  • the pixel unit includes at least two sub-pixels, and the general pixel unit includes three sub-pixels of red (R), green (G), and blue (B), each of the sub-pixels includes a pixel electrode, and the pixel electrodes of each sub-pixel are independent. controlling.
  • the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion through which the plurality of sub-pixel electrodes are connected to each other, and each of the sub-pixel electrodes extends from the intermediate portion toward both sides. .
  • the intermediate portion described in the present application and the plurality of sub-pixel electrodes connected to the intermediate portion are integrated, and the whole is one pixel electrode.
  • one pixel electrode includes three sub-pixel electrodes and each of the sub-pixel electrodes includes a pair of trapezoidal portions will be specifically described.
  • FIG. 1A is a schematic structural diagram of an embodiment of a pixel electrode provided by the present application.
  • the pixel electrode 10 includes three sub-pixel electrodes 101 and an intermediate portion 103, and the three sub-pixel electrodes 101 are connected to each other through the intermediate portion 103.
  • Each of the three sub-pixel electrodes 101 includes a pair of trapezoidal portions 1011 that are axially symmetric with respect to the intermediate portion 103.
  • the trapezoidal portions 1011 and the intermediate portion 103 have an isosceles trapezoidal shape and a rectangular shape in plan view.
  • the two lower bottom sides of the pair of trapezoidal portions 1011 are opposed to each other, and the two lower bottom sides of the pair of trapezoidal portions 1011 are respectively connected to the intermediate portion 103.
  • the angle between the waist of the trapezoidal portion 1011 and the lower base of the trapezoidal portion 1011 is 84 to 87 degrees.
  • the letter L in Fig. 1A represents the length of the lower base of the trapezoidal portion 1011, and the letter S represents the distance between the adjacent two pairs of trapezoidal portions 1011.
  • the intermediate portion 103 and the three sub-pixel electrodes 101 connected to each other through the intermediate portion 103 are integrated, and this one is a single pixel electrode as a whole.
  • the pixel electrode 10 in the embodiment includes three sub-pixel electrodes 101. In other embodiments, the pixel electrode 10 may also include two, four, five or other numbers of sub-pixel electrodes 101. This is not specifically limited.
  • the shape of the trapezoidal portion 1011 on the plan view surface is an isosceles trapezoid. In other embodiments, the trapezoidal portion 1011 may have other trapezoidal shapes, and is not particularly limited herein.
  • the angle between the waist and the lower bottom of the trapezoidal portion 1011 is changed, and a trapezoidal portion is found after a large number of simulation tests.
  • the angle between the waist of the 1011 and the lower bottom of the trapezoidal portion 1011 is preferably 84.9 to 85.2 degrees, the response speed of the liquid crystal molecules can be accelerated, that is, the two base angles of the trapezoid are 84.9 to 85.2 degrees on the plan view.
  • the two base angles of the trapezoid are 85.05 degrees in plan view.
  • the length of the lower base of the trapezoidal portion 1011 and the distance between the adjacent pairs of trapezoidal portions 1011 are changed, and a trapezoidal portion is found after a large number of simulation tests.
  • the length of the lower base of 1011 is preferably 3
  • the distance between the adjacent two pairs of trapezoidal portions 1011 is preferably 3.6 ⁇ m to 4.6 ⁇ m, the response speed of the liquid crystal molecules can be accelerated.
  • the length of the lower base of the trapezoidal portion 1011 is 4.1 microns, and the distance between adjacent pairs of trapezoidal portions 1011 is 4.1 microns.
  • the length of the upper base of the trapezoidal portion 1011 is less than the length of the lower base and the length of the upper base is greater than one quarter of the length of the lower base.
  • the material of the pixel electrode 10 is indium tin oxide, and other materials may be used in other embodiments, and are not specifically limited herein.
  • the intermediate portion 103 has a rectangular shape in plan view. In other embodiments, the intermediate portion 103 may have other shapes, and is not particularly limited herein.
  • FIG. 1B is a schematic top plan view showing an arrangement of electric field control liquid crystal molecules formed after the pixel electrode of FIG. 1A is energized.
  • the vertical plane of each trapezoidal portion 1011 in Fig. 1A is represented by a broken line a
  • the vertical plane between adjacent pairs of trapezoidal portions 1011 is represented by a broken line b.
  • FIG. 1B is a schematic top plan view showing an arrangement of electric field control liquid crystal molecules formed after the pixel electrode of FIG. 1A is energized.
  • the vertical plane of each trapezoidal portion 1011 in Fig. 1A is represented by a broken line a
  • the vertical plane between adjacent pairs of trapezoidal portions 1011 is represented by a broken line b.
  • the long axis of the liquid crystal molecules 102 located between the median plane a and the median plane b is not perpendicular to the plane in which the pixel electrode 10 is located.
  • the long axis of the liquid crystal molecules 102 located on the vertical surface of the trapezoidal portion 1011 and the liquid crystal molecules 102 located on the vertical plane between the adjacent pairs of trapezoidal portions 1011 are perpendicular to the plane in which the pixel electrode 10 is located, and the long axis of this portion is perpendicular to
  • the liquid crystal molecules 102 in the plane of the pixel electrode 10 are not rotated, that is, anchored, and the liquid crystal molecules 102 are divided into more and smaller cells in the active region of the sub-pixel electrode 101, that is, the active region of the liquid crystal molecules 102 becomes smaller. Thereby, the liquid crystal molecules 102 can reach the maximum twist angle more quickly, thereby improving the response speed of the liquid crystal molecules 102.
  • the liquid crystal molecules 102 located on the a-plane and the b-plane do not rotate, that is, the active area of the liquid crystal molecules 102 is divided into four regions, and the area between each adjacent two a and b is one. In the area, the area divided in the prior art is less than four.
  • each active area of the liquid crystal molecules 102 shown in FIG. 1B becomes smaller, and the liquid crystal molecules 102 can reach the twist angle more quickly in a smaller area. That is, when the distance between adjacent a and b becomes shorter, the liquid crystal molecules 102 located in the four regions can reach the maximum twist angle in a shorter time.
  • the liquid crystal molecules 102 in this embodiment may be positive liquid crystal molecules or negative liquid crystal molecules.
  • the response time of the liquid crystal molecules 102 is 18 milliseconds.
  • the use of the pixel electrode 10 of the present application can shorten the response time of the liquid crystal molecules 102 to 8-10 milliseconds.
  • the angle between the waist of the trapezoidal portion 1011 and the lower base of the trapezoidal portion 1011 is set to 85.05 degrees, that is, the base angle of the isosceles trapezoid in the plan view is 85.05 degrees, and the length of the lower base of the trapezoidal portion 1011 is set.
  • the response time of the liquid crystal molecules 102 obtained by the test can be shortened to 8 msec; the length of the lower bottom side of the trapezoidal portion 1011 is set to 3.6 ⁇ m and the phase is
  • the response time of the liquid crystal molecules 102 obtained by the test can be shortened to 9 msec; the length of the lower bottom side of the trapezoidal portion 1011 is set to 4.6 ⁇ m and the adjacent pairs are
  • the response time of the liquid crystal molecules 102 obtained by the test can be shortened to 9 msec. It can be seen that the response speed of the liquid crystal molecules 102 can be significantly improved by using the pixel electrode 10 of the present application.
  • the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended to divide the active area of the liquid crystal molecules between the pixel electrodes into more and smaller units, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby improving the liquid crystal.
  • the response speed of the display is: different from the prior art, the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended to divide the active area of the liquid crystal molecules between the pixel electrodes into more and smaller units, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby improving the liquid
  • FIG. 2A is a schematic structural view of an embodiment of an array substrate provided by the present application.
  • 2B is a schematic structural view of a plan view of an embodiment of the array substrate provided by the present application.
  • the array substrate 20 includes a substrate 201, a common electrode 202 disposed on the substrate 201, an insulating layer 203 disposed on the common electrode 202, and a pixel electrode 204 disposed on the insulating layer 203.
  • the substrate 201 is a glass substrate
  • the material of the common electrode 202 is indium tin oxide
  • the material of the insulating layer 203 is silicon nitride or silicon oxide.
  • the substrate 201 is a glass substrate, which is a specific embodiment. In other embodiments, the substrate 201 may also be a transparent plastic substrate, which is not specifically limited herein.
  • the pixel electrode 204 includes three sub-pixel electrodes 2041 and an intermediate portion 2042.
  • the intermediate portion 2042 and the three sub-pixel electrodes 2041 connected to each other through the intermediate portion 2042 are integral, and the whole is a pixel electrode.
  • the number of the sub-pixel electrodes 2041 in the pixel electrode 204 may also be two, four, five or other quantities, which is not specifically limited herein.
  • the preparation of the array substrate 20 includes the following steps:
  • the substrate 201 is sequentially washed mainly by acetone, ethanol, deionized water or the like to remove oil stains and impurities on the surface of the substrate 201, and then the substrate 201 is dried in a nitrogen atmosphere.
  • the substrate 201 after the completion of the treatment is used in the next step.
  • a common electrode is formed on the substrate.
  • the material of the common electrode 202 is indium tin oxide.
  • the common electrode 202 may be formed on the substrate 201 by a physical plating method of magnetron sputtering or evaporation coating, or the common electrode 202 may be formed on the substrate 201 by means of electroless plating, which is not specifically limited. After the formation of the common electrode 202, the common electrode 202 is generally more uniformly stabilized by post-annealing.
  • an insulating layer is formed on the common electrode.
  • the insulating layer 203 is formed on the common electrode 202 by physical or chemical plating, and the insulating layer 203 mainly protects the common electrode 202.
  • a pixel electrode is formed on the insulating layer.
  • the material of the pixel electrode 204 is indium tin oxide. Specifically, a layer of indium tin oxide is first plated on the insulating layer 203, that is, the pixel electrode 204 is located on a side of the insulating layer 203 away from the common electrode 202, and then the indium tin oxide layer is patterned by using a mask. The desired pixel electrode 204 is obtained.
  • the shape of the three sub-pixel electrodes 2041 on the plan view surface is the shape shown in FIG. 2B.
  • the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended to divide the active area of the liquid crystal molecules between the pixel electrodes into more and smaller units, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby improving the liquid crystal.
  • the response speed of the display is: different from the prior art, the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended to divide the active area of the liquid crystal molecules between the pixel electrodes into more and smaller units, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby improving the liquid
  • FIG. 3 is a schematic structural diagram of an embodiment of a liquid crystal display panel provided by the present application.
  • the liquid crystal display panel 30 includes an array substrate 301, a color filter substrate 302, and a liquid crystal layer 303 between the array substrate 301 and the color filter substrate 302.
  • the array substrate 301 includes a substrate 3011, a common electrode 3012 disposed on the substrate 3011, an insulating layer 3013 disposed on the common electrode 3012, and a pixel electrode 3014 disposed on the insulating layer 3013.
  • the substrate 3011 is a glass substrate
  • the common electrode 3012 is made of indium tin oxide
  • the insulating layer 3013 is made of silicon nitride or silicon oxide.
  • the liquid crystal molecules in the liquid crystal layer 303 may be positive liquid crystal molecules or negative liquid crystal molecules.
  • the vertical plane of the sub-pixel electrode is represented by a broken line c
  • the vertical plane between adjacent two sub-pixel electrodes is represented by a broken line d.
  • the long axis of the liquid crystal molecules between the median plane c and the median plane d is not perpendicular to the plane in which the pixel electrode 3014 is located.
  • the long axis of the liquid crystal molecules located on the median plane c and the median plane d is perpendicular to the plane in which the pixel electrode 3014 is located, and the liquid crystal molecules whose major axis is perpendicular to the plane of the pixel electrode 3014 are not rotated, thereby forming an anchor.
  • the liquid crystal molecules are divided into more and smaller cells in the active region of the pixel electrode, that is, the active region of the liquid crystal molecules becomes smaller, so that the liquid crystal molecules can reach the maximum twist angle more quickly, thereby improving the response speed of the liquid crystal display panel.
  • the response time of liquid crystal molecules is 18 milliseconds.
  • the response time of the liquid crystal display panel 30 of the present application can be shortened to 8-10 milliseconds. It can be seen that the response speed of the liquid crystal molecules can be remarkably improved by using the liquid crystal display panel 30 of the present application.
  • the pixel electrode 3014 includes three sub-pixel electrodes 30141 and an intermediate portion. In other embodiments, the pixel electrode 3014 may also include other numbers of sub-pixel electrodes, which are not specifically limited herein.
  • a black matrix may be disposed on the color filter substrate 302, and the contrast of the liquid crystal display panel 30 can be improved by setting the black matrix to make the picture color more vivid.
  • the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended, and the liquid crystal molecules can be divided into more and smaller units in the active area of the pixel electrode, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby improving the liquid crystal display.
  • the speed of response is: different from the prior art, the pixel electrode of the present application includes a plurality of sub-pixel electrodes and an intermediate portion, and the plurality of sub-pixel electrodes are connected to each other through the intermediate portion, and the intermediate portion is provided by the intermediate portion to the two
  • the side is gradually extended, and the liquid crystal molecules can be divided into more and smaller units in the active area of the pixel electrode, so that the active area of the liquid crystal molecules becomes smaller, and the liquid crystal molecules can reach the maximum twist angle more quickly, thereby

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Abstract

一种像素电极（10）、阵列基板及液晶显示面板，像素电极（10）包括多个子像素电极（101）和中间部（103），多个子像素电极（101）通过中间部（103）相互连接，通过设置每个子像素电极（101）由中间部（103）向两侧呈渐收状延伸，能够将液晶分子（102）在像素电极（10）的活动区域划分为更多更小的单元，从而液晶分子（102）的活动区域变小，液晶分子（102）能更快的达到最大扭转角度，进而提高液晶显示器的响应速度。

Description

像素电极、阵列基板及液晶显示面板
【技术领域】
本申请涉及液晶显示技术领域，特别是涉及一种像素电极、阵列基板及液晶显示面板。
【背景技术】
边缘场开关(Fringe Field Switching，FFS)型液晶显示器具有高穿透、广视角等优点，已被广泛应用于中小尺寸显示器中。FFS型液晶显示器是利用边界电场使液晶盒内的液晶分子在平行于基板的平面内旋转，产生光程差，进而达到显示的效果。
现有的FFS液晶显示器虽然在画面显示、色彩、视角等方面表现良好，但是响应时间都比较慢，在正常温度使用时虚拟现实(VR)时影响很大，会有严重的动态模糊效应；或者在低温车载显示器的环境中时，温度对其的影响变大，因低温环境中的液晶分子旋转变得更慢，致使响应延迟，进而引起严重的动态模糊效应。
因此，有必要提供一种像素电极、阵列基板及液晶显示面板以解决上述技术问题。
【发明内容】
本申请主要解决的技术问题是提供一种像素电极、阵列基板及液晶显示面板，通过本申请的像素电极能够使液晶分子更快的达到最大扭转角度，从而提高液晶显示器的响应速度。
为解决上述技术问题，本申请采用的第一个技术方案是提供一种像素电极，该像素电极包括多个子像素电极和中间部，多个子像素电极通过中间部相互连接，并且每个子像素电极由中间部向两侧呈渐收状延伸。
为解决上述技术问题，本申请采用的第二个技术方案是提供一种阵列基板，该阵列基板包括像素单元，像素单元包括多个子像素，每一子像素包括像素电极，每个像素电极包括多个子像素电极和中间部，多个子像素电极通过中间部相互连接，并且每个子像素电极由中间部向两侧呈渐收状延伸。
为解决上述技术问题，本申请采用的第三个技术方案是提供一种液晶显示面板，该液晶显示器包括阵列基板，阵列基板包括像素单元，像素单元包括多个子像素，每一子像素包括像素电极，该像素电极包括多个子像素电极和中间部，多个子像素电极通过中间部相互连接，并且每个子像素电极由中间部向两侧呈渐收状延伸。
本申请的有益效果是：区别于现有技术的情况，本申请的像素电极包括多个子像素电极和中间部，多个子像素电极通过中间部相互连接，通过设置每个子像素电极由中间部向两侧呈渐收状延伸，能够将液晶分子在像素电极的活动区域划分为更多更小的单元，从而液晶分子的活动区域变小，液晶分子能更快的达到最大扭转角度，进而提高液晶显示器的响应速度。
【附图说明】
图1A是本申请提供的像素电极一实施方式的结构示意图；
图1B是图1A中的像素电极通电后形成的电场控制液晶分子的排布一实施方式的俯视结构示意图；
图2A是本申请提供的阵列基板一实施方式横截面的结构示意图；
图2B是本申请提供的阵列基板一实施方式俯视面的结构示意图；
图3是本申请提供的液晶显示面板一实施方式的结构示意图。
【具体实施方式】
本申请提供，为使本申请的目的、技术方案和技术效果更加明确、清楚，以下对本申请进一步详细说明，应当理解此处所描述的具体实施条例仅用于解释本申请，并不用于限定本申请。
像素单元中至少包括两个子像素，一般的像素单元包括红(R)、绿(G)、蓝(B)三个子像素，每个子像素中包括像素电极，且每个子像素的像素电极都是独立控制的。为了提高液晶显示器的响应速度，本申请的像素电极包括多个子像素电极和中间部，多个子像素电极通过该中间部相互连接，并且每个子像素电极由该中间部向两侧呈渐收状延伸。本申请描述的中间部以及与中间部连接的多个子像素电极为一整体，且这一整体为一个像素电极。以下，以一个像素电极包括三个子像素电极，且每个子像素电极包括一对梯形部为例进行具体说明。
请参阅图1A，图1A是本申请提供的像素电极一实施方式的结构示意图。如图1A所示，像素电极10包括三个子像素电极101和中间部103，三个子像素电极101通过中间部103相互连接。三个子像素电极101均包括以中间部103为轴呈轴对称设置的一对梯形部1011，梯形部1011和中间部103在俯视面上的形状分别为等腰梯形和矩形。一对梯形部1011的两个下底边相对设置，且一对梯形部1011的两个下底边分别与中间部103相连。梯形部1011的腰与梯形部1011的下底边的夹角为84度~87度。图1A中的字母L代表梯形部1011的下底边的长度，字母S代表相邻两对梯形部1011之间的距离。中间部103以及通过中间部103相互连接的三个子像素电极101为一个整体，这一个整体为一个像素电极。
本实施例中的像素电极10包括三个子像素电极101只是一具体实施方式，在其他实施例中，像素电极10也可以包括两个、四个、五个或其它数量的子像素电极101，在此不做具体限定。
本实施方式中，梯形部1011在俯视面上的形状为等腰梯形，在其他实施方式中，梯形部1011也可以为其他梯形，在此不做具体限定。
控制梯形部1011的下底边的长度和相邻两对梯形部1011之间的距离保持不变时，改变梯形部1011的腰与下底边的夹角，通过大量模拟测试后发现，梯形部1011的腰与梯形部1011的下底边的夹角优选为84.9度~85.2度时，能加快液晶分子的响应速度，即在俯视面上，梯形的两个底角为84.9度~85.2度。
更优选地，在俯视面上，梯形的两个底角为85.05度。
控制梯形部1011的腰与下底边的夹角保持不变时，改变梯形部1011的下底边的长度和相邻两对梯形部1011之间的距离，通过大量模拟测试后发现，梯形部1011的下底边的长度优选为3 .6微米~4.6微米，相邻两对梯形部1011之间的距离优选为3.6微米~4.6微米时，能加快液晶分子的响应速度。
更优选地，梯形部1011的下底边的长度为4.1微米，相邻两对梯形部1011之间的距离为4.1微米。
在另一具体实施方式中，梯形部1011的上底边的长度小于下底边的长度，且上底边的长度大于下底边的长度的四分之一。
本实施例中，像素电极10的材质为氧化铟锡，在其他实施例中也可以为其他材质，在此不做具体限定。
本实施方式中，中间部103在俯视面上的形状为矩形，在其他实施方式中，中间部103也可以为其他形状，在此不做具体限定。
请参阅图1B，图1B是图1A中的像素电极通电后形成的电场控制液晶分子的排布一实施方式的俯视结构示意图。如图1B所示，用虚线a代表图1A中每个梯形部1011的中垂面，用虚线b代表相邻两对梯形部1011之间的中垂面。对应于图1A中的三个子像素电极101，图1B中共有三条虚线a和两条虚线b，分别表示三对梯形部1011的中垂面和两个相邻两梯形部1011之间的中垂面。从图1B中可以看出，位于中垂面a和中垂面b之间的液晶分子102的长轴与像素电极10所在的平面不垂直。位于梯形部1011中垂面上的液晶分子102和位于相邻两对梯形部1011之间的中垂面上的液晶分子102的长轴与像素电极10所在的平面垂直，这部分长轴垂直于像素电极10所在平面的液晶分子102不发生转动，即形成锚定，进而将液晶分子102在子像素电极101的活动区域划分为更多更小的单元，即液晶分子102的活动区域变小，从而液晶分子102能更快的达到最大扭转角度，进而能提高液晶分子102的响应速度。
具体地，如图1B所示，位于a平面和b平面上的液晶分子102不发生转动，即将液晶分子102的活动区域划分为了四个区域，每相邻两a和b之间的区域为一个区域，现有技术中划分的区域小于四个。相对于现有技术而言，活动总区域的大小相同时，图1B所示的液晶分子102的每个活动区域变小，则液晶分子102在更小的区域内能更快的达到扭转角，即相邻a和b之间的距离变短时，位于四个区域内的液晶分子102均能在更短的时间内达到最大扭转角。
本实施例中的液晶分子102可以为正性液晶分子或负性液晶分子。
普通的FFS型液晶显示器中，液晶分子102的响应时间为18毫秒。通过大量试验，使用本申请的像素电极10能使液晶分子102的响应时间缩短为8-10毫秒。
具体地，将梯形部1011的腰与梯形部1011的下底边的夹角设为85.05度，即俯视面上等腰梯形的底角为85.05度，并且将梯形部1011的下底边的长度和相邻两对梯形部1011之间的距离均设置为4.1微米时，试验得到液晶分子102的响应时间可以缩短为8毫秒；将梯形部1011的下底边的长度设为3.6微米以及将相邻两对梯形部1011之间的距离设置为4.6微米时，试验得到液晶分子102的响应时间可以缩短为9毫秒；将梯形部1011的下底边的长度设为4.6微米以及将相邻两对梯形部1011之间的距离设置为3.6微米时，试验得到液晶分子102的响应时间可以缩短为9毫秒。可见，通过使用本申请的像素电极10能够明显提高液晶分子102的响应速度。
本申请的有益效果是：区别于现有技术的情况，本申请的像素电极包括多个子像素电极和中间部，多个子像素电极通过中间部相互连接，通过设置每个子像素电极由中间部向两侧呈渐收状延伸，能够将液晶分子在像素电极间的活动区域划分为更多更小的单元，从而液晶分子的活动区域变小，液晶分子能更快的达到最大扭转角度，进而提高液晶显示器的响应速度。
请参阅图2A~图2B，图2A是本申请提供的阵列基板一实施方式横截面的结构示意图。图2B是本申请提供的阵列基板一实施方式俯视面的结构示意图。阵列基板20包括基底201、设置在基底201上的公共电极202、设置于公共电极202上的绝缘层203、设置于绝缘层203上的像素电极204。其中，基底201为玻璃基底，公共电极202的材质为氧化铟锡，绝缘层203的材质为氮化硅或氧化硅。
本实施例中，基底201为玻璃基底只是一具体实施方式，在其他实施例中，基底201也可以为透明塑料基底，在此不做具体限定。
本具体实施例中，像素电极204包括三个子像素电极2041和中间部2042，中间部2042和通过中间部2042相互连接的三个子像素电极2041为一整体，这一整体为一个像素电极。在其他实施方式中，像素电极204中的子像素电极2041的数量也可以为两个、四个、五个或其它的数量，在此不做具体限定。
本实施例中，阵列基板20的制备包括以下几个步骤：
第一步，准备基底。
此过程，主要通过丙酮、乙醇、去离子水等依次对基底201进行清洗，以去除基底201表面的油污和杂质，然后在氮气的氛围中对基底201进行干燥处理。处理完成后的基底201用于下一步骤中。
第二步，在基底上形成公共电极。
本实施例中，公共电极202的材质为氧化铟锡。可以通过磁控溅射或蒸发镀膜的物理镀膜方式在基底201上形成公共电极202，也可以通过化学镀膜的方式在基底201上形成公共电极202，在此不做具体限定。形成公共电极202后，一般通过后退火处理使公共电极202更均匀稳定。
第三步，在公共电极上形成绝缘层。
通过物理或化学镀膜的方式在公共电极202上形成绝缘层203，绝缘层203主要对公共电极202起保护作用。
第四步，在绝缘层上形成像素电极。
本步骤中，像素电极204的材质为氧化铟锡。具体地，先在绝缘层203上镀一层氧化铟锡，即像素电极204位于绝缘层203的远离公共电极202的一侧表面，再通过使用掩膜板对氧化铟锡层进行图案化，以得到所需的像素电极204。
本实施例中，三个子像素电极2041在俯视面上的形状为图2B中所示的形状。
本申请的有益效果是：区别于现有技术的情况，本申请的像素电极包括多个子像素电极和中间部，多个子像素电极通过中间部相互连接，通过设置每个子像素电极由中间部向两侧呈渐收状延伸，能够将液晶分子在像素电极间的活动区域划分为更多更小的单元，从而液晶分子的活动区域变小，液晶分子能更快的达到最大扭转角度，进而提高液晶显示器的响应速度。
请参阅图3，图3是本申请提供的液晶显示面板一实施方式的结构示意图。如图3所示，液晶显示面板30包括阵列基板301、彩膜基板302、以及位于阵列基板301和彩膜基板302之间的液晶层303。阵列基板301包括基底3011、设置在基底3011上的公共电极3012、设置于公共电极3012上的绝缘层3013、设置于绝缘层3013上的像素电极3014。其中，基底3011为玻璃基底，公共电极3012的材质为氧化铟锡，绝缘层3013的材质为氮化硅或氧化硅。液晶层303中的液晶分子可以为正性液晶分子或负性液晶分子。
具体地，在图3中，用虚线c代表子像素电极的中垂面，用虚线d代表相邻两个子像素电极之间的中垂面，图3中共有三条虚线c和两条虚线d，分别代表三个子像素电极的三个中垂面和两个相邻两子像素电极之间的中垂面。从图3中可以看到，位于中垂面c和中垂面d之间的液晶分子的长轴与像素电极3014所在的平面不垂直。位于中垂面c和中垂面d上的液晶分子的长轴与像素电极3014所在的平面垂直，这部分长轴垂直于像素电极3014所在平面的液晶分子不发生转动，即形成锚定，进而将液晶分子在像素电极的活动区域划分为更多更小的单元，即液晶分子的活动区域变小，从而液晶分子能更快的达到最大扭转角度，进而能提高液晶显示面板的响应速度。
普通的FFS型液晶显示器中，液晶分子的响应时间为18毫秒。通过大量试验，本申请的液晶显示面板30的响应时间能缩短为8-10毫秒。可见，通过使用本申请的液晶显示面板30能够明显提高液晶分子的响应速度。
本实施例中，像素电极3014包括三个子像素电极30141和中间部，在其他实施方式中，像素电极3014也可以包括其他数量的子像素电极，在此不做具体限定。
在其他实施例中，彩膜基板302上还可以设置黑矩阵，通过设置黑矩阵能改善液晶显示面板30的对比度，使画面色彩更鲜艳。
本申请的有益效果是：区别于现有技术的情况，本申请的像素电极包括多个子像素电极和中间部，多个子像素电极通过中间部相互连接，通过设置每个子像素电极由中间部向两侧呈渐收状延伸，能够将液晶分子在像素电极的活动区域划分为更多更小的单元，从而液晶分子的活动区域变小，液晶分子能更快的达到最大扭转角度，进而提高液晶显示器的响应速度。
以上所述仅为本申请的实施方式，并非因此限制本申请的专利保护范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (20)

  1. 一种像素电极，其中，所述像素电极包括多个子像素电极和中间部，多个所述子像素电极通过所述中间部相互连接，并且每个所述子像素电极由所述中间部向两侧呈渐收状延伸。
  2. 根据权利要求1所述的像素电极，其中，每个所述子像素电极包括以所述中间部为轴呈轴对称设置的一对梯形部，所述一对梯形部的两个下底边相对设置，且两个所述下底边分别与所述中间部相连，所述梯形部的腰与所述梯形部的下底边的夹角为84度~87度。
  3. 根据权利要求2所述的像素电极，其中，所述梯形部的腰与所述梯形部的下底边的夹角为84.9度~85.2度。
  4. 根据权利要求2所述的像素电极，其中，所述梯形部和所述中间部在俯视面上的形状分别为等腰梯形和矩形。
  5. 根据权利要求4所述的像素电极，其中，所述像素电极包括三对梯形部，所述梯形部的下底边的长度为3 .6微米~4.6微米，所述相邻两对梯形部之间的距离为3.6微米~4.6微米。
  6. 根据权利要求4所述的像素电极，其中，所述梯形部的上底边的长度大于下底边长度的四分之一。
  7. 一种阵列基板，所述阵列基板包括像素单元，所述像素单元包括多个子像素，每一所述子像素包括像素电极，其中，所述像素电极包括多个子像素电极和中间部，多个所述子像素电极通过所述中间部相互连接，并且每个所述子像素电极由所述中间部向两侧呈渐收状延伸。
  8. 根据权利要求7所述的阵列基板，其中，所述阵列基板还包括依次设置的基底、公共电极、绝缘层，所述像素电极设置在所述绝缘层远离所述公共电极的一侧表面。
  9. 根据权利要求7所述的阵列基板，其中，每个所述子像素电极包括以所述中间部为轴呈轴对称设置的一对梯形部，所述一对梯形部的两个下底边相对设置，且两个所述下底边分别与所述中间部相连，所述梯形部的腰与所述梯形部的下底边的夹角为84度~87度。
  10. 根据权利要求9所述的阵列基板，其中，所述梯形部的腰与所述梯形部的下底边的夹角为84.9度~85.2度。
  11. 根据权利要求9所述的阵列基板，其中，所述梯形部和所述中间部在俯视面上的形状分别为等腰梯形和矩形。
  12. 根据权利要求11所述的阵列基板，其中，所述像素电极包括三对梯形部，所述梯形部的下底边的长度为3 .6微米~4.6微米，所述相邻两对梯形部之间的距离为3.6微米~4.6微米。
  13. 根据权利要求11所述的阵列基板，其中，所述梯形部的上底边的长度大于下底边长度的四分之一。
  14. 一种液晶显示面板，所述液晶显示面板包括阵列基板，所述阵列基板包括像素单元，所述像素单元包括多个子像素，每一所述子像素包括像素电极，其中，所述像素电极包括多个子像素电极和中间部，多个所述子像素电极通过所述中间部相互连接，并且每个所述子像素电极由所述中间部向两侧呈渐收状延伸。
  15. 根据权利要求14所述的液晶显示面板，其中，所述液晶显示面板还包括与所述阵列基板相对设置的彩膜基板，以及设置于所述阵列基板和所述彩膜基板之间的液晶层。
  16. 根据权利要求14所述的液晶显示面板，其中，每个所述子像素电极包括以所述中间部为轴呈轴对称设置的一对梯形部，所述一对梯形部的两个下底边相对设置，且两个所述下底边分别与所述中间部相连，所述梯形部的腰与所述梯形部的下底边的夹角为84度~87度。
  17. 根据权利要求16所述的液晶显示面板，其中，所述梯形部的腰与所述梯形部的下底边的夹角为84.9度~85.2度。
  18. 根据权利要求16所述的液晶显示面板，其中，所述梯形部和所述中间部在俯视面上的形状分别为等腰梯形和矩形。
  19. 根据权利要求18所述的液晶显示面板，其中，所述像素电极包括三对梯形部，所述梯形部的下底边的长度为3 .6微米~4.6微米，所述相邻两对梯形部之间的距离为3.6微米~4.6微米。
  20. 根据权利要求18所述的液晶显示面板，其中，所述梯形部的上底边的长度大于下底边长度的四分之一。
PCT/CN2018/096507 2018-03-30 2018-07-20 像素电极、阵列基板及液晶显示面板 WO2019184153A1 (zh)

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CN114355687B (zh) * 2022-01-12 2023-10-31 武汉华星光电技术有限公司 阵列基板、液晶显示面板及显示装置
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