WO2019072010A1 - 芯片及墨盒 - Google Patents

芯片及墨盒 Download PDF

Info

Publication number
WO2019072010A1
WO2019072010A1 PCT/CN2018/099628 CN2018099628W WO2019072010A1 WO 2019072010 A1 WO2019072010 A1 WO 2019072010A1 CN 2018099628 W CN2018099628 W CN 2018099628W WO 2019072010 A1 WO2019072010 A1 WO 2019072010A1
Authority
WO
WIPO (PCT)
Prior art keywords
row
chip
mounting
contact
contact portion
Prior art date
Application number
PCT/CN2018/099628
Other languages
English (en)
French (fr)
Inventor
康泽华
贾志铮
邱涌群
夏敬章
陈伟健
Original Assignee
珠海纳思达企业管理有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 珠海纳思达企业管理有限公司 filed Critical 珠海纳思达企业管理有限公司
Priority to EP18865563.3A priority Critical patent/EP3666527B1/en
Publication of WO2019072010A1 publication Critical patent/WO2019072010A1/zh

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/17Ink jet characterised by ink handling
    • B41J2/175Ink supply systems ; Circuit parts therefor
    • B41J2/17503Ink cartridges
    • B41J2/17526Electrical contacts to the cartridge
    • B41J2/1753Details of contacts on the cartridge, e.g. protection of contacts
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/17Ink jet characterised by ink handling
    • B41J2/175Ink supply systems ; Circuit parts therefor
    • B41J2/17503Ink cartridges
    • B41J2/1752Mounting within the printer
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/17Ink jet characterised by ink handling
    • B41J2/175Ink supply systems ; Circuit parts therefor
    • B41J2/17503Ink cartridges
    • B41J2/1752Mounting within the printer
    • B41J2/17523Ink connection
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/17Ink jet characterised by ink handling
    • B41J2/175Ink supply systems ; Circuit parts therefor
    • B41J2/17503Ink cartridges
    • B41J2/17543Cartridge presence detection or type identification
    • B41J2/17546Cartridge presence detection or type identification electronically

Definitions

  • the present invention relates to the field of inkjet printer technology, and more particularly to chips and ink cartridges.
  • Ink cartridges have become a consumable part of inkjet printers.
  • the ink cartridge is provided with a chip, and the ink cartridge chip is used for storing information such as manufacturer information, ink amount information, ink cartridge type information, ink color, etc., and the ink cartridge chip plays a decisive role for the normal operation of the inkjet printer.
  • FIG. 1 is a schematic view of the ink cartridge 10 to be mounted to the mounting portion 90.
  • 2 is a schematic diagram of a prior art chip 20.
  • the mounting portion 90 is a component of a printer for carrying a plurality of or one ink cartridge 10, and the ink cartridge 10 is detachably mounted in the mounting portion 90 in the mounting direction P.
  • the ink cartridge 10 includes a chip 20, a handle 30, an ink outlet 40, and a casing 50.
  • the mounting portion 90 has a stylus portion 91 and an ink supply portion 92.
  • Ink is stored in the casing 50, and the ink reaches the ink supply portion 92 through the ink discharge port 40, and the ink supply portion 92 can supply the ink to the print head, so that the ink can be used to perform the printing operation.
  • the chip 20 has a terminal set 200, and the terminal set 200 can be in electrical contact with the contact pin 91a of the stylus portion 91 for mutual transmission between electrical signals.
  • the handle 30 is used to fix the ink cartridge 10 to the mounting portion 90 to prevent the ink cartridge 10 from being detached from the mounting portion 90.
  • the prior art chip 20 has a substrate 20a, a terminal group 200 disposed on the substrate 20a, and a memory (not shown).
  • the terminal set 200 includes nine terminals 201-209, and the nine terminals are divided into first terminals 201, 204, 205, 209 and second terminals 202, 203, 206-208.
  • the first terminal is a terminal for performing mounting detection when the ink cartridge 10 is mounted to the mounting portion 90.
  • the second terminal is a terminal other than the first terminal. At least a portion of the terminals of the second terminal are for connection to a memory of the chip 20.
  • Each of the nine terminals 201-209 includes a contact portion 201a-209a that is in contact with the stylus 91a.
  • the nine contact portions 201a-209a are arranged in two rows in the mounting direction P (first row L1, second row L2), and the nine contact portions 201a-209a are staggered in the width direction T perpendicular to the mounting direction P. Arranged.
  • the contact portions 201a, 204a of the terminals 201, 204 in the first terminal and the second contact portions 202a, 203a of the terminals 202, 203 in the second terminal are disposed in the first row L1, and the contact portions 201a, 204a are respectively located Both ends of the width direction T of one row L1; the contact portions 205a, 209a of the terminals 205, 209 in the first terminal and the second contact portions 206a-208a of the terminals 206-208 in the second terminal are disposed in the second row L2
  • the contact portions 205a and 209a are respectively located at both ends of the width direction T of the second row L2.
  • the input voltages of the first terminals 201, 204, 205, and 209 are generally different from the second terminals 202, 203, and 206-208.
  • the electrical signal on each terminal is within a certain range, and the chip 20 can perform installation detection and signal transmission normally.
  • a voltage difference between the first terminal and the second terminal for example, a first terminal for mounting detection is input with a high voltage of 42V, and a second terminal connected to the memory is input with a low voltage of 3.3V
  • the first terminal and the second terminal of the installation detection are arranged in a manner as shown in FIG. 2, and the first terminal and the second terminal are too close to cause signal interference between the installation detection signal on the first terminal and the signal on the second terminal.
  • the disturbed terminal may be mistaken for a data signal (for example, a 42V high voltage on the first terminal may cause a glitch on the adjacent terminal to cause the terminal to be mistaken for a data signal).
  • a signal interference between the terminals occurs between the first terminal and the second terminal, which may cause an erroneous data signal to appear in the terminal, and the terminal group 200 of the chip 20 may not work normally.
  • the invention provides a chip and an ink cartridge for solving the technical problem that signals interfere with each other between terminals in the prior art.
  • a first aspect of an embodiment of the present invention provides a chip for mounting to an ink cartridge for mounting in a mounting direction in a mounting direction in a printer; the chip including a memory for mounting Detecting the first contact portion and the second contact portion; at least one of the second contact portions is electrically connected to the memory; the first contact portion and the second contact portion are respectively in contact with the printer Needle contact;
  • the first contact portions are arranged in a plurality of rows in the mounting direction;
  • one or more rows formed by the second contact portions are disposed between the plurality of rows formed by the first contact portions; or, the plurality of rows formed by the second contact portions are disposed between the rows The plurality of rows formed by the first contact portion.
  • the first contact portion includes: a first group of mounting detecting contacts connected to each other, and a second group of mounting detecting contacts connected to each other; the first group of mounting detecting contacts and the second group of mounting The detecting contacts are arranged in a plurality of rows in the mounting direction.
  • the first set of mounting detecting contacts form a first row in the mounting direction; the second set of mounting detecting contacts form a second row in the mounting direction; the second contact One or more rows formed are disposed between the first row and the second row.
  • the first set of mounting detecting contacts are connected by wires, and the second set of mounting detecting contacts are connected by resistance; the second set of mounting detecting contacts are applied with a voltage higher than the first A set of voltages that are installed to detect the contacts.
  • the second contact portion includes a ground contact portion not connected to the memory; and further includes a power source contact portion, a data contact portion, and a reset contact portion connected to the memory.
  • the chip includes: a plurality of first terminals, a plurality of second terminals; a plurality of the first contacts are disposed on the plurality of the first terminals, and the plurality of the second contacts are disposed at A plurality of said second terminals.
  • the chip includes: a plurality of first terminals and a plurality of second terminals; in the mounting direction, a row formed by the second terminals is disposed between the plurality of rows formed by the first terminals or Multiple rows.
  • the plurality of rows formed by the first contact portion and the one or more rows of the second contact portion are spaced apart from each other.
  • the plurality of rows of the first contact portion and the plurality of rows of the second contact portion are spaced apart from each other.
  • the first contact portion forms a first row and a second row; the second contact portion forms a third row and a fourth row; the first row, the second row, and the third row
  • the fourth row is separated from each other one by one.
  • the second row is closer to the front end side of the mounting direction than the third row and the fourth row.
  • the fourth row is closer to the front end side of the mounting direction than the first row and the second row.
  • the chip includes a first portion and a second portion; the first portion and the second portion are fabricated from two circuit substrates.
  • the first portion and the second portion are made of a substrate of different materials; and the second portion is made of a conductive silicone or a conductive metal material.
  • the second contact portion is disposed on the first portion, and the first contact portion is disposed on the second portion.
  • the chip further includes a through portion; the through portion penetrates the chip in a thickness direction of the chip.
  • the chip further includes a substrate, and the first contact portion protrudes more than the second contact portion with respect to the substrate.
  • the first portion is provided with a terminal hole through which the terminal provided with the contact portion on the second portion passes and protrudes relative to the first portion.
  • the first contact portion forms a first row and a second row; the second contact portion forms a third row and a fourth row; the first row and the second row are disposed in the third row Between row and fourth row.
  • the second set of mounting detecting contacts are on the outermost side of all the contact portions, and the first set of mounting detecting contacts are on the outer side of all the contact portions.
  • the first contact portion is located at a front end of the second contact portion in the mounting direction; and the front end is a downstream side of the mounting direction.
  • a distance between each of the first contacts, between each of the second contacts, between each of the first contacts, and each of the second contacts is greater than or equal to Set the distance threshold.
  • a second aspect of the embodiments of the present invention provides an ink cartridge comprising the chip of any of the above.
  • the beneficial effect is that: in the mounting direction, one or more rows formed by the second contact portions are disposed between the plurality of rows formed by the first contact portions; and the plurality of rows formed by the second contact portions are formed
  • a plurality of rows formed by the first contact portions are provided, that is, the first contact portions and the second contact portions are not arranged in the same row, and the structure is advantageous for reducing a voltage difference between the first contact portion and the second contact portion.
  • the non-contact electromagnetic interference causes a glitch wave to prevent the terminal from having an erroneous data signal, and the chip is guaranteed to work normally.
  • Figure 1 is a schematic view of an ink cartridge to be mounted to a mounting portion
  • FIG. 2 is a schematic view of a prior art chip
  • FIG. 3 is a schematic diagram of a chip of Embodiment 1;
  • FIG. 5 is a schematic diagram of a first chip of the second embodiment
  • FIG. 6 is a schematic diagram of a first chip of the second embodiment
  • FIG. 7a and 7b are diagrams showing the structure of a chip of the first embodiment of the second embodiment
  • FIG. 8 is a block diagram of a second embodiment of the second embodiment
  • Figure 10 is a diagram showing the structure of a chip of the first embodiment of the third embodiment
  • FIG. 11 is a block diagram of a second embodiment of the third embodiment.
  • FIG. 12 is a block diagram of a third embodiment of the third embodiment.
  • FIG. 13a and 13b are diagrams showing the structure of a chip according to a fourth embodiment of the third embodiment
  • FIG. 14a and 14b are diagrams showing the structure of a chip according to a fifth embodiment of the third embodiment
  • Figure 15 is a schematic view of the chip of the fourth embodiment
  • Figure 16 is a diagram showing the structure of a chip of the first embodiment of the fourth embodiment.
  • Fig. 17 is a view showing the structure of a chip of the second embodiment of the fourth embodiment.
  • Embodiment 1 is a diagrammatic representation of Embodiment 1:
  • FIG. 1 is a schematic view of the ink cartridge 10 to be mounted to the mounting portion 90.
  • the mounting portion 90 is a component of a printer for carrying a plurality of or one ink cartridge 10, and the ink cartridge 10 is detachably mounted in the mounting portion 90 in the mounting direction P.
  • a chip 20 is mounted on the ink cartridge 10.
  • the ink cartridge 10 includes a chip 20, a handle 30, an ink outlet 40, and a casing 50.
  • the mounting portion 90 has a stylus portion 91 and an ink supply portion 92.
  • Ink is stored in the casing 50, and the ink reaches the ink supply portion 92 through the ink discharge port 40, and the ink supply portion 92 can supply the ink to the print head, so that the ink can be used to perform the printing operation.
  • the chip 20 has a terminal set 200, which can be electrically connected to the stylus 91a of the stylus portion 91 for mutual transmission between electrical signals.
  • the handle 30 is used to fix the ink cartridge 10 to the mounting portion 90 to prevent the ink cartridge 10 from being detached from the mounting portion 90.
  • the chip 20 has a substrate 20a, a terminal group 200 provided on the substrate 20a, and a memory (not shown).
  • the chip may include a terminal group 200 including nine terminals 201-209, and the nine terminals are divided into first terminals 201, 204, 205, 209, second terminals 202, 203, 206-208; It is a terminal for performing mounting detection when the ink cartridge 10 is mounted to the mounting portion 90, the second terminal is a terminal other than the first terminal, and at least a part of the terminal of the second terminal is for connection with the memory of the chip 20.
  • Each of the nine terminals 201-209 includes a contact portion 201a-209a that is in contact with the stylus 91a.
  • the first contact portions 201a, 204a, 205a, 209a are disposed on the first terminals 201, 204, 205, 209, and the second contact portions (not shown in the figure) are disposed at the second terminals 202, 203, 206- 208.
  • the first contact portions are arranged in a plurality of rows in the mounting direction P, that is, the first contact portions 201a, 204a, 205a, and 209a form the row L11 and the row L12.
  • the second contacts on the second terminals 202, 203, 206-208 are arranged in a row in the mounting direction P to form a row L21; the second contacts on the second terminals 202, 203, 206-208 may also The arrangement of a plurality of rows is formed, and FIG. 3 is exemplified only in the case where the second contact portions are arranged in a row L21.
  • the row L21 and the row L11 and the row L12 are arranged at intervals in the mounting direction P, that is, the row L21 and the row L11 and the row L12 are not in the same row in the mounting direction P, and the row L21 is located between the row L11 and the row L12, wherein In the mounting direction P, the second contact portion L21 may be between the row L11 and the row L12 formed by the first contact portion as shown in FIG. 3, or as shown in FIG. 15, the row L11 of the first contact portion. The row L12 is located between the row L21 and the row L22 formed by the second contact portion. Regardless of the arrangement structure of FIG. 3 or FIG.
  • one or more rows formed by the second contact portions between the plurality of rows formed by the first contact portions in the mounting direction P; or, the second The plurality of rows formed by the first contact portions between the plurality of rows formed by the contact portions are both advantageous for reducing non-contact electromagnetic interference caused by a voltage difference between the first contact portion and the second contact portion. Glitch wave, to prevent the wrong data signal from appearing at the terminal, to ensure the normal operation of the chip.
  • the first contact portion 201a, 204a, 205a, 209a may include: a first group of mounting detecting contact portions 200a (201a, 204a) connected to each other, and a second group of mounting detecting contact portions 200b (205a, 209a) connected to each other.
  • the first group of mounting detecting contacts 200a (201a, 204a) and the second group of mounting detecting contacts 200b (205a, 209a) are arranged in a plurality of rows in the mounting direction P; specifically, as shown in FIG.
  • the group mounting detecting contact portions 200a (201a, 204a) form a first row L11 in the mounting direction; the second group mounting detecting contact portions 200b (205a, 209a) form a second row L12 in the mounting direction P; the second contact portion ( A row (L21) or rows formed by the contact portions shown on the second terminals 202, 203, 206-208 are disposed between the first row L11 and the second row L12.
  • the first group of mounting detecting contact portions 201a, 204a form the row L11
  • the second group of mounting detecting contact portions 205a, 209a form the row L12, so that the plurality of first contact portions are grouped and arranged in a row, and the terminal group can be made
  • the 200 has a larger design space to better arrange the layout on the substrate 20a.
  • the first set of mounting detecting contact portions 200a are connected by wires
  • the second group of mounting detecting contact portions 200b are connected by resistance
  • the second group of mounting detecting contact portions 200b 209a
  • the applied voltage is higher than the voltage of the first set of mounting detecting contacts 200a (201a, 204a).
  • the contacts of different groups are connected to different working voltages, and the installation detecting contacts of different groups are not in the same row, and are arranged in a spaced arrangement to further reduce the non-contact caused by the voltage difference between the different groups of detecting contact portions.
  • the glitch wave appears in the electromagnetic interference to prevent the wrong data signal from appearing at the terminal, and the chip is guaranteed to work normally.
  • the first terminals 201, 204, 205, and 209 are divided into two groups at the time of mounting detection, and the first mounting detecting terminal 201 and the second mounting detecting terminal 204 are the first group of mounting detecting terminals;
  • the first contact portions 201a and 204a are connected to each other to form a first group of mounting detecting contact portions 200a;
  • the third mounting detecting terminal 205 and the fourth mounting detecting terminal 209 are second group mounting detecting terminals;
  • the first contact portion 205a thereon and The 209a are connected to each other to form a second set of mounting detecting contacts 200b.
  • the first group mounts the detection terminals 201, 204 with a voltage of 2.4 V input by the printer
  • the second group mounts the detection terminals 205, 209 with a voltage of 42 V input by the printer.
  • the terminals of the second terminals 202, 203, 206-208 that are connected to the memory are input by the printer at a voltage of 3.3 V to maintain the transmission of signals between the chip 20 and the printer.
  • the first contact portion and the second contact portion form a row L11, a row L12, and a row L21.
  • the row L11, the row L12 and the row L21 are spaced apart in the mounting direction P, that is, not in the same row, and are separated and independent.
  • This structure is advantageous for reducing non-contact electromagnetic interference caused by voltage difference between the first group of mounting detecting portions 200a, the second group of mounting detecting portions 200b and the second contact portions of different access voltages, and causing glitch waves. It is beneficial to prevent the wrong data signal from appearing at the terminal and ensure the normal operation of the chip.
  • the second contact portion (such as the contact portion shown on the second terminals 202, 203, 206-208) includes a ground contact portion (contact on the terminal 207) that is not connected to a memory (not shown)
  • the system further includes a power contact portion (contact portion on the terminal 206) connected to the memory, a data contact portion (contact portion on the terminal 208), and a reset contact portion (contact portion on the terminal 202).
  • the functions and functions of the respective terminals in the terminal group 200 are as follows:
  • Terminal 201 a first set of mounting detection terminals
  • Terminal 202 a reset terminal
  • Terminal 203 a clock terminal
  • Terminal 204 a first set of mounting detection terminals
  • Terminal 205 a second set of mounting detection terminals
  • Terminal 206 power terminal
  • Terminal 207 ground terminal
  • Terminal 208 a data terminal
  • Terminal 209 The second group of mounting detection terminals.
  • terminals 202, 203, 206-208 are connected to a memory for transmitting electrical signals to and from the printer, operating at a voltage of 3.3V.
  • Terminal 207 is a ground terminal and has a voltage of 0V.
  • Terminal 207 is not connected to the memory. It will be understood by those skilled in the art that terminal 207 may also be absent from terminal set 200.
  • the input voltage of the row L11 is 2.4V
  • the input voltage of the row L21 is 3.3V
  • the input voltage of the row L12 is 42V
  • the voltage is arranged from low to high. That is to say, the plurality of rows of the first contact portion and/or the second contact portion are arranged in order according to the voltage level to which they are connected, so that the voltage difference between each two rows is as small as possible, thereby reducing the voltage.
  • the glitch wave caused by the non-contact electromagnetic interference caused by the difference is also beneficial to prevent the erroneous data signal from appearing at the terminal and ensure the normal operation of the chip.
  • the arrangement of the first contact portions 201a, 204a, 205a, 209a in FIG. 3 forms a quadrangular shape, and the second contact portion on the second terminal or the second terminal is disposed on the first contact portions 201a, 204a, 205a.
  • the quadrilateral enclosed by 209a good contact between the second terminal and the stylus can be ensured.
  • the outermost periphery of the terminal group 200 is the first contact portion for mounting detection, if the chip 20 and the printer stylus 91a complete the mounting detection during the mounting process of the ink cartridge 10, all the mounting detection terminals (first terminals) are explained. When connected in place, all the positions in the polygon formed by the first contact portion can ensure that the contact is good.
  • the number of the first contact portions may be any number of three or more, as long as the second contact portion conforms to the polygonal shape formed by the first contact portion.
  • the row L12 formed by the first contact portions 205a, 209a of the first terminals 205, 209 is located at the front end of the mounting direction P compared to the row L21 where the second contact portion is located, and the so-called front end is installed.
  • the stylus 91a comes into contact with the terminal for mounting detection, and then contacts the terminal connected to the memory, preventing the chip 20 from being misaligned or the terminal connected to the memory being connected incorrectly.
  • the second group mounting detecting contact portion 200b is on the outermost side of all the contact portions
  • the first group mounting detecting contact portion 200a is on the outer side of all the contact portions. As shown in FIG.
  • the first contact portions 205a and 209a of the second set of the detecting contact portions 200b are the outermost sides in the vertical direction T, and the first groups of the first contact portions 201a and 204a of the first set of the detecting contact portions 200a are mounted,
  • the innermost side is the second terminals 202, 203, 206-208 where the remaining second contacts are located.
  • the terminal of the high voltage input (the terminal 205, 209 is input with a voltage of 42 V) on the outermost side
  • the second outer side is the terminal with the second highest voltage (the terminals 201 and 204 are input with a voltage of 2.4 V)
  • the innermost side is the innermost side.
  • the layout of the terminal with a lower input voltage makes the voltage difference between adjacent terminals as small as possible, thereby reducing the non-contact electromagnetic interference caused by the voltage difference and causing a glitch wave. It is also beneficial to prevent the terminal from having an erroneous data signal and to ensure the normal operation of the chip.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • FIG. 4 is a schematic view of the on-chip contact portion of the second embodiment.
  • FIG. 5 is a schematic diagram of a first chip of the second embodiment.
  • 6 is a schematic diagram of a first chip of the second embodiment.
  • Figure 4 omits the terminals on the chip and only shows a schematic view of the contacts.
  • Figures 5 and 6 are schematic views of two types of chips, respectively.
  • 7a and 7b are diagrams showing the structure of a chip of the first embodiment of the second embodiment.
  • Fig. 8 is a view showing the structure of a chip of a second embodiment of the second embodiment. As shown in Figs.
  • the first contact portions 201a, 204a, 205a, 209a of the first terminals 201, 204, 205, 209 form a row L11 and a row L12.
  • the second contact portions 202a, 203a, 206a-208a of the second terminals 202, 203, 206-208 form a row L21 and a row L22 in the mounting direction P.
  • One or more rows (rows L21, L22) formed by the second contact portions are disposed between the plurality of rows (rows L11, L12) formed by the first contact portions; or, the plurality of rows formed by the second contact portions ( A plurality of rows (rows L11, rows L12) formed by the first contact portions are disposed between the row L21 and the row L22), and the advantageous effects of the present application can still be achieved.
  • the plurality of rows of the first contact portion (the row L11, the row L12) and the plurality of rows of the second contact portion (the row L21, the row L22) are spaced apart from each other. That is, in the mounting direction P, the first contact portion forms the first row L11 and the second row L12; the second contact portion forms the third row L21 and the fourth row L22; the first row L11, the second row L12 and the third row L21 and the fourth row L22 are spaced apart from each other. Thereby, the first contact portion and the second contact portion sequentially form the row L21, the row L11, the row L22, and the row L12.
  • the structure is such that the first terminal and the second terminal, or the first contact portion and the second contact portion, are spaced apart from each other, so that the design space of the terminal is large, which is advantageous for increasing the spacing between the terminals and reducing the terminal. Electromagnetic interference between the two.
  • the second row (row L12) (the row L12 formed by the first contact portions 205a, 209a) is closer to the front end side of the mounting direction P than the third row L21 and the fourth row L22, that is, The row L12 is located at the foremost end side of the mounting direction P.
  • the terminal of the row L12 first contacts the stylus 91a, and the mounting detection is performed first, and then the second terminal of the row L22 is touched again. Since the needle 91a can be used for mounting detection during the mounting process, the terminal connected to the memory contacts the contact 91a, and the chip 20 is prevented from being misaligned or the terminal connected to the memory is connected incorrectly.
  • Figures 5 and 6 show two specific arrangements of the terminal arrangement. As long as the contact portion is guaranteed to be distributed as shown in FIG. Further, the arrangement of the terminals of the chip 20 is not limited to the arrangement of FIG. 5 or FIG. 6, and the arrangement manner may be various. The arrangement of the terminals based on FIG. 4 is all within the scope of protection of the present application.
  • the terminal 202 can be a reset terminal
  • the terminal 203 can be a clock terminal
  • the terminal 206 can be a power terminal
  • the terminal 207 can be a ground terminal
  • the terminal 208 can be a data terminal
  • the second terminal of the terminal group 200 Terminals 206-208 are more important than terminal 202 and terminal 203.
  • the layout of the first contact portions 201a, 204a, 205a, and 209a forms a virtual quadrilateral, and a part of the terminals 206-208 of the second terminal are disposed within the range of the quadrilateral.
  • the more important terminals of the two terminals are disposed in the quadrilateral surrounded by the first terminal, which can ensure good contact of these terminals (or an important communication terminal that is more susceptible to signals).
  • the chip 20 and the printer stylus 91a complete the mounting detection, indicating that all the mounting detections (the first terminals) are connected in place, and all the positions in the polygon formed by the first contact portion can ensure good contact. of. Therefore, good contact of the more important terminals (terminals 206-208 in this embodiment) of the second terminal can be ensured.
  • the number of the first contact portions may be three or more, as long as the second contact portion conforms to the polygonal shape formed by the first contact portion.
  • the ink cartridge 10 is mounted to the mounting portion 90, and the ink cartridge has a certain moving range in the width direction T. It may happen that the chip 20 has been mounted, but the first terminal (the mounting detecting terminal) is not in contact with the stylus 91a. contact.
  • the chip described in this embodiment can solve the problem that the row formed by the first terminal and the row formed by the second terminal are not in the same row, so the width of each terminal can be increased, and the width is increased to avoid such a The situation arises.
  • the first terminal is away from the second terminal, and it is possible to prevent foreign matter (such as ink or the like) accidentally falling from covering the first terminal and the second terminal, causing a short circuit between the two, resulting in damage of the chip or the printer. That is, the distance between each of the first contacts, between each of the second contacts, between each of the first contacts, and each of the second contacts is greater than or equal to a preset distance threshold.
  • the distance threshold may be preset to a plurality of different values according to the magnitude of the voltage value applied on each terminal by a person skilled in the art, thereby achieving the above technical effects and further reducing signal mutual interference between the respective terminals.
  • the rest is the same as in the first embodiment.
  • FIGS. 7a and 7b are diagrams showing the structure of a chip of the first embodiment of the second embodiment.
  • the chip 20 has a first portion 21 and a second portion 22.
  • the second terminals 202, 203, 206-208 are disposed on the first portion 21; the first terminals 201, 204, 205, 209 are disposed on the second portion 22.
  • the first portion 21 and the second portion 22 are fabricated from two circuit substrates 21a, 22a, and then the first portion 21 and the second portion 22 are fixed by soldering, pasting, snapping, etc., and finally the chip 20 is formed.
  • the chip 20 is fabricated using two circuit substrates 21a, 22a such that the terminals on the first portion 21 and the terminals on the second portion 22 are at different heights, so that the contact pins 91a are respectively contacted when in contact with the stylus 91a. Different positions are used to achieve the layout of the first contact portion and the second contact portion as shown in FIG.
  • the chip 20 further has additional terminals 210, 211 and fixing portions 251, 252, and 253.
  • the additional terminals 210, 211 are not in contact with the stylus 91a in the mounting portion 90, and may function to prevent short-circuiting between the terminals of the terminal group 200 or to scrape the stylus 91a to clean the stylus 91a when it comes into contact with the stylus 91a. effect.
  • the chip 20 can be fixed to the ink cartridge 10 by the fixing portions 251, 252, 253 to prevent the chip 20 from being detached from the ink cartridge 10.
  • Fig. 8 is a view showing the structure of a chip of a second embodiment of the second embodiment.
  • the chip 20 has only one substrate 20a.
  • the chip 20 further has additional terminals 210 and 211, fixing portions 251 and 252, and a through portion 255; the through portion 255 penetrates the chip in the thickness direction of the chip.
  • the additional terminals 210, 211 and the fixing portions 251, 252 are identical to the first embodiment of the present embodiment and will not be repeatedly described.
  • the through portion 255 is for accommodating the stylus 91a such that the first terminal and the second terminal respectively contact different positions of the stylus 91a to achieve the layout of the first contact portion and the second contact portion as shown in FIG.
  • the thickness direction is a direction perpendicular to the mounting direction P and the width direction T.
  • the thickness direction of the chip is also a direction parallel to the shortest side direction of the chip.
  • the thickness direction of the chip is perpendicular to the surface on which the terminal is located.
  • Embodiment 3 is a diagrammatic representation of Embodiment 3
  • FIG. 9 is a schematic view of the on-chip contact portion of the third embodiment.
  • Fig. 10 is a view showing the structure of a chip of the first embodiment of the third embodiment.
  • Fig. 11 is a view showing the structure of a chip of a second embodiment of the third embodiment.
  • Fig. 12 is a view showing the structure of a chip of a third embodiment of the third embodiment.
  • 13a and 13b are diagrams showing the structure of a chip of a fourth embodiment of the third embodiment.
  • 14a and 14b are diagrams showing the structure of a chip according to a fifth embodiment of the third embodiment.
  • FIG. 9 omits the terminals on the chip, and only shows a schematic view of the contact portion. 10 to 14b are structural diagrams of five kinds of chips, respectively.
  • the first contact portions 201a, 204a, 205a, 209a of the first terminals 201, 204, 205, 209 form a row L11 and a row L12.
  • the second contact portions 202a, 203a, 206a-208a of the second terminals 202, 203, 206-208 form a row L21 and a row L22 in the mounting direction P.
  • One or more rows (rows L21, L22) formed by the second contact portions are disposed between the plurality of rows (rows L11, L12) formed by the first contact portions; or, the plurality of rows formed by the second contact portions ( A plurality of rows (rows L11, rows L12) formed by the first contact portions are disposed between the row L21 and the row L22), and the advantageous effects of the present application can still be achieved.
  • the row L11 and the row L12 are spaced apart from each other by the row L21 and the row L22. That is, in the mounting direction P, the first contact portion forms the first row L11 and the second row L12; the second contact portion forms the third row L21 and the fourth row L22; the first row L11, the second row L12 and the third row L21 and the fourth row L22 are spaced apart from each other. Thereby, in the mounting direction P, the first contact portion and the second contact portion sequentially form the row L11, the row L21, the row L12, and the row L22. This structure allows the first terminal and the second terminal, or the first contact portion and the second contact portion, to be spaced apart from each other, and the design space of the terminal is large.
  • the fourth row L22 is closer to the front end side of the mounting direction than the first row L11 and the second row L12, that is, the row L22 is located at the foremost end side of the mounting direction P.
  • the function of the terminals of the terminal group 200 is not limited to the terminal functions described in the third embodiment, and the terminals 202 and 203 of the second terminal are more important than the terminals 206-208.
  • the layout of the first contact portions 201a, 204a, 205a, 209a forms a virtual quadrilateral, and a part of the terminals 202 and 203 of the second terminal are disposed in the range of the quadrilateral, and the second terminal is disposed.
  • the more important terminals (terminal 202 and terminal 203 in this embodiment) are disposed in the quadrilateral surrounded by the first terminal, which can ensure good contact (or more important communication terminals that are more susceptible to signals). Within the area of the first terminal).
  • the chip 20 and the printer stylus 91a complete the mounting detection, indicating that all the mounting detections (first terminals) are connected in place, and all the polygons formed by the first contact portions 201a, 204a, 205a, 209a
  • the location is to ensure that the contact is good. Therefore, good contact of the more important terminals (terminal 202, terminal 203 in this embodiment) of the second terminal can be ensured.
  • the rest is the same as in the second embodiment.
  • Fig. 10 is a view showing the structure of a chip of the first embodiment of the third embodiment.
  • the chip 20 has a first portion 21 and a second portion 22.
  • the first terminals 201, 204, 205, 209 are disposed on the first portion 21; the second terminals 202, 203, 206-208 are disposed on the second portion 22.
  • the first portion 21 and the second portion 22 are fabricated from two different circuit substrates 21a, 22a, and then the first portion 21 and the second portion 22 are fixed by soldering, pasting, snapping, etc., and finally forming a chip. 20.
  • the chip 20 is fabricated using two circuit substrates 21a, 22a such that the terminals on the first portion 21 and the terminals on the second portion 22 are at different heights, so that the contact pins 91a are respectively contacted when in contact with the stylus 91a. Different positions are used to achieve the layout of the first contact portion and the second contact portion as shown in FIG.
  • the chip 20 also has fixing portions 251, 252, and 253.
  • the chip 20 can be fixed to the ink cartridge 10 by the fixing portions 251, 252, 253 to prevent the chip 20 from being detached from the ink cartridge 10.
  • the chip 20 may further have an additional terminal (not shown in the drawing, referring to the arrangement of the additional terminals 210, 211 in FIG. 8), and the additional terminal is not in contact with the stylus 91a in the mounting portion 90, and its function may be to prevent the terminal.
  • the terminals of the group 200 are short-circuited or contact with the stylus 91a, the stylus 91a is scraped to clean the stylus 91a.
  • Fig. 11 is a view showing the structure of a chip of a second embodiment of the third embodiment.
  • the chip 20 has only one substrate 20a.
  • the chip 20 further has additional terminals 210 and 211, fixing portions 251 and 252, and a penetration portion 255.
  • the additional terminals 210, 211 and the fixing portions 251, 252 are identical to the first embodiment of the present embodiment and will not be repeatedly described.
  • the through portion 255 is for accommodating the stylus 91a such that the first terminal and the second terminal respectively contact different positions of the stylus 91a to achieve the layout of the first contact portion and the second contact portion as shown in FIG.
  • the through portions 255 of the through chip 20 of this embodiment are respectively located on both sides of the width direction T of the second terminals 202, 203, and 206-208, such that the first terminals 201, 204 are passed through the through portion 255 of the through chip 20.
  • 205, 209 and the second terminals 202, 203, 206-208 are spatially separated to further prevent foreign matter (such as ink, etc.) from accidentally falling over the first terminal and the second terminal, causing a Short circuit, resulting in damage to the chip or printer.
  • the through portion 255 of the through chip 20 causes the ink to be conducted from the through portion 255 to the lower side of the chip 20 without remaining on the upper surface of the chip 20 (setting On the surface with terminals).
  • Fig. 12 is a view showing the structure of a chip of a third embodiment of the third embodiment.
  • the first terminals 201, 204, 205, 209 are protruded with respect to the substrate 20a.
  • the first terminals 201, 204, 205, 209 may be connected to the substrate 20a by soldering or the like. That is, the first contact portion (not shown in FIG. 12) on the first terminals 201, 204, 205, 209 and the second contact portion on the second terminals 202, 203, 206-208 (FIG. 12) Not shown) is more prominent than with respect to the substrate 20a.
  • first terminals 201, 204, 205, 209 protrude relative to the substrate 20a
  • second terminals 202, 203, 206-208 are disposed on the substrate 20a; the first terminals 201, 204, 205, 209 and the second terminal 202 203, 206-208 have a height difference in height such that the first terminal and the second terminal respectively contact different positions of the stylus 91a to achieve the layout of the first contact portion and the second contact portion as shown in FIG.
  • the first terminals 201, 204, 205, 209 protrude relative to the substrate 20a.
  • This structure spatially separates the first terminals 201, 204, 205, 209 from the second terminals 202, 203, 206-208, further preventing Foreign matter (such as ink, etc.) accidentally dropped covers the first terminal and the second terminal, causing a short circuit between the two, resulting in damage to the chip or the printer.
  • FIGS. 13a and 13b are diagrams showing the structure of a chip of a fourth embodiment of the third embodiment.
  • the first terminals 201, 204, 205, 209 are disposed on the second portion 22, and the second terminals 202, 203, 206-208 are disposed on the substrate 21a of the first portion 21; Terminal holes 201b, 204b, 205b, 209b are provided, through which the terminals (first terminals 201, 204, 205, 209) provided with the contacts on the second portion 22 pass and protrude with respect to the first portion 21.
  • first terminals 201, 204, 205, 209 of the second portion 22 pass through the terminal holes 201b, 204b, 205b, 209b and protrude with respect to the first portion 21.
  • the first terminals 201, 204, 205, 209 and the second terminals 202, 203, 206-208 have a height difference in height such that the first terminal and the second terminal respectively contact different positions of the stylus 91a to achieve the first contact.
  • the portion and the second contact reach the layout as shown in FIG.
  • the second portion 22 may be made of a conductive silicone or a conductive metal material, or the substrate 22a of the second portion 22 is made of a non-conductive substrate material, and the first terminals 201, 204, 205, 209 are made of a conductive material.
  • the rest is identical to the third embodiment of the embodiment.
  • the chip 20 is composed of a first portion 21 and a second portion 22.
  • the second portion 22 is a chip holder for carrying a chip and which can be fixed to the cartridge body.
  • the first set of mounting detection terminals 201, 204 of the first terminals are disposed on the second portion 22.
  • the first set of mounting detecting terminals 205, 209 of the first terminals are disposed on the substrate 21a of the first portion 21, and the second terminals 202, 203, 206-208 (not shown) are disposed on the substrate 21a of the first portion 21. .
  • the first portion 21 is provided with terminal holes 201b, 204b, and the first terminals 201, 204 of the second portion 22 pass through the terminal holes 201b, 204b and protrude with respect to the substrate 21a of the first portion 21.
  • the first terminals 205, 209 protrude with respect to the substrate 21a of the first portion 21, and the first terminals 205, 209 may be formed by pad or bumps provided on the substrate 21a and then plated with copper.
  • the first terminals 201, 204, 205, 209 and the second terminals 202, 203, 206-208 have a height difference in height such that the first terminal and the second terminal respectively contact different positions of the stylus 91a to achieve the first contact.
  • the portion and the second contact reach the layout as shown in FIG.
  • the second portion 22 is provided with the first terminals 201, 204, and also functions as a chip carrier (which carries the chip and is fixed to the cartridge of the ink cartridge). This structure reduces the number of ink cartridge components and thus reduces the cost.
  • the second portion 22 may be made of a conductive silicone or a conductive metal material, or the substrate 22a of the second portion 22 is made of a non-conductive substrate material, and the first terminals 201, 204, 205, 209 are made of a conductive material.
  • the second portion 22 can be made of conductive silicone, so that when the chip 20 contacts the stylus 91a, the second portion 22 can be deformed to avoid the terminal being contacted by the terminal on the chip 20 and the stylus 91a. A condition that is worn or scratched.
  • the rest is identical to the third embodiment of the embodiment.
  • Embodiment 4 is a diagrammatic representation of Embodiment 4:
  • Figure 15 is a schematic illustration of a chip of the fourth embodiment.
  • Fig. 16 is a view showing the structure of a chip of the first embodiment of the fourth embodiment.
  • Fig. 17 is a view showing the structure of a chip of the second embodiment of the fourth embodiment. 16 and 17 are structural views of two types of chips, respectively.
  • the first contacts 201a, 204a, 205a, 209a (not shown) of the first terminals 201, 204, 205, 209 form a first row (row L11) and a second row ( Row L12).
  • the second contacts 202a, 203a, 206a-208a (identifications not shown) of the second terminals 202, 203, 206-208 form a third row (row L21) and a fourth row (row) in the mounting direction P L22).
  • One or more rows (rows L21, L22) formed by the second contact portions are disposed between the plurality of rows (rows L11, L12) formed by the first contact portions; or, the plurality of rows formed by the second contact portions ( A plurality of rows (rows L11, rows L12) formed by the first contact portions are disposed between the row L21 and the row L22), and the advantageous effects of the present application can still be achieved.
  • first contact portion forms a first row (row L11) and a second row (row L12); the second contact portion forms a third row (row L21), a fourth row (row L22); the first row (row) L11), the second row (row L12) is disposed between the third row (row L21) and the fourth row (row L22). That is, along the mounting direction P, the first contact portion and the second contact portion sequentially form the row L21, the row L11, the row L12, and the row L22.
  • This structure causes the third row (row L21) and the fourth row (row L22) formed by the second contact portion to be on the peripheral side of the first row (row L11) and the second row (row L12) formed by the first contact portion
  • the second contact portions 202a, 203a, 206a-208a are completely at the periphery of the first contact portions 201a, 204a, 205a, 209a, and the second contact portions 202a, 203a, 206a-208a are located at the plurality of first contact portions 201a, 204a, Outside the region of the polygon formed by 205a, 209a (the quadrilateral in this embodiment), the interference of the electrical signal between the first terminal and the second terminal is further prevented.
  • the rest is the same as in the third embodiment.
  • Fig. 16 is a view showing the structure of a chip of the first embodiment of the fifth embodiment.
  • the chip 20 has a first portion 21 and a second portion 22.
  • Terminals 202, 203 and terminals 205, 209 are disposed on the first portion 21; terminals 201, 204, 206-208 are disposed on the second portion 22.
  • the first portion 21 and the second portion 22 are fabricated by two different circuit substrates 21a, 22b, and then the first portion 21 and the second portion 22 are fixed by soldering, pasting, snapping, etc., and finally forming a chip. 20.
  • the chip 20 is manufactured using two circuit substrates 21a, 22b, so that the terminals on the first portion 21 and the terminals on the second portion 22 are located at different heights so as to be in contact with the stylus 91a when in contact with the stylus 91a. Different positions to achieve the layout as shown in Figure 15.
  • the chip 20 also has additional terminals 210, 211 which are not in contact with the stylus 91a in the mounting portion 90, and may function to prevent shorting between the terminals of the terminal group 200 or scraping contact with the stylus 91a.
  • the needle 91a is wiped to clean the action of the stylus 91a.
  • Figure 17 is a diagram showing the structure of a chip of a second embodiment of the fifth embodiment.
  • the terminals 202, 203, 205, 209 are disposed in the second portion 22, and the terminals 201, 204, 206-208 are disposed on the substrate 21a of the first portion 21;
  • the first portion 21 is provided with terminal holes 202b, 203b , 205b, 209b, the terminals 202, 203, 205, 209 of the second portion 22 pass through the terminal holes 202b, 203b, 205b, 209b and protrude relative to the first portion 21,
  • the terminals 202, 203, 205, 209 and the terminals 201, 204 206-208 has a height difference in height such that the terminals respectively contact different positions of the stylus 91a to achieve the layout of the first contact portion and the second contact portion as shown in FIG.
  • the second portion 22 may be made of a conductive silicone or a conductive metal material, or the substrate 22a of the second portion 22 is made of a non-conductive substrate material, and the first terminals 201, 204, 205, 209 are made of a conductive material.
  • the rest is identical to the first embodiment of the embodiment.
  • the present invention also provides an ink cartridge comprising any of the chips described in the above embodiments.

Landscapes

  • Ink Jet (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)

Abstract

一种芯片(20)及具有该芯片(20)的墨盒(10),芯片(20)用于安装到墨盒(10)上,墨盒(10)用于沿安装方向安装到打印机中的安装部(90)中。芯片(20)包括存储器、用于安装检测的第一接触部(201a、204a、205a、209a)、第二接触部;至少一个第二接触部与存储器相电连接;第一接触部(201a、204a、205a、209a)和第二接触部分别与打印机中的触针(91a)相接触;第一接触部(201a、204a、205a、209a)在安装方向上呈多排排列。在安装方向上,第一接触部(201a、204a、205a、209a)形成的多排之间设置有第二接触部所形成的一排或多排;或者,第二接触部形成的多排之间设置有第一接触部(201a、204a、205a、209a)所形成的多排。

Description

芯片及墨盒
本申请要求于2017年10月12日提交中国专利局、申请号为201721313686.5、发明名称为“芯片及使用该芯片的墨盒”的中国专利申请以及于2017年12月21日提交中国专利局、申请号为201711397088.5、发明名称为“芯片及墨盒”的中国专利申请以及2017年12月21日提交中国专利局、申请号为201721807245.0、发明名称为“芯片及墨盒”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及喷墨打印机技术领域,尤其涉及芯片及墨盒。
背景技术
随着科学技术的不断进步,打印机行业发展迅速,喷墨打印机的应用越来越广泛,墨盒已经成为了喷墨打印机的易耗部件。墨盒中设置有芯片,墨盒用芯片用于存储生产厂信息、墨水量信息、墨盒类别信息、墨水颜色等信息,墨盒用芯片对于喷墨打印机的正常工作起到决定性作用。
图1为墨盒10欲安装到安装部90上的示意图。图2为现有技术芯片20的示意图。如图1和图2所示,安装部90是打印机的部件,用于承载多个或者一个墨盒10,墨盒10沿安装方向P可拆卸地安装到安装部90中。墨盒10包括芯片20、把手30、出墨口40、盒体50。安装部90具有触针部91、供墨部92。盒体50内存储有墨水,墨水经出墨口40到达供墨部92处,进而供墨部92可以将墨水供给到打印头处,从而墨水可以用于执行打印的动作。芯片20上具有端子组200,端子组200可以与触针部91的触针91a接触电连接,用于电信号之间的相互传输。把手30用于将墨盒10固定到安装部90上,防止墨盒10从安装部90中脱离出来。
现有技术的芯片20中具有基板20a、设置在基板20a上的端子组200、存储器(图中未示出)。端子组200包括9个端子201-209,9个端子分为第一端子201、204、205、209,第二端子202、203、206-208。第一端子是用于在 墨盒10安装到安装部90的时候进行安装检测的端子。第二端子是除了第一端子之外的端子。第二端子中至少一部分端子是用于与芯片20的存储器相连接的。9个端子201-209中的每个端子均包括与触针91a相接触的接触部201a-209a。9个接触部201a-209a在安装方向P上呈2排排列(第一排L1、第二排L2),在与安装方向P垂直的宽度方向T上,9个接触部201a-209a是相互错开排列的。第一端子中的端子201、204的接触部201a、204a和第二端子中的端子202、203的第二接触部202a、203a设置在第一排L1中,且接触部201a、204a分别位于第一排L1的宽度方向T的两端;第一端子中的端子205、209的接触部205a、209a和第二端子中的端子206-208的第二接触部206a-208a设置在第二排L2中,且接触部205a、209a分别位于第二排L2的宽度方向T的两端。
现有技术中,为了更好的进行安装检测,一般情况下第一端子201、204、205、209的输入电压不同于第二端子202、203、206-208。每个端子上的电信号在一定的范围内,芯片20才能正常的进行安装检测与信号传输。第一端子与第二端子之间的电压差(例如,用于安装检测的第一端子被输入42V的高电压,与存储器相连接的第二端子被输入3.3V的低电压),但是,用于安装检测的第一端子与第二端子如图2所示的设置方式,第一端子与第二端子过于临近,会使得第一端子上的安装检测信号与第二端子上的信号造成信号干扰,会出现被干扰的端子会误以为是数据信号的情况(例如,第一端子上的42V高电压会引发临近端子上出现毛刺波导致其端子会误认为是数据信号的情况)。第一端子与第二端子之间出现端子之间的信号干扰,会导致端子出现错误数据信号的情况,导致芯片20的端子组200无法正常工作。
发明内容
本发明提供一种芯片及墨盒,用于解决现有技术中端子之间存在信号相互干扰的技术问题。
本发明实施例第一个方面提供了一种芯片,所述芯片用于安装到墨盒上,所述墨盒用于沿安装方向安装到打印机中的安装部中;所述芯片包括存储器、用于安装检测的第一接触部、第二接触部;至少一个所述第二接触部与所述存储器相电连接;所述第一接触部和所述的第二接触部分别与所述打印机中 的触针相接触;
所述第一接触部在所述安装方向上呈多排排列;
在所述安装方向上,所述第一接触部形成的多排之间设置有第二接触部所形成的一排或多排;或者,所述第二接触部形成的多排之间设置有所述第一接触部所形成的多排。
可选的,所述第一接触部包括:相互连接的第一组安装检测接触部、相互连接的第二组安装检测接触部;所述第一组安装检测接触部和所述第二组安装检测接触部在所述安装方向上呈多排排列。
可选的,所述第一组安装检测接触部在所述安装方向上形成第一排;所述第二组安装检测接触部在所述安装方向上形成第二排;所述第二接触部所形成的一排或多排设置在所述第一排和所述第二排之间。
可选的,所述第一组安装检测接触部通过导线连接起来,所述第二组安装检测接触部通过电阻连接起来;所述第二组安装检测接触部被施加的电压高于所述第一组安装检测接触部的电压。
可选的,所述第二接触部包括不与所述存储器相连接的接地接触部;还包括与存储器相连接的电源接触部、数据接触部、复位接触部。
可选的,所述芯片包括:多个第一端子、多个第二端子;多个所述第一接触部设置在多个所述第一端子上,多个所述第二接触部设置在多个所述第二端子上。
可选的,所述芯片包括:多个第一端子、多个第二端子;在所述安装方向上,所述第一端子形成的多排之间设置有第二端子所形成的一排或多排。
可选的,所述第一接触部形成的多排与所述第二接触部的一排或多排之间相互间隔。
可选的,在安装方向上,所述第一接触部的多排与所述第二接触部的多排之间一一相互间隔。
可选的,在安装方向上,所述第一接触部形成第一排、第二排;所述第二接触部形成第三排、第四排;第一排、第二排与第三排、第四排之间一一相互间隔。
可选的,所述第二排比所述第三排和所述第四排更靠近所述安装方向的前端侧。
可选的,所述第四排比所述第一排和所述第二排更靠近所述安装方向的 前端侧。
可选的,所述芯片包括第一部分、第二部分;所述第一部分与所述第二部分是由两块电路基板制造而成。
可选的,所述第一部分与所述第二部分是由不同材料的基板制成;所述第二部分是由导电硅胶或者导电金属材料制成。
可选的,所述第二接触部设置在所述第一部分上,所述第一接触部设置在所述第二部分上。
可选的,所述芯片还包括贯通部;所述贯通部在所述芯片的厚度方向上贯穿所述芯片。
可选的,所述芯片还包括基板,所述第一接触部与所述第二接触部相比相对于基板更突出。
可选的,所述第一部分上设置有端子孔,可供第二部分上的设置有接触部的端子穿过且相对于第一部分突出。
可选的,在安装方向上,所述第一接触部形成第一排、第二排;所述第二接触部形成第三排、第四排;第一排、第二排设置在第三排、第四排之间。
可选的,在所述安装方向的垂直方向上,所述第二组安装检测接触部在所有接触部的最外侧,所述第一组安装检测接触部在所有接触部的次外侧。
可选的,所述第一接触部相较于所述第二接触部位于所述安装方向的前端;所述前端为所述安装方向的下游侧。
可选的,每个所述第一接触部之间、每个所述第二接触部之间、每个所述第一接触部和每个所述第二接触部之间的距离大于等于预设距离阈值。
本发明实施例第二个方面提供了一种墨盒,包括上述任一所述的芯片。采用上述技术方案后,有益效果是:在安装方向上,第一接触部形成的多排之间设置有第二接触部所形成的一排或多排;第二接触部形成的多排之间设置有第一接触部所形成的多排,即,第一接触部与第二接触部不排列在同一排,此结构有利于减少由于第一接触部与第二接触部之间的电压差导致的非接触的电磁干扰而出现毛刺波,防止端子出现错误数据信号的情况,保证芯片正常工作。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对实施例中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其它的附图。
图1为墨盒欲安装到安装部上的示意图;
图2为现有技术芯片的示意图;
图3为实施例一的芯片示意图;
图4为实施例二的芯片上接触部的示意图;
图5为实施例二的第一种芯片的示意图;
图6为实施例二的第一种芯片的示意图;
图7a、图7b为实施例二的第一实施方式的芯片结构图;
图8为实施例二的第二实施方式的芯片结构图;
图9为实施例三的芯片上接触部的示意图;
图10为实施例三的第一实施方式的芯片结构图;
图11为实施例三的第二实施方式的芯片结构图;
图12为实施例三的第三实施方式的芯片结构图;
图13a、图13b为实施例三的第四实施方式的芯片结构图;
图14a、图14b为实施例三的第五实施方式的芯片结构图;
图15为实施例四的芯片的示意图;
图16为实施例四的第一实施方式的芯片结构图;
图17为实施例四的第二实施方式的芯片结构图。
具体实施方式
为了更好的理解本发明的技术方案,下面结合附图对本发明实施例进行详细描述。
应当明确,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
实施例一:
图1为墨盒10欲安装到安装部90上的示意图。如图1所示,安装部90是打印机的部件,用于承载多个或者一个墨盒10,墨盒10沿安装方向P可拆卸的安装到安装部90中。墨盒10上安装有芯片20。墨盒10包括芯片20、把手30、出墨口40、盒体50。安装部90具有触针部91、供墨部92。盒体50内存储有墨水,墨水经出墨口40到达供墨部92处,进而供墨部92可以将墨水供给到打印头处,从而墨水可以用于执行打印的动作。芯片20上具有端子组200,端子组200可以与触针部91的触针91a相电连接,用于电信号之间的相互传输。把手30用于将墨盒10固定到安装部90上,防止墨盒10从安装部90中脱离出来。
图3为实施例一的芯片示意图。如图1和图3所示,芯片20中具有基板20a、设置在基板20a上的端子组200、存储器(图中未示出)。可选的,该芯片可以包括端子组200,包括9个端子201-209,9个端子分为第一端子201、204、205、209、第二端子202、203、206-208;第一端子是用于在墨盒10安装到安装部90的时候进行安装检测的端子,第二端子是除了第一端子之外的端子,第二端子至少一部分端子是用于与芯片20的存储器相连接。9个端子201-209中每个端子均包括与触针91a相接触的接触部201a-209a。第一接触部201a、204a、205a、209a设置在第一端子201、204、205、209上,第二接触部(图中未示出接触部标识)设置在第二端子202、203、206-208上。其中,第一接触部其在安装方向P上排列呈多排,即,第一接触部201a、204a、205a、209a形成了排L11、排L12。第二端子202、203、206-208上的第二接触部其在安装方向P上排列呈一排,形成了排L21;第二端子202、203、206-208上的第二接触部也可以形成多排的排列,图3仅以第二接触部排列为一排L21的情况进行举例说明。其中,排L21与排L11、排L12之间在安装方向P上间隔排列,即排L21与排L11和排L12在安装方向P上不在同一排,排L21位于排L11与排L12之间,其中,在安装方向P上,第二接触部L21既可以如图3所示在第一接触部所形成的排L11和排L12之间,也可以如图15所示,第一接触部的排L11和排L12位于第二接触部形成的排L21和排L22之间。无论是图3或图15中的哪种排列结构,采用在安装方向P上,第一接触部形成的多排之间设置有第二接触部所形成的一排或多排;或者,第二接触部形成的多排之间设置有第一接触部所形成的多排的结构,均有利于减少由于第一接触部与第二接触部之间的电压差导致的非接触的电磁干扰而出现毛刺波, 防止端子出现错误数据信号的情况,保证芯片正常工作。
可选的,第一接触部201a、204a、205a、209a可以包括:相互连接的第一组安装检测接触部200a(201a、204a)、相互连接的第二组安装检测接触部200b(205a、209a);第一组安装检测接触部200a(201a、204a)和第二组安装检测接触部200b(205a、209a)在安装方向P上呈多排排列;具体的,如图3所示,第一组安装检测接触部200a(201a、204a)在安装方向上形成第一排L11;第二组安装检测接触部200b(205a、209a)在安装方向P上形成第二排L12;第二接触部(如第二端子202、203、206-208上所示的接触部)所形成的一排(L21)或多排设置在第一排L11和第二排L12之间。上述结构中,第一组安装检测接触部201a、204a形成排L11,第二组安装检测接触部205a、209a形成排L12,从而将多个第一接触部分组并分排排列,可以使端子组200有更大的设计空间,从而在基板20a上更好地进行排布布局。
可选的,第一组安装检测接触部200a(201a、204a)通过导线连接起来,第二组安装检测接触部200b(205a、209a)通过电阻连接起来;第二组安装检测接触部200b(205a、209a)被施加的电压高于第一组安装检测接触部200a(201a、204a)的电压。不同分组的接触部被接入不同的工作电压,且不同分组的安装检测接触部不在同一排,采用间隔排列的方式布局,进一步减少不同组安装检测接触部之间的电压差导致的非接触的电磁干扰而出现毛刺波,防止端子出现错误数据信号的情况,保证芯片正常工作。以图3举例来说,第一端子201、204、205、209在安装检测的时候分为2组,第一安装检测端子201、第二安装检测端子204为第一组安装检测端子;其上的第一接触部201a与204a相互连接形成第一组安装检测接触部200a;第三安装检测端子205、第四安装检测端子209为第二组安装检测端子;其上的第一接触部205a与209a相互连接形成第二组安装检测接触部200b。第一组安装检测端子201、204被打印机输入的2.4V的电压,第二组安装检测端子205、209被打印机输入的42V的电压。第二端子202、203、206-208中与存储器相连接的端子被打印机输入的是3.3V电压,以维持芯片20与打印机之间信号的传输。第一接触部和第二接触部形成排L11、排L12、排L21。排L11、排L12与排L21之间在安装方向P上相间隔,即不在同一排,是分开独立的。此结构有利于减少不同接入电压的第一组安装检测接触部200a、第二组安装检测接触部200b、第二接触部之间的电压差导致的非接触的电磁干扰而出现毛刺波,还 有利于防止端子出现错误数据信号的情况,保证芯片正常工作。
可选的,第二接触部(如第二端子202、203、206-208上所示的接触部)包括不与存储器(图中未示出)相连接的接地接触部(端子207上的接触部);还包括与存储器相连接的电源接触部(端子206上的接触部)、数据接触部(端子208上的接触部)、复位接触部(端子202上的接触部)。
具体的,端子组200中的各个端子的作用和功能如下:
端子201:第一组安装检测端子;
端子202:复位端子;
端子203:时钟端子;
端子204:第一组安装检测端子;
端子205:第二组安装检测端子;
端子206:电源端子;
端子207:接地端子;
端子208:数据端子;
端子209:第二组安装检测端子。
第二端子202、203、206-208中,端子202、203、207、208与存储器相连接,用于与打印机之间相互传输电信号,在3.3V的电压下运行。端子207是接地端子,电压为0V。端子207不与存储器相连接。本技术领域人员可以理解的是,端子组200中也可以没有端子207。
可选的,端子之间的压差越大,越容易相互影响,容易出现信号干扰,容易导致端子出现错误信号,无法正常工作。因此,第二组安装检测端子205、209(被输入42V电压)与第二端子(被输入3.3V)的压差较大,可以将排L12设置在安装方向P的前端侧,即端子组200的最外侧。而将与第二端子的压差较小的第一组安装检测端子201、204(被输入2.4V)设置在排L11。从安装方向P来看,排L11的输入电压为2.4V、排L21的输入电压为3.3V、排L12的输入电压为42V,电压呈现由低到高的排列。也就是说,第一接触部和/或第二接触部的多排之间根据其所接入的电压高低顺序排列,从而使得每两排之间的电压差都尽可能的小,从而减少电压差导致的非接触的电磁干扰而出现毛刺波,还有利于防止端子出现错误数据信号的情况,保证芯片正常工作。
进一步地,图3中的第一接触部201a、204a、205a、209a的排列布局形 成了一个四边形,第二端子或第二端子上的第二接触部设置于第一接触部201a、204a、205a、209a所围成的四边形内,能够保证第二端子与触针的良好接触。因为端子组200的最外围是用于安装检测的第一接触部,则如果在墨盒10安装过程中,芯片20与打印机触针91a完成安装检测,则说明所有安装检测端子(第一端子)均连接到位,则第一接触部形成的多边形内所有的位置是可以保证接触是良好的。进一步的,第一接触部的数量可以是3个以上的任意个数,只要是符合第二接触部在第一接触部形成的多边形内即可达到此有益效果。
可选的,如图3所示,第一端子205、209的第一接触部205a、209a形成的排L12相较于第二接触部所在的排L21位于安装方向P的前端,所谓前端为安装方向P的下游侧。此结构可以使得,在墨盒10安装到安装部90的过程中,排L12的端子先接触到触针91a,先进行安装检测,然后排L21的第二端子再接触到触针91a,因此,在安装过程中,触针91a先与进行安装检测的端子接触,后与存储器相连接的端子接触,防止了芯片20安装错位或者与存储器相连接的端子连接错误的情况。进一步地,在安装方向P的垂直方向T上,第二组安装检测接触部200b在所有接触部的最外侧,第一组安装检测接触部200a在所有接触部的次外侧。如图3所示,第二组安装检测接触部200b的第一接触部205a和209a在垂直方向T上的最外侧,其次为第一组安装检测接触部200a的第一接触部201a和204a,最内侧为其余的第二接触部所在的第二端子202、203、206-208。这样的布局,同样可以实现前述高电压输入的端子(端子205、209被输入42V电压)在最外侧,次外侧为电压次高的端子(端子201、204被输入2.4V电压),最内侧为输入电压较低的端子(第二端子被输入3.3V电压)的布局,使得相邻端子之间的电压差都尽可能的小,从而减少电压差导致的非接触的电磁干扰而出现毛刺波,还有利于防止端子出现错误数据信号的情况,保证芯片正常工作。
实施例二:
图4为实施例二的芯片上接触部的示意图。图5为实施例二的第一种芯片的示意图。图6为实施例二的第一种芯片的示意图。图4省略了芯片上的端子,只体现了接触部的示意图。图5和图6分别是两种芯片的示意图。图7a、图7b为实施例二的第一实施方式的芯片结构图。图8为实施例二的第二实施方式的芯片结构图。如图4-图6所示,第一端子201、204、205、209的 第一接触部201a、204a、205a、209a形成了排L11、排L12。第二端子202、203、206-208的第二接触部202a、203a、206a-208a在安装方向P上形成了排L21、排L22。第一接触部形成的多排(排L11、排L12)之间设置有第二接触部所形成的一排或多排(排L21、排L22);或者,第二接触部形成的多排(排L21、排L22)之间设置有第一接触部所形成的多排(排L11、排L12),仍可以达到本申请的有益效果。
进一步的,第一接触部的多排(排L11、排L12)与第二接触部的多排(排L21、排L22)之间一一相互间隔。即在安装方向P上,第一接触部形成第一排L11、第二排L12;第二接触部形成第三排L21、第四排L22;第一排L11、第二排L12与第三排L21、第四排L22之间一一相互间隔。从而使得第一接触部与第二接触部依次形成了排L21、排L11、排L22、排L12。此结构使得第一端子和第二端子,或者说第一接触部和第二接触部之间一一相互间隔,使得端子的设计空间较大,有利于增加各个端子之间的间距,减少端子之间的电磁相互干扰。
可选的,如图4所示,第二排(排L12)(第一接触部205a、209a形成的排L12)比第三排L21和第四排L22更靠近安装方向P的前端侧,即排L12位于安装方向P的最前端侧,在墨盒10安装到安装部90的过程中,排L12的端子先接触到触针91a,先进行安装检测,然后排L22的第二端子再接触到触针91a,因此,可以让安装过程中,先进行安装检测,后与存储器相连接的端子接触接触91a,防止了芯片20安装错位或者与存储器相连接的端子连接错误的情况。
图5和图6是端子排布的两种具体排布方式。只要保证接触部是图4的分布方式即可。进一步的,芯片20的端子的排布方式不仅仅局限于图5或图6的排布方式,其排布方式可以有多种。基于图4的端子不同的排布方式,都属于本申请的保护范围。
实施例一中介绍了端子202可以为复位端子,端子203可以为时钟端子;端子206可以为电源端子,端子207可以为接地端子,端子208可以为数据端子;端子组200的第二端子中的端子206-208相比端子202、端子203更重要。可选的,如图5所示,第一接触部201a、204a、205a、209a的布局形成了一个虚拟的四边形,第二端子中的一部分端子206-208设置在此四边形的范围内,把第二端子中比较重要的端子(本实施例中是端子206-208)设置于第 一端子围成的四边形内,能够保证这些端子的良好接触(或者说,把更易受信号影响的重要的通信端子设置在远离四个第一端子的区域内)。在墨盒10安装过程中,芯片20与打印机触针91a完成安装检测,则说明所有安装检测(第一端子)均连接到位,则第一接触部形成的多边形内所有的位置是可以保证接触是良好的。因此,能够保证第二端子中比较重要的端子(本实施例中是端子206-208)的良好的接触。进一步的,第一接触部的数量可以是3个以上,只要是符合第二接触部在第一接触部形成的多边形内即可达到此有益效果。
进一步的,墨盒10安装到安装部90墨盒会在宽度方向T上有一定移动范围,有可能出现以下情况:芯片20已经安装好,但是第一端子(安装检测端子)并未与触针91a相接触。本实施例所描述的芯片可以解决此情况的出现,第一端子所形成的排与第二端子所形成的排不在同一排,因此可以增大各个端子的宽度,增大宽度就会避免此种情况出现。
进一步的,第一端子远离第二端子,可以防止由于意外掉落的异物(如墨水等)覆盖第一端子和第二端子,引起两者之间的短路,导致芯片或者打印机的损坏。也就是说,每个第一接触部之间、每个第二接触部之间、每个第一接触部和每个第二接触部之间的距离大于等于预设距离阈值。其中,该距离阈值可以由本领域技术人员根据各个端子上所施加的电压值的大小预设为多种不同的取值,从而实现上述技术效果并且可以进一步减少各个端子之间的信号相互干扰。
其余和实施例一相同。
以下是本实施例的两种实施方式。
第一实施方式:
图7a、图7b为实施例二的第一实施方式的芯片结构图。如图7a、图7b所示,芯片20具有第一部分21、第二部分22。第二端子202、203、206-208设置在第一部分21上;第一端子201、204、205、209设置在第二部分22上。
第一部分21与第二部分22是由两块电路基板21a、22a制造而成,然后将第一部分21与第二部分22采用焊接、黏贴、卡接等方式固定要一起,最后形成芯片20。
使用两块电路基板21a、22a制造成芯片20,可以使得第一部分21上的端子与第二部分22上的端子位于不同高度上,使得在和触针91a相接触的时候分别 接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图4的布局。
芯片20还具有:附加端子210、211,固定部251、252、253。附加端子210、211不与安装部90中的触针91a相接触,其作用可以是防止端子组200的端子之间短路或者与触针91a接触的时候刮擦触针91a从而清洁触针91a的作用。通过固定部251、252、253可以将芯片20固定到墨盒10上,防止芯片20从墨盒10上脱离。
第二实施方式:
图8为实施例二的第二实施方式的芯片结构图。如图8所示,芯片20只具有一个基板20a。芯片20还具有:附加端子210、211,固定部251、252,还包括,贯通部255;贯通部255在芯片的厚度方向上贯穿该芯片。附加端子210、211,固定部251、252与本实施例的第一实施方式一致,不再重复阐述。贯通部255用于容纳触针91a,使得第一端子与第二端子分别接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图4的布局。厚度方向是与安装方向P、宽度方向T同时垂直的方向。本实施方式中,芯片的厚度方向也是与该芯片的最短边方向平行的方向。芯片的厚度方向与端子所在表面相垂直。
实施例三:
图9为实施例三的芯片上接触部的示意图。图10为实施例三的第一实施方式的芯片结构图。图11为实施例三的第二实施方式的芯片结构图。图12为实施例三的第三实施方式的芯片结构图。图13a、图13b为实施例三的第四实施方式的芯片结构图。图14a、图14b为实施例三的第五实施方式的芯片结构图。其中,图9省略了芯片上的端子,只体现了接触部的示意图。图10至图14b分别是5种芯片的结构图。如图9所示,第一端子201、204、205、209的第一接触部201a、204a、205a、209a形成了排L11、排L12。第二端子202、203、206-208的第二接触部202a、203a、206a-208a在安装方向P上形成了排L21、排L22。第一接触部形成的多排(排L11、排L12)之间设置有第二接触部所形成的一排或多排(排L21、排L22);或者,第二接触部形成的多排(排L21、排L22)之间设置有第一接触部所形成的多排(排L11、排L12),仍可以达到本申请的有益效果。
进一步的,排L11、排L12与排L21、排L22之间一一相互间隔。即在 安装方向P上,第一接触部形成第一排L11、第二排L12;第二接触部形成第三排L21、第四排L22;第一排L11、第二排L12与第三排L21、第四排L22之间一一相互间隔。从而使得沿着安装方向P,第一接触部与第二接触部依次形成了排L11、排L21、排L12、排L22。此结构使得第一端子和第二端子,或者说第一接触部与第二接触部之间一一相互间隔,端子的设计空间较大。
可选的,如图9所示,第四排L22比第一排L11和第二排L12更靠近安装方向的前端侧,即排L22位于安装方向P的最前端侧。
端子组200的端子的功能并不限制于实施例三中描述的端子功能,第二端子中的端子202、端子203相比端子206-208更重要。如图9所示,第一接触部201a、204a、205a、209a的布局形成了一个虚拟的四边形,第二端子中的一部分端子202、端子203设置在此四边形的范围内,把第二端子中比较重要的端子(本实施例中是端子202、端子203)设置于第一端子围成的四边形内,能够保证良好接触(或者说,把更易受信号影响的重要的通信端子设置在远离四个第一端子的区域内)。在墨盒10安装过程中,芯片20与打印机触针91a完成安装检测,则说明所有安装检测(第一端子)均连接到位,则第一接触部201a、204a、205a、209a形成的多边形内所有的位置是可以保证接触是良好的。因此,能够保证第二端子中比较重要的端子(本实施例中是端子202、端子203)的良好的接触。
其余和实施例二相同。
以下是本实施例的四种实施方式。
第一实施方式:
图10为实施例三的第一实施方式的芯片结构图。如图10所示,芯片20具有第一部分21、第二部分22。第一端子201、204、205、209设置在第一部分21上;第二端子202、203、206-208设置在第二部分22上。
第一部分21与第二部分22是由2块不同的电路基板21a、22a制造而成,然后将第一部分21与第二部分22采用焊接、黏贴、卡接等方式固定要一起,最后形成芯片20。
使用两块电路基板21a、22a制造成芯片20,可以使得第一部分21上的端子与第二部分22上的端子位于不同高度上,使得在和触针91a相接触的时候分别接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图9的布局。
芯片20还具有:固定部251、252、253。通过固定部251、252、253可以 将芯片20固定到墨盒10上,防止芯片20从墨盒10上脱离。
芯片20还可以具有附加端子(图中未示出,可以参考图8中附加端子210、211的设置方式),附加端子不与安装部90中的触针91a相接触,其作用可以是防止端子组200的端子之间短路或者与触针91a接触的时候刮擦触针91a从而清洁触针91a的作用。
第二实施方式:
图11为实施例三的第二实施方式的芯片结构图。如图11所示,芯片20只具有一个基板20a。芯片20还具有:附加端子210、211,固定部251、252,贯通部255。附加端子210、211,固定部251、252与本实施例的第一实施方式一致,不再重复阐述。贯通部255用于容纳触针91a,使得第一端子与第二端子分别接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图9的布局。
此实施方式的贯通芯片20的贯通部255分别位于第二端子202、203、206-208的宽度方向T的两侧,此结构使得通过贯通芯片20的贯通部255将第一端子201、204、205、209与第二端子202、203、206-208在空间上分隔开,进一步的防止由于意外掉落的异物(如墨水等)覆盖第一端子和第二端子,引起两者之间的短路,导致芯片或者打印机的损坏。例如墨水掉落到第一端子和第二端子之间时,贯通芯片20的贯通部255会让墨水从贯通部255处导流到芯片20的下方而不会残留在芯片20的上表面(设置有端子的表面)上。
第三实施方式:
图12为实施例三的第三实施方式的芯片结构图。如图12所示,第一端子201、204、205、209是相对于基板20a是突出的。通过焊接等方式将第一端子201、204、205、209可以连接到基板20a上。也就是说,位于第一端子201、204、205、209上的第一接触部(图12中未示出)与位于第二端子202、203、206-208上的第二接触部(图12中未示出)相比相对于基板20a更突出。
进一步的,第一端子201、204、205、209相对于基板20a突出,第二端子202、203、206-208设置在基板20a上;第一端子201、204、205、209与第二端子202、203、206-208在高度上有高度差,使得第一端子与第二端子分别接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图9的布局。
第一端子201、204、205、209相对于基板20a突出,此结构将第一端子201、204、205、209与第二端子202、203、206-208在空间上分隔开,进一步的防止 由于意外掉落的异物(如墨水等)覆盖第一端子和第二端子,引起两者之间的短路,导致芯片或者打印机的损坏。
第四实施方式:
图13a、图13b为实施例三的第四实施方式的芯片结构图。如图13a、图13b所示,第一端子201、204、205、209设置在第二部分22,第二端子202、203、206-208设置在第一部分21的基板21a上;第一部分21上设置有端子孔201b、204b、205b、209b,可供第二部分22上的设置有接触部的端子(第一端子201、204、205、209)穿过且相对于第一部分21突出。即,第二部分22的第一端子201、204、205、209穿过端子孔201b、204b、205b、209b且相对于第一部分21突出。第一端子201、204、205、209与第二端子202、203、206-208在高度上有高度差,使得第一端子与第二端子分别接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图9的布局。第二部分22可以是由导电硅胶或者导电金属材料制成,或者第二部分22的基板22a是由不导电的基板材料制成,第一端子201、204、205、209由导电材料制成。
其余和本实施例的第三实施方式一致。
第五实施方式:
图14a、图14b为实施例三的第五实施方式的芯片结构图。如图14a、图14b所示,芯片20由第一部分21、第二部分22组成。第二部分22是用于承载芯片且可以固定到墨盒盒体上的芯片架。第一端子中的第一组安装检测端子201、204设置在第二部分22上。第一端子中的第一组安装检测端子205、209设置在第一部分21的基板21a上,第二端子202、203、206-208(图中未示出)设置在第一部分21的基板21a上。第一部分21上设置有端子孔201b、204b,第二部分22的第一端子201、204穿过端子孔201b、204b且相对于第一部分21的基板21a突出。第一端子205、209相对于第一部分21的基板21a突出,第一端子205、209可以由设置在基板21a上的垫块或者凸块然后镀铜形成。第一端子201、204、205、209与第二端子202、203、206-208在高度上有高度差,使得第一端子与第二端子分别接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图9的布局。第二部分22上设置有第一端子201、204的同时,还起到芯片架的作用(承载芯片且固定到墨盒的盒体上)。此种结构减少了墨盒零部件的数量,从而达到降低成本的作用。第二部分22可以是由导电硅胶或者导电金属材料制成,或者第二部分22的基板22a是由不导电的基板材料制成,第一端 子201、204、205、209由导电材料制成。第二部分22可以是由导电硅胶制成,如此当芯片20接触触针91a的时候,第二部分22可以产生一定的形变,避免了因芯片20上的端子与触针91a发生硬性接触导致端子被磨损或者划伤的情况。
其余和本实施例的第三实施方式一致。
实施例四:
图15为实施例四的芯片的示意图。图16为实施例四的第一实施方式的芯片结构图。图17为实施例四的第二实施方式的芯片结构图。图16和图17分别是两种芯片的结构图。如图15所示,第一端子201、204、205、209的第一接触部201a、204a、205a、209a(图中未示出标识)形成了第一排(排L11)、第二排(排L12)。第二端子202、203、206-208的第二接触部202a、203a、206a-208a(图中未示出标识)在安装方向P上形成了第三排(排L21)、第四排(排L22)。第一接触部形成的多排(排L11、排L12)之间设置有第二接触部所形成的一排或多排(排L21、排L22);或者,第二接触部形成的多排(排L21、排L22)之间设置有第一接触部所形成的多排(排L11、排L12),仍可以达到本申请的有益效果。
进一步的,第一接触部形成第一排(排L11)、第二排(排L12);第二接触部形成第三排(排L21)、第四排(排L22);第一排(排L11)、第二排(排L12)设置在第三排(排L21)、第四排(排L22)之间。即沿着安装方向P上,第一接触部与第二接触部依次形成了排L21、排L11、排L12、排L22。此结构使得第二接触部形成的第三排(排L21)、第四排(排L22)在第一接触部所形成的第一排(排L11)、第二排(排L12)的外围侧,第二接触部202a、203a、206a-208a完全在第一接触部201a、204a、205a、209a的外围,第二接触部202a、203a、206a-208a位于多个第一接触部201a、204a、205a、209a形成的多边形(本实施例为四边形)的区域外,进一步的防止了第一端子与第二端子之间的电信号的干扰。
其余和实施例三相同。
以下是本实施例的两种实施方式。
第一实施方式:
图16为实施例五的第一实施方式的芯片结构图。如图16所示,芯片20具有第一部分21、第二部分22。端子202、203及端子205、209设置在第一部分 21上;端子201、204、206-208设置在第二部分22上。
第一部分21与第二部分22是由2块不同的电路基板21a、22b制造而成,然后将第一部分21与第二部分22采用焊接、黏贴、卡接等方式固定要一起,最后形成芯片20。
使用2块电路基板21a、22b制造成芯片20,可以使得第一部分21上的端子与第二部分22上的端子位于不同高度上,使得在和触针91a相接触的时候分别接触触针91a的不同位置,以达到如图15的布局。
芯片20还具有附加端子210、211,附加端子210、211不与安装部90中的触针91a相接触,其作用可以是防止端子组200的端子之间短路或者与触针91a接触的时候刮擦触针91a从而清洁触针91a的作用。
第二实施方式:
图17为实施例五的第二实施方式的芯片结构图。如图17所示,端子202、203、205、209设置在第二部分22,端子201、204、206-208设置在第一部分21的基板21a上;第一部分21上设置有端子孔202b、203b、205b、209b,第二部分22的端子202、203、205、209穿过端子孔202b、203b、205b、209b且相对于第一部分21突出,端子202、203、205、209与端子201、204、206-208在高度上有高度差,使得端子分别接触触针91a的不同位置,以实现第一接触部和第二接触部达到如图15的布局。第二部分22可以是由导电硅胶或者导电金属材料制成,或者第二部分22的基板22a是由不导电的基板材料制成,第一端子201、204、205、209由导电材料制成。
其余和本实施例的第一实施方式一致。
本发明还提供一种墨盒,包括上述实施例描述的任一芯片。
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本发明保护的范围之内。
最后应说明的是:以上实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技 术方案的本质脱离本发明各实施例技术方案的范围。

Claims (23)

  1. 一种芯片,所述芯片用于安装到墨盒上,所述墨盒用于沿安装方向安装到打印机中的安装部中;所述芯片包括存储器、用于安装检测的第一接触部、第二接触部;至少一个所述第二接触部与所述存储器相电连接;所述第一接触部和所述的第二接触部分别与所述打印机中的触针相接触;其特征在于:
    所述第一接触部在所述安装方向上呈多排排列;
    在所述安装方向上,所述第一接触部形成的多排之间设置有第二接触部所形成的一排或多排;或者,所述第二接触部形成的多排之间设置有所述第一接触部所形成的多排。
  2. 根据权利要求1所述的芯片,所述第一接触部包括:相互连接的第一组安装检测接触部、相互连接的第二组安装检测接触部;所述第一组安装检测接触部和所述第二组安装检测接触部在所述安装方向上呈多排排列。
  3. 根据权利要求2所述的芯片,所述第一组安装检测接触部在所述安装方向上形成第一排;所述第二组安装检测接触部在所述安装方向上形成第二排;所述第二接触部所形成的一排或多排设置在所述第一排和所述第二排之间。
  4. 根据权利要求3所述的芯片,所述第一组安装检测接触部通过导线连接起来,所述第二组安装检测接触部通过电阻连接起来;所述第二组安装检测接触部被施加的电压高于所述第一组安装检测接触部的电压。
  5. 根据权利要求3所述的芯片,所述第二接触部包括不与所述存储器相连接的接地接触部;还包括与存储器相连接的电源接触部、数据接触部、复位接触部。
  6. 根据权利要求1所述的芯片,所述芯片包括:多个第一端子、多个第二端子;多个所述第一接触部设置在多个所述第一端子上,多个所述第二接触部设置在多个所述第二端子上。
  7. 根据权利要求6所述的芯片,所述芯片包括:多个第一端子、多个第二端子;在所述安装方向上,所述第一端子形成的多排之间设置有第二端子所形成的一排或多排。
  8. 根据权利要求1所述的芯片,所述第一接触部形成的多排与所述第二 接触部的一排或多排之间相互间隔。
  9. 根据权利要求1-8任一所述的芯片,在安装方向上,所述第一接触部的多排与所述第二接触部的多排之间一一相互间隔。
  10. 根据权利要求9所述的芯片,在安装方向上,所述第一接触部形成第一排、第二排;所述第二接触部形成第三排、第四排;第一排、第二排与第三排、第四排之间一一相互间隔。
  11. 根据权利要求10所述的芯片,所述第二排比所述第三排和所述第四排更靠近所述安装方向的前端侧。
  12. 根据权利要求10所述的芯片,
    所述第四排比所述第一排和所述第二排更靠近所述安装方向的前端侧。
  13. 根据权利要求9所述的芯片,所述芯片包括第一部分、第二部分;所述第一部分与所述第二部分是由两块电路基板制造而成。
  14. 根据权利要求13所述的芯片,所述第一部分与所述第二部分是由不同材料的基板制成;所述第二部分是由导电硅胶或者导电金属材料制成。
  15. 根据权利要求13所述的芯片,所述第二接触部设置在所述第一部分上,所述第一接触部设置在所述第二部分上。
  16. 根据权利要求9所述的芯片,所述芯片还包括贯通部;所述贯通部在所述芯片的厚度方向上贯穿所述芯片。
  17. 根据权利要求9所述的芯片,所述芯片还包括基板,所述第一接触部与所述第二接触部相比相对于基板更突出。
  18. 根据权利要求13所述的芯片,所述第一部分上设置有端子孔,可供第二部分上的设置有接触部的端子穿过且相对于第一部分突出。
  19. 根据权利要求9所述的芯片,在安装方向上,所述第一接触部形成第一排、第二排;所述第二接触部形成第三排、第四排;第一排、第二排设置在第三排、第四排之间。
  20. 根据权利要求1所述的芯片,所述安装方向的垂直方向上,所述第二组安装检测接触部在所有接触部的最外侧,所述第一组安装检测接触部在所有接触部的次外侧。
  21. 根据权利要求1所述的芯片,所述第一接触部相较于所述第二接触部位于所述安装方向的前端;所述前端为所述安装方向的下游侧。
  22. 根据权利要求1所述的芯片,每个所述第一接触部之间、每个所述 第二接触部之间、每个所述第一接触部和每个所述第二接触部之间的距离大于等于预设距离阈值。
  23. 一种墨盒,包括权利要求1至22中任一所述的芯片。
PCT/CN2018/099628 2017-10-12 2018-08-09 芯片及墨盒 WO2019072010A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP18865563.3A EP3666527B1 (en) 2017-10-12 2018-08-09 Chip and ink cartridge

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
CN201721313686.5 2017-10-12
CN201721313686 2017-10-12
CN201711397088.5A CN107901611B (zh) 2017-10-12 2017-12-21 芯片及墨盒
CN201721807245.0 2017-12-21
CN201711397088.5 2017-12-21
CN201721807245.0U CN207790032U (zh) 2017-10-12 2017-12-21 芯片及墨盒

Publications (1)

Publication Number Publication Date
WO2019072010A1 true WO2019072010A1 (zh) 2019-04-18

Family

ID=61869596

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/099628 WO2019072010A1 (zh) 2017-10-12 2018-08-09 芯片及墨盒

Country Status (4)

Country Link
EP (1) EP3666527B1 (zh)
JP (2) JP7261553B2 (zh)
CN (3) CN115246270B (zh)
WO (1) WO2019072010A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3991974A4 (en) * 2019-06-28 2023-07-12 Zhuhai Ninestar Management Co., Ltd. INK CONTAINER CHIP AND INK CONTAINER

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115246270B (zh) * 2017-10-12 2024-03-12 珠海纳思达企业管理有限公司 芯片及墨盒
CN110936723B (zh) * 2019-06-28 2021-04-06 珠海纳思达企业管理有限公司 墨盒
CN215243807U (zh) * 2020-07-03 2021-12-21 珠海纳思达企业管理有限公司 墨盒
CN115257187B (zh) * 2021-04-30 2023-11-14 无锡翼盟电子科技有限公司 用于承载墨盒芯片的pcb结构
CN215970705U (zh) 2021-07-19 2022-03-08 浙江鼎旗微电子科技有限公司 耗材芯片以及具有其的耗材盒
CN113942313B (zh) * 2021-09-10 2023-04-07 珠海天威技术开发有限公司 连接件、耗材芯片、耗材容器及电子成像设备、安装连接件与耗材容器的方法
CN113954525B (zh) * 2021-09-30 2023-05-02 珠海天威技术开发有限公司 连接件、耗材芯片、电子成像设备、安装连接件与耗材容器的方法
CN114475003B (zh) * 2021-12-16 2023-05-02 珠海天威技术开发有限公司 耗材容器、耗材芯片与电子成像设备
CN114089614A (zh) * 2021-12-31 2022-02-25 珠海益捷科技有限公司 一种容器

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04128049A (ja) * 1990-09-19 1992-04-28 Canon Inc インクジェット記録装置
CN201109241Y (zh) * 2007-11-06 2008-09-03 珠海天威技术开发有限公司 墨盒芯片及墨盒
CN204914914U (zh) * 2015-08-28 2015-12-30 珠海艾派克微电子有限公司 一种墨盒及用于打印机上的墨盒芯片
CN106864040A (zh) * 2015-12-14 2017-06-20 珠海纳思达企业管理有限公司 喷墨打印机用芯片及喷墨打印机
CN107901611A (zh) * 2017-10-12 2018-04-13 珠海纳思达企业管理有限公司 芯片及墨盒

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05246032A (ja) * 1992-03-05 1993-09-24 Canon Inc インクジェット記録ヘッドおよび該記録ヘッドを搭載した記録装置
US6039428A (en) * 1998-05-13 2000-03-21 Hewlett-Packard Company Method for improving ink jet printer reliability in the presence of ink shorts
PT1547786E (pt) * 1998-05-18 2008-02-19 Seiko Epson Corp Cartucho de tinta
US20080170110A1 (en) * 2004-11-17 2008-07-17 Nu-Kote International, Inc. Circuit board with terminals arranged in a single row and disposed at board edges, cartridges with the circuit board, and methods for making same
JP4144637B2 (ja) * 2005-12-26 2008-09-03 セイコーエプソン株式会社 印刷材収容体、基板、印刷装置および印刷材収容体を準備する方法
UA91582C2 (ru) * 2005-12-26 2010-08-10 Сейко Эпсон Корпорейшн контейнер с материалом для печати и плата, устанавливаемая в контейнере с материалом для печати
JP2010131972A (ja) * 2008-10-28 2010-06-17 Canon Inc フレキシブル配線基板およびこれを用いた液体吐出ヘッド
US8764172B2 (en) * 2010-09-03 2014-07-01 Seiko Epson Corporation Printing apparatus, printing material cartridge, adaptor for printing material container, and circuit board
JP5630157B2 (ja) * 2010-09-03 2014-11-26 セイコーエプソン株式会社 印刷装置
TWI626169B (zh) * 2015-01-16 2018-06-11 Microjet Technology Co., Ltd 快速成型裝置之列印模組之噴液晶片
DE202016008762U1 (de) * 2015-12-14 2019-10-09 Zhuhai Ninestar Management Co., Ltd. Chip eines Tintenstrahldruckers und Tintenstrahldrucker
JPWO2017115583A1 (ja) * 2015-12-28 2018-10-18 セイコーエプソン株式会社 液体供給ユニット
CN205890224U (zh) * 2016-08-02 2017-01-18 珠海纳思达企业管理有限公司 一种芯片及包括该芯片的墨盒
CN206154912U (zh) * 2016-08-12 2017-05-10 珠海纳思达企业管理有限公司 墨盒芯片及墨盒

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04128049A (ja) * 1990-09-19 1992-04-28 Canon Inc インクジェット記録装置
CN201109241Y (zh) * 2007-11-06 2008-09-03 珠海天威技术开发有限公司 墨盒芯片及墨盒
CN204914914U (zh) * 2015-08-28 2015-12-30 珠海艾派克微电子有限公司 一种墨盒及用于打印机上的墨盒芯片
CN106864040A (zh) * 2015-12-14 2017-06-20 珠海纳思达企业管理有限公司 喷墨打印机用芯片及喷墨打印机
CN107901611A (zh) * 2017-10-12 2018-04-13 珠海纳思达企业管理有限公司 芯片及墨盒

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3991974A4 (en) * 2019-06-28 2023-07-12 Zhuhai Ninestar Management Co., Ltd. INK CONTAINER CHIP AND INK CONTAINER

Also Published As

Publication number Publication date
EP3666527B1 (en) 2021-12-22
JP7442702B2 (ja) 2024-03-04
CN115246270A (zh) 2022-10-28
CN107901611B (zh) 2023-06-20
EP3666527A4 (en) 2020-12-02
JP2023052865A (ja) 2023-04-12
JP7261553B2 (ja) 2023-04-20
CN107901611A (zh) 2018-04-13
CN207790032U (zh) 2018-08-31
CN115246270B (zh) 2024-03-12
JP2019073004A (ja) 2019-05-16
EP3666527A1 (en) 2020-06-17

Similar Documents

Publication Publication Date Title
WO2019072010A1 (zh) 芯片及墨盒
US11096270B2 (en) Backplane footprint for high speed, high density electrical connectors
US10187972B2 (en) Backplane footprint for high speed, high density electrical connectors
JP6711922B2 (ja) インクジェットプリンター用チップおよびインクジェットプリンター
CN212636918U (zh) 芯片组及成像盒
US10470298B2 (en) Circuit board including dummy electrode formed on substrate
KR20100118318A (ko) 칩온 보드 타입의 패키지
KR20130058073A (ko) 넓은 전원 접속부를 갖는 고속 카드 커넥터
CN211416654U (zh) 一种安装在墨盒上的芯片及使用该芯片的墨盒
JP7164845B2 (ja) イメージングカートリッジ、及びイメージングカートリッジに適用されるチップ
US11161347B2 (en) Circuit board for a printing cartridge, printing cartridge, and printing system
CN215620870U (zh) 芯片及打印耗材
CN211641446U (zh) 墨水容器的芯片及墨水容器
CN209454379U (zh) 芯片及墨盒
CN103311745A (zh) 电连接器及其组件
CN220374133U (zh) 一种芯片及打印耗材
KR100542552B1 (ko) 인쇄회로기판, 및 이 인쇄회로기판을 갖는 화상기록장치
CN219277022U (zh) 一种芯片和墨盒
CN216288423U (zh) 耗材芯片和耗材盒
CN114077358B (zh) 触控装置
CN211684194U (zh) 耗材芯片及耗材
CN220526191U (zh) 芯片及处理盒
JP2018169833A (ja) カードリーダ
EP3707971A1 (en) Backplane footprint for high speed, high density electrical connectors

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18865563

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE