WO2019033863A1 - 用于检测光强的装置、方法和显示装置 - Google Patents

用于检测光强的装置、方法和显示装置 Download PDF

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Publication number
WO2019033863A1
WO2019033863A1 PCT/CN2018/094000 CN2018094000W WO2019033863A1 WO 2019033863 A1 WO2019033863 A1 WO 2019033863A1 CN 2018094000 W CN2018094000 W CN 2018094000W WO 2019033863 A1 WO2019033863 A1 WO 2019033863A1
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Prior art keywords
node
coupled
voltage
transistor
pole
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PCT/CN2018/094000
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English (en)
French (fr)
Inventor
丁小梁
王海生
刘英明
曹学友
韩艳玲
张平
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京东方科技集团股份有限公司
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Priority to US16/341,498 priority Critical patent/US11085817B2/en
Publication of WO2019033863A1 publication Critical patent/WO2019033863A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/4204—Photometry, e.g. photographic exposure meter using electric radiation detectors with determination of ambient light
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J1/46—Electric circuits using a capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/10—Intensity circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00—Photometry, e.g. photographic exposure meter
    • G01J1/42—Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44—Electric circuits
    • G01J2001/4446—Type of detector
    • G01J2001/446—Photodiode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors
    • G09G2360/144—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light being ambient light
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor

Definitions

  • Embodiments of the present disclosure relate to the field of display technologies, and in particular, to an apparatus for detecting light intensity, a method thereof, and a display apparatus.
  • the display effect of the display device is getting better and better, giving people a good visual experience. Due to the improvement of living standards, people's requirements for display devices are not limited to display effects, but also require diverse functions. For example, the brightness of the display screen is adjusted and biometrically recognized according to the intensity of ambient light.
  • Embodiments of the present disclosure provide a device for detecting light intensity, a method for detecting light intensity, and a display device.
  • an apparatus for detecting light intensity may include a photosensitive device, an input circuit, an amplifying circuit, a feedback circuit, a storage circuit, and an output circuit.
  • the photosensor can be coupled to the first voltage signal terminal and the first node.
  • the input circuit can provide a first voltage signal from the first voltage signal terminal to the first node under control of the input signal at the signal input to control the voltage of the first node.
  • the amplifying circuit can provide a second voltage signal from the second voltage signal terminal to the second node under the control of the voltage of the first node to control the voltage of the second node.
  • the feedback circuit can couple the first node to the second node under the control of the reset signal from the signal reset terminal.
  • the memory circuit can store a voltage difference between the first node and the second node to control the voltages of the first node and the second node.
  • the output circuit can read the voltage of the second node under the control of the read signal from the read control terminal.
  • the amplifying circuit may include a first transistor and a second transistor.
  • the control electrode and the first pole of the first transistor are coupled to the first voltage signal terminal, and the second pole is coupled to the second node.
  • the control electrode of the second transistor is coupled to the first node, the first pole is coupled to the second node, and the second pole is coupled to the second voltage signal terminal.
  • the input circuit may include a third transistor.
  • the control electrode of the third transistor is coupled to the signal input end, the first pole is coupled to the first node, and the second pole is coupled to the first voltage signal terminal.
  • the feedback circuit may include a fourth transistor.
  • the control electrode of the fourth transistor is coupled to the signal reset end, the first pole is coupled to the first node, and the second pole is coupled to the second node.
  • the memory circuit can include a capacitor. One end of the capacitor is coupled to the first node, and the other end is coupled to the second node.
  • the output circuit may include a fifth transistor.
  • the control electrode of the fifth transistor is coupled to the read control terminal, the first pole is coupled to the second node, and the second pole is coupled to the output line.
  • the photosensitive device may include a photodiode.
  • the size of the first transistor is the same as the size of the second transistor.
  • an apparatus for detecting light intensity can include a photodiode, a first transistor, a second transistor, a third transistor, a fourth transistor, a capacitor, and a fifth transistor.
  • the photodiode is coupled to the first voltage signal terminal and the first node.
  • the control electrode and the first pole of the first transistor are coupled to the first voltage signal terminal, and the second pole is coupled to the second node.
  • the control electrode of the second transistor is coupled to the first node, the first pole is coupled to the second node, and the second pole is coupled to the second voltage signal terminal.
  • the control electrode of the third transistor is coupled to the signal input end, the first pole is coupled to the first node, and the second pole is coupled to the first voltage signal terminal.
  • the control electrode of the fourth transistor is coupled to the signal reset end, the first pole is coupled to the first node, and the second pole is coupled to the second node.
  • One end of the capacitor is coupled to the first node, and the other end is coupled to the second node.
  • the control electrode of the fifth transistor is coupled to the read control terminal, the first pole is coupled to the second node, and the second pole is coupled to the output line.
  • the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are N-type transistors.
  • a method for detecting light intensity includes: providing a first voltage signal from a first voltage signal terminal to a first node under control of an input signal such that voltages across the photosensor are equal, and under the control of a reset signal from the signal reset terminal, the first The node is coupled to the second node such that the voltages of the first node and the second node are equal; in the case where the photosensor generates photocurrent under illumination of light, the voltage controlling the first node remains unchanged, so that the photosensor is The voltage remains unchanged, and the photocurrent charges the storage circuit to control the voltage of the second node; and the voltage of the second node is read under the control of the read signal from the read control terminal.
  • controlling the voltage of the first node to remain unchanged includes controlling a voltage of the second node according to a voltage of the first node, and the storage circuit further controls the voltage of the first node to remain unchanged.
  • V dd is the voltage at the first voltage signal terminal
  • I data is the current value of the photocurrent
  • t is the time when the photosensor is illuminated by light.
  • a display device includes: scan lines and data lines that are disposed at intersections, and pixel regions defined by the scan lines and the data lines. At least one of the pixel regions includes a device for detecting light intensity according to the first aspect or the second aspect of the present disclosure.
  • the means for detecting the light intensity are arranged in an array, and the means for detecting the light intensity in the same row or column are coupled to the same output line.
  • FIG. 1 shows a schematic structural view of an exemplary fingerprint sensor
  • FIG. 2 shows a schematic structural diagram of an apparatus for detecting light intensity according to an embodiment of the present disclosure
  • FIG. 3 illustrates an exemplary circuit diagram of an apparatus for detecting light intensity in accordance with an embodiment of the present disclosure
  • FIG. 4 shows a schematic diagram of an input voltage and an output voltage of an amplification circuit in accordance with an embodiment of the present disclosure
  • FIG. 5 shows a schematic timing diagram of signals in a device for detecting light intensity in accordance with an embodiment of the present disclosure
  • 6A is a diagram showing an operational state of a device for detecting light intensity in a first stage according to an embodiment of the present disclosure
  • 6B shows an operational state diagram of a device for detecting light intensity in a second stage in accordance with an embodiment of the present disclosure
  • 6C illustrates an operational state diagram of a device for detecting light intensity in a third stage in accordance with an embodiment of the present disclosure
  • FIG. 7 shows a schematic flow chart of a method for detecting light intensity according to an embodiment of the present disclosure
  • FIG. 8 shows a schematic structural diagram of a display device according to an embodiment of the present disclosure.
  • connection is disassembled or connected in one piece; it can be a mechanical connection or a connection; it can be a direct connection or an indirect connection via an intermediate medium.
  • connection is disassembled or connected in one piece; it can be a mechanical connection or a connection; it can be a direct connection or an indirect connection via an intermediate medium.
  • the transistors employed in all embodiments of the present application may be thin film transistors or field effect transistors or other devices having the same characteristics.
  • the thin film transistor used in the embodiment of the present disclosure may be an oxide semiconductor transistor.
  • the gate of the transistor may be referred to as a gate. Since the source and the drain of the transistor are symmetrical, the source and the drain are not distinguished, that is, the source of the transistor may be the first The pole (or second pole), the drain can be the second pole (or first pole).
  • FIG. 1 shows a schematic structural view of an exemplary fingerprint sensor.
  • the fingerprint sensor includes a photosensor D0 and a switching transistor T0.
  • the light intensity at the photosensor D0 in the plurality of fingerprint sensors may be different, different photocurrent signals may be generated.
  • the light intensity is determined by detecting the photocurrent signal generated in the photosensor D0. Then, under the control of the switching transistor T0, the photocurrent signal generated by the photosensor D0 is read out to realize detection of the valley of the fingerprint.
  • the photosensor When detecting light intensity, the photosensor is typically in a biased state. However, even in the absence of illumination, there is always a dark current in the photosensor in the biased state. The dark current increases the noise in the photosensor, thereby affecting the accuracy of the light intensity detection.
  • the light intensity detecting device 100 may include a photosensor 110, an input circuit 120, an amplifying circuit 130, a feedback circuit 140, and a storage circuit 150 output circuit 160.
  • the photosensor 110 may be coupled to the first voltage signal terminal VDD and the first node a.
  • the photosensor 110 can sense the optical signal and convert the sensed optical signal into a photocurrent.
  • photosensor 110 can be a photodiode.
  • the input circuit 120 can be coupled to the signal input terminal VIN, the first voltage signal terminal VDD, and the first node a.
  • the input circuit 120 can provide a first voltage signal from the first voltage signal terminal VDD to the first node a under the control of the input signal from the signal input terminal VIN to control the voltage of the first node a.
  • the amplifying circuit 130 may be coupled to the first voltage signal terminal VDD, the second voltage signal terminal VSS, the first node a, and the second node b.
  • the amplifying circuit 130 can supply the second voltage signal from the second voltage signal terminal VSS to the second node b under the control of the voltage of the first node a to control the voltage of the second node b.
  • the feedback circuit 140 can be coupled to the signal reset terminal VRST, the first node a, and the second node b.
  • the feedback circuit 140 can couple the first node a and the second node b under the control of the reset signal from the signal reset terminal VRST such that the voltage of the first node a and the voltage of the second node b are equal
  • the storage circuit 150 can be coupled between the first node a and the second node b.
  • the storage circuit 150 may store a voltage difference between the first node a and the second node b to control the voltage of the first node a and the voltage of the second node b.
  • the output circuit 160 can be coupled to the second node b and the read control terminal VRL.
  • the output circuit 160 can read the voltage of the second node b under the control of the read signal from the read control terminal VRL.
  • the output circuit 160 may also be coupled to the output line to output the voltage of the second node b to the output line in accordance with the read signal.
  • the first voltage signal of the first voltage signal terminal VDD is a high level signal Vdd
  • the second voltage signal of the second voltage signal terminal VSS is a low level signal Vss.
  • one end of the photosensor 110 when the photosensor 110 is not exposed to light, one end of the photosensor 110 is always coupled to the first voltage signal terminal VDD, and its voltage is always maintained at Vdd.
  • the other end of the photosensor 110 is coupled to the first node a, and the voltage of the first node a is controlled by the input circuit 120 to be the voltage Vdd of the first voltage signal from the first voltage signal terminal VDD. In this manner, the voltage across photosensor 110 is equal, i.e., photosensor 110 is in a zero biased state.
  • the photocurrent generated by the photosensor 110 causes a slight rise in the voltage of the first node a.
  • the voltage of the second node b drops sharply.
  • the voltage of the first node a is controlled back to Vdd by the feedback circuit 140, and the voltage of the second node b is adjusted.
  • these are instantaneous. That is to say, the voltage of the first node a does not change and is always maintained at Vdd. Therefore, during the photoelectric conversion of the photosensor 110, the voltage across the photosensor 110 remains the same, that is, the photosensor 110 is in a zero bias state. Therefore, there is no dark current in the photosensitive device.
  • the light intensity detecting device ensures that the photosensitive device is in a zero bias state by keeping the voltage across the photosensitive device the same during the photoelectric conversion of the photosensitive device. Thereby, the dark current in the photosensitive device is eliminated, thereby avoiding the noise generated by the dark current, and the accuracy of the light intensity detection is improved.
  • the circuit configuration of the light intensity detecting device 100 will be described in detail below by way of exemplary embodiments.
  • FIG. 3 shows an exemplary circuit diagram of a light intensity detecting device 200, such as the light intensity detecting device 100 shown in FIG. 2, according to an embodiment of the present disclosure.
  • the transistor employed may be an N-type transistor or a P-type transistor, such as an N-type or P-type field effect transistor (MOSFET).
  • MOSFET N-type or P-type field effect transistor
  • the gate of the transistor is referred to as the gate. Since the source and the drain of the transistor are symmetrical, the source and the drain are not distinguished, that is, the source of the transistor can be the first pole (or the second pole), and the drain can be the second pole (or the One pole).
  • NMOS N-type field effect transistor
  • the photosensor 110 can be a photodiode D.
  • the input circuit 120 can include a third transistor T3.
  • the control electrode of the third transistor T3 is coupled to the signal input terminal VIN, the first pole is coupled to the first node a, and the second pole is coupled to the first voltage signal terminal VDD.
  • the amplification circuit 130 may include a first transistor T1 and a second transistor T2.
  • the control electrode and the first pole of the first transistor T1 are coupled to the first voltage signal terminal VDD, and the second pole is coupled to the second node b.
  • the control electrode of the second transistor T2 is coupled to the first node a, the first pole is coupled to the second node b, and the second pole is coupled to the second voltage signal terminal VSS.
  • the feedback circuit 140 can include a fourth transistor T4.
  • the control electrode of the fourth transistor T4 is coupled to the signal reset terminal VRST, the first pole is coupled to the first node a, and the second pole is coupled to the second node b.
  • the memory circuit 150 can include a capacitor Cs. One end of the capacitor Cs is coupled to the first node a, and the other end is coupled to the second node b.
  • the capacitor Cs may be a liquid crystal capacitor composed of a pixel electrode and a common electrode, or may be an equivalent capacitor formed by a liquid crystal capacitor and a storage capacitor formed by the pixel electrode and the common electrode, which is not limited in the disclosure. .
  • the output circuit 160 can include a fifth transistor T5.
  • the control electrode of the fifth transistor T5 is coupled to the read control terminal VRL, the first pole is coupled to the second node b, and the second pole is coupled to the output line.
  • circuit configurations of the photosensor 110, the input circuit 120, the amplification circuit 130, the feedback circuit 140, the storage circuit 150, and the output circuit 160 are described above by way of example only. It will be readily understood by those skilled in the art that the implementation of the above various parts is not limited thereto as long as their respective functions can be realized.
  • FIG. 4 is a diagram showing a relationship between an input voltage and an output voltage of an amplification circuit in a light intensity detecting device according to an embodiment of the present disclosure.
  • the larger the input voltage of the amplifying circuit the smaller the output voltage.
  • the input voltage of the amplifying circuit 130 is the voltage V0 of the first node a
  • the output is the voltage Vout of the second node b. Therefore, the voltage V0 of the first node is inversely proportional to the voltage Vout of the second node.
  • the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are all N-type thin film transistors. In this way, the process flow can be unified, the process process can be reduced, and the product yield can be improved.
  • Embodiments of the present disclosure may use low temperature polysilicon thin film transistors because their leakage current is small.
  • the thin film transistor may specifically select a thin film transistor of a bottom gate structure or a thin film transistor of a top gate structure as long as a switching function can be realized.
  • FIG. 5 shows a timing chart of signals in a light intensity detecting device according to an embodiment of the present disclosure, such as the light intensity detecting device 200 shown in FIG. 3, including transistors (T1 to T5), photodiodes (D), capacitor (Cs), signal terminal (VIN, VRST, VDD, VSS, VRL).
  • transistors T1 to T5
  • D photodiodes
  • Cs capacitor
  • VIN, VRST, VDD, VSS, VRL signal terminal
  • the operation of the light intensity detecting device 200 may include, for example, a first phase S1, a second phase S2, and a third phase S3, which are described in detail below in conjunction with FIGS. 6A-6C.
  • FIG. 6A shows a schematic operational state diagram of the light intensity detecting device in the first stage S1 according to an embodiment of the present disclosure.
  • FIG. 6B shows a schematic operational state diagram of the light intensity detecting device in the second stage S2 according to an embodiment of the present disclosure.
  • FIG. 6C shows a schematic operational state diagram of the light intensity detecting device in the third stage S3 according to an embodiment of the present disclosure.
  • the input signal of the signal input terminal VIN and the reset signal of the signal reset terminal VRST are both high, and the read signal of the read control terminal VRL is low.
  • the third transistor T3 is turned on, and supplies a first voltage signal of the first voltage signal terminal VDD to the first node a to control the voltage of the first node a (ie, one end of the photodiode D) to be Vdd (That is, high level). Since the other end of the photodiode D is coupled to the first voltage signal terminal, the voltage across the photodiode D is equal, both are Vdd, and the photodiode D is in a zero bias state.
  • the fourth transistor T4 is turned on, coupling the first node a to the second node b, so that the voltage of the first node a is equal to the voltage of the second node b, that is, the voltage of the second node b is also Vdd (ie, , high level). Since the voltage across the capacitor Cs is equal, the charge in the capacitor Cs is cleared.
  • the input signal of the signal input terminal VIN, the reset signal of the signal reset terminal VRST, and the read signal of the read control terminal VRL are all low.
  • the photodiode D is illuminated, and the photodiode D senses the optical signal and converts the sensed optical signal into a photocurrent.
  • the photocurrent flows to the first node a such that the voltage of the first node a rises slightly.
  • the first transistor T1 and the second transistor T2 both operate in a saturation region, and the first transistor T1 and the second transistor T2 constitute an amplifying circuit.
  • the small voltage rise of the first node a causes the transconductance of the second transistor T2 to increase, so that the voltage of the second node b drops sharply.
  • the voltage of the first node a is pulled back to Vdd due to the bootstrap action of the capacitor Cs.
  • the photodiode D Since the above process occurs instantaneously, when the photodiode D is photoelectrically converted, the voltage across the photodiode D is always the same, that is, the photodiode D remains in a zero bias state. Therefore, the photocurrent does not flow into the second transistor T2. Accordingly, the photocurrent can charge the capacitor Cs, and the capacitor Cs controls the voltage of the second node b by storing the charge.
  • the input signal of the signal input terminal VIN and the reset signal of the signal reset terminal VRST are both low, and the read signal of the read control terminal VRL is high.
  • the fifth transistor T5 is turned on to supply the voltage of the second node b to the output line.
  • the reading phase is instantaneous.
  • the light intensity detecting device ensures that the voltages across the photodiode remain equal during the reset phase and the charging phase, and the photodiode is always in a zero bias state, thereby eliminating dark current in the photodiode. Therefore, the output signal of the output stage is not disturbed by the noise caused by the dark current, which improves the accuracy of the light intensity detection.
  • FIG. 7 shows a schematic flow chart of a method for detecting light intensity according to an embodiment of the present disclosure. This method is realized, for example, by using the light intensity detecting device 100 shown in Fig. 2 or the light intensity detecting device 200 shown in Fig. 1. The steps of the method are specifically described below.
  • the input circuit 120 can provide a first voltage signal from the first voltage signal terminal VDD to the first node a such that the voltage across the photosensor 110 is equal, That is, it is in a zero bias state.
  • the feedback circuit 140 can couple the first node a and the second node b such that the voltage of the second node b and the voltage of the first node a are equal, that is, the first The voltage at the end of a voltage signal. Since the voltages of the first node a and the second node b are equal, no charge is stored in the memory circuit 150.
  • the photosensor 110 is illuminated and produces a photocurrent
  • the voltage of the first node a is controlled to remain constant, such that the voltage across the photosensor remains unchanged
  • the photocurrent charges the memory circuit 150 to control the second node b.
  • Voltage In an embodiment of the present disclosure, the amplifying circuit 130 may control the voltage of the second node b according to the voltage of the first node a, and then the storage circuit 150 may control the voltage of the first node a according to the voltage of the second node b, The voltage of the first node a is kept constant.
  • the photocurrent generated in the photosensor 110 flows to the first node a such that the voltage of the first node a rises.
  • the amplifying circuit 130 may control the voltage of the second node according to the voltage of the first node a, for example, provide the second voltage signal from the second voltage signal terminal VSS to the second node, so that the voltage of the second node is lowered.
  • the memory circuit 150 pulls down the voltage of the first node a back to the voltage of the first voltage signal terminal.
  • the voltage across the photosensor 110 is maintained constant, i.e., maintained in a zero bias state where no dark current is present.
  • the photocurrent flows to the storage circuit 150 to charge the storage circuit 150, thereby controlling the voltage of the second node b.
  • the output circuit 160 reads the voltage of the second node b under the control of the read signal of the read control terminal.
  • the method for detecting light intensity provided by an embodiment of the present disclosure, by maintaining the same voltage across the photosensitive device during photoelectric conversion of the photosensitive device, it is ensured that the photosensitive device is in a zero bias state, so that there is no darkness in the photosensitive device. Current. Thereby, the noise caused by the dark current in the photosensitive device can be eliminated, and the accuracy of the light intensity detection can be improved.
  • FIG. 8 shows a schematic structural view of a display device according to an embodiment of the present disclosure.
  • the display device may include scan lines and data lines that are alternately disposed, and a pixel area 1 defined by the scan lines and the data lines.
  • at least one of the pixel regions 1 includes the light intensity detecting device 2.
  • the light intensity detecting device 2 may be the light intensity detecting device 100 shown in FIG. 2 or the light intensity detecting device 200 shown in FIG. 3.
  • the light intensity detecting devices 2 may be arranged in an array, and the light intensity detecting devices located in the same row or column are coupled to the same output line.
  • the display device may include a display panel and a housing covering the non-display area of the display panel.
  • the display device may be a liquid crystal display (LCD) panel, an electronic paper, an Organic Light-Emitting Diode (OLED) panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame,
  • LCD liquid crystal display
  • OLED Organic Light-Emitting Diode
  • a mobile phone a tablet computer
  • a television a display
  • a notebook computer a digital photo frame

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Abstract

用于检测光强的装置（100）包括光敏器件（110）、输入电路（120）、放大电路（130）、反馈电路（140）、存储电路（150）和输出电路（160）。光敏器件（110）与第一电压信号端（VDD）和第一节点（a）耦接。输入电路（120）在输入信号的控制下，将第一电压信号提供第一节点（a），以控制第一节点（a）的电压。放大电路（130）在第一节点（a）的电压的控制下，将来自第二电压信号端（VSS）的第二电压信号提供到第二节点（b），以控制第二节点（b）的电压。反馈电路（140）在复位信号的控制下，将第一节点（a）耦接到第二节点（b）。存储电路（150）存储第一节点（a）和第二节点（b）之间的电压差，以控制第一节点（a）和第二节点（b）的电压。输出电路（160）在读取信号的控制下，读取第二节点（b）的电压。还公开了用于检测光强的方法和显示装置。

Description

用于检测光强的装置、方法和显示装置
相关申请的交叉引用
本申请要求于2017年8月14日递交的申请号为201710695499.6的中国专利申请的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开实施例涉及显示技术领域，具体地，涉及用于检测光强的装置及其方法和显示装置。
背景技术
随着显示技术的发展，显示装置的显示效果越来越好，给人们带来了良好的视觉体验。由于生活水平的提高，人们对显示装置的要求不仅局限于显示效果，还要求其具有多样化的功能。例如，根据外界环境光的强度对显示屏的亮度进行调节以及进行生物识别。
发明内容
本公开实施例提供了用于检测光强的装置、用于检测光强的方法和显示装置。
根据本公开的第一方面，提供了一种用于检测光强的装置。用于检测光强的装置可包括光敏器件、输入电路、放大电路、反馈电路、存储电路和输出电路。光敏器件可与第一电压信号端和第一节点耦接。输入电路可在信号输入端的输入信号的控制下，将来自第一电压信号端的第一电压信号提供到第一节点，以控制第一节点的电压。放大电路可在第一节点的电压的控制下，将来自第二电压信号端的第二电压信号提供到第二节点，以控制第二节点的电压。反馈电路可在来自信号复位端的复位信号的控制下，将第一节点耦接到第二节点。存储电路可存储第一节点和第二节点之间的 电压差，以控制第一节点和第二节点的电压。输出电路可在来自读取控制端的读取信号的控制下，读取第二节点的电压。
在本公开的实施例中，放大电路可包括第一晶体管和第二晶体管。第一晶体管的控制极和第一极与第一电压信号端耦接，第二极与第二节点耦接。第二晶体管的控制极与第一节点耦接，第一极与第二节点耦接，第二极与第二电压信号端耦接。
在本公开的实施例中，输入电路可包括第三晶体管。第三晶体管的控制极与信号输入端耦接，第一极与第一节点耦接，第二极与第一电压信号端耦接。
在本公开的实施例中，反馈电路可包括第四晶体管。第四晶体管的控制极与信号复位端耦接，第一极与第一节点耦接，第二极与第二节点耦接。
在本公开的实施例中，存储电路可包括电容。电容的一端与第一节点耦接，另一端与第二节点耦接。
在本公开的实施例中，输出电路可包括第五晶体管。第五晶体管的控制极与读取控制端耦接，第一极与第二节点耦接，第二极与输出线耦接。
在本公开的实施例中，光敏器件可包括光敏二极管。
在本公开的实施例中，第一晶体管的尺寸和第二晶体管的尺寸相同。
根据本公开的第二方面，提供了一种用于检测光强的装置。该装置可包括光敏二极管、第一晶体管、第二晶体管、第三晶体管、第四晶体管、电容和第五晶体管。光敏二极管与第一电压信号端和第一节点耦接。第一晶体管的控制极和第一极与第一电压信号端耦接，第二极与第二节点耦接。第二晶体管的控制极与第一节点耦接，第一极与第二节点耦接，第二极与第二电压信号端耦接。第三晶体管的控制极与信号输入端耦接，第一极与第一节点耦接，第二极与第一电压信号端耦接。第四晶体管的控制极与信号复位端耦接，第一极与第一节点耦接，第二极与第二节点耦接。电容的一端与第一节点耦接，另一端与第二节点耦接。第五晶体管的控制极与读取控制端耦接，第一极与第二节点耦接，第二极与输出线耦接。
在本公开的实施例中，第一晶体管、第二晶体管、第三晶体管、第四 晶体管和第五晶体管是N型晶体管。
根据本公开的第三方面，还提供了一种用于检测光强的方法。该方法包括：在输入信号的控制下，将来自第一电压信号端的第一电压信号提供到第一节点，使得光敏器件两端的电压相等，在来自信号复位端的复位信号的控制下，将第一节点耦接到第二节点，使得第一节点和第二节点的电压相等；在光敏器件在光的照射下产生光电流的情况下，控制第一节点的电压保持不变，使得光敏器件两端的电压保持不变，并且光电流对存储电路充电，以控制第二节点的电压；以及在来自读取控制端的读取信号的控制下，读取第二节点的电压。
在本公开的实施例中，控制第一节点的电压保持不变包括：根据第一节点的电压来控制第二节点的电压，存储电路进而控制第一节点的电压保持不变。
在本公开的实施例中，所读取的第二节点的电压是V out＝V dd+I data*t。V dd为第一电压信号端的电压，I data为光电流的电流值，t为光敏器件被光照射的时间。
根据本公开的第四方面，还提供了一种显示装置。显示装置包括：交叉设置的扫描线和数据线，由扫描线和数据线限定的像素区域。像素区域中的至少一个包括根据本公开的第一方面或第二方面的用于检测光强的装置。
在本公开的实施例中，用于检测光强的装置以阵列形式排布，位于同一行或同一列的用于检测光强的装置耦接同一输出线。
附图说明
为了更清楚地说明本发明的技术方案，下面将对实施例的附图进行简单说明。应当知道，以下描述的附图仅仅是本发明的一些实施例，而非对本发明的限制，其中相同的附图标记指示相同的元件或信号。在附图中：
图1示出了一种示例性的指纹传感器的结构示意图；
图2示出了根据本公开实施例的用于检测光强的装置的示意性结构图；
图3示出了根据本公开实施例的用于检测光强的装置的示例性电路图；
图4示出了根据本公开实施例的放大电路的输入电压与输出电压的示意图；
图5示出了根据本公开实施例的用于检测光强的装置中的信号的示意性时序图；
图6A示出了根据本公开实施例的用于检测光强的装置在第一阶段的工作状态图；
图6B示出了根据本公开实施例的用于检测光强的装置在第二阶段的工作状态图；
图6C示出了根据本公开实施例的用于检测光强的装置在第三阶段的工作状态图；
图7示出了根据本公开实施例的用于检测光强的方法的示意性流程图；
图8示出了根据本公开实施例的显示装置的示意性结构图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚明白，下文中将结合附图对本公开的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
为了清晰起见，在用于描述本公开的实施例的附图中，层或微结构的厚度和尺寸被放大。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
在本公开的描述中，除非另有说明，“多个”的含义是两个或两个以上；术语“上”、“下”、“左”、“右”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本公开和简化描述，而不是指示或暗示所指的机或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本公开的限制。
在本公开的描述中，需要说明的是，除非另有明确的规定和限定，术 语“安装”、“连接”、“耦接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是连接；可以是直接连接，也可以通过中间媒介间接连接。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本公开中的具体含义。
本领域技术人员可以理解，本申请所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。例如，本公开实施例中使用的薄膜晶体管可以是氧化物半导体晶体管。在本公开实施例中，晶体管的栅极可被称为控制极，由于晶体管的源极、漏极是对称的，因此对源极和漏极不做区分，即晶体管的源极可以为第一极(或第二极)，漏极可以为第二极(或第一极)。
为了实现根据外界环境光的强度对显示屏的亮度进行调节，通常需要采用光敏器件进行光强检测，即通过检测在光照作用下产生的光电流信号的幅值来确定环境光的强度。在进行生物识别的过程中，通常可采用指纹识别电路，例如由多个指纹传感器组成。图1示出了一种示例性的指纹传感器的结构示意图。如图1所示，指纹传感器包括光敏器件D0和开关晶体管T0。当光源照射到手指上时，由于指纹谷脊间的差异，在不同位置处会产生不同的反射光。由于多个指纹传感器中的光敏器件D0处的光强可能不同，因此可产生不同的光电流信号。通过检测光敏器件D0中产生的光电流信号来确定光强。然后，在开关晶体管T0的控制下，将光敏器件D0产生的光电流信号读出，以实现对指纹的谷脊的检测。
在检测光强时，光敏器件通常处于偏置状态。然而，即使不存在光照，处于偏置状态的光敏器件中始终存在暗电流。暗电流使得光敏器件中的噪声增大，从而影响光强检测的精确度。
图2示出了根据本公开实施例的用于检测光强的装置(以下也可称为光强检测装置)的示意性结构图。如图2所示，光强检测装置100可包括光敏器件110、输入电路120、放大电路130、反馈电路140、存储电路150输出电路160。
在本公开的实施例中，光敏器件110可与第一电压信号端VDD和第一 节点a耦接。光敏器件110可感测光信号，并将所感测的光信号转换成光电流。在一些实施例中，光敏器件110可以是光敏二极管。
输入电路120可与信号输入端VIN、第一电压信号端VDD和第一节点a耦接。输入电路120可在来自信号输入端VIN的输入信号的控制下，将来自第一电压信号端VDD的第一电压信号提供到第一节点a，以控制第一节点a的电压。
放大电路130可与第一电压信号端VDD、第二电压信号端VSS、第一节点a和第二节点b耦接。放大电路130可在第一节点a的电压的控制下，将来自第二电压信号端VSS的第二电压信号提供到第二节点b，以控制第二节点b的电压。
反馈电路140可与信号复位端VRST、第一节点a和第二节点b耦接。反馈电路140可在来自信号复位端VRST的复位信号的控制下，将第一节点a和第二节点b耦接，以使得第一节点a的电压和第二节点b的电压相等
存储电路150可耦接在第一节点a和第二节点b之间。存储电路150可存储第一节点a和第二节点b之间的电压差，以控制第一节点a的电压和第二节点b的电压。
输出电路160可与第二节点b和读取控制端VRL耦接。输出电路160可在来自读取控制端VRL的读取信号的控制下，读取第二节点b的电压。在实施例中，输出电路160还可与输出线耦接，以便根据读取信号将第二节点b的电压输出到输出线。
在本公开的实施例中，第一电压信号端VDD的第一电压信号是高电平信号Vdd，第二电压信号端VSS的第二电压信号是低电平信号Vss。
在一些实施例中，当光敏器件110未受到光照时，光敏器件110的一端始终与第一电压信号端VDD耦接，其电压始终保持为Vdd。光敏器件110的另一端与第一节点a耦接，并且通过输入电路120控制第一节点a的电压为来自第一电压信号端VDD的第一电压信号的电压Vdd。以此方式，光敏器件110两端的电压相等，即光敏器件110处于零偏置状态。此外， 当光敏器件110受到光照时，光敏器件110产生的光电流会使得第一节点a的电压出现微小上升。在放大电路130的控制下，第二节点b的电压急剧下降。通过反馈电路140将第一节点a的电压控制回到Vdd，并调节第二节点b的电压。然而，这些都是瞬时发生的。也就是说，第一节点a的电压没有改变，始终保持为Vdd。因此，在光敏器件110的光电转换的过程中，光敏器件110两端的电压始终保持相同，即光敏器件110处于零偏置状态。因此，光敏器件中不存在暗电流。
本公开实施例提供的光强检测装置，通过在光敏器件的光电转换的过程中保持光敏器件两端的电压相同，保证了光敏器件处于零偏置状态。由此，消除了光敏器件中的暗电流，进而避免了由暗电流产生的噪声，提高了光强检测的精确度。
以下通过示例性实施例来详细描述光强检测装置100的电路结构。
图3示出了根据本公开实施例的光强检测装置200的示例性电路图，光强检测装置200例如是图2中所示的光强检测装置100。在实施例中，所采用的晶体管可以是N型晶体管或者P型晶体管，例如N型或P型场效应晶体管(MOSFET)。在本发明的实施例中，晶体管的栅极被称为控制极。由于晶体管的源极和漏极是对称的，因此对源极和漏极不做区分，即晶体管的源极可以为第一极(或第二极)，漏极可以为第二极(或第一极)。
在本发明的实施例中，以N型场效应晶体管(NMOS)为例进行详细的描述。
如图3所示，光敏器件110可以是光敏二极管D。
输入电路120可包括第三晶体管T3。第三晶体管T3的控制极与信号输入端VIN耦接，第一极与第一节点a耦接，第二极与第一电压信号端VDD耦接。
放大电路130可包括第一晶体管T1和第二晶体管T2。第一晶体管T1的控制极和第一极与第一电压信号端VDD耦接，第二极与第二节点b耦接。第二晶体管T2的控制极与第一节点a耦接，第一极与第二节点b耦接，第二极与第二电压信号端VSS耦接。
反馈电路140可包括第四晶体管T4。第四晶体管T4的控制极与信号复位端VRST耦接，第一极与第一节点a耦接，第二极与第二节点b耦接。
存储电路150可包括电容Cs。电容Cs的一端与第一节点a耦接，另一端与第二节点b耦接。在本公开实施例中，电容Cs可以是由像素电极与公共电极构成的液晶电容，也可以是由像素电极与公共电极构成的液晶电容以及存储电容构成的等效电容，本公开对此不作限定。
输出电路160可包括第五晶体管T5。第五晶体管T5的控制极与读取控制端VRL耦接，第一极与第二节点b耦接，第二极与输出线耦接。
以上仅以示例的方式描述光敏器件110、输入电路120、放大电路130、反馈电路140、存储电路150和输出电路160的电路结构。本领域技术人员容易理解是，以上各部分的实现方式不限于此，只要能够实现其各自的功能即可。
图4示出了根据本公开实施例的光强检测装置中的放大电路的输入电压与输出电压的关系的示意图。如图4所示，放大电路的输入电压越大，则输出电压越小。在本实施例中，放大电路130的输入电压为第一节点a的电压V0，输出为第二节点b的电压Vout。因此，第一节点的电压V0与第二节点的电压Vout呈反比例关系。如图4所示，在第一节点a的电压V0处于在曲线斜率最大的区域(Vdd电压附近)的情况下，在第一节点a的电压V0出现微小时，第二节点b的电压Vout将急剧下降。本领域技术人员可以理解，本实施例中的放大电路的作用可以相当于反向器。
在本公开实施例中，第一晶体管T1和第二晶体管T2的尺寸可以相同，例如第一晶体管T1的宽长比与第二晶体管T2的宽长比相等。此外，第一晶体管T1的阈值电压Vth1和第二晶体管T2的阈值电压Vth2可以相等，即Vth1＝Vth2。在实施例中，第一电压信号端VDD的信号的电压Vdd可大于第一晶体管T1的阈值电压Vth1和第二晶体管T2的阈值电压Vth2。
在本公开实施例中，第一晶体管T1，第二晶体管T2、第三晶体管T3、第四晶体管T4和第五晶体管T5均为N型薄膜晶体管。这样，可以统一工艺流程，减少工艺制程，有助于提高产品的良率。本公开实施例可使用低 温多晶硅薄膜晶体管，因为其漏电流较小。薄膜晶体管具体可以选择底栅结构的薄膜晶体管或者顶栅结构的薄膜晶体管，只要能够实现开关功能即可。
下面通过描述光强检测装置的工作过程来进一步说明本公开实施例的技术方案。
图5示出了根据本公开实施例的光强检测装置中的信号的时序图，光强检测装置例如是图3所示的光强检测装置200，其包括晶体管(T1～T5)、光敏二极管(D)、电容(Cs)、信号端(VIN、VRST、VDD、VSS、VRL)。
如图5所示，光强检测装置200的工作过程例如可包括第一阶段S1、第二阶段S2和第三阶段S3，以下结合图6A-图6C进行详细描述。图6A示出了根据本公开实施例的光强检测装置在第一阶段S1的示意性工作状态图。图6B示出了根据本公开实施例的光强检测装置在第二阶段S2的示意性工作状态图。图6C示出了根据本公开实施例的光强检测装置在第三阶段S3的示意性工作状态图。
在第一阶段S1，即重置阶段，信号输入端VIN的输入信号和信号复位端VRST的复位信号均为高电平，读取控制端VRL的读取信号为低电平。
如图6A所示，第三晶体管T3导通，向第一节点a提供第一电压信号端VDD的第一电压信号，以控制第一节点a(即光敏二极管D的一端)的电压为Vdd(即，高电平)。由于光敏二极管D的另一端耦接第一电压信号端，因此光敏二极管D两端的电压相等，均为Vdd，光敏二极管D处于零偏置状态。另外，第四晶体管T4导通，将第一节点a耦接到第二节点b，使得第一节点a的电压与第二节点b的电压相等，即第二节点b的电压也为Vdd(即，高电平)。由于电容Cs两端的电压相等，电容Cs中的电荷清空。
在第二阶段S2，即充电阶段，信号输入端VIN的输入信号、信号复位端VRST的复位信号、以及读取控制端VRL的读取信号均为低电平。
如图6B所示，光敏二极管D受到光照，光敏二极管D感测光信号，并将所感测的光信号转换成光电流。光电流流向第一节点a，使得第一节 点a的电压微小上升。在本公开实施例中，第一晶体管T1和第二晶体管T2均工作在饱和区，第一晶体管T1和第二晶体管T2组成放大电路。第一节点a的微小电压上升导致第二晶体管T2的跨导增加，从而使得第二节点b的电压急剧下降。由于电容Cs的自举作用，将第一节点a的电压下拉回至Vdd。由于以上过程是瞬时发生的，所以在光敏二极管D进行光电转换时，光敏二极管D两端的电压始终相同，即光敏二极管D保持处于零偏置状态。因此，光电流不会流入第二晶体管T2。相应地，光电流可对电容Cs进行充电，电容Cs通过存储电荷，对第二节点b的电压进行控制。其中，输出的第二节点b的电压满足Vout＝Vdd+Idata*t，其中，Vdd为第一电压信号端VDD的电压，Idata为光电流的电流值，t为光敏二极管D接受光照的时间。
在第三阶段S3，即读取阶段，信号输入端VIN的输入信号、信号复位端VRST的复位信号均为低电平，读取控制端VRL的读取信号为高电平。
如图6C所示，第五晶体管T5导通，将第二节点b的电压提供至输出线中。在本公开的实施例中，读取阶段是瞬时的。
本公开实施例提供的光强检测装置保证了在重置阶段和充电阶段中，光敏二极管的两端的电压保持相等，光敏二极管始终处于零偏置状态，从而消除了光敏二极管中的暗电流。因此，输出阶段的输出的信号不会被暗电流带来的噪声干扰，提高了光强检测的精确度。
图7示出了根据本公开实施例的用于检测光强的方法的示意性流程图。该方法例如采用图2中所示的光强检测装置100或图1中所示的光强检测装置200实现。以下对该方法的步骤进行具体描述。
在步骤710，在来自信号输入端VIN的输入信号的控制下，输入电路120可将来自第一电压信号端VDD的第一电压信号提供到第一节点a，使得光敏器件110两端的电压相等，即处于零偏置状态。在来自信号复位端VRST的复位信号的控制下，反馈电路140可将第一节点a和第二节点b耦接，使得第二节点b的电压和第一节点a的电压相等，即均为第一电压信号端的电压。由于第一节点a和第二节点b的电压相等，使得存储电路 150中不存储电荷。
在步骤720，光敏器件110受到光照并产生光电流，控制第一节点a的电压保持不变，使得光敏器件两端的电压保持不变，并且光电流对存储电路150充电，以控制第二节点b的电压。在本公开的实施例中，放大电路130可根据第一节点a的电压来控制第二节点b的电压，然后存储电路150可根据第二节点b的电压来控制第一节点a的电压，以使得第一节点a的电压保持不变。
具体地，光敏器件110中产生的光电流流向第一节点a，使得第一节点a的电压升高。放大电路130可根据第一节点a的电压来控制第二节点的电压，例如将来自第二电压信号端VSS的第二电压信号提供至第二节点，使得第二节点的电压降低。存储电路150将第一节点a的电压下拉回至第一电压信号端的电压。使得光敏器件110两端的电压保持不变，即保持零偏置状态，其中不存在暗电流。此外，光电流流向存储电路150，以对存储电路150充电，从而控制第二节点b的电压。
在步骤730，输出电路160在读取控制端的读取信号的控制下，读取第二节点b的电压。所读取的第二节点b的电压满足Vout＝Vdd+Idata*t，其中，Vdd为第一电压信号端VDD的电压，Idata为光电流的电流值，t为光敏器件接受光照的时间。
根据本公开实施例提供的用于检测光强的方法，通过在光敏器件光电转换的过程中，保持光敏器件两端的电压相同，保证了光敏器件处于零偏置状态，使得光敏器件中不存在暗电流。由此，可消除光敏器件中的暗电流带来的噪声，并提高光强检测的精确度。
图8示出了根据本公开实施例的显示装置的结构示意图。如图8所示，显示装置可包括：交叉设置的扫描线和数据线，由扫描线和数据线限定的像素区域1。其中，至少一个像素区域1包括光强检测装置2。其中，光强检测装置2可以是图2所示的光强检测装置100或图3所示的光强检测装置200。
在本公开的实施例中，光强检测装置2可以以阵列形式排布，位于同 一行或同一列的光强检测装置被耦接到同一输出线。
在本公开的实施例中，显示装置可包括显示面板以及覆盖显示面板非显示区域的壳体。显示装置可以是液晶显示(Liquid Crystal Display，简称LCD)面板、电子纸、有机发光二极管(Organic Light-Emitting Diode，简称OLED)面板、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件，本公开实施例对此并不做任何限定。
以上对本发明的若干实施方式进行了详细描述，但本发明的保护范围并不限于此。显然，对于本领域的普通技术人员来说，在不脱离本发明的精神和范围的情况下，可以对本发明的实施例进行各种修改、替换或变形。本发明的保护范围由所附权利要求限定。

Claims (15)

  1. 一种用于检测光强的装置，包括：光敏器件、输入电路、放大电路、反馈电路、存储电路和输出电路；其中，
    所述光敏器件与第一电压信号端和第一节点耦接；
    所述输入电路被配置为在信号输入端的输入信号的控制下，将来自所述第一电压信号端的第一电压信号提供到所述第一节点，以控制所述第一节点的电压；
    所述放大电路被配置为在所述第一节点的电压的控制下，将来自第二电压信号端的第二电压信号提供到第二节点，以控制所述第二节点的电压；
    所述反馈电路被配置为在来自信号复位端的复位信号的控制下，将所述第一节点耦接到所述第二节点；
    所述存储电路被配置为存储所述第一节点和所述第二节点之间的电压差，以控制所述第一节点和所述第二节点的电压；以及
    所述输出电路被配置为在来自读取控制端的读取信号的控制下，读取所述第二节点的电压。
  2. 根据权利要求1所述的用于检测光强的装置，其中，所述放大电路包括：
    第一晶体管，所述第一晶体管的控制极和第一极与所述第一电压信号端耦接，第二极与所述第二节点耦接；以及
    第二晶体管，所述第二晶体管的控制极与所述第一节点耦接，第一极与所述第二节点耦接，第二极与所述第二电压信号端耦接。
  3. 根据权利要求1所述的用于检测光强的装置，其中，所述输入电路包括：
    第三晶体管，所述第三晶体管的控制极与所述信号输入端耦接，第一极与所述第一节点耦接，第二极与所述第一电压信号端耦接。
  4. 根据权利要求1所述的用于检测光强的装置，其中，所述反馈电路包括：
    第四晶体管，所述第四晶体管的控制极与所述信号复位端耦接，第一极与所述第一节点耦接，第二极与所述第二节点耦接。
  5. 根据权利要求1所述的用于检测光强的装置，其中，所述存储电路包括：
    电容，所述电容的一端与所述第一节点耦接，另一端与所述第二节点耦接。
  6. 根据权利要求1所述的用于检测光强的装置，其中，所述输出电路包括：
    第五晶体管，所述第五晶体管的控制极与所述读取控制端耦接，第一极与所述第二节点耦接，第二极与输出线耦接。
  7. 根据权利要求1所述的用于检测光强的装置，其中，所述光敏器件包括：光敏二极管。
  8. 根据权利要求2所述的用于检测光强的装置，其中，所述第一晶体管的尺寸与所述第二晶体管的尺寸相同。
  9. 一种用于检测光强的装置，包括：
    光敏二极管，所述光敏二极管与第一电压信号端和第一节点耦接；
    第一晶体管，所述第一晶体管的控制极和第一极与所述第一电压信号端耦接，第二极与第二节点耦接；
    第二晶体管，所述第二晶体管的控制极与所述第一节点耦接，第一极与所述第二节点耦接，第二极与第二电压信号端耦接；
    第三晶体管，所述第三晶体管的控制极与信号输入端耦接，第一极与所述第一节点耦接，第二极与所述第一电压信号端耦接；
    第四晶体管，所述第四晶体管的控制极与信号复位端耦接，第一极与所述第一节点耦接，第二极与所述第二节点耦接；
    电容，所述电容的一端与所述第一节点耦接，另一端与所述第二节点耦接；以及
    第五晶体管，所述第五晶体管的控制极与读取控制端耦接，第一极与所述第二节点耦接，第二极与输出线耦接。
  10. 根据权利要求9所述的用于检测光强的装置，其中，所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管和所述第五晶体管是N型晶体管。
  11. 一种用于检测光强的方法，包括：
    在输入信号的控制下，将来自第一电压信号端的第一电压信号提供到第一节点，使得光敏器件两端的电压相等，在来自信号复位端的复位信号的控制下，将所述第一节点耦接到第二节点，使得所述第一节点和所述第二节点的电压相等；
    在所述光敏器件在光的照射下产生光电流的情况下，控制所述第一节点的电压保持不变，使得所述光敏器件两端的电压保持不变，并且所述光电流对存储电路充电，以控制所述第二节点的电压；以及
    在来自读取控制端的读取信号的控制下，读取所述第二节点的电压。
  12. 根据权利要求11所述的方法，其中，控制所述第一节点的电压保持不变包括：
    根据所述第一节点的电压来控制所述第二节点的电压，所述存储电路进而控制所述第一节点的电压保持不变。
  13. 根据权利要求11或12所述的方法，其中，所读取的所述第二节点的电压是V out＝V dd+I data*t，
    其中，V dd为所述第一电压信号端的电压，I data为所述光电流的电流值，t为所述光敏器件被光照射的时间。
  14. 一种显示装置，包括：交叉设置的扫描线和数据线，由所述扫描线和所述数据线限定的像素区域；
    所述像素区域中的至少一个包括根据权利要求1至10中任意一项所述的用于检测光强的装置。
  15. 根据权利要求14所述的装置，其中，所述用于检测光强的装置以阵列形式排布，位于同一行或同一列的用于检测光强的装置耦接同一输出线。
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US20200271513A9 (en) 2020-08-27

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