WO2018211883A1 - Procédé de fabrication d'un substrat multicouche en résine, substrat multicouche en résine et structure de montage de substrat multicouche en résine - Google Patents

Procédé de fabrication d'un substrat multicouche en résine, substrat multicouche en résine et structure de montage de substrat multicouche en résine Download PDF

Info

Publication number
WO2018211883A1
WO2018211883A1 PCT/JP2018/015688 JP2018015688W WO2018211883A1 WO 2018211883 A1 WO2018211883 A1 WO 2018211883A1 JP 2018015688 W JP2018015688 W JP 2018015688W WO 2018211883 A1 WO2018211883 A1 WO 2018211883A1
Authority
WO
WIPO (PCT)
Prior art keywords
multilayer substrate
mounting
resin multilayer
resin
internal conductor
Prior art date
Application number
PCT/JP2018/015688
Other languages
English (en)
Japanese (ja)
Inventor
伊藤 慎悟
邦明 用水
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2018211883A1 publication Critical patent/WO2018211883A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • the present invention relates to a resin multilayer substrate, and more particularly to a method for manufacturing a resin multilayer substrate in which a conductor pattern is formed on a laminate, a resin multilayer substrate obtained by the manufacturing method, and a mounting structure for the resin multilayer substrate.
  • Patent Document 1 Korean Patent Document 1
  • FIG. 6A is a cross-sectional view showing a state in which the resin multilayer substrate is being cut into individual pieces from the laminated body 10M which is a mother substrate
  • FIG. 6B is a diagram illustrating the cut resin multilayer substrate 100 as a mounting substrate 200. It is sectional drawing which shows the mounted state.
  • the mounting electrodes P1A and P2A may be deformed and wrap around the end surface (cut surface) of the resin multilayer substrate (cut-out laminated body 10A).
  • this resin multilayer substrate 100 is mounted on the mounting substrate 200 via the solder 4A, the solder spreads along the mounting electrode P1A deformed so as to wrap around, and reaches the conductor pattern 33A exposed on the end surface of the multilayer body 10A. Solder 4A may reach. Therefore, a short circuit may occur between the conductor pattern 33A exposed on the end face of the multilayer body 10A and the mounting electrode P1A.
  • the object of the present invention is to provide a short circuit between the mounting electrode formed on the surface of the multilayer body and the internal conductor pattern exposed on the surface of the multilayer body when mounted on a mounting substrate or the like via a conductive bonding material. It is providing the resin multilayer substrate which can be suppressed.
  • the method for producing the resin multilayer substrate of the present invention comprises: A conductor forming step of forming an internal conductor pattern and mounting electrodes on a plurality of insulating base layers mainly composed of a resin material; After the conductor forming step, the plurality of laminated insulating base layers are heated and pressurized, the mounting electrodes are arranged on the surface of the multilayer body, and the internal conductor patterns are arranged inside the multilayer body.
  • a cutting process for forming a reattachment film of It is characterized by providing.
  • the cut mounting electrode it is difficult for the cut mounting electrode to be deformed so as to wrap around the end face of the laminate. Therefore, when the resin multilayer substrate is mounted on the mounting substrate via the conductive bonding material, the conductive bonding material is suppressed from spreading along the end surface, and a short circuit between the mounting electrode and the internal conductor pattern is prevented. A suppressed resin multilayer substrate can be obtained.
  • the insulating reattachment film is formed on the end face so as to cover at least one of the part reaching the end face of the mounting electrode or the part reaching the end face of the internal conductor pattern. Therefore, even when the conductive bonding material spreads along the end surface when mounted on the mounting substrate via the conductive bonding material, the resin multilayer that further suppresses the short circuit between the mounting electrode and the internal conductor pattern A substrate can be obtained.
  • a plating formation step in which a metal film that is less oxidizable than the internal conductor pattern is formed on the surface of the mounting electrode between the multilayer body formation step and the cutting step. It is preferable to provide. With this manufacturing method, the plating film formed on the surface of the mounting electrode is difficult to oxidize when cut with a laser. Therefore, the mountability of the manufactured resin multilayer substrate is improved as compared with the case where the plating film is not provided.
  • the resin multilayer substrate of the present invention is A laminate having a mounting surface and an end surface formed by laminating a plurality of insulating base layers mainly composed of a resin material; A mounting electrode that is formed on the mounting surface of the laminate and is exposed to extend to reach the end surface; An internal conductor pattern that is formed inside the laminate and is exposed to extend to reach the end face; A reattachment film of the resin material formed on the end surface so as to cover at least one of the portion reaching the end surface of the mounting electrode or the portion reaching the end surface of the internal conductor pattern; It is characterized by providing.
  • a resin multilayer substrate can be realized.
  • a portion reaching the end face of the inner conductor pattern is an oxide film of the inner conductor pattern.
  • a portion reaching the end face of the mounting electrode is an oxide film of the mounting electrode.
  • At least one of the mounting electrode or the internal conductor pattern may be a pattern made of copper foil.
  • at least one of the mounting electrode or the internal conductor pattern is a pattern made of copper foil, it has high conductivity and is easily oxidized.
  • a metal plating film that covers the surface of the mounting electrode and is less oxidizable than the mounting electrode is provided.
  • the plating film formed on the surface of the mounting electrode is less susceptible to oxidation than the mounting electrode. Therefore, the mounting property of the resin multilayer substrate is improved as compared with the case where the plating film is not provided.
  • the plating film may be a gold plating film.
  • the thickness of the mounting electrode or the thickness of the internal conductor pattern is formed on the end surface of the mounting electrode and the end surface of the internal conductor pattern. It is preferable that it is below the thickness in the lamination direction of the said insulating base material layer between the parts which reach. With this configuration, it is possible to realize a resin multilayer substrate in which the thickness of the resin material reattachment film is large.
  • the mounting structure of the resin multilayer substrate of the present invention is as follows: Any one of the resin multilayer substrates of (3) to (9) above; A mounting substrate on which the resin multilayer substrate is mounted and having external electrodes; With The mounting electrode is connected to the external electrode through a conductive bonding material.
  • the present invention when mounting on a mounting substrate or the like via a conductive bonding material, a short circuit between the mounting electrode formed on the surface of the multilayer body and the internal conductor pattern exposed on the surface of the multilayer body is prevented.
  • a resin multilayer substrate that can be suppressed can be realized.
  • FIG. 1 is a sectional view of a resin multilayer substrate 101 according to the present invention.
  • 2A is an enlarged cross-sectional view of the first end surface portion SP1 in FIG. 1
  • FIG. 2B is an enlarged cross-sectional view of the second end surface portion SP2 in FIG.
  • FIG. 3 is a cross-sectional view showing a main part of the electronic device 301 according to the present invention.
  • FIG. 4 is a cross-sectional view sequentially illustrating the manufacturing steps of the resin multilayer substrate 101.
  • FIG. 5 is a cross-sectional view sequentially illustrating the manufacturing steps of the resin multilayer substrate 101.
  • FIG. 6A is a cross-sectional view showing a state in which the resin multilayer substrate is being cut into individual pieces from the laminated body 10M which is a mother substrate
  • FIG. 6B is a diagram illustrating the cut resin multilayer substrate 100 as a mounting substrate 200. It is sectional drawing which shows the mounted state.
  • FIG. 1 is a sectional view of a resin multilayer substrate 101 according to the present invention.
  • 2A is an enlarged cross-sectional view of the first end surface portion SP1 in FIG. 1
  • FIG. 2B is an enlarged cross-sectional view of the second end surface portion SP2 in FIG.
  • the resin multilayer substrate 101 includes a laminate 10, mounting electrodes P1, P2, internal conductor patterns 31, 32, 33, and redeposition films AF1, AF2.
  • the laminate 10 is formed by laminating a plurality of insulating base material layers 11, 12, and 13 whose main component is a resin material (thermoplastic resin), and a first main surface VS1 and a second main surface VS2 facing each other.
  • the first main surface VS1 corresponds to a “mounting surface”.
  • the plurality of insulating base layers 11, 12, and 13 are sheets mainly made of a liquid crystal polymer, for example.
  • the mounting electrode P1 is a conductor that is formed on the first main surface VS1 of the multilayer body 10 and extends and exposed so as to reach the end surface SS1.
  • the mounting electrode P1 is a conductor formed on the first main surface VS1 of the multilayer body 10.
  • the portion of the mounting electrode P1 that reaches the end surface SS1 is an oxide film P1X of the mounting electrode P1.
  • the surface of the mounting electrode P1 is covered with a plating film PL1.
  • the plating film PL1 is a metal plating film that is less likely to be oxidized than the mounting electrode P1.
  • the mounting electrode P1 is a conductor pattern such as a Cu foil, for example, and the plating film PL1 is a Ni / Au plating film whose base is Ni and whose surface is Au, for example.
  • the mounting electrode P2 is a conductor that is formed on the first main surface VS1 of the multilayer body 10, and is extended and exposed so as to reach the end surface SS2.
  • the mounting electrode P2 is a conductor formed on the first main surface VS1 of the multilayer body 10.
  • the portion of the mounting electrode P2 that reaches the end surface SS2 is the oxide film P2X of the mounting electrode P2.
  • the surface of the mounting electrode P2 is covered with a plating film PL2.
  • the plating film PL2 is a metal plating film that is less likely to be oxidized than the mounting electrode P2.
  • the mounting electrode P2 is a conductor pattern such as a Cu foil, for example, and the plating film PL2 is a Ni / Au plating film whose base is Ni and whose surface is Au, for example.
  • the inner conductor patterns 31, 32, and 33 are conductors that are formed inside the multilayer body 10 and are exposed by extending so as to reach the end surface SS1 or the end surface SS2.
  • the internal conductor patterns 31, 32, 33 constitute a part of a circuit (coil, capacitor, wiring, etc.) formed in the multilayer body 10.
  • the portions reaching the end surface SS1 of the internal conductor patterns 31, 33 are the oxide films 31X, 33X of the internal conductor patterns 31, 33.
  • the portion reaching the end surface SS2 of the internal conductor pattern 32 is an oxide film 32X of the internal conductor pattern 32.
  • the internal conductor patterns 31, 32, 33 are, for example, Cu foil conductor patterns.
  • the redeposition film AF1 is an insulating film formed on the end surface SS1 so as to cover a portion reaching the end surface SS1 of the mounting electrode P1 and a portion reaching the end surface SS1 of the internal conductor patterns 31 and 33.
  • the redeposition film AF2 is an insulating film formed on the end surface SS2 so as to cover a portion reaching the end surface SS2 of the mounting electrode P2 and a portion reaching the end surface of the internal conductor pattern 32.
  • the reattachment films AF1 and AF2 are obtained by evaporating or vaporizing the resin material of the insulating base layers 11, 12, and 13 when the laminate 10 is cut out by a high-power laser.
  • 10 is a film attached to the end faces SS1 and SS2.
  • the thickness A1 of the mounting electrode P1 and the thickness A2 of the internal conductor patterns 31, 33 reach the end surface SS1 of the mounting electrode P1 and the end surface SS1 of the internal conductor patterns 31, 33. It is below thickness B1, B2 in the lamination direction (Z-axis direction) of the insulating base material layer between the parts (A1 ⁇ B1, A1 ⁇ B2, A2 ⁇ B1, A2 ⁇ B2).
  • the thickness A1 of the mounting electrode P2 and the thickness A2 of the internal conductor pattern 32 are a part reaching the end surface SS2 of the mounting electrode P2, and a part reaching the end surface SS2 of the internal conductor pattern 32. It is below thickness B3 in the Z-axis direction of insulating base material layers 12 and 13 between (A1 ⁇ B3, A2 ⁇ B3).
  • FIG. 3 is a cross-sectional view showing a main part of the electronic device 301 according to the present invention.
  • the electronic device 301 includes a resin multilayer substrate 101, a mounting substrate 201, and the like.
  • the mounting board 201 is, for example, a printed wiring board.
  • the resin multilayer substrate 101 is mounted on the main surface of the mounting substrate 201.
  • electronic components other than the resin multilayer substrate 101 are mounted on the main surface of the mounting substrate 201, illustration is omitted.
  • External electrodes 41, 42, etc. are formed on the main surface of the mounting substrate 201. Although other conductors are formed on the main surface or inside of the mounting substrate 201, the illustration is omitted.
  • the mounting electrodes P1 and P2 of the resin multilayer substrate 101 are connected to the external electrodes 41 and 42 through the conductive bonding material 4, respectively.
  • the conductive bonding material 4 is, for example, solder.
  • the resin multilayer substrate 101 of the present invention is manufactured, for example, by the following process. 4 and 5 are cross-sectional views sequentially showing the manufacturing process of the resin multilayer substrate 101.
  • insulating base material layers 11, 12, and 13 are sheets mainly made of a liquid crystal polymer, for example.
  • the inner conductor patterns 31C and 32C are formed on the surface of the insulating base material layer 11, the inner conductor pattern 33C is formed on the surface of the insulating base material layer 12, and the mounting electrodes P1C and P2C are formed on the surface of the insulating base material layer 13.
  • the inner conductor patterns 31C and 32C are formed by laminating a metal foil (for example, Cu foil) on one main surface of the insulating base layer 11, and patterning the metal foil by photolithography.
  • An inner conductor pattern 33C is formed by laminating a metal foil (for example, Cu foil) on one side main surface of the insulating base material layer 12, and patterning the metal foil by photolithography.
  • the mounting electrodes P1C and P2C are formed by laminating a metal foil (for example, Cu foil) on one main surface of the insulating base layer 13 and patterning the metal foil by photolithography.
  • This step of forming internal conductor patterns and mounting electrodes on a plurality of insulating base layers mainly composed of a resin material is an example of the “conductor forming step” in the present invention.
  • interlayer connection conductors may be formed on the plurality of insulating base material layers 11, 12, and 13.
  • the interlayer connection conductor is provided with a through-hole using a laser or the like, and then a conductive paste containing one or more of Cu, Sn, or the like, or an alloy thereof is disposed, followed by heating and pressurization (the “laminated body formation” of the present invention). Provided by curing in step ”)".
  • a plurality of insulating base material layers on which the internal conductor patterns 31C, 32C, and 33C and the mounting electrodes P1C and P2C are formed are stacked, and heated and pressed (collectively) from the direction of the white arrow shown in (1) in FIG.
  • the laminated body 10C in the aggregate substrate state shown in (2) in FIG. 4 is formed by pressing.
  • the mounting electrodes P1C and P2C are disposed on the surface of the multilayer body 10C, and the internal conductor patterns 31C, 32C, and 33C are disposed inside the multilayer body 10C.
  • a laminated body is formed by heating and pressing a plurality of laminated insulating base layers, mounting electrodes are placed on the surface of the laminated body, and an internal conductor pattern is placed inside the laminated body
  • This process is an example of the “laminated body forming process” in the present invention.
  • a metal film that is less oxidizable than the mounting electrodes P1C and P2C is formed on the surface of the mounting electrodes P1C and P2C by plating.
  • the metal film to be plated is, for example, a Ni / Au plating film in which the base is Ni and the surface is Au.
  • the laminated body 10C in the aggregate substrate state is separated into individual pieces along the separation line DL shown in (3) in FIG. Specifically, as shown in (4) in FIG. 4 and (5) and (6) in FIG. 5, a high-power laser from the first main surface VS1 to the second main surface VS2 of the laminated body 10C.
  • a high-power laser from the first main surface VS1 to the second main surface VS2 of the laminated body 10C.
  • the laminated body 10C is cut together with the mounting electrodes P1C and P2C and the internal conductor patterns 31C, 32C and 33C. That is, as viewed from the Z-axis direction, portions where the mounting electrodes P1C, P2C and the internal conductor patterns 31C, 32C, 33C overlap are cut by the high-power laser LR.
  • the laser LR is, for example, a 60 W UV laser.
  • the portion of the mounting electrodes P1 and P2 that reaches the cut surface of the laminated body 10C is heated by the heat received from the laser LR.
  • Oxide films P1X and P2X of the mounting electrodes P1 and P2 are formed.
  • portions reaching the cut surface of the multilayer body 10C are heated by the heat received from the laser LR.
  • 33 oxide films 31X, 32X, 33X are formed.
  • the resin material of the insulating base layers 11, 12, and 13 is evaporated as shown in (4) in FIG. 4 and (5) and (6) in FIG.
  • the vaporized material reattaches to the cut surface of the laminated body 10C (see the reattachment film AF shown in (4) in FIG. 4 and (5) and (6) in FIG. 5).
  • the resin multilayer substrate 101 shown in (7) in FIG. 5 the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 and the portions reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33 are formed.
  • Reattachment films AF1 and AF2 of a resin material are formed on the end surfaces SS1 and SS2 of the cut laminate 10 so as to cover them.
  • the part where the mounting electrode and the internal conductor pattern overlap is cut with a laser when viewed from the stacking direction of the plurality of insulating base layers, and the resin material is reattached to the end face of the cut stack.
  • This step of forming a film is an example of the “cutting step” in the present invention.
  • the cut mounting electrodes P1 and P2 are not easily deformed so as to go around the end surfaces SS1 and SS2 of the multilayer body 10. Therefore, when the resin multilayer substrate 101 obtained by the above manufacturing method is mounted on the mounting substrate 201 via the conductive bonding material 4 as shown in FIG. Wetting and spreading along the end surfaces SS1, SS2 is suppressed. Therefore, occurrence of a short circuit between the mounting electrodes P1 and P2 and the internal conductor pattern is suppressed.
  • the end surface SS1 is formed so as to cover the portions reaching the end surfaces SS1, SS2 of the mounting electrodes P1, P2 and the portions reaching the end surfaces SS1, SS2 of the internal conductor patterns 31, 32, 33.
  • SS2 are formed with insulating redeposition films AF1 and AF2.
  • the resin multilayer substrate 101 can be obtained without any problem. That is, according to the manufacturing method, the resin multilayer substrate 101 of the present invention can be easily obtained without fine adjustment of the laser LR.
  • the thickness (A1) of the mounting electrodes P1 and P2 and the inner conductor patterns 31, 32, and 33 The thickness (A2) in the Z-axis direction of the insulating base material layer between the part reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 and the part reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33 It is below thickness (B1, B2, B3).
  • the reattachment films AF1, AF2 of the resin material are used as the end faces when cutting with the laser LR. Easy to form in SS1 and SS2.
  • oxide films 31X and 32X having a surface roughness larger than that of the internal conductor patterns 31, 32 and 33 are formed in portions reaching the end faces SS1 and SS2 of the multilayer body 10. Therefore, at the time of cutting with the laser LR, the resin material of the insulating base layers 11, 12, and 13 is evaporated or vaporized as compared with the case where the oxide film is not formed in the portion reaching the end faces SS 1 and SS 2 of the stacked body 10. Things easily adhere to the portions reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33.
  • the internal conductor patterns 31, 32, and 33 are conductor patterns of Cu foil, the conductivity is high and it is easily oxidized. Therefore, it is easy to form the oxide films 31X, 32X, and 33X in the portion reaching the end faces SS1 and SS2 of the stacked body 10.
  • the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 are the oxide films P1X, P2X of the mounting electrodes P1, P2.
  • the insulating properties of the mounting electrodes P1 and P2 on the end surfaces SS1 and SS2 of the stacked body 10 are enhanced as compared with the case where the oxide films P1X and P2X are not formed. Therefore, the occurrence of a short circuit between the mounting electrodes P1 and P2 and the internal conductor pattern when the resin multilayer substrate 101 is mounted on the mounting substrate 201 via the conductive bonding material 4 can be further suppressed.
  • oxide films P1X and P2X whose surface roughness is larger than that of the mounting electrodes P1 and P2 are formed at portions reaching the end faces SS1 and SS2 of the laminate 10. Therefore, at the time of cutting with the laser LR, the resin material of the insulating base layers 11, 12, and 13 is evaporated or vaporized as compared with the case where the oxide film is not formed in the portion reaching the end faces SS 1 and SS 2 of the stacked body 10. Things easily adhere to the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2.
  • the mounting electrodes P1 and P2 are Cu foil conductor patterns, they have high conductivity and are easily oxidized. Therefore, it is easy to form the oxide films P1X and P2X in the portion reaching the end faces SS1 and SS2 of the stacked body 10.
  • the laminated body 10 has a rectangular parallelepiped shape
  • the present invention is not limited to this configuration.
  • the shape of the laminated body 10 can be changed as appropriate within the scope of the effects of the present invention.
  • the laminated body 10 may be a cube, a polygonal column, a cylinder, an elliptical column, or the like. It may be a shape, a T shape, a Y shape, or the like.
  • the above-described resin multilayer substrate 101 has a configuration including the laminate 10 formed by laminating the three insulating base layers 11, 12, and 13, but is not limited thereto.
  • the number of insulating base material layers forming the laminate 10 can be changed as appropriate within the range where the effects of the present invention are exhibited.
  • the laminated body 10 is not limited to the structure formed by laminating
  • the laminated body 10 may have a configuration formed by laminating a plurality of insulating base layers mainly composed of a thermosetting resin such as an epoxy resin.
  • the reattachment films AF1 and AF2 reach the end faces SS1 and SS2 of the mounting electrodes P1 and P2 and the end faces SS1 and SS2 of the internal conductor patterns 31, 32, and 33.
  • end surface SS1, SS2 was shown so that both of parts may be covered, it is not limited to this structure.
  • the reattachment films AF1 and AF2 are formed so that the end surfaces SS1 and SS2 cover the portions of the mounting electrodes P1 and P2 that reach the end surfaces SS1 and SS2 or at least one of the end surfaces SS1 and SS2 of the internal conductor patterns 31, 32, and 33. If it is formed in SS2, the effects of the present invention are exhibited.
  • the present invention is not limited to this configuration. Absent.
  • the plating films PL1 and PL2 are not essential components.
  • the example provided with the three internal conductor patterns 31, 32, and 33 is shown in the above-mentioned resin multilayer substrate 101, it is not limited to this configuration.
  • the shape, quantity, and the like of the internal conductor pattern can be changed as appropriate within the range where the effects of the present invention are exhibited.

Abstract

La présente invention concerne un procédé de fabrication d'un substrat multicouche en résine (101) comprenant une étape de formation de conducteurs, une étape de formation de stratifié et une étape de découpe. L'étape de formation de conducteurs consiste à former des motifs conducteurs internes (31, 32, 33) et des électrodes de montage (P1, P2) sur une pluralité de couches de matériau de base isolantes (11, 12, 13) constituées principalement d'un matériau en résine. L'étape de formation de stratifié consiste, après l'étape de formation de conducteurs, à chauffer et mettre sous pression la pluralité stratifiée de couches de matériau de base isolantes (11, 12, 13), puis à disposer les électrodes de montage (P1, P2) sur la surface du stratifié, et les motifs conducteurs internes (31, 32, 33) à l'intérieur du stratifié. L'étape de découpe consiste, après l'étape de formation du stratifié, à découper une partie, dans laquelle les électrodes de montage (P1, P2) et les motifs conducteurs internes (31, 32, 33) se chevauchent, vus depuis le sens de stratification (direction de l'axe Z) de la pluralité de couches de matériau de base isolantes (11, 12, 13), à l'aide d'un laser de façon à former des films de rattachement (AF1, AF2) du matériau en résine sur des faces d'extrémité (SS1, SS2) du stratifié découpé (10).
PCT/JP2018/015688 2017-05-18 2018-04-16 Procédé de fabrication d'un substrat multicouche en résine, substrat multicouche en résine et structure de montage de substrat multicouche en résine WO2018211883A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017098633 2017-05-18
JP2017-098633 2017-05-18

Publications (1)

Publication Number Publication Date
WO2018211883A1 true WO2018211883A1 (fr) 2018-11-22

Family

ID=64274095

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2018/015688 WO2018211883A1 (fr) 2017-05-18 2018-04-16 Procédé de fabrication d'un substrat multicouche en résine, substrat multicouche en résine et structure de montage de substrat multicouche en résine

Country Status (1)

Country Link
WO (1) WO2018211883A1 (fr)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62163390A (ja) * 1986-01-14 1987-07-20 松下電工株式会社 プリント基板の外形加工法
JPH04196291A (ja) * 1990-11-27 1992-07-16 Matsushita Electric Works Ltd 内層材
JP2002036255A (ja) * 2000-07-26 2002-02-05 Matsushita Electric Works Ltd プラズマ処理方法及びプラズマ処理装置
JP2006332255A (ja) * 2005-05-25 2006-12-07 Alps Electric Co Ltd 電子回路ユニット、及びその製造方法
JP2009099661A (ja) * 2007-10-15 2009-05-07 Shinko Electric Ind Co Ltd 配線基板の個片化方法およびパッケージ用基板
JP2010129722A (ja) * 2008-11-27 2010-06-10 Nitto Denko Corp 孔形成装置および孔形成方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62163390A (ja) * 1986-01-14 1987-07-20 松下電工株式会社 プリント基板の外形加工法
JPH04196291A (ja) * 1990-11-27 1992-07-16 Matsushita Electric Works Ltd 内層材
JP2002036255A (ja) * 2000-07-26 2002-02-05 Matsushita Electric Works Ltd プラズマ処理方法及びプラズマ処理装置
JP2006332255A (ja) * 2005-05-25 2006-12-07 Alps Electric Co Ltd 電子回路ユニット、及びその製造方法
JP2009099661A (ja) * 2007-10-15 2009-05-07 Shinko Electric Ind Co Ltd 配線基板の個片化方法およびパッケージ用基板
JP2010129722A (ja) * 2008-11-27 2010-06-10 Nitto Denko Corp 孔形成装置および孔形成方法

Similar Documents

Publication Publication Date Title
US11152149B2 (en) Electronic component
US7341890B2 (en) Circuit board with built-in electronic component and method for manufacturing the same
JP6627819B2 (ja) 電子部品およびその製造方法
JPH08203737A (ja) コイル部品
WO2019107131A1 (fr) Substrat multicouche, structure de montage pour substrat multicouche, procédé de fabrication de substrat multicouche, et procédé de fabrication d'appareil électronique
JP6673304B2 (ja) 多層基板
JP5715237B2 (ja) フレキシブル多層基板
JP6519714B2 (ja) 樹脂多層基板、伝送線路、モジュールおよびモジュールの製造方法
WO2018211883A1 (fr) Procédé de fabrication d'un substrat multicouche en résine, substrat multicouche en résine et structure de montage de substrat multicouche en résine
WO2018163859A1 (fr) Substrat multicouche, appareil électronique et procédé de production de substrat multicouche
WO2019230524A1 (fr) Substrat multicouche en résine et dispositif électronique
US20190228900A1 (en) Multilayer board and manufacturing method thereof
JP4330850B2 (ja) 薄型コイル部品の製造方法,薄型コイル部品及びそれを使用した回路装置
WO2019087753A1 (fr) Interposeur et dispositif électronique
WO2020203724A1 (fr) Substrat multicouche en résine et procédé de production de substrat multicouche en résine
WO2017164267A1 (fr) Carte de montage de composant
WO2018030262A1 (fr) Procédé de fabrication de composant de module
JP7095739B2 (ja) 電気素子の製造方法
WO2010125858A1 (fr) Carte de circuit imprimé en résine à plusieurs couches, et procédé de fabrication d'une carte de circuit imprimé en résine à plusieurs couches
JP2011049379A (ja) 電子部品およびその製造方法
WO2017150361A1 (fr) Substrat de résine
JPH02164096A (ja) 多層電子回路基板とその製造方法
US11445618B2 (en) Flexible circuit board and method for manufacturing same
WO2011086797A1 (fr) Procédé de fabrication de substrat avec condensateur incorporé
JP2023058930A (ja) 積層インダクタ

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18802629

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18802629

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP