WO2018211883A1 - Method for manufacturing resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate - Google Patents

Method for manufacturing resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate Download PDF

Info

Publication number
WO2018211883A1
WO2018211883A1 PCT/JP2018/015688 JP2018015688W WO2018211883A1 WO 2018211883 A1 WO2018211883 A1 WO 2018211883A1 JP 2018015688 W JP2018015688 W JP 2018015688W WO 2018211883 A1 WO2018211883 A1 WO 2018211883A1
Authority
WO
WIPO (PCT)
Prior art keywords
multilayer substrate
mounting
resin multilayer
resin
internal conductor
Prior art date
Application number
PCT/JP2018/015688
Other languages
French (fr)
Japanese (ja)
Inventor
伊藤 慎悟
邦明 用水
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2018211883A1 publication Critical patent/WO2018211883A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits

Definitions

  • the present invention relates to a resin multilayer substrate, and more particularly to a method for manufacturing a resin multilayer substrate in which a conductor pattern is formed on a laminate, a resin multilayer substrate obtained by the manufacturing method, and a mounting structure for the resin multilayer substrate.
  • Patent Document 1 Korean Patent Document 1
  • FIG. 6A is a cross-sectional view showing a state in which the resin multilayer substrate is being cut into individual pieces from the laminated body 10M which is a mother substrate
  • FIG. 6B is a diagram illustrating the cut resin multilayer substrate 100 as a mounting substrate 200. It is sectional drawing which shows the mounted state.
  • the mounting electrodes P1A and P2A may be deformed and wrap around the end surface (cut surface) of the resin multilayer substrate (cut-out laminated body 10A).
  • this resin multilayer substrate 100 is mounted on the mounting substrate 200 via the solder 4A, the solder spreads along the mounting electrode P1A deformed so as to wrap around, and reaches the conductor pattern 33A exposed on the end surface of the multilayer body 10A. Solder 4A may reach. Therefore, a short circuit may occur between the conductor pattern 33A exposed on the end face of the multilayer body 10A and the mounting electrode P1A.
  • the object of the present invention is to provide a short circuit between the mounting electrode formed on the surface of the multilayer body and the internal conductor pattern exposed on the surface of the multilayer body when mounted on a mounting substrate or the like via a conductive bonding material. It is providing the resin multilayer substrate which can be suppressed.
  • the method for producing the resin multilayer substrate of the present invention comprises: A conductor forming step of forming an internal conductor pattern and mounting electrodes on a plurality of insulating base layers mainly composed of a resin material; After the conductor forming step, the plurality of laminated insulating base layers are heated and pressurized, the mounting electrodes are arranged on the surface of the multilayer body, and the internal conductor patterns are arranged inside the multilayer body.
  • a cutting process for forming a reattachment film of It is characterized by providing.
  • the cut mounting electrode it is difficult for the cut mounting electrode to be deformed so as to wrap around the end face of the laminate. Therefore, when the resin multilayer substrate is mounted on the mounting substrate via the conductive bonding material, the conductive bonding material is suppressed from spreading along the end surface, and a short circuit between the mounting electrode and the internal conductor pattern is prevented. A suppressed resin multilayer substrate can be obtained.
  • the insulating reattachment film is formed on the end face so as to cover at least one of the part reaching the end face of the mounting electrode or the part reaching the end face of the internal conductor pattern. Therefore, even when the conductive bonding material spreads along the end surface when mounted on the mounting substrate via the conductive bonding material, the resin multilayer that further suppresses the short circuit between the mounting electrode and the internal conductor pattern A substrate can be obtained.
  • a plating formation step in which a metal film that is less oxidizable than the internal conductor pattern is formed on the surface of the mounting electrode between the multilayer body formation step and the cutting step. It is preferable to provide. With this manufacturing method, the plating film formed on the surface of the mounting electrode is difficult to oxidize when cut with a laser. Therefore, the mountability of the manufactured resin multilayer substrate is improved as compared with the case where the plating film is not provided.
  • the resin multilayer substrate of the present invention is A laminate having a mounting surface and an end surface formed by laminating a plurality of insulating base layers mainly composed of a resin material; A mounting electrode that is formed on the mounting surface of the laminate and is exposed to extend to reach the end surface; An internal conductor pattern that is formed inside the laminate and is exposed to extend to reach the end face; A reattachment film of the resin material formed on the end surface so as to cover at least one of the portion reaching the end surface of the mounting electrode or the portion reaching the end surface of the internal conductor pattern; It is characterized by providing.
  • a resin multilayer substrate can be realized.
  • a portion reaching the end face of the inner conductor pattern is an oxide film of the inner conductor pattern.
  • a portion reaching the end face of the mounting electrode is an oxide film of the mounting electrode.
  • At least one of the mounting electrode or the internal conductor pattern may be a pattern made of copper foil.
  • at least one of the mounting electrode or the internal conductor pattern is a pattern made of copper foil, it has high conductivity and is easily oxidized.
  • a metal plating film that covers the surface of the mounting electrode and is less oxidizable than the mounting electrode is provided.
  • the plating film formed on the surface of the mounting electrode is less susceptible to oxidation than the mounting electrode. Therefore, the mounting property of the resin multilayer substrate is improved as compared with the case where the plating film is not provided.
  • the plating film may be a gold plating film.
  • the thickness of the mounting electrode or the thickness of the internal conductor pattern is formed on the end surface of the mounting electrode and the end surface of the internal conductor pattern. It is preferable that it is below the thickness in the lamination direction of the said insulating base material layer between the parts which reach. With this configuration, it is possible to realize a resin multilayer substrate in which the thickness of the resin material reattachment film is large.
  • the mounting structure of the resin multilayer substrate of the present invention is as follows: Any one of the resin multilayer substrates of (3) to (9) above; A mounting substrate on which the resin multilayer substrate is mounted and having external electrodes; With The mounting electrode is connected to the external electrode through a conductive bonding material.
  • the present invention when mounting on a mounting substrate or the like via a conductive bonding material, a short circuit between the mounting electrode formed on the surface of the multilayer body and the internal conductor pattern exposed on the surface of the multilayer body is prevented.
  • a resin multilayer substrate that can be suppressed can be realized.
  • FIG. 1 is a sectional view of a resin multilayer substrate 101 according to the present invention.
  • 2A is an enlarged cross-sectional view of the first end surface portion SP1 in FIG. 1
  • FIG. 2B is an enlarged cross-sectional view of the second end surface portion SP2 in FIG.
  • FIG. 3 is a cross-sectional view showing a main part of the electronic device 301 according to the present invention.
  • FIG. 4 is a cross-sectional view sequentially illustrating the manufacturing steps of the resin multilayer substrate 101.
  • FIG. 5 is a cross-sectional view sequentially illustrating the manufacturing steps of the resin multilayer substrate 101.
  • FIG. 6A is a cross-sectional view showing a state in which the resin multilayer substrate is being cut into individual pieces from the laminated body 10M which is a mother substrate
  • FIG. 6B is a diagram illustrating the cut resin multilayer substrate 100 as a mounting substrate 200. It is sectional drawing which shows the mounted state.
  • FIG. 1 is a sectional view of a resin multilayer substrate 101 according to the present invention.
  • 2A is an enlarged cross-sectional view of the first end surface portion SP1 in FIG. 1
  • FIG. 2B is an enlarged cross-sectional view of the second end surface portion SP2 in FIG.
  • the resin multilayer substrate 101 includes a laminate 10, mounting electrodes P1, P2, internal conductor patterns 31, 32, 33, and redeposition films AF1, AF2.
  • the laminate 10 is formed by laminating a plurality of insulating base material layers 11, 12, and 13 whose main component is a resin material (thermoplastic resin), and a first main surface VS1 and a second main surface VS2 facing each other.
  • the first main surface VS1 corresponds to a “mounting surface”.
  • the plurality of insulating base layers 11, 12, and 13 are sheets mainly made of a liquid crystal polymer, for example.
  • the mounting electrode P1 is a conductor that is formed on the first main surface VS1 of the multilayer body 10 and extends and exposed so as to reach the end surface SS1.
  • the mounting electrode P1 is a conductor formed on the first main surface VS1 of the multilayer body 10.
  • the portion of the mounting electrode P1 that reaches the end surface SS1 is an oxide film P1X of the mounting electrode P1.
  • the surface of the mounting electrode P1 is covered with a plating film PL1.
  • the plating film PL1 is a metal plating film that is less likely to be oxidized than the mounting electrode P1.
  • the mounting electrode P1 is a conductor pattern such as a Cu foil, for example, and the plating film PL1 is a Ni / Au plating film whose base is Ni and whose surface is Au, for example.
  • the mounting electrode P2 is a conductor that is formed on the first main surface VS1 of the multilayer body 10, and is extended and exposed so as to reach the end surface SS2.
  • the mounting electrode P2 is a conductor formed on the first main surface VS1 of the multilayer body 10.
  • the portion of the mounting electrode P2 that reaches the end surface SS2 is the oxide film P2X of the mounting electrode P2.
  • the surface of the mounting electrode P2 is covered with a plating film PL2.
  • the plating film PL2 is a metal plating film that is less likely to be oxidized than the mounting electrode P2.
  • the mounting electrode P2 is a conductor pattern such as a Cu foil, for example, and the plating film PL2 is a Ni / Au plating film whose base is Ni and whose surface is Au, for example.
  • the inner conductor patterns 31, 32, and 33 are conductors that are formed inside the multilayer body 10 and are exposed by extending so as to reach the end surface SS1 or the end surface SS2.
  • the internal conductor patterns 31, 32, 33 constitute a part of a circuit (coil, capacitor, wiring, etc.) formed in the multilayer body 10.
  • the portions reaching the end surface SS1 of the internal conductor patterns 31, 33 are the oxide films 31X, 33X of the internal conductor patterns 31, 33.
  • the portion reaching the end surface SS2 of the internal conductor pattern 32 is an oxide film 32X of the internal conductor pattern 32.
  • the internal conductor patterns 31, 32, 33 are, for example, Cu foil conductor patterns.
  • the redeposition film AF1 is an insulating film formed on the end surface SS1 so as to cover a portion reaching the end surface SS1 of the mounting electrode P1 and a portion reaching the end surface SS1 of the internal conductor patterns 31 and 33.
  • the redeposition film AF2 is an insulating film formed on the end surface SS2 so as to cover a portion reaching the end surface SS2 of the mounting electrode P2 and a portion reaching the end surface of the internal conductor pattern 32.
  • the reattachment films AF1 and AF2 are obtained by evaporating or vaporizing the resin material of the insulating base layers 11, 12, and 13 when the laminate 10 is cut out by a high-power laser.
  • 10 is a film attached to the end faces SS1 and SS2.
  • the thickness A1 of the mounting electrode P1 and the thickness A2 of the internal conductor patterns 31, 33 reach the end surface SS1 of the mounting electrode P1 and the end surface SS1 of the internal conductor patterns 31, 33. It is below thickness B1, B2 in the lamination direction (Z-axis direction) of the insulating base material layer between the parts (A1 ⁇ B1, A1 ⁇ B2, A2 ⁇ B1, A2 ⁇ B2).
  • the thickness A1 of the mounting electrode P2 and the thickness A2 of the internal conductor pattern 32 are a part reaching the end surface SS2 of the mounting electrode P2, and a part reaching the end surface SS2 of the internal conductor pattern 32. It is below thickness B3 in the Z-axis direction of insulating base material layers 12 and 13 between (A1 ⁇ B3, A2 ⁇ B3).
  • FIG. 3 is a cross-sectional view showing a main part of the electronic device 301 according to the present invention.
  • the electronic device 301 includes a resin multilayer substrate 101, a mounting substrate 201, and the like.
  • the mounting board 201 is, for example, a printed wiring board.
  • the resin multilayer substrate 101 is mounted on the main surface of the mounting substrate 201.
  • electronic components other than the resin multilayer substrate 101 are mounted on the main surface of the mounting substrate 201, illustration is omitted.
  • External electrodes 41, 42, etc. are formed on the main surface of the mounting substrate 201. Although other conductors are formed on the main surface or inside of the mounting substrate 201, the illustration is omitted.
  • the mounting electrodes P1 and P2 of the resin multilayer substrate 101 are connected to the external electrodes 41 and 42 through the conductive bonding material 4, respectively.
  • the conductive bonding material 4 is, for example, solder.
  • the resin multilayer substrate 101 of the present invention is manufactured, for example, by the following process. 4 and 5 are cross-sectional views sequentially showing the manufacturing process of the resin multilayer substrate 101.
  • insulating base material layers 11, 12, and 13 are sheets mainly made of a liquid crystal polymer, for example.
  • the inner conductor patterns 31C and 32C are formed on the surface of the insulating base material layer 11, the inner conductor pattern 33C is formed on the surface of the insulating base material layer 12, and the mounting electrodes P1C and P2C are formed on the surface of the insulating base material layer 13.
  • the inner conductor patterns 31C and 32C are formed by laminating a metal foil (for example, Cu foil) on one main surface of the insulating base layer 11, and patterning the metal foil by photolithography.
  • An inner conductor pattern 33C is formed by laminating a metal foil (for example, Cu foil) on one side main surface of the insulating base material layer 12, and patterning the metal foil by photolithography.
  • the mounting electrodes P1C and P2C are formed by laminating a metal foil (for example, Cu foil) on one main surface of the insulating base layer 13 and patterning the metal foil by photolithography.
  • This step of forming internal conductor patterns and mounting electrodes on a plurality of insulating base layers mainly composed of a resin material is an example of the “conductor forming step” in the present invention.
  • interlayer connection conductors may be formed on the plurality of insulating base material layers 11, 12, and 13.
  • the interlayer connection conductor is provided with a through-hole using a laser or the like, and then a conductive paste containing one or more of Cu, Sn, or the like, or an alloy thereof is disposed, followed by heating and pressurization (the “laminated body formation” of the present invention). Provided by curing in step ”)".
  • a plurality of insulating base material layers on which the internal conductor patterns 31C, 32C, and 33C and the mounting electrodes P1C and P2C are formed are stacked, and heated and pressed (collectively) from the direction of the white arrow shown in (1) in FIG.
  • the laminated body 10C in the aggregate substrate state shown in (2) in FIG. 4 is formed by pressing.
  • the mounting electrodes P1C and P2C are disposed on the surface of the multilayer body 10C, and the internal conductor patterns 31C, 32C, and 33C are disposed inside the multilayer body 10C.
  • a laminated body is formed by heating and pressing a plurality of laminated insulating base layers, mounting electrodes are placed on the surface of the laminated body, and an internal conductor pattern is placed inside the laminated body
  • This process is an example of the “laminated body forming process” in the present invention.
  • a metal film that is less oxidizable than the mounting electrodes P1C and P2C is formed on the surface of the mounting electrodes P1C and P2C by plating.
  • the metal film to be plated is, for example, a Ni / Au plating film in which the base is Ni and the surface is Au.
  • the laminated body 10C in the aggregate substrate state is separated into individual pieces along the separation line DL shown in (3) in FIG. Specifically, as shown in (4) in FIG. 4 and (5) and (6) in FIG. 5, a high-power laser from the first main surface VS1 to the second main surface VS2 of the laminated body 10C.
  • a high-power laser from the first main surface VS1 to the second main surface VS2 of the laminated body 10C.
  • the laminated body 10C is cut together with the mounting electrodes P1C and P2C and the internal conductor patterns 31C, 32C and 33C. That is, as viewed from the Z-axis direction, portions where the mounting electrodes P1C, P2C and the internal conductor patterns 31C, 32C, 33C overlap are cut by the high-power laser LR.
  • the laser LR is, for example, a 60 W UV laser.
  • the portion of the mounting electrodes P1 and P2 that reaches the cut surface of the laminated body 10C is heated by the heat received from the laser LR.
  • Oxide films P1X and P2X of the mounting electrodes P1 and P2 are formed.
  • portions reaching the cut surface of the multilayer body 10C are heated by the heat received from the laser LR.
  • 33 oxide films 31X, 32X, 33X are formed.
  • the resin material of the insulating base layers 11, 12, and 13 is evaporated as shown in (4) in FIG. 4 and (5) and (6) in FIG.
  • the vaporized material reattaches to the cut surface of the laminated body 10C (see the reattachment film AF shown in (4) in FIG. 4 and (5) and (6) in FIG. 5).
  • the resin multilayer substrate 101 shown in (7) in FIG. 5 the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 and the portions reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33 are formed.
  • Reattachment films AF1 and AF2 of a resin material are formed on the end surfaces SS1 and SS2 of the cut laminate 10 so as to cover them.
  • the part where the mounting electrode and the internal conductor pattern overlap is cut with a laser when viewed from the stacking direction of the plurality of insulating base layers, and the resin material is reattached to the end face of the cut stack.
  • This step of forming a film is an example of the “cutting step” in the present invention.
  • the cut mounting electrodes P1 and P2 are not easily deformed so as to go around the end surfaces SS1 and SS2 of the multilayer body 10. Therefore, when the resin multilayer substrate 101 obtained by the above manufacturing method is mounted on the mounting substrate 201 via the conductive bonding material 4 as shown in FIG. Wetting and spreading along the end surfaces SS1, SS2 is suppressed. Therefore, occurrence of a short circuit between the mounting electrodes P1 and P2 and the internal conductor pattern is suppressed.
  • the end surface SS1 is formed so as to cover the portions reaching the end surfaces SS1, SS2 of the mounting electrodes P1, P2 and the portions reaching the end surfaces SS1, SS2 of the internal conductor patterns 31, 32, 33.
  • SS2 are formed with insulating redeposition films AF1 and AF2.
  • the resin multilayer substrate 101 can be obtained without any problem. That is, according to the manufacturing method, the resin multilayer substrate 101 of the present invention can be easily obtained without fine adjustment of the laser LR.
  • the thickness (A1) of the mounting electrodes P1 and P2 and the inner conductor patterns 31, 32, and 33 The thickness (A2) in the Z-axis direction of the insulating base material layer between the part reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 and the part reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33 It is below thickness (B1, B2, B3).
  • the reattachment films AF1, AF2 of the resin material are used as the end faces when cutting with the laser LR. Easy to form in SS1 and SS2.
  • oxide films 31X and 32X having a surface roughness larger than that of the internal conductor patterns 31, 32 and 33 are formed in portions reaching the end faces SS1 and SS2 of the multilayer body 10. Therefore, at the time of cutting with the laser LR, the resin material of the insulating base layers 11, 12, and 13 is evaporated or vaporized as compared with the case where the oxide film is not formed in the portion reaching the end faces SS 1 and SS 2 of the stacked body 10. Things easily adhere to the portions reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33.
  • the internal conductor patterns 31, 32, and 33 are conductor patterns of Cu foil, the conductivity is high and it is easily oxidized. Therefore, it is easy to form the oxide films 31X, 32X, and 33X in the portion reaching the end faces SS1 and SS2 of the stacked body 10.
  • the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 are the oxide films P1X, P2X of the mounting electrodes P1, P2.
  • the insulating properties of the mounting electrodes P1 and P2 on the end surfaces SS1 and SS2 of the stacked body 10 are enhanced as compared with the case where the oxide films P1X and P2X are not formed. Therefore, the occurrence of a short circuit between the mounting electrodes P1 and P2 and the internal conductor pattern when the resin multilayer substrate 101 is mounted on the mounting substrate 201 via the conductive bonding material 4 can be further suppressed.
  • oxide films P1X and P2X whose surface roughness is larger than that of the mounting electrodes P1 and P2 are formed at portions reaching the end faces SS1 and SS2 of the laminate 10. Therefore, at the time of cutting with the laser LR, the resin material of the insulating base layers 11, 12, and 13 is evaporated or vaporized as compared with the case where the oxide film is not formed in the portion reaching the end faces SS 1 and SS 2 of the stacked body 10. Things easily adhere to the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2.
  • the mounting electrodes P1 and P2 are Cu foil conductor patterns, they have high conductivity and are easily oxidized. Therefore, it is easy to form the oxide films P1X and P2X in the portion reaching the end faces SS1 and SS2 of the stacked body 10.
  • the laminated body 10 has a rectangular parallelepiped shape
  • the present invention is not limited to this configuration.
  • the shape of the laminated body 10 can be changed as appropriate within the scope of the effects of the present invention.
  • the laminated body 10 may be a cube, a polygonal column, a cylinder, an elliptical column, or the like. It may be a shape, a T shape, a Y shape, or the like.
  • the above-described resin multilayer substrate 101 has a configuration including the laminate 10 formed by laminating the three insulating base layers 11, 12, and 13, but is not limited thereto.
  • the number of insulating base material layers forming the laminate 10 can be changed as appropriate within the range where the effects of the present invention are exhibited.
  • the laminated body 10 is not limited to the structure formed by laminating
  • the laminated body 10 may have a configuration formed by laminating a plurality of insulating base layers mainly composed of a thermosetting resin such as an epoxy resin.
  • the reattachment films AF1 and AF2 reach the end faces SS1 and SS2 of the mounting electrodes P1 and P2 and the end faces SS1 and SS2 of the internal conductor patterns 31, 32, and 33.
  • end surface SS1, SS2 was shown so that both of parts may be covered, it is not limited to this structure.
  • the reattachment films AF1 and AF2 are formed so that the end surfaces SS1 and SS2 cover the portions of the mounting electrodes P1 and P2 that reach the end surfaces SS1 and SS2 or at least one of the end surfaces SS1 and SS2 of the internal conductor patterns 31, 32, and 33. If it is formed in SS2, the effects of the present invention are exhibited.
  • the present invention is not limited to this configuration. Absent.
  • the plating films PL1 and PL2 are not essential components.
  • the example provided with the three internal conductor patterns 31, 32, and 33 is shown in the above-mentioned resin multilayer substrate 101, it is not limited to this configuration.
  • the shape, quantity, and the like of the internal conductor pattern can be changed as appropriate within the range where the effects of the present invention are exhibited.

Abstract

A method for manufacturing a resin multilayer substrate (101) includes a conductor forming step, a laminate forming step, and a cutting step. In the conductor forming step, inner conductor patterns (31, 32, 33) and mounting electrodes (P1, P2) are formed on a plurality of insulating base material layers (11, 12, 13) made mainly of a resin material. In the laminate forming step, after the conductor forming step, the laminated plurality of insulating base material layers (11, 12, 13) are heated and pressurized, the mounting electrodes (P1, P2) are arranged on the surface of the laminate, and the inner conductor patterns (31, 32, 33) are arranged inside of the laminate. In the cutting step, after the laminate forming step, a portion, in which the mounting electrodes (P1, P2) and the inner conductor patterns (31, 32, 33) overlap each other when viewed from the lamination direction (Z axis direction) of the plurality of insulating base material layers (11, 12, 13), is cut with a laser to form reattachment films (AF1, AF2) of the resin material on end faces (SS1, SS2) of the cut laminate (10).

Description

樹脂多層基板の製造方法、樹脂多層基板、および樹脂多層基板の実装構造Manufacturing method of resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate
 本発明は、樹脂多層基板に関し、特に積層体に導体パターンが形成された樹脂多層基板の製造方法、その製造方法によって得られた樹脂多層基板、およびその樹脂多層基板の実装構造に関する。 The present invention relates to a resin multilayer substrate, and more particularly to a method for manufacturing a resin multilayer substrate in which a conductor pattern is formed on a laminate, a resin multilayer substrate obtained by the manufacturing method, and a mounting structure for the resin multilayer substrate.
 従来、マザー基板をダイサー等で切断して、多数の電子部品をマザー基板から切り出すことが一般的に行われている(特許文献1)。 Conventionally, it has been generally performed by cutting a mother substrate with a dicer or the like and cutting a large number of electronic components from the mother substrate (Patent Document 1).
特開平5-335194号公報JP-A-5-335194
 図6(A)はマザー基板である積層体10Mから樹脂多層基板を個片に切り出しつつある状態を示す断面図であり、図6(B)は切り出された樹脂多層基板100を実装基板200に実装した状態を示す断面図である。 6A is a cross-sectional view showing a state in which the resin multilayer substrate is being cut into individual pieces from the laminated body 10M which is a mother substrate, and FIG. 6B is a diagram illustrating the cut resin multilayer substrate 100 as a mounting substrate 200. It is sectional drawing which shows the mounted state.
 マザー基板である積層体10Mを、第1主面VS1に形成された実装電極P1A,P2Aごと、ダイサーブレードDB等によって第1主面VS1から第2主面VS2に向かって切断した場合、実装電極P1A,P2Aが変形し、樹脂多層基板(切り出した積層体10A)の端面(切断面)にまで回り込むことがある。そして、この樹脂多層基板100をはんだ4Aを介して実装基板200に実装した場合、回り込むように変形した実装電極P1Aに沿ってはんだが濡れ拡がり、積層体10Aの端面に露出する導体パターン33Aにまではんだ4Aが達することがある。そのため、積層体10Aの端面に露出する導体パターン33Aと実装電極P1Aとの間で短絡が生じる虞がある。 When the laminated body 10M which is a mother substrate is cut from the first main surface VS1 toward the second main surface VS2 by the dicer blade DB or the like together with the mounting electrodes P1A and P2A formed on the first main surface VS1, the mounting electrodes P1A and P2A may be deformed and wrap around the end surface (cut surface) of the resin multilayer substrate (cut-out laminated body 10A). When this resin multilayer substrate 100 is mounted on the mounting substrate 200 via the solder 4A, the solder spreads along the mounting electrode P1A deformed so as to wrap around, and reaches the conductor pattern 33A exposed on the end surface of the multilayer body 10A. Solder 4A may reach. Therefore, a short circuit may occur between the conductor pattern 33A exposed on the end face of the multilayer body 10A and the mounting electrode P1A.
 本発明の目的は、導電性接合材を介して実装基板等に実装する際に、積層体の表面に形成された実装電極と、積層体の表面に露出する内部導体パターンとの間の短絡を抑制できる樹脂多層基板を提供することにある。 The object of the present invention is to provide a short circuit between the mounting electrode formed on the surface of the multilayer body and the internal conductor pattern exposed on the surface of the multilayer body when mounted on a mounting substrate or the like via a conductive bonding material. It is providing the resin multilayer substrate which can be suppressed.
(1)本発明の樹脂多層基板の製造方法は、
 樹脂材料を主材料とする複数の絶縁基材層に、内部導体パターンおよび実装電極を形成する、導体形成工程と、
 前記導体形成工程の後に、積層した前記複数の絶縁基材層を加熱加圧して、前記積層体の表面に前記実装電極を配置し、前記積層体の内部に前記内部導体パターンを配置する、積層体形成工程と、
 前記積層体形成工程の後に、前記複数の絶縁基材層の積層方向から視て、前記実装電極と前記内部導体パターンとが重なる部分をレーザーで切断し、切り出した積層体の端面に前記樹脂材料の再付着膜を形成する、切断工程と、
 を備えることを特徴とする。
(1) The method for producing the resin multilayer substrate of the present invention comprises:
A conductor forming step of forming an internal conductor pattern and mounting electrodes on a plurality of insulating base layers mainly composed of a resin material;
After the conductor forming step, the plurality of laminated insulating base layers are heated and pressurized, the mounting electrodes are arranged on the surface of the multilayer body, and the internal conductor patterns are arranged inside the multilayer body. Body formation process,
After the laminated body forming step, as seen from the laminating direction of the plurality of insulating base material layers, a portion where the mounting electrode and the internal conductor pattern overlap is cut with a laser, and the resin material is applied to the cut end face of the laminated body A cutting process for forming a reattachment film of
It is characterized by providing.
 この製造方法によれば、切断した実装電極が積層体の端面に回り込むように変形し難い。そのため、導電性接合材を介して実装基板に樹脂多層基板を実装したときに、導電性接合材が端面に沿って濡れ拡がることが抑制され、実装電極と内部導体パターンとの間での短絡を抑制した樹脂多層基板を得ることができる。 According to this manufacturing method, it is difficult for the cut mounting electrode to be deformed so as to wrap around the end face of the laminate. Therefore, when the resin multilayer substrate is mounted on the mounting substrate via the conductive bonding material, the conductive bonding material is suppressed from spreading along the end surface, and a short circuit between the mounting electrode and the internal conductor pattern is prevented. A suppressed resin multilayer substrate can be obtained.
 この製造方法によれば、実装電極の端面に達する部分、または内部導体パターンの端面に達する部分の少なくとも一方を覆うように、端面に絶縁性の再付着膜が形成される。そのため、導電性接合材を介して実装基板に実装したときに、導電性接合材が端面に沿って濡れ拡がったとしても、実装電極と内部導体パターンとの間での短絡をさらに抑制した樹脂多層基板を得ることができる。 According to this manufacturing method, the insulating reattachment film is formed on the end face so as to cover at least one of the part reaching the end face of the mounting electrode or the part reaching the end face of the internal conductor pattern. Therefore, even when the conductive bonding material spreads along the end surface when mounted on the mounting substrate via the conductive bonding material, the resin multilayer that further suppresses the short circuit between the mounting electrode and the internal conductor pattern A substrate can be obtained.
(2)上記(1)において、前記積層体形成工程と前記切断工程との間に、前記実装電極の表面に、前記内部導体パターンよりも酸化し難い金属膜をめっき形成する、めっき形成工程を備えることが好ましい。この製造方法により、レーザーによる切断の際、実装電極の表面に形成されるめっき膜は酸化し難い。そのため、上記めっき膜を有していない場合に比べて、製造した樹脂多層基板の実装性が向上する。 (2) In the above (1), a plating formation step in which a metal film that is less oxidizable than the internal conductor pattern is formed on the surface of the mounting electrode between the multilayer body formation step and the cutting step. It is preferable to provide. With this manufacturing method, the plating film formed on the surface of the mounting electrode is difficult to oxidize when cut with a laser. Therefore, the mountability of the manufactured resin multilayer substrate is improved as compared with the case where the plating film is not provided.
(3)本発明の樹脂多層基板は、
 樹脂材料を主成分とする複数の絶縁基材層が積層されて形成され、実装面および端面を有する積層体と、
 前記積層体の実装面に形成され、前記端面に達するように延伸して露出する実装電極と、
 前記積層体の内部に形成され、前記端面に達するように延伸して露出する内部導体パターンと、
 前記実装電極の前記端面に達する部分、または前記内部導体パターンの前記端面に達する部分の少なくとも一方を覆うように、前記端面に形成され、前記絶縁性を有する前記樹脂材料の再付着膜と、
 を備えることを特徴とする。
(3) The resin multilayer substrate of the present invention is
A laminate having a mounting surface and an end surface formed by laminating a plurality of insulating base layers mainly composed of a resin material;
A mounting electrode that is formed on the mounting surface of the laminate and is exposed to extend to reach the end surface;
An internal conductor pattern that is formed inside the laminate and is exposed to extend to reach the end face;
A reattachment film of the resin material formed on the end surface so as to cover at least one of the portion reaching the end surface of the mounting electrode or the portion reaching the end surface of the internal conductor pattern;
It is characterized by providing.
 この構成により、導電性接合材を介して実装基板に実装したときに、導電性接合材が端面に沿って濡れ拡がったとしても、実装電極と内部導体パターンとの間での短絡の発生が抑制された樹脂多層基板を実現できる。 Due to this configuration, even when the conductive bonding material wets and spreads along the end surface when mounted on the mounting substrate via the conductive bonding material, the occurrence of a short circuit between the mounting electrode and the internal conductor pattern is suppressed. A resin multilayer substrate can be realized.
(4)上記(3)において、前記内部導体パターンの前記端面に達する部分は、前記内部導体パターンの酸化膜であることが好ましい。この構成により、上記酸化膜が形成されていない場合に比べ、積層体の端面での内部導体パターンの絶縁性が高まる。したがって、導電性接合材を介して実装基板に実装したときの、実装電極と内部導体パターンとの間での短絡の発生をさらに抑制できる。 (4) In the above (3), it is preferable that a portion reaching the end face of the inner conductor pattern is an oxide film of the inner conductor pattern. With this configuration, the insulating property of the internal conductor pattern at the end face of the multilayer body is enhanced as compared with the case where the oxide film is not formed. Therefore, it is possible to further suppress the occurrence of a short circuit between the mounting electrode and the internal conductor pattern when mounted on the mounting substrate via the conductive bonding material.
(5)上記(3)または(4)において、前記実装電極の前記端面に達する部分は、前記実装電極の酸化膜であることが好ましい。この構成により、上記酸化膜が形成されていない場合に比べ、積層体の端面での実装電極の絶縁性が高まる。したがって、導電性接合材を介して実装基板に実装したときの、実装電極と内部導体パターンとの間での短絡の発生をさらに抑制できる。 (5) In the above (3) or (4), it is preferable that a portion reaching the end face of the mounting electrode is an oxide film of the mounting electrode. With this configuration, the insulating property of the mounting electrode at the end face of the stacked body is enhanced as compared with the case where the oxide film is not formed. Therefore, it is possible to further suppress the occurrence of a short circuit between the mounting electrode and the internal conductor pattern when mounted on the mounting substrate via the conductive bonding material.
(6)上記(5)において、前記実装電極または前記内部導体パターンの少なくとも一方は、銅箔によるパターンであってもよい。実装電極または内部導体パターンの少なくとも一方が、銅箔によるパターンである場合、導電性が高く、酸化しやすい。 (6) In the above (5), at least one of the mounting electrode or the internal conductor pattern may be a pattern made of copper foil. When at least one of the mounting electrode or the internal conductor pattern is a pattern made of copper foil, it has high conductivity and is easily oxidized.
(7)上記(5)または(6)において、前記実装電極の表面に被覆され、前記実装電極よりも酸化し難い金属のめっき膜を備えることが好ましい。実装電極の表面に形成されるめっき膜は実装電極よりも酸化し難い。そのため、上記めっき膜を有していない場合に比べて、樹脂多層基板の実装性が向上する。 (7) In the above (5) or (6), it is preferable that a metal plating film that covers the surface of the mounting electrode and is less oxidizable than the mounting electrode is provided. The plating film formed on the surface of the mounting electrode is less susceptible to oxidation than the mounting electrode. Therefore, the mounting property of the resin multilayer substrate is improved as compared with the case where the plating film is not provided.
(8)上記(7)において、前記めっき膜は金めっき膜であってもよい。 (8) In the above (7), the plating film may be a gold plating film.
(9)上記(3)から(8)のいずれかにおいて、前記実装電極の厚み、または前記内部導体パターンの厚みは、前記実装電極の前記端面に達する部分と、前記内部導体パターンの前記端面に達する部分との間の前記絶縁基材層の積層方向における厚み以下であることが好ましい。この構成により、樹脂材料の再付着膜の厚みが大きい樹脂多層基板を実現できる。 (9) In any one of the above (3) to (8), the thickness of the mounting electrode or the thickness of the internal conductor pattern is formed on the end surface of the mounting electrode and the end surface of the internal conductor pattern. It is preferable that it is below the thickness in the lamination direction of the said insulating base material layer between the parts which reach. With this configuration, it is possible to realize a resin multilayer substrate in which the thickness of the resin material reattachment film is large.
(10)本発明の樹脂多層基板の実装構造は、
 上記(3)から(9)のいずれかの樹脂多層基板と、
 前記樹脂多層基板が実装され、外部電極を有する実装基板と、
 を備え、
  前記実装電極は、導電性接合材を介して前記外部電極に接続されることを特徴とする。
(10) The mounting structure of the resin multilayer substrate of the present invention is as follows:
Any one of the resin multilayer substrates of (3) to (9) above;
A mounting substrate on which the resin multilayer substrate is mounted and having external electrodes;
With
The mounting electrode is connected to the external electrode through a conductive bonding material.
 この構成により、導電性接合材を介して実装基板に樹脂多層基板を実装した場合に、積層体の表面に形成された実装電極と、積層体の表面に露出する内部導体パターンとの間の短絡を抑制することができる。 With this configuration, when a resin multilayer board is mounted on a mounting board via a conductive bonding material, a short circuit between the mounting electrode formed on the surface of the multilayer body and the internal conductor pattern exposed on the surface of the multilayer body Can be suppressed.
 本発明によれば、導電性接合材を介して実装基板等に実装する際に、積層体の表面に形成された実装電極と、積層体の表面に露出する内部導体パターンとの間の短絡を抑制できる樹脂多層基板を実現できる。 According to the present invention, when mounting on a mounting substrate or the like via a conductive bonding material, a short circuit between the mounting electrode formed on the surface of the multilayer body and the internal conductor pattern exposed on the surface of the multilayer body is prevented. A resin multilayer substrate that can be suppressed can be realized.
図1は本発明における樹脂多層基板101の断面図である。FIG. 1 is a sectional view of a resin multilayer substrate 101 according to the present invention. 図2(A)は図1における第1端面部分SP1の拡大断面図であり、図2(B)は図1における第2端面部分SP2の拡大断面図である。2A is an enlarged cross-sectional view of the first end surface portion SP1 in FIG. 1, and FIG. 2B is an enlarged cross-sectional view of the second end surface portion SP2 in FIG. 図3は、本発明における電子機器301の主要部を示す断面図である。FIG. 3 is a cross-sectional view showing a main part of the electronic device 301 according to the present invention. 図4は、樹脂多層基板101の製造工程を順に示す断面図である。FIG. 4 is a cross-sectional view sequentially illustrating the manufacturing steps of the resin multilayer substrate 101. 図5は、樹脂多層基板101の製造工程を順に示す断面図である。FIG. 5 is a cross-sectional view sequentially illustrating the manufacturing steps of the resin multilayer substrate 101. 図6(A)はマザー基板である積層体10Mから樹脂多層基板を個片に切り出しつつある状態を示す断面図であり、図6(B)は切り出された樹脂多層基板100を実装基板200に実装した状態を示す断面図である。6A is a cross-sectional view showing a state in which the resin multilayer substrate is being cut into individual pieces from the laminated body 10M which is a mother substrate, and FIG. 6B is a diagram illustrating the cut resin multilayer substrate 100 as a mounting substrate 200. It is sectional drawing which shows the mounted state.
 以降、図を参照して具体的な例を挙げて、本発明を実施するための形態を示す。図1は本発明における樹脂多層基板101の断面図である。図2(A)は図1における第1端面部分SP1の拡大断面図であり、図2(B)は図1における第2端面部分SP2の拡大断面図である。 Hereinafter, a specific example will be given with reference to the drawings to show embodiments for carrying out the present invention. FIG. 1 is a sectional view of a resin multilayer substrate 101 according to the present invention. 2A is an enlarged cross-sectional view of the first end surface portion SP1 in FIG. 1, and FIG. 2B is an enlarged cross-sectional view of the second end surface portion SP2 in FIG.
 樹脂多層基板101は、積層体10、実装電極P1,P2、内部導体パターン31,32,33、再付着膜AF1,AF2を備える。 The resin multilayer substrate 101 includes a laminate 10, mounting electrodes P1, P2, internal conductor patterns 31, 32, 33, and redeposition films AF1, AF2.
 積層体10は、樹脂材料(熱可塑性樹脂)を主成分とする複数の絶縁基材層11,12,13が積層されて形成され、互いに対向する第1主面VS1および第2主面VS2と、端面SS1,SS2とを有する直方体状の絶縁素体である。本発明では、この第1主面VS1が「実装面」に相当する。複数の絶縁基材層11,12,13は、例えば液晶ポリマーを主材料とするシートである。 The laminate 10 is formed by laminating a plurality of insulating base material layers 11, 12, and 13 whose main component is a resin material (thermoplastic resin), and a first main surface VS1 and a second main surface VS2 facing each other. , A rectangular parallelepiped insulator having end faces SS1 and SS2. In the present invention, the first main surface VS1 corresponds to a “mounting surface”. The plurality of insulating base layers 11, 12, and 13 are sheets mainly made of a liquid crystal polymer, for example.
 実装電極P1は、積層体10の第1主面VS1に形成され、端面SS1に達するように延伸して露出する導体である。実装電極P1は、積層体10の第1主面VS1に形成される導体である。図2(A)に示すように、実装電極P1のうち、端面SS1に達する部分は、実装電極P1の酸化膜P1Xである。実装電極P1の表面には、めっき膜PL1が被覆されている。めっき膜PL1は、実装電極P1よりも酸化し難い金属のめっき膜である。実装電極P1は例えばCu箔等の導体パターンであり、めっき膜PL1は例えば下地をNi、表面をAuとするNi/Auめっき膜である。 The mounting electrode P1 is a conductor that is formed on the first main surface VS1 of the multilayer body 10 and extends and exposed so as to reach the end surface SS1. The mounting electrode P1 is a conductor formed on the first main surface VS1 of the multilayer body 10. As shown in FIG. 2A, the portion of the mounting electrode P1 that reaches the end surface SS1 is an oxide film P1X of the mounting electrode P1. The surface of the mounting electrode P1 is covered with a plating film PL1. The plating film PL1 is a metal plating film that is less likely to be oxidized than the mounting electrode P1. The mounting electrode P1 is a conductor pattern such as a Cu foil, for example, and the plating film PL1 is a Ni / Au plating film whose base is Ni and whose surface is Au, for example.
 実装電極P2は、積層体10の第1主面VS1に形成され、端面SS2に達するように延伸して露出する導体である。実装電極P2は、積層体10の第1主面VS1に形成される導体である。図2(B)に示すように、実装電極P2のうち、端面SS2に達する部分は、実装電極P2の酸化膜P2Xである。実装電極P2の表面には、めっき膜PL2が被覆されている。めっき膜PL2は、実装電極P2よりも酸化し難い金属のめっき膜である。実装電極P2は例えばCu箔等の導体パターンであり、めっき膜PL2は例えば下地をNi、表面をAuとするNi/Auめっき膜である。 The mounting electrode P2 is a conductor that is formed on the first main surface VS1 of the multilayer body 10, and is extended and exposed so as to reach the end surface SS2. The mounting electrode P2 is a conductor formed on the first main surface VS1 of the multilayer body 10. As shown in FIG. 2B, the portion of the mounting electrode P2 that reaches the end surface SS2 is the oxide film P2X of the mounting electrode P2. The surface of the mounting electrode P2 is covered with a plating film PL2. The plating film PL2 is a metal plating film that is less likely to be oxidized than the mounting electrode P2. The mounting electrode P2 is a conductor pattern such as a Cu foil, for example, and the plating film PL2 is a Ni / Au plating film whose base is Ni and whose surface is Au, for example.
 内部導体パターン31,32,33は、積層体10の内部に形成され、端面SS1または端面SS2に達するように延伸して露出する導体である。内部導体パターン31,32,33は、積層体10に形成される回路(コイル、キャパシタまたは配線等)の一部を構成する。図2(A)に示すように、内部導体パターン31,33の端面SS1に達する部分は、内部導体パターン31,33の酸化膜31X,33Xである。また、図2(B)に示すように、内部導体パターン32の端面SS2に達する部分は、内部導体パターン32の酸化膜32Xである。内部導体パターン31,32,33は例えばCu箔の導体パターンである。 The inner conductor patterns 31, 32, and 33 are conductors that are formed inside the multilayer body 10 and are exposed by extending so as to reach the end surface SS1 or the end surface SS2. The internal conductor patterns 31, 32, 33 constitute a part of a circuit (coil, capacitor, wiring, etc.) formed in the multilayer body 10. As shown in FIG. 2A, the portions reaching the end surface SS1 of the internal conductor patterns 31, 33 are the oxide films 31X, 33X of the internal conductor patterns 31, 33. As shown in FIG. 2B, the portion reaching the end surface SS2 of the internal conductor pattern 32 is an oxide film 32X of the internal conductor pattern 32. The internal conductor patterns 31, 32, 33 are, for example, Cu foil conductor patterns.
 再付着膜AF1は、実装電極P1の端面SS1に達する部分、および内部導体パターン31,33の端面SS1に達する部分を覆うように、端面SS1に形成される絶縁性を有した膜である。再付着膜AF2は、実装電極P2の端面SS2に達する部分、および内部導体パターン32の端面に達する部分を覆うように、端面SS2に形成される絶縁性を有した膜である。再付着膜AF1,AF2は、後に詳述するように、高出力のレーザーによって積層体10を切り出す際に、絶縁基材層11,12,13の樹脂材料が蒸発または気化したものが、積層体10の端面SS1,SS2に付着した膜である。 The redeposition film AF1 is an insulating film formed on the end surface SS1 so as to cover a portion reaching the end surface SS1 of the mounting electrode P1 and a portion reaching the end surface SS1 of the internal conductor patterns 31 and 33. The redeposition film AF2 is an insulating film formed on the end surface SS2 so as to cover a portion reaching the end surface SS2 of the mounting electrode P2 and a portion reaching the end surface of the internal conductor pattern 32. As will be described in detail later, the reattachment films AF1 and AF2 are obtained by evaporating or vaporizing the resin material of the insulating base layers 11, 12, and 13 when the laminate 10 is cut out by a high-power laser. 10 is a film attached to the end faces SS1 and SS2.
 図2(A)に示すように、実装電極P1の厚みA1および内部導体パターン31,33の厚みA2は、実装電極P1の端面SS1に達する部分と、内部導体パターン31,33の端面SS1に達する部分との間の絶縁基材層の積層方向(Z軸方向)における厚みB1,B2以下である(A1≦B1、A1≦B2、A2≦B1、A2≦B2)。 As shown in FIG. 2A, the thickness A1 of the mounting electrode P1 and the thickness A2 of the internal conductor patterns 31, 33 reach the end surface SS1 of the mounting electrode P1 and the end surface SS1 of the internal conductor patterns 31, 33. It is below thickness B1, B2 in the lamination direction (Z-axis direction) of the insulating base material layer between the parts (A1 ≦ B1, A1 ≦ B2, A2 ≦ B1, A2 ≦ B2).
 また、図2(B)に示すように、実装電極P2の厚みA1および内部導体パターン32の厚みA2は、実装電極P2の端面SS2に達する部分と、内部導体パターン32の端面SS2に達する部分との間の絶縁基材層12,13のZ軸方向における厚みB3以下である(A1≦B3、A2≦B3)。 Further, as shown in FIG. 2B, the thickness A1 of the mounting electrode P2 and the thickness A2 of the internal conductor pattern 32 are a part reaching the end surface SS2 of the mounting electrode P2, and a part reaching the end surface SS2 of the internal conductor pattern 32. It is below thickness B3 in the Z-axis direction of insulating base material layers 12 and 13 between (A1 ≦ B3, A2 ≦ B3).
 次に、導電性接合材を介して樹脂多層基板101を実装基板等に実装する実装構造について、図を参照して説明する。図3は、本発明における電子機器301の主要部を示す断面図である。 Next, a mounting structure in which the resin multilayer substrate 101 is mounted on a mounting substrate or the like via a conductive bonding material will be described with reference to the drawings. FIG. 3 is a cross-sectional view showing a main part of the electronic device 301 according to the present invention.
 電子機器301は、樹脂多層基板101および実装基板201等を備える。実装基板201は例えばプリント配線基板である。樹脂多層基板101は実装基板201の主面に実装される。なお、実装基板201の主面には、樹脂多層基板101以外の電子部品等が実装されるが、図示を省略している。 The electronic device 301 includes a resin multilayer substrate 101, a mounting substrate 201, and the like. The mounting board 201 is, for example, a printed wiring board. The resin multilayer substrate 101 is mounted on the main surface of the mounting substrate 201. In addition, although electronic components other than the resin multilayer substrate 101 are mounted on the main surface of the mounting substrate 201, illustration is omitted.
 実装基板201の主面には外部電極41,42等が形成されている。なお、実装基板201の主面または内部にはこれ以外の導体が形成されるが、図示を省略している。 External electrodes 41, 42, etc. are formed on the main surface of the mounting substrate 201. Although other conductors are formed on the main surface or inside of the mounting substrate 201, the illustration is omitted.
 樹脂多層基板101の実装電極P1,P2は、導電性接合材4を介して外部電極41,42にそれぞれ接続される。導電性接合材4は例えばはんだ等である。 The mounting electrodes P1 and P2 of the resin multilayer substrate 101 are connected to the external electrodes 41 and 42 through the conductive bonding material 4, respectively. The conductive bonding material 4 is, for example, solder.
 本発明の樹脂多層基板101は、例えば次の工程で製造される。図4および図5は、樹脂多層基板101の製造工程を順に示す断面図である。 The resin multilayer substrate 101 of the present invention is manufactured, for example, by the following process. 4 and 5 are cross-sectional views sequentially showing the manufacturing process of the resin multilayer substrate 101.
 まず、図4中の(1)に示すように、まず樹脂材料を主材料とする集合基板状態の複数の絶縁基材層11,12,13を用意する。絶縁基材層11,12,13は、例えば液晶ポリマーを主材料とするシートである。 First, as shown in (1) in FIG. 4, first, a plurality of insulating base material layers 11, 12, and 13 in a collective substrate state using a resin material as a main material are prepared. The insulating base layers 11, 12, and 13 are sheets mainly made of a liquid crystal polymer, for example.
 次に、絶縁基材層11の表面に内部導体パターン31C,32Cを形成し、絶縁基材層12の表面に内部導体パターン33Cを形成し、絶縁基材層13の表面に実装電極P1C,P2Cを形成する。具体的には、絶縁基材層11の片側主面に金属箔(例えばCu箔)をラミネートし、その金属箔をフォトリソグラフィでパターンニングすることで、内部導体パターン31C,32Cを形成する。絶縁基材層12の片側主面に金属箔(例えばCu箔)をラミネートし、その金属箔をフォトリソグラフィでパターンニングすることで内部導体パターン33Cを形成する。また、絶縁基材層13の片側主面に金属箔(例えばCu箔)をラミネートし、その金属箔をフォトリソグラフィでパターンニングすることで実装電極P1C,P2Cを形成する。 Next, the inner conductor patterns 31C and 32C are formed on the surface of the insulating base material layer 11, the inner conductor pattern 33C is formed on the surface of the insulating base material layer 12, and the mounting electrodes P1C and P2C are formed on the surface of the insulating base material layer 13. Form. Specifically, the inner conductor patterns 31C and 32C are formed by laminating a metal foil (for example, Cu foil) on one main surface of the insulating base layer 11, and patterning the metal foil by photolithography. An inner conductor pattern 33C is formed by laminating a metal foil (for example, Cu foil) on one side main surface of the insulating base material layer 12, and patterning the metal foil by photolithography. In addition, the mounting electrodes P1C and P2C are formed by laminating a metal foil (for example, Cu foil) on one main surface of the insulating base layer 13 and patterning the metal foil by photolithography.
 樹脂材料を主材料とする複数の絶縁基材層に、内部導体パターンおよび実装電極を形成するこの工程が、本発明における「導体形成工程」の一例である。 This step of forming internal conductor patterns and mounting electrodes on a plurality of insulating base layers mainly composed of a resin material is an example of the “conductor forming step” in the present invention.
 なお、図示されていないが、複数の絶縁基材層11,12,13には、他に層間接続導体が形成されていてもよい。層間接続導体は、レーザー等で貫通孔を設けた後、Cu,Sn等のうち1以上もしくはそれらの合金を含む導電性ペーストを配設し、後の加熱加圧(本発明の「積層体形成工程」)で硬化させることによって設けられる。 In addition, although not shown in the drawing, interlayer connection conductors may be formed on the plurality of insulating base material layers 11, 12, and 13. The interlayer connection conductor is provided with a through-hole using a laser or the like, and then a conductive paste containing one or more of Cu, Sn, or the like, or an alloy thereof is disposed, followed by heating and pressurization (the “laminated body formation” of the present invention). Provided by curing in step ")".
 次に、内部導体パターン31C,32C,33Cおよび実装電極P1C,P2Cを形成した複数の絶縁基材層を積層し、図4中の(1)に示す白抜き矢印の方向から加熱加圧(一括プレス)することにより、図4中の(2)に示す集合基板状態の積層体10Cを形成する。これにより、積層体10Cの表面に実装電極P1C,P2Cが配置され、積層体10Cの内部に内部導体パターン31C,32C,33Cが配置される。 Next, a plurality of insulating base material layers on which the internal conductor patterns 31C, 32C, and 33C and the mounting electrodes P1C and P2C are formed are stacked, and heated and pressed (collectively) from the direction of the white arrow shown in (1) in FIG. The laminated body 10C in the aggregate substrate state shown in (2) in FIG. 4 is formed by pressing. Thus, the mounting electrodes P1C and P2C are disposed on the surface of the multilayer body 10C, and the internal conductor patterns 31C, 32C, and 33C are disposed inside the multilayer body 10C.
 「導体形成工程」の後に、積層した複数の絶縁基材層を加熱加圧することで積層体を形成して、積層体の表面に実装電極を配置し、積層体の内部に内部導体パターンを配置するこの工程が、本発明における「積層体形成工程」の一例である。 After the "conductor formation process", a laminated body is formed by heating and pressing a plurality of laminated insulating base layers, mounting electrodes are placed on the surface of the laminated body, and an internal conductor pattern is placed inside the laminated body This process is an example of the “laminated body forming process” in the present invention.
 次に、図4中の(3)に示すように、実装電極P1C,P2Cの表面に、実装電極P1C,P2Cよりも酸化し難い金属膜をめっき形成する。めっき形成される金属膜は、例えば下地をNi、表面をAuとするNi/Auめっき膜である。 Next, as shown in (3) in FIG. 4, a metal film that is less oxidizable than the mounting electrodes P1C and P2C is formed on the surface of the mounting electrodes P1C and P2C by plating. The metal film to be plated is, for example, a Ni / Au plating film in which the base is Ni and the surface is Au.
 その後、図4中の(3)に示す分離線DLに沿って、集合基板状態の積層体10Cを個々の個片に分離する。具体的には、図4中の(4)および図5中の(5)(6)に示すように、積層体10Cの第1主面VS1から第2主面VS2に向かって高出力のレーザーLRを照射することにより、実装電極P1C,P2Cおよび内部導体パターン31C,32C,33Cごと積層体10Cを切断する。すなわち、Z軸方向から視て、実装電極P1C,P2Cと内部導体パターン31C,32C,33Cとが重なる部分が、高出力のレーザーLRで切断される。レーザーLRは例えば60Wの出力のUVレーザーである。 Then, the laminated body 10C in the aggregate substrate state is separated into individual pieces along the separation line DL shown in (3) in FIG. Specifically, as shown in (4) in FIG. 4 and (5) and (6) in FIG. 5, a high-power laser from the first main surface VS1 to the second main surface VS2 of the laminated body 10C. By irradiating LR, the laminated body 10C is cut together with the mounting electrodes P1C and P2C and the internal conductor patterns 31C, 32C and 33C. That is, as viewed from the Z-axis direction, portions where the mounting electrodes P1C, P2C and the internal conductor patterns 31C, 32C, 33C overlap are cut by the high-power laser LR. The laser LR is, for example, a 60 W UV laser.
 積層体10CをレーザーLRで切断する際、実装電極P1,P2のうち、積層体10Cの切断面(後の積層体10の端面SS1,SS2)に達する部分には、レーザーLRから受ける熱によって、実装電極P1,P2の酸化膜P1X,P2Xが形成される。また、内部導体パターン31,32,33のうち、積層体10Cの切断面(後の積層体10の端面SS1,SS2)に達する部分には、レーザーLRから受ける熱によって、内部導体パターン31,32,33の酸化膜31X,32X,33Xが形成される。 When cutting the laminated body 10C with the laser LR, the portion of the mounting electrodes P1 and P2 that reaches the cut surface of the laminated body 10C (end surfaces SS1 and SS2 of the subsequent laminated body 10) is heated by the heat received from the laser LR. Oxide films P1X and P2X of the mounting electrodes P1 and P2 are formed. Further, of the internal conductor patterns 31, 32, 33, portions reaching the cut surface of the multilayer body 10C (end faces SS1, SS2 of the subsequent multilayer body 10) are heated by the heat received from the laser LR. , 33 oxide films 31X, 32X, 33X are formed.
 さらに、積層体10CをレーザーLRで切断する際、図4中の(4)および図5中の(5)(6)に示すように、絶縁基材層11,12,13の樹脂材料が蒸発または気化したものが、積層体10Cの切断面に再付着する(図4中の(4)および図5中の(5)(6)に示す再付着膜AFを参照)。これにより、図5中の(7)に示す樹脂多層基板101では、実装電極P1,P2の端面SS1,SS2に達する部分、および内部導体パターン31,32,33の端面SS1,SS2に達する部分を覆うように、切り出された積層体10の端面SS1,SS2に、樹脂材料の再付着膜AF1,AF2が形成される。 Further, when the laminated body 10C is cut by the laser LR, the resin material of the insulating base layers 11, 12, and 13 is evaporated as shown in (4) in FIG. 4 and (5) and (6) in FIG. Alternatively, the vaporized material reattaches to the cut surface of the laminated body 10C (see the reattachment film AF shown in (4) in FIG. 4 and (5) and (6) in FIG. 5). Thereby, in the resin multilayer substrate 101 shown in (7) in FIG. 5, the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 and the portions reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33 are formed. Reattachment films AF1 and AF2 of a resin material are formed on the end surfaces SS1 and SS2 of the cut laminate 10 so as to cover them.
 「積層体形成工程」の後に、複数の絶縁基材層の積層方向から視て、実装電極と内部導体パターンとが重なる部分をレーザーで切断し、切り出した積層体の端面に樹脂材料の再付着膜を形成するこの工程が、本発明における「切断工程」の一例である。 After the “laminated body forming process”, the part where the mounting electrode and the internal conductor pattern overlap is cut with a laser when viewed from the stacking direction of the plurality of insulating base layers, and the resin material is reattached to the end face of the cut stack. This step of forming a film is an example of the “cutting step” in the present invention.
 このようにして、集合基板状態の積層体10Cを分離することにより、図5中の(7)に示す樹脂多層基板101を得る。 In this way, by separating the laminated body 10C in the aggregate substrate state, the resin multilayer substrate 101 shown in (7) in FIG. 5 is obtained.
 上記製造方法によって樹脂多層基板101を製造することにより、次のような作用効果を奏する。 The following effects can be obtained by manufacturing the resin multilayer substrate 101 by the above manufacturing method.
(a)上記製造方法によれば、切断した実装電極P1,P2が積層体10の端面SS1,SS2に回り込むように変形し難い。そのため、上記製造方法によって得られた樹脂多層基板101を、図3に示すように、導電性接合材4を介して実装基板201に樹脂多層基板101を実装したときに、導電性接合材4が端面SS1,SS2に沿って濡れ拡がることが抑制される。したがって、実装電極P1,P2と内部導体パターンとの間での短絡の発生は抑制される。 (A) According to the above manufacturing method, the cut mounting electrodes P1 and P2 are not easily deformed so as to go around the end surfaces SS1 and SS2 of the multilayer body 10. Therefore, when the resin multilayer substrate 101 obtained by the above manufacturing method is mounted on the mounting substrate 201 via the conductive bonding material 4 as shown in FIG. Wetting and spreading along the end surfaces SS1, SS2 is suppressed. Therefore, occurrence of a short circuit between the mounting electrodes P1 and P2 and the internal conductor pattern is suppressed.
(b)また、上記製造方法によれば、実装電極P1,P2の端面SS1,SS2に達する部分、および内部導体パターン31,32,33の端面SS1,SS2に達する部分を覆うように、端面SS1,SS2に絶縁性の再付着膜AF1,AF2が形成される。この構成により、導電性接合材4を介して実装基板201に樹脂多層基板101を実装したときに、導電性接合材4が端面SS1,SS2に沿って濡れ拡がったとしても、実装電極P1,P2と内部導体パターンとの間での短絡の発生はさらに抑制される。 (B) According to the manufacturing method, the end surface SS1 is formed so as to cover the portions reaching the end surfaces SS1, SS2 of the mounting electrodes P1, P2 and the portions reaching the end surfaces SS1, SS2 of the internal conductor patterns 31, 32, 33. , SS2 are formed with insulating redeposition films AF1 and AF2. With this configuration, even when the resin multilayer substrate 101 is mounted on the mounting substrate 201 via the conductive bonding material 4, even if the conductive bonding material 4 wets and spreads along the end surfaces SS1, SS2, the mounting electrodes P1, P2 And short circuit between the inner conductor pattern and the inner conductor pattern are further suppressed.
(c)さらに、上記製造方法によれば、レーザーLRによる切断の際に、導体の部分(実装電極や内部導体パターン)と絶縁基材層の部分とでレーザーLRの出力等の設定を変更することなく、上記樹脂多層基板101を得ることができる。すなわち、上記製造方法によれば、細かなレーザーLRの調整をすることなく、本発明の樹脂多層基板101を容易に得ることができる。 (C) Furthermore, according to the above manufacturing method, when cutting with the laser LR, the setting of the output of the laser LR and the like is changed between the conductor portion (mounting electrode and internal conductor pattern) and the insulating base material layer portion. The resin multilayer substrate 101 can be obtained without any problem. That is, according to the manufacturing method, the resin multilayer substrate 101 of the present invention can be easily obtained without fine adjustment of the laser LR.
(d)上記製造方法では、図4中の(3)に示すように、レーザーLRによる切断の前に、実装電極P1C,P2Cの表面に、実装電極P1C,P2Cよりも酸化し難い金属膜をめっき形成している。レーザーLRによる切断の際、実装電極P1,P2の表面に形成されるめっき膜は酸化し難い。そのため、上記製造方法によって樹脂多層基板101を製造することにより、上記めっき膜PL1,P2を有していない場合に比べて、樹脂多層基板101の実装性が向上する。 (D) In the above manufacturing method, as shown in (3) in FIG. 4, before cutting with the laser LR, a metal film that is less likely to be oxidized than the mounting electrodes P1C and P2C is formed on the surface of the mounting electrodes P1C and P2C. Plating is formed. When cutting with the laser LR, the plating film formed on the surfaces of the mounting electrodes P1 and P2 is difficult to oxidize. Therefore, by manufacturing the resin multilayer substrate 101 by the above manufacturing method, the mountability of the resin multilayer substrate 101 is improved as compared with the case where the plating films PL1 and P2 are not provided.
(e)また、本発明の樹脂多層基板101では、図2(A)および図2(B)に示すように、実装電極P1,P2の厚み(A1)および内部導体パターン31,32,33の厚み(A2)が、実装電極P1,P2の端面SS1,SS2に達する部分と、内部導体パターン31,32,33の端面SS1,SS2に達する部分との間の絶縁基材層のZ軸方向における厚み(B1,B2,B3)以下である。この構成では、実装電極P1,P2および内部導体パターン31,32,33の厚み以上に絶縁基材層の厚みが大きいため、レーザーLRによる切断の際、樹脂材料の再付着膜AF1,AF2を端面SS1,SS2に形成しやすい。 (E) Further, in the resin multilayer substrate 101 of the present invention, as shown in FIGS. 2A and 2B, the thickness (A1) of the mounting electrodes P1 and P2 and the inner conductor patterns 31, 32, and 33 The thickness (A2) in the Z-axis direction of the insulating base material layer between the part reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 and the part reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33 It is below thickness (B1, B2, B3). In this configuration, since the thickness of the insulating base layer is larger than the thicknesses of the mounting electrodes P1, P2 and the internal conductor patterns 31, 32, 33, the reattachment films AF1, AF2 of the resin material are used as the end faces when cutting with the laser LR. Easy to form in SS1 and SS2.
(f)本発明の樹脂多層基板101では、内部導体パターン31,32,33の端面SS1,SS2に達する部分が、内部導体パターン31,32,33の酸化膜31X,32X,33Xである。この構成により、上記酸化膜31X,32Xが形成されていない場合に比べ、積層体10の端面SS1,SS2での内部導体パターン31,32,33の絶縁性が高まる。したがって、導電性接合材4を介して実装基板201に樹脂多層基板101を実装したときの、実装電極P1,P2と内部導体パターンとの間での短絡の発生をさらに抑制できる。 (F) In the resin multilayer substrate 101 of the present invention, portions reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33 are the oxide films 31X, 32X, 33X of the internal conductor patterns 31, 32, 33. With this configuration, compared to the case where the oxide films 31X and 32X are not formed, the insulating properties of the internal conductor patterns 31, 32, and 33 at the end surfaces SS1 and SS2 of the multilayer body 10 are enhanced. Therefore, the occurrence of a short circuit between the mounting electrodes P1 and P2 and the internal conductor pattern when the resin multilayer substrate 101 is mounted on the mounting substrate 201 via the conductive bonding material 4 can be further suppressed.
 また、樹脂多層基板101では、内部導体パターン31,32,33よりも表面粗れの大きな酸化膜31X,32Xが、積層体10の端面SS1,SS2に達する部分に形成されている。そのため、レーザーLRによる切断の際、積層体10の端面SS1,SS2に達する部分に酸化膜が形成されていない場合に比べて、絶縁基材層11,12,13の樹脂材料が蒸発または気化したものが、内部導体パターン31,32,33の端面SS1,SS2に達する部分に付着しやすくなる。 Further, in the resin multilayer substrate 101, oxide films 31X and 32X having a surface roughness larger than that of the internal conductor patterns 31, 32 and 33 are formed in portions reaching the end faces SS1 and SS2 of the multilayer body 10. Therefore, at the time of cutting with the laser LR, the resin material of the insulating base layers 11, 12, and 13 is evaporated or vaporized as compared with the case where the oxide film is not formed in the portion reaching the end faces SS 1 and SS 2 of the stacked body 10. Things easily adhere to the portions reaching the end faces SS1, SS2 of the internal conductor patterns 31, 32, 33.
 さらに、樹脂多層基板101では、内部導体パターン31,32,33がCu箔の導体パターンであるため、導電性が高く、酸化しやすい。そのため、積層体10の端面SS1,SS2に達する部分に酸化膜31X,32X,33Xを形成しやすい。 Furthermore, in the resin multilayer substrate 101, since the internal conductor patterns 31, 32, and 33 are conductor patterns of Cu foil, the conductivity is high and it is easily oxidized. Therefore, it is easy to form the oxide films 31X, 32X, and 33X in the portion reaching the end faces SS1 and SS2 of the stacked body 10.
(g)また、本発明の樹脂多層基板101では、実装電極P1,P2の端面SS1,SS2に達する部分が、実装電極P1,P2の酸化膜P1X,P2Xである。この構成により、上記酸化膜P1X,P2Xが形成されていない場合に比べて、積層体10の端面SS1,SS2での実装電極P1,P2の絶縁性が高まる。したがって、導電性接合材4を介して実装基板201に樹脂多層基板101を実装したときの、実装電極P1,P2と内部導体パターンとの間での短絡の発生をさらに抑制できる。 (G) In the resin multilayer substrate 101 of the present invention, the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2 are the oxide films P1X, P2X of the mounting electrodes P1, P2. With this configuration, the insulating properties of the mounting electrodes P1 and P2 on the end surfaces SS1 and SS2 of the stacked body 10 are enhanced as compared with the case where the oxide films P1X and P2X are not formed. Therefore, the occurrence of a short circuit between the mounting electrodes P1 and P2 and the internal conductor pattern when the resin multilayer substrate 101 is mounted on the mounting substrate 201 via the conductive bonding material 4 can be further suppressed.
 また、樹脂多層基板101では、実装電極P1,P2よりも表面粗れの大きな酸化膜P1X,P2Xが、積層体10の端面SS1,SS2に達する部分に形成されている。そのため、レーザーLRによる切断の際、積層体10の端面SS1,SS2に達する部分に酸化膜が形成されていない場合に比べて、絶縁基材層11,12,13の樹脂材料が蒸発または気化したものが、実装電極P1,P2の端面SS1,SS2に達する部分に付着しやすくなる。 Further, in the resin multilayer substrate 101, oxide films P1X and P2X whose surface roughness is larger than that of the mounting electrodes P1 and P2 are formed at portions reaching the end faces SS1 and SS2 of the laminate 10. Therefore, at the time of cutting with the laser LR, the resin material of the insulating base layers 11, 12, and 13 is evaporated or vaporized as compared with the case where the oxide film is not formed in the portion reaching the end faces SS 1 and SS 2 of the stacked body 10. Things easily adhere to the portions reaching the end faces SS1, SS2 of the mounting electrodes P1, P2.
 さらに、樹脂多層基板101では、実装電極P1,P2がCu箔の導体パターンであるため、導電性が高く、酸化しやすい。そのため、積層体10の端面SS1,SS2に達する部分に酸化膜P1X,P2Xを形成しやすい。 Furthermore, in the resin multilayer substrate 101, since the mounting electrodes P1 and P2 are Cu foil conductor patterns, they have high conductivity and are easily oxidized. Therefore, it is easy to form the oxide films P1X and P2X in the portion reaching the end faces SS1 and SS2 of the stacked body 10.
 なお、上述した樹脂多層基板101では、積層体10が直方体状である例を示したが、この構成に限定されるものではない。積層体10の形状は、本発明の作用効果を奏する範囲において適宜変更可能であり、例えば立方体、多角柱、円柱、楕円柱等であってもよく、積層体10の平面形状がL字形、クランク形、T字形、Y字形等であってもよい。 In the above-described resin multilayer substrate 101, an example in which the laminated body 10 has a rectangular parallelepiped shape has been shown, but the present invention is not limited to this configuration. The shape of the laminated body 10 can be changed as appropriate within the scope of the effects of the present invention. For example, the laminated body 10 may be a cube, a polygonal column, a cylinder, an elliptical column, or the like. It may be a shape, a T shape, a Y shape, or the like.
 また、上述した樹脂多層基板101では、3つの絶縁基材層11,12,13を積層して形成される積層体10を備える構成であったが、これに限定されるものではない。積層体10を形成する絶縁基材層の層数は、本発明の作用効果を奏する範囲において適宜変更可能である。また、積層体10は、熱可塑性樹脂を主材料とする複数の絶縁基材層11,12,13を積層して形成される構成に限定されるものではない。積層体10は、例えばエポキシ樹脂等の熱硬化性樹脂を主材料とする複数の絶縁基材層を積層して形成される構成であってもよい。 Further, the above-described resin multilayer substrate 101 has a configuration including the laminate 10 formed by laminating the three insulating base layers 11, 12, and 13, but is not limited thereto. The number of insulating base material layers forming the laminate 10 can be changed as appropriate within the range where the effects of the present invention are exhibited. Moreover, the laminated body 10 is not limited to the structure formed by laminating | stacking the some insulating base material layers 11, 12, and 13 which use a thermoplastic resin as a main material. The laminated body 10 may have a configuration formed by laminating a plurality of insulating base layers mainly composed of a thermosetting resin such as an epoxy resin.
 また、上述した樹脂多層基板101では、再付着膜AF1,AF2が、実装電極P1,P2のうち端面SS1,SS2に達する部分、および内部導体パターン31,32,33のうち端面SS1,SS2に達する部分の両方を覆うように、端面SS1,SS2に形成される例を示したが、この構成に限定されるものではない。再付着膜AF1,AF2は、実装電極P1,P2のうち端面SS1,SS2に達する部分、または、内部導体パターン31,32,33のうち端面SS1,SS2の少なくとも一方を覆うように、端面SS1,SS2に形成されていれば、本発明の作用効果を奏する。 In the resin multilayer substrate 101 described above, the reattachment films AF1 and AF2 reach the end faces SS1 and SS2 of the mounting electrodes P1 and P2 and the end faces SS1 and SS2 of the internal conductor patterns 31, 32, and 33. Although the example formed in end surface SS1, SS2 was shown so that both of parts may be covered, it is not limited to this structure. The reattachment films AF1 and AF2 are formed so that the end surfaces SS1 and SS2 cover the portions of the mounting electrodes P1 and P2 that reach the end surfaces SS1 and SS2 or at least one of the end surfaces SS1 and SS2 of the internal conductor patterns 31, 32, and 33. If it is formed in SS2, the effects of the present invention are exhibited.
 さらに、上述した樹脂多層基板101では、実装電極P1の表面にめっき膜PL1が被覆され、実装電極P2の表面にめっき膜PL2が被覆される例を示したが、この構成に限定されるものではない。めっき膜PL1,PL2は必須の構成ではない。 Furthermore, in the resin multilayer substrate 101 described above, the example in which the surface of the mounting electrode P1 is coated with the plating film PL1 and the surface of the mounting electrode P2 is coated with the plating film PL2 is shown, but the present invention is not limited to this configuration. Absent. The plating films PL1 and PL2 are not essential components.
 また、上述した樹脂多層基板101では、3つの内部導体パターン31,32,33を備える例を示したが、この構成に限定されるものではない。内部導体パターンの形状、数量等は、本発明の作用効果を奏する範囲において適宜変更可能である。 Moreover, although the example provided with the three internal conductor patterns 31, 32, and 33 is shown in the above-mentioned resin multilayer substrate 101, it is not limited to this configuration. The shape, quantity, and the like of the internal conductor pattern can be changed as appropriate within the range where the effects of the present invention are exhibited.
 最後に、上述の実施形態の説明は、すべての点で例示であって、制限的なものではない。当業者にとって変形および変更が適宜可能である。本発明の範囲は、上述の実施形態ではなく、特許請求の範囲によって示される。さらに、本発明の範囲には、特許請求の範囲内と均等の範囲内での実施形態からの変更が含まれる。 Finally, the description of the above embodiment is illustrative in all respects and not restrictive. Modifications and changes can be made as appropriate by those skilled in the art. The scope of the present invention is shown not by the above embodiments but by the claims. Furthermore, the scope of the present invention includes modifications from the embodiments within the scope equivalent to the claims.
AF,AF1,AF2…再付着膜
DB…ダイサーブレード
DL…分離線
LR…レーザー
P1,P1A,P1C,P2,P2A,P2C…実装電極
P1X,P2X…実装電極の酸化膜
PL1,PL2…めっき膜
SS1,SS2…積層体の端面
VS1…積層体の第1主面(実装面)
VS2…積層体の第2主面
4…導電性接合材
4A…はんだ
10,10A,10C,10M…積層体
11,12,13…絶縁基材層
31,31C,32,32C,33,33C…内部導体パターン
31X,32X,33X…内部導体パターンの酸化膜
33A…導体パターン
41,42…外部電極
100,101…樹脂多層基板
200,201…実装基板
301…電子機器
AF, AF1, AF2 ... redeposition film DB ... dicer blade DL ... separation line LR ... lasers P1, P1A, P1C, P2, P2A, P2C ... mounting electrodes P1X, P2X ... mounting electrode oxide films PL1, PL2 ... plating film SS1 , SS2 ... end face VS1 of the laminated body ... first main surface (mounting surface) of the laminated body
VS2 ... Second main surface 4 of laminated body 4 ... Conductive bonding material 4A ... Solders 10, 10A, 10C, 10M ... Laminated bodies 11, 12, 13 ... Insulating base material layers 31, 31C, 32, 32C, 33, 33C ... Internal conductor patterns 31X, 32X, 33X ... Oxide film 33A of internal conductor pattern ... Conductor patterns 41, 42 ... External electrodes 100, 101 ... Resin multilayer substrate 200, 201 ... Mounting substrate 301 ... Electronic equipment

Claims (10)

  1.  樹脂材料を主材料とする複数の絶縁基材層に、内部導体パターンおよび実装電極を形成する、導体形成工程と、
     前記導体形成工程の後に、積層した前記複数の絶縁基材層を加熱加圧して、前記積層体の表面に前記実装電極を配置し、前記積層体の内部に前記内部導体パターンを配置する、積層体形成工程と、
     前記積層体形成工程の後に、前記複数の絶縁基材層の積層方向から視て、前記実装電極と前記内部導体パターンとが重なる部分をレーザーで切断し、切り出した積層体の端面に前記樹脂材料の再付着膜を形成する、切断工程と、
     を備える、樹脂多層基板の製造方法。
    A conductor forming step of forming an internal conductor pattern and mounting electrodes on a plurality of insulating base layers mainly composed of a resin material;
    After the conductor forming step, the plurality of laminated insulating base layers are heated and pressurized, the mounting electrodes are arranged on the surface of the multilayer body, and the internal conductor patterns are arranged inside the multilayer body. Body formation process,
    After the laminated body forming step, as seen from the laminating direction of the plurality of insulating base material layers, a portion where the mounting electrode and the internal conductor pattern overlap is cut with a laser, and the resin material is applied to the cut end face of the laminated body A cutting process for forming a reattachment film of
    A method for producing a resin multilayer substrate.
  2.  前記積層体形成工程と前記切断工程との間に、前記実装電極の表面に、前記内部導体パターンよりも酸化し難い金属膜をめっき形成する、めっき形成工程を備える、請求項1に記載の樹脂多層基板の製造方法。 2. The resin according to claim 1, further comprising a plating forming step of forming a metal film that is less oxidizable than the internal conductor pattern on the surface of the mounting electrode between the laminate forming step and the cutting step. A method for producing a multilayer substrate.
  3.  樹脂材料を主成分とする複数の絶縁基材層が積層されて形成され、実装面および端面を有する積層体と、
     前記積層体の実装面に形成され、前記端面に達するように延伸して露出する実装電極と、
     前記積層体の内部に形成され、前記端面に達するように延伸して露出する内部導体パターンと、
     前記実装電極の前記端面に達する部分、または前記内部導体パターンの前記端面に達する部分の少なくとも一方を覆うように、前記端面に形成され、前記絶縁性を有する前記樹脂材料の再付着膜と、
     を備える、樹脂多層基板。
    A laminate having a mounting surface and an end surface formed by laminating a plurality of insulating base layers mainly composed of a resin material;
    A mounting electrode that is formed on the mounting surface of the laminate and is exposed to extend to reach the end surface;
    An internal conductor pattern that is formed inside the laminate and is exposed to extend to reach the end face;
    A reattachment film of the resin material formed on the end surface so as to cover at least one of the portion reaching the end surface of the mounting electrode or the portion reaching the end surface of the internal conductor pattern;
    A resin multilayer substrate.
  4.  前記内部導体パターンの前記端面に達する部分は、前記内部導体パターンの酸化膜である、請求項3に記載の樹脂多層基板。 The resin multilayer substrate according to claim 3, wherein a portion reaching the end face of the inner conductor pattern is an oxide film of the inner conductor pattern.
  5.  前記実装電極の前記端面に達する部分は、前記実装電極の酸化膜である、請求項3または4に記載の樹脂多層基板。 The resin multilayer substrate according to claim 3 or 4, wherein a portion reaching the end face of the mounting electrode is an oxide film of the mounting electrode.
  6.  前記実装電極または前記内部導体パターンの少なくとも一方は、銅箔によるパターンである、請求項5に記載の樹脂多層基板。 The resin multilayer substrate according to claim 5, wherein at least one of the mounting electrode or the internal conductor pattern is a pattern made of copper foil.
  7.  前記実装電極の表面に被覆され、前記実装電極よりも酸化し難い金属のめっき膜を備える、請求項5または6に記載の樹脂多層基板。 The resin multilayer substrate according to claim 5 or 6, further comprising a metal plating film that is coated on a surface of the mounting electrode and is less likely to be oxidized than the mounting electrode.
  8.  前記めっき膜は金めっき膜である、請求項7に記載の樹脂多層基板。 The resin multilayer substrate according to claim 7, wherein the plating film is a gold plating film.
  9.  前記実装電極の厚みおよび前記内部導体パターンの厚みは、前記実装電極の前記端面に達する部分と、前記内部導体パターンの前記端面に達する部分との間の前記絶縁基材層の積層方向における厚み以下である、請求項3から8のいずれかに記載の樹脂多層基板。 The thickness of the mounting electrode and the thickness of the internal conductor pattern are equal to or less than the thickness in the stacking direction of the insulating base layer between the portion reaching the end surface of the mounting electrode and the portion reaching the end surface of the internal conductor pattern. The resin multilayer substrate according to any one of claims 3 to 8, wherein
  10.  請求項3から9のいずれかに記載の樹脂多層基板と、
     前記樹脂多層基板が実装され、外部電極を有する実装基板と、
     を備え、
      前記実装電極は、導電性接合材を介して前記外部電極に接続される、樹脂多層基板の実装構造。
    The resin multilayer substrate according to any one of claims 3 to 9,
    A mounting substrate on which the resin multilayer substrate is mounted and having external electrodes;
    With
    The mounting structure of the resin multilayer substrate, wherein the mounting electrode is connected to the external electrode via a conductive bonding material.
PCT/JP2018/015688 2017-05-18 2018-04-16 Method for manufacturing resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate WO2018211883A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017-098633 2017-05-18
JP2017098633 2017-05-18

Publications (1)

Publication Number Publication Date
WO2018211883A1 true WO2018211883A1 (en) 2018-11-22

Family

ID=64274095

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2018/015688 WO2018211883A1 (en) 2017-05-18 2018-04-16 Method for manufacturing resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate

Country Status (1)

Country Link
WO (1) WO2018211883A1 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62163390A (en) * 1986-01-14 1987-07-20 松下電工株式会社 External work of printed board
JPH04196291A (en) * 1990-11-27 1992-07-16 Matsushita Electric Works Ltd Inner layer material
JP2002036255A (en) * 2000-07-26 2002-02-05 Matsushita Electric Works Ltd Method and apparatus for plasma treatment
JP2006332255A (en) * 2005-05-25 2006-12-07 Alps Electric Co Ltd Electronic circuit unit and its manufacturing method
JP2009099661A (en) * 2007-10-15 2009-05-07 Shinko Electric Ind Co Ltd Method of segmenting wiring board, and board for package
JP2010129722A (en) * 2008-11-27 2010-06-10 Nitto Denko Corp Device and method for forming hole

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62163390A (en) * 1986-01-14 1987-07-20 松下電工株式会社 External work of printed board
JPH04196291A (en) * 1990-11-27 1992-07-16 Matsushita Electric Works Ltd Inner layer material
JP2002036255A (en) * 2000-07-26 2002-02-05 Matsushita Electric Works Ltd Method and apparatus for plasma treatment
JP2006332255A (en) * 2005-05-25 2006-12-07 Alps Electric Co Ltd Electronic circuit unit and its manufacturing method
JP2009099661A (en) * 2007-10-15 2009-05-07 Shinko Electric Ind Co Ltd Method of segmenting wiring board, and board for package
JP2010129722A (en) * 2008-11-27 2010-06-10 Nitto Denko Corp Device and method for forming hole

Similar Documents

Publication Publication Date Title
US11152149B2 (en) Electronic component
US7341890B2 (en) Circuit board with built-in electronic component and method for manufacturing the same
JP6627819B2 (en) Electronic component and method of manufacturing the same
JPH08203737A (en) Coil component
WO2019107131A1 (en) Multilayer substrate, mounting structure for multilayer substrate, method for manufacturing multilayer substrate, and method for manufacturing electronic apparatus
JP6673304B2 (en) Multilayer board
JP5715237B2 (en) Flexible multilayer board
JP6519714B2 (en) Resin multilayer substrate, transmission line, module and method of manufacturing module
WO2018211883A1 (en) Method for manufacturing resin multilayer substrate, resin multilayer substrate, and mounting structure of resin multilayer substrate
WO2018163859A1 (en) Multi-layer substrate, electronic apparatus, and method for producing multi-layer substrate
US20190228900A1 (en) Multilayer board and manufacturing method thereof
WO2019230524A1 (en) Resin multilayer substrate and electronic device
JP4330850B2 (en) Thin coil component manufacturing method, thin coil component, and circuit device using the same
WO2019087753A1 (en) Interposer and electronic device
WO2020203724A1 (en) Resin multilayer substrate and method for producing resin multilayer substrate
WO2017164267A1 (en) Component mounting board
WO2018030262A1 (en) Method for manufacturing module component
JP7095739B2 (en) Manufacturing method of electric element
WO2010125858A1 (en) Multilayered resin circuit board, and manufacturing method of multilayered resin circuit board
JP2011049379A (en) Electronic component and method of manufacturing the same
WO2017150361A1 (en) Resin substrate
JPH02164096A (en) Multilayer electronic circuit board and its manufacture
US11445618B2 (en) Flexible circuit board and method for manufacturing same
WO2011086797A1 (en) Method of manufacturing substrate with built-in capacitor
JP2023058930A (en) Laminated inductor

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18802629

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18802629

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP