WO2018205556A1 - 像素电路及其驱动方法、显示面板 - Google Patents

像素电路及其驱动方法、显示面板 Download PDF

Info

Publication number
WO2018205556A1
WO2018205556A1 PCT/CN2017/112907 CN2017112907W WO2018205556A1 WO 2018205556 A1 WO2018205556 A1 WO 2018205556A1 CN 2017112907 W CN2017112907 W CN 2017112907W WO 2018205556 A1 WO2018205556 A1 WO 2018205556A1
Authority
WO
WIPO (PCT)
Prior art keywords
transistor
circuit
electrically connected
capacitor
organic light
Prior art date
Application number
PCT/CN2017/112907
Other languages
English (en)
French (fr)
Inventor
林奕呈
李全虎
王雨
盖翠丽
朱明毅
黄建邦
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/780,454 priority Critical patent/US10622424B2/en
Priority to EP17898331.8A priority patent/EP3624101B1/en
Priority to JP2018547427A priority patent/JP7025341B2/ja
Publication of WO2018205556A1 publication Critical patent/WO2018205556A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0814—Several active elements per pixel in active matrix panels used for selection purposes, e.g. logical AND for partial update
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0252—Improving the response speed
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • Embodiments of the present disclosure relate to a pixel circuit and a driving method thereof, and a display panel.
  • OLED display devices are gradually gaining people's advantages due to their wide viewing angle, high contrast ratio, fast response speed, higher light-emitting brightness and lower driving voltage than inorganic light-emitting display devices. Wide attention.
  • the organic light emitting diode display device in order to make the display screen less susceptible to component aging, external compensation is often required.
  • the thin film transistor or organic light emission can be known.
  • the degree of aging of the diode in turn, can be used to calculate the corresponding data signal correction value.
  • An embodiment of the present disclosure provides a pixel circuit including a first selection circuit, a first driving circuit, a first capacitor, a first sensing circuit, a first organic light emitting element, a second capacitor, and a capacitance control circuit .
  • the first selection circuit and the first capacitor are electrically connected and the first selection circuit and the first capacitor are configured to control the first driving circuit
  • the first driving circuit is electrically connected to the first organic light emitting element and configured to drive the first organic light emitting element
  • a sensing circuit is electrically connected to the first driving circuit and the first organic light emitting element and configured to sense the first driving circuit or the first organic light emitting element
  • the capacitance control circuit is configured to connect the first capacitor and the second capacitor in parallel or disconnected from each other open.
  • the first capacitor is electrically connected to the first sensing circuit.
  • the pixel circuit further includes a second selection circuit, a second driving circuit, and a second organic light emitting element, wherein the second selection circuit and the second capacitance are configured as The second driving circuit is controlled, the second driving circuit being electrically connected to the second organic light emitting element and configured to drive the second organic light emitting element.
  • the pixel circuit further includes And a second sensing circuit electrically coupled to the second driving circuit and the second organic light emitting element and configured to sense the second driving circuit or the second organic light emitting element.
  • the pixel circuit further includes a first control circuit and a second control circuit, the first control circuit configured to control whether the first driving circuit and the first power source The terminal is electrically connected, and the second control circuit is configured to control whether the second driving circuit is electrically connected to the first power terminal.
  • the pixel circuit further includes a first node and a second node; the first driving circuit includes a first transistor; and the first selection circuit includes a second transistor;
  • the first sensing circuit includes a third transistor; the capacitance control circuit includes a fourth transistor; a first end of the first transistor is configured to be electrically connected to the first power terminal, and the first transistor is The second end is electrically connected to the first node, the control end of the first transistor is electrically connected to the second node; the first end of the second transistor is configured to be electrically connected to the first data line, and the second transistor is The second end is electrically connected to the second node; the first end of the third transistor is electrically connected to the first node, and the second end of the third transistor is configured to be electrically connected to the first monitoring line; a first end of the transistor is electrically connected to the second node, a second end of the fourth transistor is electrically connected to a first end of the second capacitor; and a second
  • the pixel circuit further includes a first node and a second node;
  • the first driving circuit includes a first transistor; and the first selection circuit includes a second transistor;
  • the first sensing circuit includes a third transistor;
  • the capacitance control circuit includes a fourth transistor and a fifth transistor; a first end of the first transistor is configured to be electrically connected to the first power terminal, the first a second end of the transistor is electrically connected to the first node, a control end of the first transistor is electrically connected to the second node;
  • a first end of the second transistor is configured to be electrically connected to the first data line, the a second end of the second transistor is electrically connected to the second node;
  • a first end of the third transistor is electrically connected to the first node, and a second end of the third transistor is configured to be electrically connected to the first monitoring line;
  • a first end of the fourth transistor is electrically connected to the second node, a second end of the fourth transistor is electrically connected to the second node,
  • the pixel circuit further includes a third node and a fourth node
  • the second driving circuit includes a sixth transistor
  • the second selection circuit includes a seventh transistor
  • the first end of the sixth transistor is configured to be electrically connected to the first power terminal, the second end of the sixth transistor is electrically connected to the third node, and the control end of the sixth transistor is electrically connected to the fourth
  • a first end of the seventh transistor is configured to be electrically connected to the second data line, a second end of the seventh transistor is electrically connected to the fourth node
  • a first end of the second capacitor is electrically connected To the fourth node, the second end of the second capacitor is electrically connected to the third node
  • the first end of the second organic light emitting element is electrically connected to the third node
  • the second organic A second end of the light emitting element is configured to be electrically connected to the second power end.
  • the second sensing circuit includes an eighth transistor, and the first end of the eighth transistor is electrically connected to the third node, the eighth transistor The second end is configured to be electrically connected to the second monitoring line.
  • the first control circuit includes a ninth transistor; the second control circuit includes a tenth transistor; and the first end of the ninth transistor is electrically connected to the a first end of the first transistor, the second end of the ninth transistor is configured to be electrically connected to the first power terminal; a first end of the tenth transistor is electrically connected to the first of the sixth transistor The second end of the tenth transistor is configured to be electrically connected to the first power terminal.
  • a control terminal of the fourth transistor and a control terminal of the fifth transistor are configured to be electrically connected to the same signal line.
  • the second power terminal is a ground terminal.
  • the first organic light emitting element and the second organic light emitting element emit light of different colors.
  • Another embodiment of the present disclosure provides a display panel including the pixel circuit described above.
  • a further embodiment of the present disclosure provides a driving method of a pixel circuit, the driving method of the pixel circuit includes: in a first monitoring phase, causing a capacitance control circuit to convert a first capacitor and a second capacitor This is connected in parallel and causes the first sensing circuit to monitor the first drive circuit or the first organic light emitting element.
  • the driving method further includes: in a light emitting stage, causing the capacitance control circuit to disconnect the first capacitor and the second capacitor from each other And causing the driving circuit to drive the first organic light emitting element to operate.
  • the pixel circuit further includes a second selection circuit, a second driving circuit, and a second organic light emitting element, the second selection circuit and the The second capacitor is configured to control the second driving circuit, the second driving circuit is electrically connected to the second organic light emitting element and configured to drive the second organic light emitting element; the driving method further includes: a monitoring phase, wherein the capacitance control circuit connects the first capacitor and the second capacitor in parallel with each other, and causes the first sensing circuit to perform the second driving circuit or the second organic light emitting element monitor.
  • FIG. 1A is a schematic block diagram of a pixel circuit according to an embodiment of the present disclosure
  • FIG. 1B is an exemplary circuit diagram of the pixel circuit illustrated in FIG. 1A; FIG.
  • FIG. 2A is an equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit illustrated in FIG. 1B in an emission phase;
  • 2B is an equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 1B in a first monitoring stage;
  • 2C is another equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 1B in a first monitoring stage;
  • 2D is a graph of a sensed voltage value acquired by a sensing circuit as a function of time
  • FIG. 3A is a schematic block diagram of another pixel circuit according to an embodiment of the present disclosure.
  • FIG. 3B is an exemplary circuit diagram of the pixel circuit illustrated in FIG. 3A; FIG.
  • 4A is an equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit illustrated in FIG. 3B in an emission stage;
  • 4B is an equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 3B in a first monitoring stage;
  • 4C is another equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 3B in a first monitoring stage;
  • 4D is still another equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 3B in a first monitoring stage;
  • 5A is an equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 3B in a second monitoring stage;
  • 5B is another equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 3B in a second monitoring stage;
  • 5C is still another equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 3B in the second monitoring stage;
  • FIG. 6A is a schematic block diagram of still another pixel circuit according to an embodiment of the present disclosure.
  • FIG. 6B is an exemplary circuit diagram of the pixel circuit illustrated in FIG. 6A;
  • FIG. 7A is a schematic block diagram of still another pixel circuit according to an embodiment of the present disclosure.
  • FIG. 7B is an exemplary circuit diagram of the pixel circuit illustrated in FIG. 7A;
  • FIG. 8A is an equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit illustrated in FIG. 7B in an emission stage;
  • 8B is an equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 7B in a first monitoring stage
  • 8C is another equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 7B in a first monitoring stage;
  • 8D is still another equivalent circuit diagram of an exemplary circuit diagram of the pixel circuit shown in FIG. 7B in the first monitoring stage;
  • 9A is an equivalent circuit diagram of a first monitoring method of the exemplary circuit diagram of the pixel circuit shown in FIG. 7B in the second monitoring stage;
  • 9B is another equivalent circuit diagram of the first monitoring method of the exemplary circuit diagram of the pixel circuit shown in FIG. 7B in the second monitoring stage;
  • 9C is still another equivalent circuit diagram of the first monitoring method of the exemplary circuit diagram of the pixel circuit shown in FIG. 7B in the second monitoring stage;
  • FIG. 10 is a schematic block diagram of a display panel according to another embodiment of the present disclosure.
  • FIG. 11A is an exemplary flowchart of a driving method of a pixel circuit according to still another embodiment of the present disclosure.
  • FIG. 11B is an exemplary timing chart of the driving method illustrated in FIG. 11A;
  • FIG. 12A is an exemplary flowchart of another driving method of a pixel circuit according to still another embodiment of the present disclosure.
  • FIG. 12B is an exemplary timing chart of the driving method illustrated in FIG. 12A;
  • FIG. 13A is an exemplary flowchart of a driving method of still another pixel circuit according to still another embodiment of the present disclosure.
  • FIG. 13B is an exemplary timing chart of the driving method illustrated in FIG. 13A;
  • FIG. 14 is an exemplary circuit diagram of still another pixel circuit according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a pixel circuit, a driving method thereof, and a display panel, which accelerate the charging speed in the sensing phase, improve the accuracy of the sensing value, and thereby improve the compensation effect of the pixel circuit, thereby improving
  • the display uniformity of the display panel improves the display effect.
  • At least one embodiment of the present disclosure provides a pixel circuit including a first selection circuit, a first driving circuit, a first capacitor, a first sensing circuit, a first organic light emitting element, a second capacitor, and a capacitance control Circuit.
  • the first selection circuit and the first capacitor are configured to control the first driving circuit
  • the first driving circuit is electrically connected to the first organic light emitting element and configured to drive the first organic light emitting element
  • An organic light emitting element is electrically connected and configured to sense the first driving circuit or the first organic light emitting element
  • the capacitance control circuit is configured to connect the first capacitor and the second capacitor in parallel or disconnected from each other.
  • FIG. 1A is a schematic block diagram of a pixel circuit according to an embodiment of the present disclosure.
  • the pixel circuit may include a first selection circuit 102, a first driving circuit 101, a first capacitor 121, and a first A sensing circuit 103, a first organic light emitting element 131, a second capacitor 122, and a capacitance control circuit 123.
  • the specific forms of the first selection circuit 102, the first driving circuit 101, the first capacitor 121, the first sensing circuit 103, the first organic light emitting element 131, the second capacitor 122, and the capacitance control circuit 123 may be according to actual application requirements. The setting is made, and the present disclosure does not specifically limit this.
  • a pixel circuit provided by an embodiment of the present disclosure may be implemented as a circuit diagram as shown in FIG. 1B.
  • the first driving circuit 101 may be electrically connected to the first organic light emitting element 131 (for example, EL1 shown in FIG. 1B) and configured to drive the first organic light emitting element 131.
  • the first driving circuit 101 may include a first transistor T1, and the first transistor T1 may include a first end, a second end, and a control end, and the control terminal receives an on signal (eg, a high level signal)
  • the first end and the second end can be made conductive.
  • the pixel circuit further includes a first node 151 and a second node 152, the first end of the first transistor T1 may be configured to be electrically connected to the first power terminal OVDD, and the second end of the first transistor T1 may be electrically connected to the first At node 151, the control terminal of the first transistor T1 can be electrically coupled to the second node 152.
  • the first power terminal OVDD may be a voltage source to output a constant positive voltage, or may be a current source or the like.
  • the first end of the first organic light emitting element 131 may be electrically connected to the first node 151, and the second end of the first organic light emitting element 131 may be configured to be electrically connected to the second power end.
  • VSS the first organic light emitting element 131 may be an organic light emitting diode; the second power supply terminal VSS may be a ground terminal.
  • an electrical signal eg, a current signal
  • EL1 the first organic light emitting element 131 (eg, as shown in FIG. 1B) EL1) illuminates.
  • the first selection circuit 102 and the first capacitor 121 may be configured to control the first drive circuit 101.
  • the first selection circuit 102 can include a second transistor T2; the first end of the second transistor T2 can be configured to be electrically coupled to the first data line DATA1, and the second end of the second transistor T2 can be electrically coupled to the second node 152 .
  • the control terminal of the second transistor T2 receives the on signal, the electrical signal originating from the first data line DATA1 is transmitted to the control terminal of the first transistor T1 via the second transistor T2, and is stored in the first capacitor.
  • the voltage of the second node 152 is changed, whereby the first transistor T1 can then be turned on as needed to drive the first organic light emitting element EL1.
  • the first end of the first capacitor 121 can be electrically connected to the first node 151, and the second end of the first capacitor 121 can be electrically connected to the second node 152.
  • the capacitance control circuit 123 may be configured to connect or disconnect the first capacitor 121 and the second capacitor 122 from each other.
  • the capacitance control circuit 123 may include a fourth transistor T4 and a fifth transistor T5; a first end of the fourth transistor T4 may be electrically connected to the second node 152, and a second end of the fourth transistor T4 may be electrically connected to the second capacitor
  • the first end of the fifth transistor T5 can be electrically connected to the first node 151, and the second end of the fifth transistor T5 can be electrically connected to the second end of the second capacitor 122.
  • the control terminal of the fourth transistor T4 and the control terminal of the fifth transistor T5 may be configured to be electrically connected to the same signal line or different signal lines.
  • the control terminal of the fourth transistor T4 and the control terminal of the fifth transistor T5 receive an on signal (eg, a high level signal)
  • the first end and the second end of the fourth transistor T4 are turned on
  • the first end and the second end of the fifth transistor T5 are turned on
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be in parallel with each other.
  • the fourth transistor T4 and the control terminal of the fifth transistor T5 receive a turn-off signal (for example, a low-level signal)
  • the fourth transistor T4 and the fifth transistor T5 are both turned off (off).
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be disconnected from each other.
  • the first sensing circuit 103 may be electrically connected to the first driving circuit 101 and the first organic light emitting element 131 and configured to sense the first driving circuit 101 or the first organic light emitting element 131.
  • the first sensing circuit 103 may include a third transistor T3; the first end of the third transistor T3 may be electrically connected to the first node 151, and the second end of the third transistor T3 may be configured to be electrically connected to the first monitoring line SENSE1.
  • the third transistor T3 is turned on, an electrical signal output by the pixel circuit may be acquired via the first monitor line SENSE1, or An electrical signal is input to the pixel circuit via the first monitor line SENSE1.
  • the control terminal of the fourth transistor T4 and the control terminal of the fifth transistor T5 receive a turn-off signal (eg, a low level signal), and the fourth transistor T4 and the fifth transistor T5 are in a closed state, as shown in FIG. 1B.
  • the circuit diagram can be equivalent to the circuit diagram shown in FIG. 2A.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be disconnected from each other; since the monitoring may not be needed at this time, the control terminal of the third transistor T3 may receive a shutdown signal (eg, a low level signal), thereby The third transistor T3 is in a closed state, or the third transistor T3 may be in an on state; a low level voltage is applied to the first monitor line SENSE1; and an on signal is received at the control terminal of the second transistor T2 (eg a high level signal) and the first end receives the data signal to charge the first capacitor C1, boosting the voltage of the second node 152, so that the first transistor T1 is in an on state, and the pixel circuit shown in FIG. 1B can
  • the first organic light emitting element 131 is driven to emit light normally, that is, the pixel circuit shown in FIG. 1B is in the light emitting phase under the above conditions.
  • the first driving circuit 101 and/or the first organic light emitting element 131 can be monitored.
  • the control terminals of the fourth transistor T4 and the fifth transistor T5 receive the on-signal, and the circuit diagram shown in FIG. 1B can be equivalent to the circuit diagram shown in FIG. 2B.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be connected in parallel with each other. Therefore, the circuit diagram shown in FIG. 2B can be further equivalent to the circuit diagram shown in FIG. 2C, thereby controlling the first driving circuit 101.
  • the capacitance value is increased from C1 to C1+C2.
  • the control signal is applied such that the second transistor T2 and the third transistor T3 are turned on, since the electrical signal (ie, the data signal, eg, the reference data signal) originating from the first data line DATA1 is via
  • the turned-on second transistor T2 charges the first capacitor C1 and the second capacitor C2 connected in parallel, whereby the first transistor T1 can be in an on state, so that the driving current can flow from the first power terminal OVDD through the first transistor T1.
  • the first organic light emitting element EL1, and the driving current can be acquired by the first sensing circuit 103 (for example, outputted to the first monitoring line SENSE1 via the turned-on third transistor T3), whereby the first sensing circuit 103 It may be used to monitor an electrical signal via the first driving circuit 101 (eg, the first transistor T1) to obtain a parameter of the first driving circuit 101 (eg, a threshold voltage of the first transistor T1), such as by the first driving circuit 101.
  • the parameter determines the compensation value for the data signal.
  • a conduction signal for example, a high level signal
  • a control end of the second transistor T2 are received at the control terminal of the third transistor T3.
  • Receiving a shutdown signal eg, a low level signal
  • the third transistor T3 is in an on state
  • the first transistor T1 and the second transistor T2 are in a closed state
  • the fourth transistor T4 and the fifth transistor T5 may be turned off as needed.
  • the parameter of the first organic light-emitting element 131 (for example, the internal resistance of the first organic light-emitting element 131) is obtained, for example, by which the compensation value for the drive current can be determined.
  • FIG. 2D is a graph of the sensed voltage value acquired by the sensing circuit as a function of time.
  • the capacitance value of the control driving circuit is increased from 0.2 pF to 1 pF
  • the charging speed in the sensing phase is shown.
  • the increase is made and the sensed value is more accurate (the sensed voltage value obtained by the sensing circuit is increased from 3.74V to 4.8V).
  • the capacitance value for controlling the first driving circuit 101 is increased to C1+C2 in the first monitoring stage, the charging speed and the improvement in the sensing phase are accelerated.
  • the accuracy of the sensed value acquired by the first sensing circuit 103 and thus can provide a more accurate electrical signal when the pixel circuit compensates, thereby improving the compensation effect of the pixel circuit.
  • each display period of the display panel including a pixel circuit provided by an embodiment of the present disclosure may include a first monitoring phase and a display phase, and the first monitoring phase of each display cycle may be located before the display phase, and thus may be timely Sensing the aging condition of the first driving circuit 101 and/or the first organic light emitting element 131, and thus the pixel circuit can be compensated using the sensing value updated in each display period, thereby obtaining a better pixel circuit. Compensation effect.
  • the sensing value may be acquired using the first sensing circuit 103 only at an initial stage after the display panel including the pixel circuit is enabled each time, and the pixel circuit is compensated using the acquired sensing value, thereby In the case of good pixel circuit compensation, power consumption can also be saved.
  • FIG. 3A is a schematic block diagram of another pixel circuit according to an embodiment of the present disclosure.
  • the pixel circuit shown in FIG. 3A may further include a second selection circuit 107, The second driving circuit 106 and the second organic light emitting element 132.
  • the specific forms of the second selection circuit 107, the second driving circuit 106, and the second organic light-emitting element 132 may be set according to actual application requirements, and the disclosure does not specifically limit this.
  • one embodiment of the present disclosure provides A pixel circuit can be implemented as a circuit diagram as shown in FIG. 3B.
  • the second driving circuit 106 and the second organic light emitting element 132 may be electrically connected and configured to drive the second organic light emitting element 132 (eg, EL2 shown in FIG. 3B).
  • the second driving circuit 106 may include a sixth transistor T6.
  • the pixel circuit may further include a third node 153 and a fourth node 154, the first end of the sixth transistor T6 may be configured to be electrically connected to the first power terminal OVDD, and the second end of the sixth transistor T6 may be electrically connected to the The three nodes 153, the control terminal of the sixth transistor T6, can be electrically connected to the fourth node 154.
  • the first end of the second organic light emitting element 132 may be electrically connected to the third node 153, and the second end of the second organic light emitting element 132 may be configured to be electrically connected to the second power end. VSS.
  • the second organic light-emitting element 132 and the first organic light-emitting element 131 may be independently driven and may emit light of the same color or different colors according to actual application requirements, which is not specifically limited in the embodiment of the present disclosure.
  • an electrical signal eg, a current signal
  • a current signal originating from the first power terminal OVDD can drive the second organic light emitting element 132 to emit light.
  • the second selection circuit 107 and the second capacitor 122 may be configured to control the second drive circuit 106.
  • the second selection circuit 107 may include a seventh transistor T7; the first end of the seventh transistor T7 may be configured to be electrically connected to the second data line DATA2, and the second end of the seventh transistor T7 may be electrically connected to the fourth node 154 .
  • the first data line DATA1 and the second data line DATA2 may be two different data lines.
  • the seventh transistor T7 receives the on signal
  • the electric signal derived from the second data line DATA2 is transmitted to the control terminal of the sixth transistor T6 via the seventh transistor T7, and is stored in the second capacitor C2, and is changed.
  • the first end of the second capacitor 122 can be electrically connected to the fourth node 154, and the second end of the second capacitor 122 can be electrically connected to the third node 153.
  • the control terminal of the fourth transistor T4 and the control terminal of the fifth transistor T5 receive the turn-off signal, and the fourth transistor T4 and the fifth transistor T5 are in the off state, and the circuit diagram shown in FIG. 3B can be equivalent to The circuit diagram shown in Fig. 4A.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be disconnected from each other; since monitoring is not required at this time, the control terminal of the third transistor T3 receives a shutdown signal (eg, a low level signal), thereby The transistor T3 is in a closed state, or the third transistor T3 may be in an on state; the first monitoring A low level voltage is applied to the line SENSE1; similarly to the above description, according to the signal on the first signal line DATA1, the second transistor T2 and the first capacitor C1 can cooperate to control the first transistor T1; independently, according to the second The signal on the signal line DATA2, the seventh transistor T7 and the second capacitor C2 can cooperate to control the sixth transistor T6, whereby the pixel circuit shown in FIG. 3B can drive the first organic light emitting element 131 and the second organic light emitting element 132 to be normal. Glowing.
  • a shutdown signal eg, a low level signal
  • the control terminals of the fourth transistor T4 and the fifth transistor T5 receive a turn-on signal, and the fourth transistor T4
  • the fifth transistor T5 is in an on state
  • the circuit diagram shown in FIG. 3B can be equivalent to the circuit diagram shown in FIG. 4B.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be connected in parallel with each other, and further, the first end of the sixth transistor T6 is disconnected from the first power supply terminal OVDD (for example, suspended), and thus, as shown in FIG. 4B
  • the circuit diagram can be further equivalent to the circuit diagrams shown in FIGS. 4C and 4D, whereby the capacitance value for controlling the first driving circuit 101 is increased from C1 to C1+C2.
  • the first driving circuit 101 and/or the first organic light emitting element 131 can be monitored.
  • another pixel circuit provided by an embodiment of the present disclosure can not only speed up the charging speed in the sensing phase, but also improve the accuracy of the sensing value acquired by the first sensing circuit 103 and the compensation effect of the pixel circuit.
  • the capacitance of the pixels adjacent thereto can be shared to increase the capacitance and enhance the effect of pixel circuit compensation. Since it is not necessary to additionally provide a capacitor connected in parallel with each pixel, or a capacitor having a larger capacitance value, the manufacturing cost can be reduced and the aperture ratio of the display panel including the pixel circuit can be increased.
  • the control terminals of the fourth transistor T4 and the fifth transistor T5 receive the turn-on signal.
  • the fourth transistor T4 and the fifth transistor T5 are in an on state, and the circuit diagram shown in FIG. 3B can be equivalent to the circuit diagram shown in FIG. 5A.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be connected in parallel with each other, and further, the first end of the first transistor T1 is disconnected from the first power terminal OVDD (for example, suspended), and thus, as shown in FIG. 5A
  • the circuit diagram can be further equivalent to the circuit diagrams shown in FIGS.
  • the capacitance value for controlling the second drive circuit 106 is increased from C1 to C1+C2.
  • the second drive circuit 106 can be monitored.
  • the second organic light emitting device 132 can be monitored. The specific monitoring method can be repeated with reference to the monitoring method of the first organic organic light emitting device 131 of the pixel circuit of FIG. 1B. I won't go into details here.
  • the third transistor T3 may be placed in an on state, an electrical signal is input to the first organic light emitting element 131 and the second organic light emitting element 132 through the first sensing circuit 103, and thus the first organic light emitting element may be monitored via the first organic light emitting element
  • the electrical signals of the 131 and second organic light emitting elements 132 can thus obtain information of the electrical signals including the second organic light emitting elements 132, whereby monitoring of the second organic light emitting elements 132 can be achieved, and the second organic light emitting elements 132 can be obtained.
  • the parameter for example by which the compensation value for the drive current can be determined. Since the parameter monitored by the method also includes the information of the first organic light emitting element 131, the compensation effect of the second organic light emitting element 132 may be affected.
  • the charging speed in the sensing phase can be accelerated not only without additionally providing a capacitor connected in parallel with each pixel or a capacitor having a larger capacitance value.
  • the accuracy of the sensing value acquired by the first sensing circuit 103 and the compensation effect of the pixel circuit are improved, and only one sensing circuit can be disposed for two pixels, thereby further reducing manufacturing cost and increasing the inclusion of the pixel.
  • the aperture ratio of the display panel of the circuit is provided by an embodiment of the present disclosure.
  • FIG. 6A is a schematic block diagram of still another pixel circuit provided by an embodiment of the present disclosure.
  • the pixel circuit shown in FIG. 6A may further include a second sensing circuit 108 compared to the pixel circuit illustrated in FIG. 3A.
  • the specific form of the second sensing circuit 108 can be set according to actual application requirements, and the disclosure does not specifically limit this.
  • a pixel circuit provided by an embodiment of the present disclosure may be implemented as a circuit diagram as shown in FIG. 6B.
  • the second sensing circuit 108 and the second driving circuit 106 and the second organic light emitting element 132 may be electrically connected and configured to sense the second driving circuit 106 or the second organic light emitting element 132.
  • the second sensing circuit 108 can include an eighth transistor T8, the first end of the eighth transistor T8 can be electrically connected to the third node 153, and the second end of the eighth transistor T8 can be configured to be electrically connected to the second monitoring line SENSE2.
  • FIG. 7A is a schematic block diagram of still another pixel circuit according to an embodiment of the present disclosure.
  • the pixel circuit shown in FIG. 7A may further include a first control circuit 109 and a Two control circuits 110.
  • the specific forms of the first control circuit 109 and the second control circuit 110 may be set according to actual application requirements, and the disclosure does not specifically limit this.
  • a pixel circuit provided by an embodiment of the present disclosure may be implemented as a circuit diagram as shown in FIG. 7B.
  • the first control circuit 109 may be configured to control whether the first driving circuit 101 is electrically connected to the first power supply terminal OVDD, and the second control circuit 110 is configured to control whether the second driving circuit 106 is controlled. It is electrically connected to the first power terminal OVDD.
  • the first control circuit 109 may include a ninth transistor T9; the second control circuit 110 may include a tenth transistor T10; the first end of the ninth transistor T9 may be electrically connected to the first end of the first transistor T1, the ninth transistor The second end of the T9 may be configured to be electrically connected to the first power terminal OVDD; the first end of the tenth transistor T10 may be electrically connected to the first end of the sixth transistor T6, and the second end of the tenth transistor T10 may be configured to be electrically Connect to the first power supply terminal OVDD.
  • the control terminal of the first control circuit 109 / the second control circuit 110 receives the on signal, the electrical connection of the first driver circuit 101 / the second control circuit 110 to the first power terminal OVDD can be achieved.
  • the control terminals of the fourth transistor T4 and the fifth transistor T5 receive the turn-off signal, and thus the fourth transistor T4 and the fifth transistor T5 are in an off state; the second transistor T2, the seventh transistor T7, and the ninth The control terminals of the transistors T9 to the tenth transistor T10 receive the on-signal, and the second transistor T2, the seventh transistor T7, and the ninth transistor T9 to the tenth transistor T10 are in an on state.
  • the third transistor T3 and the eighth transistor T8 may be in a closed state, or the third transistor T3 and the eighth transistor T8 may be in an on state.
  • a low level voltage is applied to the first monitor line SENSE1 and the second monitor line SENSE2; similar to the above description, according to the signal on the first signal line DATA1, the second transistor T2 and the first capacitor C1 can cooperate to control the first transistor T1. Independently of this, according to the signal on the second signal line DATA2, the seventh transistor T7 and the second capacitor C2 can cooperate to control the sixth transistor T6, whereby the circuit diagram shown in FIG. 7B can be equivalent to that shown in FIG. 8A. Circuit diagram.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be disconnected from each other, and the pixel circuit shown in FIG. 7B can drive the first organic light-emitting element 131 and the second organic light-emitting element 132 to emit light normally.
  • the control terminals of the fourth transistor T4 and the fifth transistor T5 receive the on signal
  • the fourth transistor T4 to the fifth transistor T5 are in an on state
  • the ninth transistor T9 is in an on state.
  • the tenth transistor T10 is in a closed state
  • the circuit diagram shown in FIG. 7B can be equivalent to the circuit diagram shown in FIG. 8B.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be connected in parallel with each other. Therefore, the circuit diagram shown in FIG. 8B can be further equivalent to the circuit diagrams shown in FIGS.
  • the capacitance value of the driving circuit 101 is increased from C1 to C1+C2, thereby speeding up the charging speed in the sensing phase and improving the obtained by the first sensing circuit 103.
  • the accuracy of the sensed value is taken, and thus a more accurate electrical signal can be provided when the pixel circuit compensates, thereby improving the compensation effect of the pixel circuit.
  • the control terminals of the fourth transistor T4 and the fifth transistor T5 receive the on signal
  • the fourth transistor T4 to the fifth transistor T5 are in an on state
  • the tenth transistor T10 is in a conducting state.
  • the ninth transistor T9 is in the off state
  • the circuit diagram shown in FIG. 7B can be equivalent to the circuit diagram shown in FIG. 9A.
  • the capacitance control circuit 123 causes the first capacitor 121 and the second capacitor 122 to be connected in parallel with each other. Therefore, the circuit diagram shown in FIG. 9A can be further equivalent to the circuit diagrams shown in FIGS.
  • the second driving circuit 106 and/or the second organic light emitting element 132 can also be monitored by using the first sensing circuit 103. For details, refer to the embodiment shown in FIG. 5A to FIG. 5C. No longer.
  • the manner of setting the capacitance control circuit 123 is not limited to the form including two transistors (for example, the fourth transistor T4 and the fifth transistor T5) shown in the above embodiment (for example, the embodiment shown in FIG. 7B).
  • the capacitance control circuit 123 may further include a transistor according to actual application requirements; for example, the capacitance control circuit 123 may include only the fourth transistor T4.
  • the first end of the second capacitor C2 is electrically connected to the second end of the fourth transistor T4; the second of the second capacitor C2 is compared to the pixel circuit shown in FIG.
  • the terminal is electrically connected to the first node and the third node; the first end of the first capacitor C1 is electrically connected to the first node and the third node, and the second end of the first capacitor C1 is electrically connected to the second node.
  • the capacitance control circuit 123 since the capacitance control circuit 123 includes only one transistor, the structure of the pixel circuit can be simplified, and the cost of the pixel circuit can be reduced.
  • FIG. 10 is a schematic block diagram of a display panel according to another embodiment of the present disclosure.
  • the display panel includes a sub-pixel array including a plurality of sub-pixels, each of the sub-pixels may include a pixel circuit according to at least one embodiment of the present disclosure, or two adjacent sub-pixels may include at least one embodiment of the present disclosure.
  • the transistor used in the embodiment of the present disclosure may be a thin film transistor or a field effect transistor or other switching devices having the same characteristics.
  • the source and drain of the transistor used here may be structurally symmetrical, so that the source and the drain may be structurally indistinguishable.
  • the first end of all or part of the transistor in the embodiment of the present disclosure is The second end is interchangeable as needed.
  • the first end of the transistor of the embodiment of the present disclosure may be a source, and the second end may be a drain; or the first end of the transistor is a drain and the second end is a source.
  • the transistor can be divided into N-type and P-type transistors according to the characteristics of the transistor.
  • the embodiment of the present disclosure does not limit the type of the transistor, and those skilled in the art can implement the N-type and/or P-type transistor according to actual needs. Embodiments disclosed.
  • Embodiments of the present disclosure include, but are not limited to, the pixel circuits shown in FIGS. 1A to 9C described above.
  • the pixel circuit may further include other sub-circuits, such as a reset circuit for gate reset of the first transistor, or for example, Including internal compensation circuits, etc., will not be described here.
  • the organic light emitting element of the embodiment of the present disclosure is, for example, an organic light emitting diode, which may be of various types, such as a top emission type or a bottom emission type, and may be a polymer type or a small molecule type or the like.
  • Still another embodiment of the present disclosure provides a driving method of a pixel circuit, the driving method of the pixel circuit includes: in a first monitoring phase, causing a capacitance control circuit to connect the first capacitor and the second capacitor in parallel with each other, and making the first The sensing circuit monitors the first driving circuit or the first organic light emitting element.
  • FIG. 11A is an exemplary flowchart of a driving method of a pixel circuit according to still another embodiment of the present disclosure.
  • the driving method of the pixel circuit may include the following steps:
  • Step S110 In the first monitoring phase M1, causing the capacitance control circuit to connect the first capacitor and the second capacitor in parallel with each other, and causing the first sensing circuit to monitor the first driving circuit or the first organic light emitting element;
  • Step S120 In the light emitting stage EL, the capacitance control circuit disconnects the first capacitor and the second capacitor from each other, and causes the driving circuit to drive the first organic light emitting element to operate.
  • FIG. 11B is an exemplary timing chart of the driving method illustrated in FIG. 11A.
  • the control terminals of the second transistor T2-the fifth transistor T5 shown in FIG. 1B can be represented by G2-G5, respectively.
  • the control terminals G2-G5 of the second transistor T2-the fifth transistor T5 receive a high level signal, and the first signal line DATA1 outputs a high level signal, for example.
  • the first capacitor C1 and the second capacitor C2 are charged, whereby the voltage of the second node 152 rises, so the control terminal of the first transistor T1 also receives a high level signal.
  • the first monitoring line SENSE1 is, for example, in a floating state, and the first power supply terminal OVDD is in a high state. Therefore, in the first monitoring phase M1, the first transistor T1 - the fifth transistor T5 are turned on, and the circuit diagram shown in FIG.
  • the capacitance control circuit will be the first The capacitor and the second capacitor are connected in parallel with each other, and the first sensing circuit can be configured to monitor the first driving circuit.
  • the first monitoring phase M1 the first organic light emitting device can also be monitored, and the specific driving timing chart can be Reference is made to the pixel circuit embodiment and FIG. 11B, and details are not described herein again.
  • the first signal line DATA1 outputs a high level signal, for example, the first capacitor C1 is charged, whereby the voltage of the second node 152 rises, so the control terminal of the first transistor T1 also receives high Level signal.
  • the first monitor line SENSE1 is in a low state, for example, and the first power terminal OVDD is in a high state.
  • the circuit diagram shown in FIG. 1B can be equivalent to the circuit diagram shown in FIG. 2A, that is, The capacitance control circuit disconnects the first capacitor and the second capacitor from each other and causes the driving circuit to drive the first organic light emitting element to operate normally.
  • the capacitance control circuit disconnects the first capacitor and the second capacitor from each other and causes the driving circuit to drive the first organic light emitting element to operate normally.
  • the details of the driving method of the pixel circuit provided by the embodiment of the present disclosure may be referred to the embodiment of the pixel circuit shown in FIG. 1 and FIG. 2, and details are not described herein again.
  • FIG. 12A is an exemplary flowchart of another driving method of a pixel circuit according to still another embodiment of the present disclosure.
  • the driving method of the pixel circuit may include the following steps:
  • Step S210 In the first monitoring phase M1, causing the capacitance control circuit to connect the first capacitor and the second capacitor in parallel with each other, and causing the first sensing circuit to monitor the first driving circuit or the first organic light emitting element;
  • Step S220 In the second monitoring phase M2, the capacitor control circuit is configured to use the first capacitor and the second capacitor.
  • the capacitances are connected in parallel with each other, and cause the first sensing circuit to monitor the second driving circuit or the second organic light emitting element;
  • Step S230 In the light emitting phase EL, the capacitance control circuit disconnects the first capacitor and the second capacitor from each other, and causes the driving circuit to drive the first organic light emitting element and/or the second organic light emitting element to operate.
  • FIG. 12B is an exemplary timing diagram of the driving method illustrated in FIG. 12A.
  • the control terminals of the second transistor T2-the fifth transistor T5 and the seventh transistor T7 shown in FIG. 3B can be represented by G2-G5, G7, respectively.
  • the control terminals G2-G5 of the second to fourth transistors T2 to T5 receive a high level signal and the control terminal of the seventh transistor T7 receives a low power.
  • a flat signal the first signal line DATA1 outputs a high level signal
  • the second signal line DATA2 outputs a low level signal
  • the first capacitor C1 and the second capacitor C2 are charged, whereby the voltage of the second node 152 rises, thus
  • the control terminal of a transistor T1 receives a high level signal.
  • the first end of the sixth transistor T6 is disconnected from the first power supply terminal OVDD.
  • the first monitor line SENSE1 is in a floating state, and the first power terminal OVDD is in a high state. Therefore, in the first monitoring phase M1, the first transistor T1 - the fifth transistor T5 is turned on and the seventh transistor T7 is turned off, and the sixth transistor T6 is turned on, since the first end thereof is disconnected from the first power supply terminal OVDD, so Affecting the monitoring operation, the circuit diagram shown in FIG. 3B can be equivalent to the circuit diagram shown in FIG. 4B to FIG. 4D, that is, the capacitance control circuit connects the first capacitor and the second capacitor in parallel with each other, and can make the first sensing circuit pair The first driving circuit is monitored. In addition, the first organic light emitting element can be monitored in the first monitoring stage M1.
  • the specific driving timing chart can be obtained by referring to the pixel circuit embodiment and FIG. 12B, and details are not described herein again.
  • the control terminals G3-G5, G7 of the third transistor T3 to the fifth transistor T5 and the seventh transistor T7 receive a high level signal and the control of the second transistor T2
  • the terminal G2 receives the low level signal
  • the first signal line DATA1 outputs a low level signal
  • the second signal line DATA2 outputs a high level signal
  • the first capacitor C1 and the second capacitor C2 are charged, thereby the fourth node 154
  • the voltage rises, so the control terminals of the first transistor T1 and the sixth transistor T6 receive a high level signal.
  • the first end of the first transistor T1 is disconnected from the first power supply terminal OVDD.
  • the first monitor line SENSE1 is in a floating state, and the first power terminal OVDD is in a high state. Therefore, in the second monitoring phase M2, the third transistor T3 to the seventh transistor T7 are turned on, The second transistor T2 is turned off, and the first transistor T1 is turned on. Since the first end is disconnected from the first power supply terminal OVDD, the monitoring operation is not affected, and the circuit diagram shown in FIG. 3B can be equivalent to the one shown in FIG. 5A to FIG. 5C.
  • the circuit diagram that is, the capacitance control circuit, may connect the first capacitor and the second capacitor in parallel with each other, and cause the first sensing circuit to be opposite to the second driving circuit, and further, in the second monitoring stage M2, the second organic light emitting element may also be
  • the specific driving timing chart can be obtained by referring to the pixel circuit embodiment and FIG. 12B, and details are not described herein again.
  • the control terminals G2-G3, G7 of the second transistor T2 to the third transistor T3 and the seventh transistor T7 receive a high level signal and the control terminal and the fourth transistor T4
  • the control terminals G4-G5 of the five transistors T5 receive a low level signal
  • the first signal line DATA1 and the second signal line DATA2 output for example, a high level signal
  • the first capacitor C1 and the second capacitor C2 are respectively charged independently, thereby
  • the voltages of the second node 152 and the fourth node 154 are respectively raised according to the data voltages on the data lines DATA1 and DATA2, and thus the control terminals of the first transistor T1 and the sixth transistor T6 also receive a high level signal.
  • the first monitor line SENSE1 is in a low state, and the first power terminal OVDD is in a high state. Therefore, in the light-emitting phase EL, the first transistor T1 to the third transistor T3, the sixth transistor T6 to the seventh transistor T7 are turned on, and the fourth transistor T4 and the fifth transistor T5 are turned off, and the circuit diagram shown in FIG. 3B can be equivalent to The circuit diagram shown in FIG. 4A, that is, the capacitance control circuit disconnects the first capacitor and the second capacitor from each other, and causes the driving circuit to drive the first organic light emitting element and the second organic light emitting element to operate.
  • the details of the driving method of another pixel circuit provided by another embodiment of the present disclosure may be referred to the embodiment of the pixel circuit shown in FIG. 3 to FIG. 5, and details are not described herein again.
  • FIG. 13A is an exemplary flowchart of a driving method of still another pixel circuit according to still another embodiment of the present disclosure.
  • the driving method of the pixel circuit may include the following steps:
  • Step S310 In the first monitoring phase M1, causing the capacitance control circuit to connect the first capacitor and the second capacitor in parallel with each other, and causing the first sensing circuit to monitor the first driving circuit or the first organic light emitting element;
  • Step S320 In the second monitoring phase M2, causing the capacitance control circuit to connect the first capacitor and the second capacitor in parallel with each other, and causing the second sensing circuit to monitor the second driving circuit or the second organic light emitting element;
  • Step S330 In the light emitting stage EL, the capacitance control circuit is configured to use the first capacitor and the second capacitor This is broken and causes the drive circuit to drive the first organic light emitting element and/or the second organic light emitting element to operate.
  • FIG. 13B is an exemplary timing chart of the driving method illustrated in FIG. 13A.
  • the control terminals of the second transistor T2 to the fifth transistor T5 and the seventh transistor T7 to the tenth transistor T10 illustrated in FIG. 7B may be denoted by G2-G5, G7-G10, respectively.
  • the control terminals G2-G5, G9 of the second transistor T2 to the fifth transistor T5 and the ninth transistor T9 receive a high level signal and the seventh transistor T7 to the first
  • the eight transistors T8 and the control terminals G7-G8 and G10 of the tenth transistor T10 receive a low level signal
  • the first signal line DATA1 outputs a high level signal
  • the second signal line DATA2 outputs a low level signal
  • the first capacitor C1 and The second capacitor C2 is charged, whereby the voltage of the second node 152 rises, and thus the control terminals of the first transistor T1 and the sixth transistor T1 receive a high level signal.
  • the first end of the sixth transistor T6 is disconnected from the first power terminal OVDD, the first monitor line SENSE1 is in a floating state, and the first power terminal OVDD is in a high state. Therefore, in the first monitoring phase M1, the first transistor T1 to the fifth transistor T5 and the ninth transistor T9 are turned on, the seventh transistor T7, the eighth transistor T8, and the tenth transistor T10 are turned off, and the sixth transistor T6 is turned on, Since the first end thereof is disconnected from the first power supply terminal OVDD and thus does not affect the monitoring operation, the circuit diagram shown in FIG. 7B can be equivalent to the circuit diagram shown in FIG. 8B to FIG.
  • the capacitance control circuit will be the first capacitor and The second capacitors are connected in parallel with each other, and the first sensing circuit monitors the first driving circuit.
  • the first monitoring phase M1 the first organic light emitting device can also be monitored, and the specific driving timing chart can refer to the pixel circuit.
  • the control terminals G4-G5, G7-G8 of the fourth transistor T4 to the fifth transistor T5, the seventh transistor T7 to the eighth transistor T8, and the tenth transistor T10 G10 receives a high level signal and the control terminals G2-G3, G9 of the second transistor T2 to the third transistor T3 and the ninth transistor T9 receive a low level signal, the first signal line DATA1 outputs a low level signal, and the second The signal line DATA2 outputs a high level signal, and the first capacitor C1 and the second capacitor C2 are charged, whereby the voltage of the fourth node 154 rises, so the control terminals of the first transistor T1 and the sixth transistor T6 receive a high level signal.
  • the first end of the first transistor T1 is disconnected from the first power terminal OVDD, the first monitor line SENSE1 is in a floating state, and the first power terminal OVDD outputs a high level signal. Therefore, in the second monitoring phase M2, the fourth transistor T4 to the eighth transistor T8 and the tenth transistor T10 are turned on, the third transistor T3 and the ninth transistor T9 are turned off, and the first transistor T1 is turned on, and since the first end thereof is disconnected from the first power terminal OVDD, the monitoring operation is not affected, and FIG. 7B
  • the circuit diagram shown can be equivalent to the circuit diagram shown in FIGS.
  • the capacitance control circuit connects the first capacitor and the second capacitor in parallel with each other, and causes the second sensing circuit to monitor the second driving circuit.
  • the second organic light emitting element can also be monitored.
  • the specific driving timing diagram can be obtained by referring to the pixel circuit embodiment and FIG. 13B, and details are not described herein again.
  • the control terminals G2-G3, G7-G10 of the second transistor T2 to the third transistor T3 and the seventh transistor T7 to the tenth transistor T10 receive a high level signal and
  • the control terminals G4-G5 of the four transistors T4 and the fifth transistor T5 receive a low level signal, and the first signal line DATA1 and the second signal line DATA2 output a high level signal, and the first capacitor C1 and the second capacitor C2 are respectively independent.
  • the charging whereby the voltages of the second node 152 and the fourth node 154 are respectively raised according to the data voltages on the data lines DATA1 and DATA2, and thus the control terminals of the first transistor T1 and the sixth transistor T6 also receive the high level signal.
  • the first monitor line SENSE1 is in a low state
  • the first power terminal OVDD is in a high state. Therefore, in the light-emitting phase EL, the first to third transistors T1 to T3 and the sixth to T10 to T10 are turned on, and the fourth and fourth transistors T4 and T5 are turned off, and the circuit diagram shown in FIG. 7B can be equivalent to The circuit diagram shown in FIG.
  • the capacitance control circuit can disconnect the first capacitor and the second capacitor from each other, and causes the driving circuit to drive the first organic light emitting element and the second organic light emitting element to operate.
  • the first organic light-emitting element and the second organic light-emitting element operate independently of each other, so whether the brightness of the light-on and the light-emitting can be independently controlled by the first data line DATA1 and the second data line DATA2, respectively.
  • the details of the driving method of the pixel circuit provided by the further embodiment of the present disclosure can be referred to the embodiment of the pixel circuit shown in FIG. 7 to FIG. 9 , and details are not described herein again.
  • FIGS. 11B, 12B, and 13B are only exemplary timing diagrams showing the driving methods illustrated in FIGS. 11A, 12A, and 13A, respectively.
  • FIG. 13B shows a high level throughout the first monitoring phase M1, the second monitoring phase M2, or the display phase EL when the high level is shown, however, embodiments of the present disclosure are not limited thereto, for example,
  • the two transistors T2 to the third transistor T3 and the seventh transistor T7 to the eighth transistor T8 may input a high level signal at a partial time portion when a high level signal is input thereto (for example, for the light emitting phase, only Initial stage of illumination
  • the signal writing phase is a high level signal input, and a low level signal is input during the rest of the phase, thereby reducing the driving power consumption of the pixel circuit.
  • the driving method of the pixel circuit provided by still another embodiment of the present disclosure can speed up the charging speed in the sensing stage, improve the accuracy of the sensing value, and thereby improve the compensation effect.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

一种像素电路及其驱动方法、显示面板。该像素电路(100)包括第一选择电路(102)、第一驱动电路(101)、第一电容(121)、第一感测电路(103)、第一有机发光元件(131)、第二电容(122)以及电容控制电路(123)。第一选择电路(102)和第一电容(121)电连接且第一选择电路(102)和第一电容(121)配置为控制第一驱动电路(101)，第一驱动电路(101)与第一有机发光元件(131)电连接且配置为驱动第一有机发光元件(131)，第一感测电路(103)与第一驱动电路(101)和第一有机发光元件(131)电连接且配置为感测第一驱动电路(101)或第一有机发光元件(131)；电容控制电路(123)配置为将第一电容(121)和第二电容(122)彼此并联或断开。该像素电路加快了感测阶段的充电速度、提升了感测值的准确性，并由此提升了像素电路的补偿效果，进而改进了显示面板的显示均匀性，提高了显示效果。

Description

像素电路及其驱动方法、显示面板 技术领域
本公开的实施例涉及一种像素电路及其驱动方法、显示面板。
背景技术
有机发光二极管(Organic Light Emitting Diode，OLED)显示器件由于具有视角宽、对比度高、响应速度快以及相比于无机发光显示器件的更高的发光亮度、更低的驱动电压等优势而逐渐受到人们的广泛关注。
在有机发光二极管显示器件中，为了使显示画面不易遭受元件老化的影响，往往需要进行外部补偿，通过检测流经薄膜晶体管的电流或流经有机发光二极管的电流，可得知薄膜晶体管或有机发光二极管的老化程度，进而可以计算出对应的数据信号修正值。
发明内容
本公开的一个实施例提供了一种像素电路，该像素电路包括第一选择电路、第一驱动电路、第一电容、第一感测电路、第一有机发光元件、第二电容以及电容控制电路。第一选择电路和第一电容电连接且第一选择电路和第一电容配置为控制第一驱动电路，第一驱动电路与第一有机发光元件电连接且配置为驱动第一有机发光元件，第一感测电路与第一驱动电路和第一有机发光元件电连接且配置为感测第一驱动电路或第一有机发光元件；电容控制电路配置为将第一电容和第二电容彼此并联或断开。
例如，在本公开的一个实施例提供的像素电路中，所述第一电容与所述第一感测电路电连接。
例如，在本公开的一个实施例提供的像素电路中，该像素电路还包括第二选择电路、第二驱动电路和第二有机发光元件，所述第二选择电路和所述第二电容配置为控制所述第二驱动电路，所述第二驱动电路与所述第二有机发光元件电连接且配置为驱动所述第二有机发光元件。
例如，在本公开的一个实施例提供的像素电路中，该像素电路还包括第 二感测电路，所述第二感测电路与所述第二驱动电路和所述第二有机发光元件电连接且配置为感测所述第二驱动电路或所述第二有机发光元件。
例如，在本公开的一个实施例提供的像素电路中，该像素电路还包括第一控制电路和第二控制电路，所述第一控制电路配置为控制所述第一驱动电路是否与第一电源端电连接，所述第二控制电路配置为控制所述第二驱动电路是否与所述第一电源端电连接。
例如，在本公开的一个实施例提供的像素电路中，该像素电路还包括第一节点和第二节点；所述第一驱动电路包括第一晶体管；所述第一选择电路包括第二晶体管；所述第一感测电路包括第三晶体管；所述电容控制电路包括第四晶体管；所述第一晶体管的第一端配置为电连接到所述第一电源端，所述第一晶体管的第二端电连接到第一节点，所述第一晶体管的控制端电连接到第二节点；所述第二晶体管的第一端配置为电连接到第一数据线，所述第二晶体管的第二端电连接到第二节点；所述第三晶体管的第一端电连接到所述第一节点，所述第三晶体管的第二端配置为电连接到第一监控线；所述第四晶体管的第一端电连接到所述第二节点，所述第四晶体管的第二端电连接到所述第二电容的第一端；所述第二电容的第二端电连接到第一节点；所述第一电容的第一端电连接到所述第一节点，所述第一电容的第二端电连接到所述第二节点；所述第一有机发光元件的第一端电连接到所述第一节点，所述第一有机发光元件的第二端配置为电连接到第二电源端。
例如，在本公开的一个实施例提供的像素电路中，该像素电路还包括第一节点和第二节点；所述第一驱动电路包括第一晶体管；所述第一选择电路包括第二晶体管；所述第一感测电路包括第三晶体管；所述电容控制电路包括第四晶体管和第五晶体管；所述第一晶体管的第一端配置为电连接到所述第一电源端，所述第一晶体管的第二端电连接到第一节点，所述第一晶体管的控制端电连接到第二节点；所述第二晶体管的第一端配置为电连接到第一数据线，所述第二晶体管的第二端电连接到第二节点；所述第三晶体管的第一端电连接到所述第一节点，所述第三晶体管的第二端配置为电连接到第一监控线；所述第四晶体管的第一端电连接到所述第二节点，所述第四晶体管的第二端电连接到所述第二电容的第一端；所述第五晶体管的第一端电连接到所述第一节点，所述第五晶体管的第二端电连接到所述第二电容的第二端； 所述第一电容的第一端电连接到所述第一节点，所述第一电容的第二端电连接到所述第二节点；所述第一有机发光元件的第一端电连接到所述第一节点，所述第一有机发光元件的第二端配置为电连接到第二电源端。
例如，在本公开的一个实施例提供的像素电路中，该像素电路还包括第三节点和第四节点，所述第二驱动电路包括第六晶体管；所述第二选择电路包括第七晶体管；所述第六晶体管的第一端配置为电连接到所述第一电源端，所述第六晶体管的第二端电连接到第三节点，所述第六晶体管的控制端电连接到第四节点；所述第七晶体管的第一端配置为电连接到第二数据线，所述第七晶体管的第二端电连接到所述第四节点；所述第二电容的第一端电连接到所述第四节点，所述第二电容的第二端电连接到所述第三节点；所述第二有机发光元件的第一端电连接到所述第三节点，所述第二有机发光元件的第二端配置为电连接到所述第二电源端。
例如，在本公开的一个实施例提供的像素电路中，所述第二感测电路包括第八晶体管，所述第八晶体管的第一端电连接到所述第三节点，所述第八晶体管的第二端配置为电连接到第二监控线。
例如，在本公开的一个实施例提供的像素电路中，所述第一控制电路包括第九晶体管；所述第二控制电路包括第十晶体管；所述第九晶体管的第一端电连接到所述第一晶体管的第一端，所述第九晶体管的第二端配置为电连接到所述第一电源端；所述第十晶体管的第一端电连接到所述第六晶体管的第一端，所述第十晶体管的第二端配置为电连接到所述第一电源端。
例如，在本公开的一个实施例提供的像素电路中，所述第四晶体管的控制端和所述第五晶体管的控制端配置为电连接到同一信号线。
例如，在本公开的一个实施例提供的像素电路中，所述第二电源端为接地端。
例如，在本公开的一个实施例提供的像素电路中，所述第一有机发光元件和所述第二有机发光元件发出不同颜色的光。
本公开的另一个实施例提供了一种显示面板，该显示面板包括上述的像素电路。
本公开的再一个实施例提供了一种像素电路的驱动方法，该像素电路的驱动方法包括：在第一监测阶段，使电容控制电路将第一电容和第二电容彼 此并联，并且使得第一感测电路对第一驱动电路或第一有机发光元件进行监测。
例如，在本公开的再一个实施例提供的像素电路的驱动方法中，该驱动方法还包括：在发光阶段，使所述电容控制电路将所述第一电容和所述第二电容彼此断开，并且使得所述驱动电路驱动所述第一有机发光元件工作。
例如，在本公开的再一个实施例提供的像素电路的驱动方法中，所述像素电路还包括第二选择电路、第二驱动电路和第二有机发光元件，所述第二选择电路和所述第二电容配置为控制所述第二驱动电路，所述第二驱动电路与所述第二有机发光元件电连接且配置为驱动所述第二有机发光元件；所述驱动方法还包括：在第二监测阶段，使所述电容控制电路将所述第一电容和所述第二电容彼此并联，并且使得所述第一感测电路对所述第二驱动电路或所述第二有机发光元件进行监测。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例或相关技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，并非对本公开的限制。
图1A是本公开一个实施例提供的一种像素电路的示意性框图；
图1B是图1A所示的像素电路的示例性电路图；
图2A是图1B所示的像素电路的示例性电路图在发光阶段的等效电路图；
图2B是图1B所示的像素电路的示例性电路图在第一监测阶段的一种等效电路图；
图2C是图1B所示的像素电路的示例性电路图在第一监测阶段的另一种等效电路图；
图2D是感测电路所获取的感测电压值随时间变化的曲线；
图3A是本公开一个实施例提供的另一种像素电路的示意性框图；
图3B是图3A所示的像素电路的示例性电路图；
图4A是图3B所示的像素电路的示例性电路图在发光阶段的等效电路图；
图4B是图3B所示的像素电路的示例性电路图在第一监测阶段的一种等效电路图；
图4C是图3B所示的像素电路的示例性电路图在第一监测阶段的另一种等效电路图；
图4D是图3B所示的像素电路的示例性电路图在第一监测阶段的再一种等效电路图；
图5A是图3B所示的像素电路的示例性电路图在第二监测阶段的一种等效电路图；
图5B是图3B所示的像素电路的示例性电路图在第二监测阶段的另一种等效电路图；
图5C是图3B所示的像素电路的示例性电路图在第二监测阶段的再一种等效电路图；
图6A是本公开一个实施例提供的再一种像素电路的示意性框图；
图6B是图6A所示的像素电路的示例性电路图；
图7A是本公开一个实施例提供的再一种像素电路的示意性框图；
图7B是图7A所示的像素电路的示例性电路图；
图8A是图7B所示的像素电路的示例性电路图在发光阶段的等效电路图；
图8B是图7B所示的像素电路的示例性电路图在第一监测阶段的一种等效电路图；
图8C是图7B所示的像素电路的示例性电路图在第一监测阶段的另一种等效电路图；
图8D是图7B所示的像素电路的示例性电路图在第一监测阶段的再一种等效电路图；
图9A是图7B所示的像素电路的示例性电路图在第二监测阶段的第一种监测方法的一种等效电路图；
图9B是图7B所示的像素电路的示例性电路图在第二监测阶段的第一种监测方法的另一种等效电路图；
图9C是图7B所示的像素电路的示例性电路图在第二监测阶段的第一种监测方法的再一种等效电路图；
图10是本公开另一个实施例提供的一种显示面板的示意性框图；
图11A是本公开再一个实施例提供的一种像素电路的驱动方法的示例性流程图；
图11B是图11A所示的驱动方法的示例性时序图；
图12A是本公开再一个实施例提供的另一种像素电路的驱动方法的示例性流程图；
图12B是图12A所示的驱动方法的示例性时序图；
图13A是本公开再一个实施例提供的再一种像素电路的驱动方法的示例性流程图；
图13B是图13A所示的驱动方法的示例性时序图；以及
图14是本公开一个实施例提供的再一种像素电路的示例性电路图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
本公开的实施例提供了一种像素电路及其驱动方法、显示面板，加快了感测阶段的充电速度、提升了感测值的准确性，并由此提升了像素电路的补偿效果，进而改进了显示面板的显示均匀性，提高了显示效果。
本公开的至少一个实施例提供了一种像素电路，该像素电路包括第一选择电路、第一驱动电路、第一电容、第一感测电路、第一有机发光元件、第二电容以及电容控制电路。第一选择电路和第一电容配置为控制第一驱动电路，第一驱动电路与第一有机发光元件电连接且配置为驱动第一有机发光元件，第一感测电路与第一驱动电路和第一有机发光元件电连接且配置为感测第一驱动电路或第一有机发光元件；电容控制电路配置为将第一电容和第二电容彼此并联或断开。
例如，图1A是本公开一个实施例提供的一种像素电路的示意性框图，如图1A所示，该像素电路可以包括第一选择电路102、第一驱动电路101、第一电容121、第一感测电路103、第一有机发光元件131、第二电容122以及电容控制电路123。例如，第一选择电路102、第一驱动电路101、第一电容121、第一感测电路103、第一有机发光元件131、第二电容122以及电容控制电路123的具体形式可以根据实际应用需求进行设定，本公开对此不做具体限制。例如，本公开一个实施例提供的一种像素电路可以实现为如图1B所示的电路图。
例如，如图1A和图1B所示，第一驱动电路101可以与第一有机发光元件131(例如，图1B所示的EL1)电连接且配置为驱动第一有机发光元件131。例如，第一驱动电路101可以包括第一晶体管T1，第一晶体管T1可以包括第一端、第二端和控制端，控制端在接收到导通信号(例如，高电平信号)的情况下可以使得第一端和第二端导通。例如，像素电路还包括第一节点151和第二节点152，第一晶体管T1的第一端可以配置为电连接到第一电源端OVDD，第一晶体管T1的第二端可以电连接到第一节点151，第一晶体管T1的控制端可以电连接到第二节点152。例如，第一电源端OVDD可以为电压源以输出恒定的正电压，也可以为电流源等。
例如，如图1A和图1B所示，第一有机发光元件131的第一端可以电连接到第一节点151，第一有机发光元件131的第二端可以配置为电连接到第二电源端VSS。例如，第一有机发光元件131可以为有机发光二极管；第二电源端VSS可以为接地端。例如，在第一晶体管T1的控制端接收到导通信号的情况下，源于第一电源端OVDD的电信号(例如，电流信号)可以驱动第一有机发光元件131(例如图1B所示的EL1)发光。
例如，如图1A和图1B所示，第一选择电路102和第一电容121(例如，图1B所示的C1)可以配置为控制第一驱动电路101。例如，第一选择电路102可以包括第二晶体管T2；第二晶体管T2的第一端可以配置为电连接到第一数据线DATA1，第二晶体管T2的第二端可以电连接到第二节点152。例如，在第二晶体管T2的控制端接收到导通信号的情况下，源于第一数据线DATA1的电信号经由第二晶体管T2传输到第一晶体管T1的控制端，并存储在第一电容C1，改变第二节点152的电压，由此之后可以使得第一晶体管T1根据需要导通，以驱动第一有机发光元件EL1。例如，第一电容121的第一端可以电连接到第一节点151，第一电容121的第二端可以电连接到第二节点152。
例如，如图1A和图1B所示，电容控制电路123可以配置为将第一电容121和第二电容122彼此并联或断开。例如，电容控制电路123可以包括第四晶体管T4和第五晶体管T5；第四晶体管T4的第一端可以电连接到第二节点152，第四晶体管T4的第二端可以电连接到第二电容122的第一端；第五晶体管T5的第一端可以电连接到第一节点151，第五晶体管T5的第二端可以电连接到第二电容122的第二端。例如，根据实际应用需求，第四晶体管T4的控制端和第五晶体管T5的控制端可以配置为电连接到同一信号线或者不同的信号线。例如，在第四晶体管T4的控制端和第五晶体管T5的控制端接收到导通信号(例如，高电平信号)的情况下，第四晶体管T4的第一端和第二端导通，且第五晶体管T5的第一端和第二端导通，此时电容控制电路123使得第一电容121和第二电容122彼此并联。又例如，在第四晶体管T4的控制端和第五晶体管T5的控制端接收到关闭信号(例如，低电平信号)的情况下，第四晶体管T4和第五晶体管T5均处于关闭(截止)的状态，此时电容控制电路123使得第一电容121和第二电容122彼此断开。
例如，如图1A和图1B所示，第一感测电路103可以与第一驱动电路101和第一有机发光元件131电连接且配置为感测第一驱动电路101或第一有机发光元件131。例如，第一感测电路103可以包括第三晶体管T3；第三晶体管T3的第一端可以电连接到第一节点151，第三晶体管T3的第二端可以配置为电连接到第一监控线SENSE1。例如，在第三晶体管T3导通的情况下，可以经由第一监控线SENSE1获取像素电路输出的电信号，或者，还可 以经由第一监控线SENSE1向像素电路输入电信号。
在发光阶段，第四晶体管T4的控制端和第五晶体管T5的控制端接收到关闭信号(例如，低电平信号)，第四晶体管T4和第五晶体管T5处于关闭的状态，图1B所示的电路图可以等效为图2A所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此断开；由于此时可以不需要监测，第三晶体管T3的控制端可以接收到关闭信号(例如，低电平信号)，从而第三晶体管T3处于关闭的状态，或者也可以使得第三晶体管T3处于导通状态；第一监控线SENSE1上被施加低电平电压；在第二晶体管T2的控制端接收到导通信号(例如，高电平信号)且第一端接收到数据信号以对第一电容C1进行充电，提升第二节点152的电压，使得第一晶体管T1处于导通的状态，图1B所示的像素电路可驱动第一有机发光元件131正常发光，也即，图1B所示的像素电路在上述条件下处于发光阶段。
例如，在监测阶段，可以监测第一驱动电路101和/或第一有机发光元件131。第四晶体管T4和第五晶体管T5的控制端接收到导通信号，图1B所示的电路图可以等效为图2B所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此并联，因此，图2B所示的电路图可进一步的等效为图2C所示的电路图，由此用于控制第一驱动电路101的电容值由C1增加至C1+C2。为了对第一驱动电路的参数进行监测，施加控制信号使得第二晶体管T2和第三晶体管T3导通，由于源于第一数据线DATA1的电信号(即数据信号，例如，参考数据信号)经由导通的第二晶体管T2对并联的第一电容C1和第二电容C2充电，由此第一晶体管T1可处于导通状态，从而驱动电流可以从第一电源端OVDD流经第一晶体管T1、第一有机发光元件EL1，且该驱动电流可被第一感测电路103所获取(例如，经由导通的第三晶体管T3输出到第一监控线SENSE1上)，由此第一感测电路103可以用于监控经由第一驱动电路101(例如，第一晶体管T1)的电信号，获得第一驱动电路101的参数(例如第一晶体管T1的阈值电压)，例如通过该第一驱动电路101的参数可以确定对数据信号的补偿值。
例如，为了对第一有机发光元件EL1的参数进行监测，如图1B所示，在第三晶体管T3的控制端接收到导通信号(例如，高电平信号)、第二晶体管T2的控制端接收到关闭信号(例如，低电平信号)且第一数据线DATA1 例如输出高电平信号的情况下，第三晶体管T3处于导通的状态，第一晶体管T1、第二晶体管T2处于关闭的状态，根据需要还可以使得第四晶体管T4和第五晶体管T5处于关闭的状态，通过第一感测电路103向第一有机发光元件131输入电信号，并由此可以监控经由第一有机发光元件131的电信号，由此可以实现对第一有机发光元件131的监测，获得第一有机发光元件131的参数(例如第一有机发光元件131的内阻)，例如通过该参数可以确定对驱动电流的补偿值。
例如，图2D是感测电路所获取的感测电压值随时间变化的曲线，如图2D所示，在控制驱动电路的电容值由0.2pF增加至1pF的情况下，感测阶段的充电速度得到增加，并且感测值更为准确(感测电路所获取的感测电压值由3.74V增加至4.8V)。例如，对于本公开一个实施例提供的一种像素电路，由于在第一监测阶段，用于控制第一驱动电路101的电容值增加至C1+C2，因此加快了感测阶段的充电速度、提升了第一感测电路103所获取的感测值的准确性，并因此可以在像素电路补偿时提供更为精确的电信号，由此提升了像素电路的补偿效果。
例如，第一监测阶段与显示阶段的设置方式可以根据实际应用情况进行设定，本公开的实施例对此不做具体限定。例如，包含本公开一个实施例提供的一种像素电路的显示面板的每个显示周期可以包括第一监测阶段和显示阶段，每个显示周期的第一监测阶段可以位于显示阶段之前，因此可以及时感测到第一驱动电路101和/或第一有机发光元件131的老化情况，进而可以使用在每个显示周期更新的感测值对像素电路进行补偿，由此可以获得更好的像素电路的补偿效果。又例如，可以仅在每次启用包含该像素电路的显示面板之后的初始阶段使用第一感测电路103获取感测值，并使用所获取的感测值对像素电路进行补偿，由此在较好的实现像素电路补偿的情况下，还能够节省功耗。
例如，图3A是本公开一个实施例提供的另一种像素电路的示意性框图，相比于图1A所示的像素电路，图3A所示的像素电路还可以包括第二选择电路107、第二驱动电路106和第二有机发光元件132。例如，第二选择电路107、第二驱动电路106和第二有机发光元件132的具体形式可以根据实际应用需求进行设定，本公开对此不做具体限制。例如，本公开一个实施例提供 的一种像素电路可以实现为如图3B所示的电路图。
例如，如图3A和图3B所示，第二驱动电路106与第二有机发光元件132可以电连接且配置为驱动第二有机发光元件132(例如图3B所示的EL2)。例如，第二驱动电路106可以包括第六晶体管T6。例如，像素电路还可以包括第三节点153和第四节点154，第六晶体管T6的第一端可以配置为电连接到第一电源端OVDD，第六晶体管T6的第二端可以电连接到第三节点153，第六晶体管T6的控制端可以电连接到第四节点154。
例如，如图3A和图3B所示，第二有机发光元件132的第一端可以电连接到第三节点153，第二有机发光元件132的第二端可以配置为电连接到第二电源端VSS。例如，根据实际应用需求，第二有机发光元件132和第一有机发光元件131可以被独立驱动，并且可以发出相同颜色或不同颜色的光，本公开的实施例对此不做具体限定。例如，在第六晶体管T6的控制端接收到导通信号的情况下，源于第一电源端OVDD的电信号(例如，电流信号)可以驱动第二有机发光元件132发光。
例如，如图3A和图3B所示，第二选择电路107和第二电容122(例如，图3B所示的C2)可以配置为控制第二驱动电路106。例如，第二选择电路107可以包括第七晶体管T7；第七晶体管T7的第一端可以配置为电连接到第二数据线DATA2，第七晶体管T7的第二端可以电连接到第四节点154。例如，第一数据线DATA1和第二数据线DATA2可以为两条不同的数据线。例如，在第七晶体管T7接收到导通信号的情况下，源于第二数据线DATA2的电信号经由第七晶体管T7传输到第六晶体管T6的控制端，并存储在第二电容C2，改变第四节点154的电压，由此之后可以使得第六晶体管T6根据需要导通，以驱动第二有机发光元件EL2。例如，第二电容122的第一端可以电连接到第四节点154，第二电容122的第二端可以电连接到第三节点153。
例如，在发光阶段，第四晶体管T4的控制端和第五晶体管T5的控制端接收到关闭信号，第四晶体管T4和第五晶体管T5处于关闭的状态，图3B所示的电路图可以等效为图4A所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此断开；由于此时可不需要监测，第三晶体管T3的控制端接收到关闭信号(例如，低电平信号)，从而第三晶体管T3处于关闭的状态，或者也可以使得第三晶体管T3处于导通状态；第一监控 线SENSE1上被施加低电平电压；类似上述描述，根据第一信号线DATA1上的信号，第二晶体管T2和第一电容C1可以配合以控制第一晶体管T1；与此独立地，根据第二信号线DATA2上的信号，第七晶体管T7和第二电容C2可以配合以控制第六晶体管T6，由此图3B所示的像素电路可驱动第一有机发光元件131和第二有机发光元件132正常发光。
例如，在第一监测阶段(例如，可以监测第一驱动电路101和/或第一有机发光元件131)，第四晶体管T4和第五晶体管T5的控制端接收到导通信号，第四晶体管T4和第五晶体管T5处于导通的状态，图3B所示的电路图可以等效为图4B所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此并联，另外，使得第六晶体管T6的第一端与第一电源端OVDD断开(例如悬空)，因此，图4B所示的电路图可进一步的等效为图4C和图4D所示的电路图，由此用于控制第一驱动电路101的电容值由C1增加至C1+C2。由此，类似地，可对第一驱动电路101和/或第一有机发光元件131进行监测。
例如，对于本公开一个实施例提供的另一种像素电路，不仅可以加快感测阶段的充电速度、提升第一感测电路103所获取的感测值的准确性以及像素电路的补偿效果，还可以共用与其相邻的像素的电容来增加电容以及提升像素电路补偿的效果。由于无需针对每个像素额外设置与其并联的电容，或者选用电容值更大的电容，因此可以降低制造成本以及增加包含该像素电路的显示面板的开口率。
例如，在第二监测阶段(例如，可以用于监测第二驱动电路106和/或第二有机发光元件132)，相同地，第四晶体管T4和第五晶体管T5的控制端接收到导通信号，第四晶体管T4和第五晶体管T5处于导通的状态，图3B所示的电路图可以等效为图5A所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此并联，另外，使得第一晶体管T1的第一端与第一电源端OVDD断开(例如悬空)，因此，图5A所示的电路图可进一步的等效为图5B和图5C所示的电路图，由此用于控制第二驱动电路106的电容值由C1增加至C1+C2。由此，类似地，可对第二驱动电路106进行监测。此外，还可以对第二有机发光元件132进行监测，具体的监测方法可以参照图1B像素电路的对第一有机有机发光元件131的监测方法，重复之 处不再赘述。例如，可以使得第三晶体管T3处于导通的状态，通过第一感测电路103向第一有机发光元件131和第二有机发光元件132输入电信号，并由此可以监控经由第一有机发光元件131和第二有机发光元件132的电信号，因此可以获得包含第二有机发光元件132的电信号的信息，由此可以实现对第二有机发光元件132的监测，并获得第二有机发光元件132的参数，例如通过该参数可以确定对驱动电流的补偿值。由于使用该方法监控到的参数中也包含第一有机发光元件131的信息，因此，可能会影响第二有机发光元件132补偿效果。
例如，对于本公开一个实施例提供的另一种像素电路，不仅可以在无需针对每个像素额外设置与其并联的电容、或者选用电容值更大的电容的情况下，加快感测阶段的充电速度、提升第一感测电路103所获取的感测值的准确性以及像素电路的补偿效果，还可以针对两个像素仅设置一个感测电路，由此可以进一步地降低制造成本以及增加包含该像素电路的显示面板的开口率。
例如，图6A是本公开一个实施例提供的再一种像素电路的示意性框图，相比于图3A所示的像素电路，图6A所示的像素电路还可以包括第二感测电路108。例如，第二感测电路108的具体形式可以根据实际应用需求进行设定，本公开对此不做具体限制。例如，本公开一个实施例提供的一种像素电路可以实现为如图6B所示的电路图。
例如，如图6A和图6B所示，第二感测电路108与第二驱动电路106和第二有机发光元件132可以电连接且配置为感测第二驱动电路106或第二有机发光元件132。例如，第二感测电路108可以包括第八晶体管T8，第八晶体管T8的第一端可以电连接到第三节点153，第八晶体管T8的第二端可以配置为电连接到第二监控线SENSE2。
例如，图7A是本公开一个实施例提供的再一种像素电路的示意性框图，相比于图6A所示的像素电路，图7A所示的像素电路还可以包括第一控制电路109和第二控制电路110。例如，第一控制电路109和第二控制电路110的具体形式可以根据实际应用需求进行设定，本公开对此不做具体限制。例如，本公开一个实施例提供的一种像素电路可以实现为如图7B所示的电路图。
例如，如图7A和图7B所示，第一控制电路109可以配置为控制第一驱动电路101是否与第一电源端OVDD电连接，第二控制电路110以配置为控制第二驱动电路106是否与第一电源端OVDD电连接。例如，第一控制电路109可以包括第九晶体管T9；第二控制电路110可以包括第十晶体管T10；第九晶体管T9的第一端可以电连接到第一晶体管T1的第一端，第九晶体管T9的第二端可以配置为电连接到第一电源端OVDD；第十晶体管T10的第一端可以电连接到第六晶体管T6的第一端，第十晶体管T10的第二端可以配置为电连接到第一电源端OVDD。例如，在第一控制电路109/第二控制电路110的控制端接收到导通信号的情况下，可以实现第一驱动电路101/第二控制电路110与第一电源端OVDD的电连接。
例如，在发光阶段，第四晶体管T4和第五晶体管T5的控制端接收到关闭信号，因此第四晶体管T4和第五晶体管T5处于关闭的状态；第二晶体管T2、第七晶体管T7以及第九晶体管T9至第十晶体管T10的控制端接收到导通信号，第二晶体管T2、第七晶体管T7、第九晶体管T9至第十晶体管T10处于导通的状态。当然，由于此时可不需要监测，第三晶体管T3和第八晶体管T8可以处于关闭的状态，或者也可以使得第三晶体管T3和第八晶体管T8处于导通状态。第一监控线SENSE1和第二监控线SENSE2上被施加低电平电压；类似上述描述，根据第一信号线DATA1上的信号，第二晶体管T2和第一电容C1可以配合以控制第一晶体管T1，与此独立地，根据第二信号线DATA2上的信号，第七晶体管T7和第二电容C2可以配合以控制第六晶体管T6，由此图7B所示的电路图可以等效为图8A所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此断开，图7B所示的像素电路可驱动第一有机发光元件131和第二有机发光元件132正常发光。
例如，在第一监测阶段，第四晶体管T4和第五晶体管T5的控制端接收到导通信号，第四晶体管T4至第五晶体管T5处于导通的状态，第九晶体管T9处于导通状态而第十晶体管T10处于关闭的状态，图7B所示的电路图可以等效为图8B所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此并联，因此，图8B所示的电路图可进一步的等效为图8C和图8D所示的电路图，由此用于控制第一驱动电路101的电容值由C1增加至C1+C2，因此加快了感测阶段的充电速度、提升了第一感测电路103所获 取的感测值的准确性，并因此可以在像素电路补偿时提供更为精确的电信号，由此提升了像素电路的补偿效果。
例如，在第二监测阶段，相同地，第四晶体管T4和第五晶体管T5的控制端接收到导通信号，第四晶体管T4至第五晶体管T5处于导通的状态，第十晶体管T10处于导通的状态而第九晶体管T9处于关闭的状态，图7B所示的电路图可以等效为图9A所示的电路图。此时电容控制电路123使得第一电容121和第二电容122彼此并联，因此，图9A所示的电路图可进一步的等效为图9B和图9C所示的电路图，由此用于控制第二驱动电路106的电容值由C2增加至C1+C2，因此加快了感测阶段的充电速度、提升了第二感测电路108所获取的感测值的准确性，并因此可以在像素电路补偿时提供更为精确的电信号，由此提升了像素电路的补偿效果。显然，在第二监测阶段，还可以使用第一感测电路103监测第二驱动电路106和/或第二有机发光元件132，具体内容可以参见图5A-图5C所示的实施例，在此不再赘述。
需要说明的是，电容控制电路123的设置方式不限于以上实施例(例如，图7B示出的实施例)示出的包括两个晶体管的形式(例如，第四晶体管T4和第五晶体管T5)。例如，如图14所示，根据实际应用需求，电容控制电路123还可以包括一个晶体管；例如，电容控制电路123可以仅包括第四晶体管T4。例如，相比于图7B示出的像素电路，在图14示出的像素电路中，第二电容C2的第一端电连接到第四晶体管T4的第二端；第二电容C2的第二端电连接到第一节点和第三节点；第一电容C1的第一端电连接到第一节点和第三节点，第一电容C1的第二端电连接到第二节点。例如，对于图14示出的实施例，由于电容控制电路123仅包括一个晶体管，由此可以简化像素电路的结构，并且可以降低像素电路的成本。
图10是本公开另一个实施例提供的一种显示面板的示意性框图。该显示面板包括子像素阵列，该子像素阵列包括多个子像素，每个子像素可以包括本公开至少一实施例所述的像素电路，或者两个相邻子像素可以包括本公开至少一实施例所述的像素电路。需要说明的是，对于该显示面板的其它组成部分(例如栅驱动电路、数据驱动电路、电源驱动电路、感测驱动电路等)可以采用适用的常规部件，这些是本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的实施例的限制。本公开实施例的显示 面板可以加快感测阶段的充电速度、提升感测值的准确性，并由此可以提升补偿效果。
需要说明的是，本公开的实施例中采用的晶体管可以为薄膜晶体管或场效应晶体管或其他特性相同的开关器件。这里采用的晶体管的源极、漏极在结构上可以是对称的，所以其源极、漏极在结构上可以是没有区别的。在本公开的实施例中，为了区分晶体管除作为控制端的栅极，直接描述了其中一极为第一端，另一极为第二端，所以本公开实施例中全部或部分晶体管的第一端和第二端根据需要是可以互换的。例如，本公开实施例的晶体管的第一端可以为源极，第二端可以为漏极；或者，晶体管的第一端为漏极，第二端为源极。此外，按照晶体管的特性区分可以将晶体管分为N型和P型晶体管，本公开的实施例对晶体管的类型不作限定，本领域技术人员可以根据实际需要利用N型和/或P型晶体管实现本公开中的实施例。
本公开的实施例包括但不局限于上述图1A～图9C所示的像素电路，例如，像素电路还可以包括其它子电路，例如用于第一晶体管栅极复位的复位电路，或者例如还可以包括内部补偿电路等，在此不再赘述。
本公开实施例的有机发光元件例如为有机发光二极管，该有机发光二极管可以为各种类型的，例如顶发射型或底发射型，可以为聚合物型或小分子型等等。
本公开的再一个实施例提供了一种像素电路的驱动方法，该像素电路的驱动方法包括：在第一监测阶段，使电容控制电路将第一电容和第二电容彼此并联，并且使得第一感测电路对第一驱动电路或第一有机发光元件进行监测。
例如，图11A是本公开再一个实施例提供的一种像素电路的驱动方法的示例性流程图。例如，以图1A和图1B示出的像素电路为例，如图11A所示，该像素电路的驱动方法可以包括以下步骤：
步骤S110：在第一监测阶段M1，使电容控制电路将第一电容和第二电容彼此并联，并且使得第一感测电路对第一驱动电路或第一有机发光元件进行监测；
步骤S120：在发光阶段EL，使电容控制电路将第一电容和第二电容彼此断开，并且使得驱动电路驱动第一有机发光元件工作。
例如，图11B是图11A所示的驱动方法的一种示例性时序图。例如，图1B示出的第二晶体管T2-第五晶体管T5的控制端可以分别用G2-G5表示。
例如，如图11B所示，在第一监测阶段M1，第二晶体管T2-第五晶体管T5的控制端G2-G5均接收到高电平信号，第一信号线DATA1例如输出高电平信号，第一电容C1和第二电容C2被充电，由此第二节点152的电压升高，因此第一晶体管T1的控制端也接收高电平信号。此外，第一监控线SENSE1例如处于悬空状态，第一电源端OVDD处于高电平状态。因此，在第一监测阶段M1，第一晶体管T1-第五晶体管T5导通，图1B所示的电路图可以等效为图2B和图2C所示的电路图，也即是电容控制电路将第一电容和第二电容彼此并联，并且可以使得第一感测电路对第一驱动电路进行监测，此外，在第一监测阶段M1，还可以对第一有机发光元件进行监测，具体的驱动时序图可以参照像素电路实施例以及图11B获得，在此不再赘述。
例如，如图11B所示，在发光阶段EL，例如，第二晶体管T2-第三晶体管T3的控制端G2-G3接收到高电平信号，第四晶体管T4-第五晶体管T5的控制端G4-G5接收到低电平信号，第一信号线DATA1例如输出高电平信号，第一电容C1被充电，由此第二节点152的电压升高，因此第一晶体管T1的控制端也接收高电平信号。此外，第一监控线SENSE1处于例如低电平状态，第一电源端OVDD处于高电平状态。因此，在发光阶段EL，第一晶体管T1-第三晶体管T3导通，第四晶体管T4-第五晶体管T5关闭，图1B所示的电路图可以等效为图2A所示的电路图，也即是电容控制电路将第一电容和第二电容彼此断开，并且使得驱动电路驱动第一有机发光元件正常工作。例如，本公开再一个实施例提供的一种像素电路的驱动方法的详细内容可以参见图1和图2所示的像素电路的实施例，在此不再赘述。
例如，图12A是本公开再一个实施例提供的另一种像素电路的驱动方法的示例性流程图。例如，以图3A和图3B示出的像素电路为例，如图12A所示，该像素电路的驱动方法可以包括以下步骤：
步骤S210：在第一监测阶段M1，使电容控制电路将第一电容和第二电容彼此并联，并且使得第一感测电路对第一驱动电路或第一有机发光元件进行监测；
步骤S220：在第二监测阶段M2，使电容控制电路将第一电容和第二电 容彼此并联，并且使得第一感测电路对第二驱动电路或第二有机发光元件进行监测；
步骤S230：在发光阶段EL，使电容控制电路将第一电容和第二电容彼此断开，并且使得驱动电路驱动第一有机发光元件和/或第二有机发光元件工作。
例如，图12B是图12A所示的驱动方法的一种示例性时序图。例如，图3B示出的第二晶体管T2-第五晶体管T5以及第七晶体管T7的控制端可以分别用G2-G5、G7表示。
例如，如图12B所示，在第一监测阶段M1，第二晶体管T2至第五晶体管T5的控制端G2-G5接收到高电平信号且第七晶体管T7的控制端接G7收到低电平信号，第一信号线DATA1输出高电平信号，第二信号线DATA2输出低电平信号，第一电容C1和第二电容C2被充电，由此第二节点152的电压升高，因此第一晶体管T1的控制端接收高电平信号。此外，使得第六晶体管T6的第一端与第一电源端OVDD断开。例如，第一监控线SENSE1处于悬空状态，第一电源端OVDD处于高电平状态。因此，在第一监测阶段M1，第一晶体管T1-第五晶体管T5导通和第七晶体管T7关闭，第六晶体管T6虽然导通，由于其第一端与第一电源端OVDD断开因此不影响监测操作，图3B所示的电路图可以等效为图4B-图4D所示的电路图，也即是电容控制电路将第一电容和第二电容彼此并联，并且可以使得第一感测电路对第一驱动电路进行监测，此外，在第一监测阶段M1还可以对第一有机发光元件进行监测，具体的驱动时序图可以参照像素电路实施例以及图12B获得，在此不再赘述。
例如，如图12B所示，在第二监测阶段M2，第三晶体管T3至第五晶体管T5、第七晶体管T7的控制端G3-G5、G7接收到高电平信号且第二晶体管T2的控制端G2接收到低电平信号，第一信号线DATA1输出低电平信号，第二信号线DATA2输出高电平信号，第一电容C1和第二电容C2被充电，由此第四节点154的电压升高，因此第一晶体管T1和第六晶体管T6的控制端接收高电平信号。此外，使得第一晶体管T1的第一端与第一电源端OVDD断开。第一监控线SENSE1处于悬空状态，第一电源端OVDD处于高电平状态。因此，在第二监测阶段M2，第三晶体管T3至第七晶体管T7导通，第 二晶体管T2关闭，第一晶体管T1虽然导通，由于其第一端与第一电源端OVDD断开因此不影响监测操作，图3B所示的电路图可以等效为图5A-图5C所示的电路图，也即是电容控制电路可以将第一电容和第二电容彼此并联，并且使得第一感测电路对第二驱动电路，此外，在第二监测阶段M2，还可以对第二有机发光元件进行监测，具体的驱动时序图可以参照像素电路实施例以及图12B获得，在此不再赘述。
例如，如图12B所示，在发光阶段，第二晶体管T2至第三晶体管T3、第七晶体管T7的控制端G2-G3、G7接收到高电平信号且第四晶体管T4的控制端和第五晶体管T5的控制端G4-G5接收到低电平信号，第一信号线DATA1和第二信号线DATA2例如输出高电平信号，第一电容C1和第二电容C2分别被独立充电，由此第二节点152和第四节点154的电压根据数据线DATA1和DATA2上的数据电压分别被升高，因此第一晶体管T1和第六晶体管T6的控制端也接收高电平信号。此外，第一监控线SENSE1处于低电平状态，第一电源端OVDD处于高电平状态。因此，在发光阶段EL，第一晶体管T1至第三晶体管T3、第六晶体管T6至第七晶体管T7导通，第四晶体管T4和第五晶体管T5关闭，图3B所示的电路图可以等效为图4A所示的电路图，也即是电容控制电路将第一电容和第二电容彼此断开，并且使得驱动电路驱动第一有机发光元件和第二有机发光元件工作。例如，本公开再一个实施例提供的另一种像素电路的驱动方法的详细内容可以参见图3-图5所示的像素电路的实施例，在此不再赘述。
例如，图13A是本公开再一个实施例提供的再一种像素电路的驱动方法的示例性流程图。例如，以图7A和图7B示出的像素电路为例，如图13A所示，该像素电路的驱动方法可以包括以下步骤：
步骤S310：在第一监测阶段M1，使电容控制电路将第一电容和第二电容彼此并联，并且使得第一感测电路对第一驱动电路或第一有机发光元件进行监测；
步骤S320：在第二监测阶段M2，使电容控制电路将第一电容和第二电容彼此并联，并且使得第二感测电路对第二驱动电路或第二有机发光元件进行监测；
步骤S330：在发光阶段EL，使电容控制电路将第一电容和第二电容彼 此断开，并且使得驱动电路驱动第一有机发光元件和/或第二有机发光元件工作。
例如，图13B是图13A所示的驱动方法的一种示例性时序图。例如，图7B示出的第二晶体管T2至第五晶体管T5、第七晶体管T7至第十晶体管T10的控制端可以分别用G2-G5、G7-G10表示。
例如，如图13B所示，在第一监测阶段M1，第二晶体管T2至第五晶体管T5以及第九晶体管T9的控制端G2-G5、G9接收到高电平信号且第七晶体管T7至第八晶体管T8以及第十晶体管T10的控制端G7-G8、G10接收到低电平信号，第一信号线DATA1输出高电平信号，第二信号线DATA2输出低电平信号，第一电容C1和第二电容C2被充电，由此第二节点152的电压升高，因此第一晶体管T1和第六晶体管T1的控制端接收高电平信号。此外，使得第六晶体管T6的第一端与第一电源端OVDD断开，第一监控线SENSE1处于悬空状态，第一电源端OVDD处于高电平状态。因此，在第一监测阶段M1，第一晶体管T1至第五晶体管T5以及第九晶体管T9导通、第七晶体管T7、第八晶体管T8以及第十晶体管T10关闭，第六晶体管T6虽然导通，由于其第一端与第一电源端OVDD断开因此不影响监测操作，图7B所示的电路图可以等效为图8B-图8D所示的电路图，也即是电容控制电路将第一电容和第二电容彼此并联，并且使得第一感测电路对第一驱动电路进行监测，此外，在第一监测阶段M1，还可以对第一有机发光元件进行监测，具体的驱动时序图可以参照像素电路实施例以及图13B获得，在此不再赘述。
例如，如图13B所示，在第二监测阶段M2，第四晶体管T4至第五晶体管T5、第七晶体管T7至第八晶体管T8以及第十晶体管T10的控制端G4-G5、G7-G8、G10接收到高电平信号且第二晶体管T2至第三晶体管T3以及第九晶体管T9的控制端G2-G3、G9接收到低电平信号，第一信号线DATA1输出低电平信号，第二信号线DATA2输出高电平信号，第一电容C1和第二电容C2被充电，由此第四节点154的电压升高，因此第一晶体管T1和第六晶体管T6的控制端接收高电平信号。此外，使得第一晶体管T1的第一端与第一电源端OVDD断开，第一监控线SENSE1处于悬空状态，第一电源端OVDD输出高电平信号。因此，在第二监测阶段M2，第四晶体管T4至第八晶体管 T8以及第十晶体管T10导通、第三晶体管T3以及第九晶体管T9关闭，第一晶体管T1虽然导通，由于其第一端与第一电源端OVDD断开因此不影响监测操作，图7B所示的电路图可以等效为图9A-9C所示的电路图，也即是电容控制电路将第一电容和第二电容彼此并联，并且使得第二感测电路对第二驱动电路进行监测，此外，在第二监测阶段M2，还可以对第二有机发光元件进行监测，具体的驱动时序图可以参照像素电路实施例以及图13B获得，在此不再赘述。
例如，如图13B所示，在发光阶段EL，第二晶体管T2至第三晶体管T3以及第七晶体管T7至第十晶体管T10的控制端G2-G3、G7-G10接收到高电平信号且第四晶体管T4和第五晶体管T5的控制端G4-G5接收到低电平信号，第一信号线DATA1和第二信号线DATA2输出高电平信号，第一电容C1和第二电容C2分别被独立充电，由此第二节点152和第四节点154的电压根据数据线DATA1和DATA2上的数据电压分别被升高，因此第一晶体管T1和第六晶体管T6的控制端也接收高电平信号。此外，第一监控线SENSE1处于低电平状态，第一电源端OVDD处于高电平状态。因此，在发光阶段EL，第一晶体管T1至第三晶体管T3以及第六晶体管T6至第十晶体管T10导通，第四晶体管T4和第五晶体管T5关闭，图7B所示的电路图可以等效为图8A所示的电路图，也即是电容控制电路可以将第一电容和第二电容彼此断开，并且使得驱动电路驱动第一有机发光元件和第二有机发光元件工作。由上述描述可以看出，第一有机发光元件和第二有机发光元件工作是彼此独立工作的，因此是否开启以及发光的亮度可以分别由第一数据线DATA1和第二数据线DATA2独立控制。例如，本公开再一个实施例提供的再一种像素电路的驱动方法的详细内容可以参见图7-图9所示的像素电路的实施例，在此不再赘述。
例如，图11B、图12B和图13B仅是示例性的分别示出了图11A、图12A和图13A所示的驱动方法的时序图。例如，图13B在示出高电平时，在整个第一监测阶段M1、第二监测阶段M2或显示阶段EL均显示为高电平，然而本公开的实施例并不限于此，例如，对于第二晶体管T2至第三晶体管T3、第七晶体管T7至第八晶体管T8，在向其输入高电平信号时，可以在一个阶段部分时间输入高电平信号(例如，对于发光阶段，可以仅在发光阶段初期 的信号写入阶段为输入高电平信号)，在该阶段的其余时间输入低电平信号，由此可以降低像素电路的驱动功耗。
例如，在本公开一个实施例提供的驱动方法的时序图中，为了清楚起见，仅描述了第一监测阶段和/或第二监测阶段以及发光阶段，对于像素电路的其它可以存在的工作阶段均为本领域的普通技术人员应该理解可以具有的，在此不做赘述，也不应作为对本发明实施例的限制。
本公开再一个实施例提供的像素电路的驱动方法可以加快感测阶段的充电速度、提升了感测值的准确性，并由此提升了补偿效果。
虽然上文中已经用一般性说明及具体实施方式，对本公开作了详尽的描述，但在本公开实施例基础上，可以对之作一些修改或改进，这对本领域技术人员而言是显而易见的。因此，在不偏离本公开精神的基础上所做的这些修改或改进，均属于本公开要求保护的范围。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。
本申请要求于2017年5月12日提交的中国专利申请第201710333212.5的优先权，该中国专利申请的全文通过引用的方式结合于此以作为本申请的一部分。

Claims (17)

  1. 一种像素电路，包括：第一选择电路、第一驱动电路、第一电容、第一感测电路、第一有机发光元件、第二电容以及电容控制电路，其中，
    所述第一选择电路和所述第一电容电连接且所述第一选择电路和所述第一电容配置为控制所述第一驱动电路；
    所述第一驱动电路与所述第一有机发光元件电连接且配置为驱动所述第一有机发光元件；
    所述第一感测电路与所述第一驱动电路和所述第一有机发光元件电连接且配置为感测所述第一驱动电路或所述第一有机发光元件；以及
    所述电容控制电路配置为将所述第一电容和所述第二电容并联或断开。
  2. 如权利要求1所述的像素电路，其中，所述第一电容与所述第一感测电路电连接。
  3. 如权利要求1或2所述的像素电路，还包括第二选择电路、第二驱动电路和第二有机发光元件，其中，
    所述第二选择电路和所述第二电容配置为控制所述第二驱动电路，
    所述第二驱动电路与所述第二有机发光元件电连接且配置为驱动所述第二有机发光元件。
  4. 如权利要求3所述的像素电路，还包括第二感测电路，其中，所述第二感测电路与所述第二驱动电路和所述第二有机发光元件电连接且配置为感测所述第二驱动电路或所述第二有机发光元件。
  5. 如权利要求4所述的像素电路，还包括第一控制电路和第二控制电路，其中，所述第一控制电路配置为控制所述第一驱动电路是否与第一电源端电连接，所述第二控制电路配置为控制所述第二驱动电路是否与所述第一电源端电连接。
  6. 如权利要求5所述的像素电路，还包括第一节点和第二节点；
    其中，
    所述第一驱动电路包括第一晶体管；
    所述第一选择电路包括第二晶体管；
    所述第一感测电路包括第三晶体管；
    所述电容控制电路包括第四晶体管；
    所述第一晶体管的第一端配置为电连接到所述第一电源端，所述第一晶体管的第二端电连接到第一节点，所述第一晶体管的控制端电连接到第二节点；
    所述第二晶体管的第一端配置为电连接到第一数据线，所述第二晶体管的第二端电连接到第二节点；
    所述第三晶体管的第一端电连接到所述第一节点，所述第三晶体管的第二端配置为电连接到第一监控线；
    所述第四晶体管的第一端电连接到所述第二节点，所述第四晶体管的第二端电连接到所述第二电容的第一端；
    所述第二电容的第二端电连接到第一节点；
    所述第一电容的第一端电连接到所述第一节点，所述第一电容的第二端电连接到所述第二节点；
    所述第一有机发光元件的第一端电连接到所述第一节点，所述第一有机发光元件的第二端配置为电连接到第二电源端。
  7. 如权利要求5所述的像素电路，还包括第一节点和第二节点；
    其中，
    所述第一驱动电路包括第一晶体管；
    所述第一选择电路包括第二晶体管；
    所述第一感测电路包括第三晶体管；
    所述电容控制电路包括第四晶体管和第五晶体管；
    所述第一晶体管的第一端配置为电连接到所述第一电源端，所述第一晶体管的第二端电连接到第一节点，所述第一晶体管的控制端电连接到第二节点；
    所述第二晶体管的第一端配置为电连接到第一数据线，所述第二晶体管的第二端电连接到第二节点；
    所述第三晶体管的第一端电连接到所述第一节点，所述第三晶体管的第二端配置为电连接到第一监控线；
    所述第四晶体管的第一端电连接到所述第二节点，所述第四晶体管的第二端电连接到所述第二电容的第一端；
    所述第五晶体管的第一端电连接到所述第一节点，所述第五晶体管的第二端电连接到所述第二电容的第二端；
    所述第一电容的第一端电连接到所述第一节点，所述第一电容的第二端电连接到所述第二节点；
    所述第一有机发光元件的第一端电连接到所述第一节点，所述第一有机发光元件的第二端配置为电连接到第二电源端。
  8. 如权利要求6或7所述的像素电路，还包括第三节点和第四节点，其中，
    所述第二驱动电路包括第六晶体管；
    所述第二选择电路包括第七晶体管；
    所述第六晶体管的第一端配置为电连接到所述第一电源端，所述第六晶体管的第二端电连接到第三节点，所述第六晶体管的控制端电连接到第四节点；
    所述第七晶体管的第一端配置为电连接到第二数据线，所述第七晶体管的第二端电连接到所述第四节点；
    所述第二电容的第一端电连接到所述第四节点，所述第二电容的第二端电连接到所述第三节点；
    所述第二有机发光元件的第一端电连接到所述第三节点，所述第二有机发光元件的第二端配置为电连接到所述第二电源端。
  9. 如权利要求8所述的像素电路，其中，所述第二感测电路包括第八晶体管，所述第八晶体管的第一端电连接到所述第三节点，所述第八晶体管的第二端配置为电连接到第二监控线。
  10. 如权利要求9所述的像素电路，其中，
    所述第一控制电路包括第九晶体管；所述第二控制电路包括第十晶体管；
    所述第九晶体管的第一端电连接到所述第一晶体管的第一端，所述第九晶体管的第二端配置为电连接到所述第一电源端；
    所述第十晶体管的第一端电连接到所述第六晶体管的第一端，所述第十晶体管的第二端配置为电连接到所述第一电源端。
  11. 如权利要求7所述的像素电路，其中，所述第四晶体管的控制端和所述第五晶体管的控制端配置为电连接到同一信号线。
  12. 如权利要求7-10任一所述的像素电路，其中，所述第二电源端为接地端。
  13. 如权利要求2-10任一所述的像素电路，其中，所述第一有机发光元件和所述第二有机发光元件发出不同颜色的光。
  14. 一种显示面板，包括如权利要求1-13任一所述的像素电路。
  15. 一种如权利要求1的像素电路的驱动方法，包括：
    在第一监测阶段，使所述电容控制电路将所述第一电容和所述第二电容彼此并联，并且使得所述第一感测电路对所述第一驱动电路或所述第一有机发光元件进行监测。
  16. 如权利要求15所述的驱动方法，还包括：
    在发光阶段，使所述电容控制电路将所述第一电容和所述第二电容彼此断开，并且使得所述驱动电路驱动所述第一有机发光元件工作。
  17. 如权利要求15或16所述的驱动方法，所述像素电路还包括第二选择电路、第二驱动电路和第二有机发光元件，所述第二选择电路和所述第二电容配置为控制所述第二驱动电路，所述第二驱动电路与所述第二有机发光元件电连接且配置为驱动所述第二有机发光元件，
    所述驱动方法还包括：
    在第二监测阶段，使所述电容控制电路将所述第一电容和所述第二电容彼此并联，并且使得所述第一感测电路对所述第二驱动电路或所述第二有机发光元件进行监测。
PCT/CN2017/112907 2017-05-12 2017-11-24 像素电路及其驱动方法、显示面板 WO2018205556A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US15/780,454 US10622424B2 (en) 2017-05-12 2017-11-24 Pixel circuit and driving method thereof, display panel
EP17898331.8A EP3624101B1 (en) 2017-05-12 2017-11-24 Pixel circuit and drive method therefor, and display panel
JP2018547427A JP7025341B2 (ja) 2017-05-12 2017-11-24 画素回路及びその駆動方法、ディスプレイパネル

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710333212.5 2017-05-12
CN201710333212.5A CN108877649B (zh) 2017-05-12 2017-05-12 像素电路及其驱动方法、显示面板

Publications (1)

Publication Number Publication Date
WO2018205556A1 true WO2018205556A1 (zh) 2018-11-15

Family

ID=64105605

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/112907 WO2018205556A1 (zh) 2017-05-12 2017-11-24 像素电路及其驱动方法、显示面板

Country Status (5)

Country Link
US (1) US10622424B2 (zh)
EP (1) EP3624101B1 (zh)
JP (1) JP7025341B2 (zh)
CN (1) CN108877649B (zh)
WO (1) WO2018205556A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113053321A (zh) * 2019-12-26 2021-06-29 乐金显示有限公司 有机发光显示装置及其驱动方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108120915B (zh) * 2017-12-15 2020-05-05 京东方科技集团股份有限公司 应用于显示面板的老化处理方法及老化处理系统
CN109192071B (zh) * 2018-10-16 2021-03-23 京东方科技集团股份有限公司 显示面板及其形变感应方法、显示装置
TWI703372B (zh) * 2019-05-15 2020-09-01 友達光電股份有限公司 光感測電路、光感測電路的驅動方法以及顯示面板
CN111028774B (zh) * 2019-12-16 2021-07-06 深圳市华星光电半导体显示技术有限公司 显示面板及显示终端
CN111445852A (zh) * 2020-05-06 2020-07-24 Oppo广东移动通信有限公司 像素补偿电路、显示装置及补偿方法
CN113870767B (zh) * 2020-06-29 2023-02-07 京东方科技集团股份有限公司 像素电路、显示基板、显示面板和显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102959609A (zh) * 2010-09-06 2013-03-06 松下电器产业株式会社 显示装置及其制造方法
CN104036719A (zh) * 2013-03-08 2014-09-10 伊格尼斯创新公司 用于amoled显示器的像素电路
CN105047137A (zh) * 2015-09-09 2015-11-11 深圳市华星光电技术有限公司 Amoled实时补偿系统
CN105551427A (zh) * 2014-10-30 2016-05-04 业鑫科技顾问股份有限公司 有机发光二极管显示器及其驱动方法
US20160171930A1 (en) * 2014-12-10 2016-06-16 Lg Display Co., Ltd. Organic light emitting diode display device
CN105741784A (zh) * 2014-12-24 2016-07-06 乐金显示有限公司 有机发光二极管显示面板和有机发光二极管显示装置
CN106486059A (zh) * 2015-08-31 2017-03-08 乐金显示有限公司 有机发光显示器和驱动该有机发光显示器的方法

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4498669B2 (ja) * 2001-10-30 2010-07-07 株式会社半導体エネルギー研究所 半導体装置、表示装置、及びそれらを具備する電子機器
US9280933B2 (en) * 2004-12-15 2016-03-08 Ignis Innovation Inc. System and methods for extraction of threshold and mobility parameters in AMOLED displays
WO2006090560A1 (ja) * 2005-02-25 2006-08-31 Kyocera Corporation 画像表示装置
JP5795893B2 (ja) * 2011-07-07 2015-10-14 株式会社Ｊｏｌｅｄ 表示装置、表示素子、及び、電子機器
KR101859474B1 (ko) * 2011-09-05 2018-05-23 엘지디스플레이 주식회사 유기 발광 다이오드 표시 장치의 화소 회로
KR101528148B1 (ko) * 2012-07-19 2015-06-12 엘지디스플레이 주식회사 화소 전류 측정을 위한 유기 발광 다이오드 표시 장치 및 그의 화소 전류 측정 방법
KR101486538B1 (ko) * 2012-08-17 2015-01-26 엘지디스플레이 주식회사 유기 발광 다이오드 표시장치 및 그 구동 방법
KR20140081262A (ko) * 2012-12-21 2014-07-01 삼성디스플레이 주식회사 화소 및 이를 이용한 유기전계발광 표시장치
CN103208255B (zh) * 2013-04-15 2015-05-20 京东方科技集团股份有限公司 像素电路、像素电路驱动方法及显示装置
US9911799B2 (en) * 2013-05-22 2018-03-06 Samsung Display Co., Ltd. Organic light-emitting display apparatus and method of repairing the same
CN103310728B (zh) * 2013-05-29 2015-05-20 京东方科技集团股份有限公司 发光二极管像素单元电路和显示面板
CN103310729B (zh) * 2013-05-29 2015-05-27 京东方科技集团股份有限公司 发光二极管像素单元电路和显示面板
CN103325341B (zh) 2013-06-26 2015-07-01 京东方科技集团股份有限公司 一种amoled像素电路及其驱动方法、显示装置
CN103413524B (zh) * 2013-07-31 2015-06-17 京东方科技集团股份有限公司 有机发光二极管像素电路及其驱动方法、显示装置
CN103413523B (zh) * 2013-07-31 2015-05-27 京东方科技集团股份有限公司 一种像素电路、有机电致发光显示面板及显示装置
KR102208918B1 (ko) * 2013-10-22 2021-01-29 삼성디스플레이 주식회사 유기발광표시장치
KR102096056B1 (ko) * 2013-10-23 2020-04-02 삼성디스플레이 주식회사 유기 발광 표시 장치
KR102088227B1 (ko) * 2013-12-02 2020-03-12 엘지디스플레이 주식회사 리페어 구조를 갖는 표시장치
KR102117889B1 (ko) * 2013-12-11 2020-06-02 엘지디스플레이 주식회사 표시 장치의 화소 회로 및 이를 포함하는 유기 발광 표시 장치 및 그의 구동 방법
KR102102251B1 (ko) 2013-12-24 2020-04-20 엘지디스플레이 주식회사 유기 발광 표시 장치
CN103700345B (zh) * 2013-12-27 2015-09-23 京东方科技集团股份有限公司 有机发光二极管像素电路及其驱动方法、显示面板
KR102068589B1 (ko) * 2013-12-30 2020-01-21 엘지디스플레이 주식회사 유기 발광 표시 장치 및 그의 구동 방법
KR102091485B1 (ko) * 2013-12-30 2020-03-20 엘지디스플레이 주식회사 유기 발광 표시 장치 및 그의 구동 방법
KR102154501B1 (ko) * 2014-04-16 2020-09-11 삼성디스플레이 주식회사 표시 장치 및 그 구동 방법
CN103971639B (zh) * 2014-05-06 2016-01-06 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、阵列基板及显示装置
CN103996376B (zh) * 2014-05-14 2016-03-16 京东方科技集团股份有限公司 像素驱动电路、驱动方法、阵列基板及显示装置
CN104103239B (zh) * 2014-06-23 2016-05-04 京东方科技集团股份有限公司 有机发光二极管像素电路及其驱动方法
US9778800B2 (en) * 2014-06-27 2017-10-03 Boe Technology Group Co., Ltd. Pixel circuit, display panel and display apparatus
TWI527012B (zh) * 2014-07-03 2016-03-21 友達光電股份有限公司 發光二極體畫素電路及其驅動方法
KR102168879B1 (ko) * 2014-07-10 2020-10-23 엘지디스플레이 주식회사 유기발광다이오드의 열화를 센싱할 수 있는 유기발광 표시장치
CN104282265B (zh) * 2014-09-26 2017-02-01 京东方科技集团股份有限公司 像素电路及其驱动方法、有机发光显示面板及显示装置
KR102230928B1 (ko) * 2014-10-13 2021-03-24 삼성디스플레이 주식회사 유기 발광 표시 장치 및 이의 구동 방법
CN104392691A (zh) * 2014-11-26 2015-03-04 友达光电股份有限公司 一种像素电路
KR102334265B1 (ko) * 2014-12-02 2021-12-01 삼성디스플레이 주식회사 유기 발광 표시 장치 및 이의 구동 방법
KR102356593B1 (ko) * 2015-01-14 2022-01-28 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 구동 방법
CN104575393B (zh) * 2015-02-03 2017-02-01 深圳市华星光电技术有限公司 Amoled像素驱动电路及像素驱动方法
KR102285393B1 (ko) * 2015-03-13 2021-08-04 삼성디스플레이 주식회사 유기 발광 표시 장치 및 이의 구동 방법
CN104778923B (zh) * 2015-04-28 2016-06-01 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示装置
KR102320459B1 (ko) * 2015-05-29 2021-11-03 엘지디스플레이 주식회사 슈퍼픽셀에서의 다중 센싱 방법 및 이를 적용하는 유기발광표시장치
US9946375B2 (en) * 2015-06-30 2018-04-17 Synaptics Incorporated Active matrix capacitive fingerprint sensor with 2-TFT pixel architecture for display integration
CN107851729B (zh) * 2015-08-07 2020-07-28 株式会社半导体能源研究所 发光元件、显示装置、电子设备及照明装置
KR102408900B1 (ko) * 2015-10-23 2022-06-16 엘지디스플레이 주식회사 스캔 구동부, 표시장치 및 이의 구동방법
CN108475491B (zh) * 2015-12-18 2021-04-20 株式会社半导体能源研究所 半导体装置以及包括该半导体装置的显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102959609A (zh) * 2010-09-06 2013-03-06 松下电器产业株式会社 显示装置及其制造方法
CN104036719A (zh) * 2013-03-08 2014-09-10 伊格尼斯创新公司 用于amoled显示器的像素电路
CN105551427A (zh) * 2014-10-30 2016-05-04 业鑫科技顾问股份有限公司 有机发光二极管显示器及其驱动方法
US20160171930A1 (en) * 2014-12-10 2016-06-16 Lg Display Co., Ltd. Organic light emitting diode display device
CN105741784A (zh) * 2014-12-24 2016-07-06 乐金显示有限公司 有机发光二极管显示面板和有机发光二极管显示装置
CN106486059A (zh) * 2015-08-31 2017-03-08 乐金显示有限公司 有机发光显示器和驱动该有机发光显示器的方法
CN105047137A (zh) * 2015-09-09 2015-11-11 深圳市华星光电技术有限公司 Amoled实时补偿系统

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3624101A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113053321A (zh) * 2019-12-26 2021-06-29 乐金显示有限公司 有机发光显示装置及其驱动方法
CN113053321B (zh) * 2019-12-26 2024-02-02 乐金显示有限公司 有机发光显示装置及其驱动方法

Also Published As

Publication number Publication date
CN108877649A (zh) 2018-11-23
JP2020519913A (ja) 2020-07-02
JP7025341B2 (ja) 2022-02-24
EP3624101A4 (en) 2021-01-13
EP3624101B1 (en) 2024-01-03
US10622424B2 (en) 2020-04-14
US20190280066A1 (en) 2019-09-12
EP3624101A1 (en) 2020-03-18
CN108877649B (zh) 2020-07-24

Similar Documents

Publication Publication Date Title
WO2018205556A1 (zh) 像素电路及其驱动方法、显示面板
US9721508B2 (en) Pixel circuit and driving method thereof, organic light-emitting display device
US9805651B2 (en) Organic light emitting display apparatus
US9583041B2 (en) Pixel circuit and driving method thereof, display panel, and display device
US20210327347A1 (en) Pixel circuit and driving method thereof, and display panel
US10909925B2 (en) Pixel circuit and driving method thereof, display panel and display device
US9262966B2 (en) Pixel circuit, display panel and display apparatus
CN107393470B (zh) 像素电路及其驱动方法、显示基板和显示装置
CN103165080B (zh) 像素电路及其驱动方法、显示装置
US10181283B2 (en) Electronic circuit and driving method, display panel, and display apparatus
WO2016045283A1 (zh) 像素驱动电路、方法、显示面板和显示装置
US8648848B2 (en) Display device and displaying method thereof, and driving circuit for current-driven device
TWI688943B (zh) 畫素電路及其驅動方法
CN104809989A (zh) 一种像素电路、其驱动方法及相关装置
JP6942816B2 (ja) 表示パネル、画素駆動回路およびその駆動方法
CN105185305A (zh) 一种像素电路、其驱动方法及相关装置
KR20190141755A (ko) 디스플레이 패널, 픽셀 구동 회로 및 이의 구동 방법
CN104361857A (zh) 有机发光显示器像素驱动电路
WO2016023311A1 (zh) 像素驱动电路及其驱动方法和显示装置
WO2015051682A1 (zh) 像素电路及其驱动方法、薄膜晶体管背板
TW201314656A (zh) 畫素電路及其驅動方法
WO2020187158A1 (zh) 像素驱动电路和显示面板及其驱动方法、显示装置
KR20140124535A (ko) 화소 및 이를 이용한 유기전계발광 표시장치
WO2015172411A1 (zh) 面板驱动电路及面板驱动方法
CN104715712A (zh) 一种像素电路及其驱动方法和应用

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2018547427

Country of ref document: JP

Kind code of ref document: A

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17898331

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2017898331

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2017898331

Country of ref document: EP

Effective date: 20191212