WO2018188132A1 - 一种变压器电路以及降低空载功耗的方法 - Google Patents

一种变压器电路以及降低空载功耗的方法 Download PDF

Info

Publication number
WO2018188132A1
WO2018188132A1 PCT/CN2017/082631 CN2017082631W WO2018188132A1 WO 2018188132 A1 WO2018188132 A1 WO 2018188132A1 CN 2017082631 W CN2017082631 W CN 2017082631W WO 2018188132 A1 WO2018188132 A1 WO 2018188132A1
Authority
WO
WIPO (PCT)
Prior art keywords
power supply
supply circuit
circuit
diode
capacitor
Prior art date
Application number
PCT/CN2017/082631
Other languages
English (en)
French (fr)
Inventor
李文东
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US15/552,744 priority Critical patent/US10199857B2/en
Priority to EP17905526.4A priority patent/EP3611819A4/en
Priority to JP2019555651A priority patent/JP6886527B2/ja
Priority to KR1020197033284A priority patent/KR102282142B1/ko
Publication of WO2018188132A1 publication Critical patent/WO2018188132A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/34—Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/341—Preventing or reducing no-load losses or reactive currents
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/34—Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/38—Auxiliary core members; Auxiliary coils or windings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/28—Coils; Windings; Conductive connections
    • H01F27/29—Terminals; Tapping arrangements for signal inductances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F29/00—Variable transformers or inductances not covered by group H01F21/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F29/00—Variable transformers or inductances not covered by group H01F21/00
    • H01F29/02—Variable transformers or inductances not covered by group H01F21/00 with tappings on coil or winding; with provision for rearrangement or interconnection of windings
    • H01F29/025—Constructional details of transformers or reactors with tapping on coil or windings
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/10—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using transformers
    • H02M5/12—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using transformers for conversion of voltage or current amplitude only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0006—Arrangements for supplying an adequate voltage to the control circuit of converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0032—Control circuits allowing low power mode operation, e.g. in standby mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to the field of electronic technologies, and in particular, to a transformer circuit and a method for reducing no-load power consumption.
  • the voltage of the secondary winding of the transformer tends to vary within a large interval.
  • the voltage output from the auxiliary winding is proportional to the voltage of the secondary winding of the transformer, when the voltage at the output of the transformer is low, the voltage coupled to the auxiliary winding is also lower, and the output of the auxiliary winding is lower. The voltage is lower.
  • the auxiliary winding is generally powered by the auxiliary winding circuit, and the auxiliary winding circuit is usually provided with a semiconductor device such as a diode or a triode.
  • a Zener diode is generally added to the auxiliary winding circuit to ensure that the input voltage of the chip is not lower than the voltage of the Zener diode (for example, setting a voltage regulator)
  • the diode's regulation value is 15V).
  • the Zener diode when the Zener diode is set, if the voltage output from the secondary winding of the transformer becomes higher, the voltage of the corresponding auxiliary winding output will also rise, and the input voltage of the auxiliary winding circuit will rise due to the setting of the Zener diode.
  • the output voltage of the auxiliary winding circuit is still maintained at the voltage of the Zener diode, and the voltage drop between the input voltage and the output voltage of the auxiliary winding circuit is increased, and components in the auxiliary winding circuit (for example, semiconductor devices such as diodes and transistors) The voltage drop will also increase correspondingly, resulting in an increase in no-load power consumption.
  • the invention discloses a transformer circuit and a method for reducing no-load power consumption, which can reduce no-load power consumption.
  • a first aspect of the invention discloses a transformer circuit comprising a transformer, an auxiliary winding circuit, the transformer comprising a core, a primary winding, a secondary winding and an auxiliary winding, the auxiliary winding circuit connecting the auxiliary winding, the primary winding
  • the secondary winding and the auxiliary winding are respectively wound on the iron core
  • the auxiliary winding circuit is used to supply power to the chip
  • the auxiliary winding circuit includes a first supply An electrical circuit and a second power supply circuit, the auxiliary winding including a first end, a second end, and a tap between the first end and the second end, wherein:
  • a first end of the auxiliary winding is connected to an input end of the first power supply circuit, a tap of the auxiliary winding is connected to an input end of the second power supply circuit, and an output end of the first power supply circuit is connected to the second power supply An output end of the circuit and a power supply end of the chip, a second end of the auxiliary winding is grounded; an input voltage of the second power supply circuit is smaller than an input voltage of the first power supply circuit; the first power supply circuit is stable a voltage circuit, the second power supply circuit is a step-down circuit;
  • the first power supply circuit When the output voltage of the second power supply circuit is greater than the output voltage of the first power supply circuit, the first power supply circuit is turned off, and the auxiliary winding supplies power to the chip through the second power supply circuit; When the output voltage of the second power supply circuit is smaller than the output voltage of the first power supply circuit, the second power supply circuit is turned off, and the auxiliary winding supplies power to the chip through the first power supply circuit.
  • a second aspect of the present invention discloses a method for reducing no-load power consumption, which is applied to a transformer circuit disclosed in the first aspect of the present invention
  • the method includes:
  • the first power supply circuit When the output voltage of the second power supply circuit is greater than the output voltage of the first power supply circuit, the first power supply circuit is turned off, and the first power supply circuit stops supplying power to the chip;
  • the auxiliary winding supplies power to the chip through the second power supply circuit.
  • the transformer circuit of the present invention comprises a transformer and an auxiliary winding circuit.
  • the transformer comprises a core, a primary winding, a secondary winding and an auxiliary winding, the auxiliary winding circuit is used for supplying power to the chip, the auxiliary winding circuit is connected to the auxiliary winding of the transformer, and the auxiliary winding circuit comprises a first power supply circuit and a second power supply circuit, the auxiliary winding includes a first end, a second end, and a tap between the first end and the second end, the first end of the auxiliary winding is connected to the input end of the first power supply circuit, and the auxiliary The tap of the winding is connected to the input end of the second power supply circuit, the output end of the first power supply circuit is connected to the output end of the second power supply circuit and the power supply end of the chip, and the second end of the auxiliary winding is grounded; the input voltage of the second power supply circuit is smaller than the first The input voltage of the power supply circuit; when the output voltage of the second power supply circuit is greater
  • the input voltage of the first power supply circuit is provided by the voltage between the first end and the second end of the auxiliary winding, that is, the input voltage of the first power supply circuit is provided by the output voltage of the entire auxiliary winding, and the second power supply
  • the input voltage of the circuit is provided by the voltage between the tap of the auxiliary winding and the second end, that is, the input voltage of the second power supply circuit is partially assisted
  • the output voltage of the winding is provided. Since the number of turns of the partial auxiliary winding is less than the number of turns of the entire auxiliary winding, the input voltage of the second power supply circuit is smaller than the input voltage of the first power supply circuit.
  • the chip When the voltage of the output of the auxiliary winding is low, the chip is powered by the voltage output by the first power supply circuit. When the voltage of the output of the auxiliary winding becomes high, the first power supply circuit is disconnected and stops working, and the chip is powered by the second power supply circuit.
  • the output voltage is supplied with power, and the invention can be implemented to disconnect the first power supply circuit in time when the voltage of the output of the auxiliary winding becomes high, so as to ensure no current flow on the components (for example, the triode) in the first power supply circuit.
  • the voltage drop across the components in the first power supply circuit is zero, thereby reducing the no-load power consumption on the components in the first power supply circuit.
  • FIG. 1 is a schematic structural view of a transformer circuit disclosed in the present invention
  • FIG. 2 is a schematic structural diagram of another transformer circuit disclosed in the present invention.
  • FIG. 3 is a schematic structural diagram of another transformer circuit disclosed in the present invention.
  • FIG. 4 is a schematic flow chart of a method for reducing no-load power consumption disclosed by the present invention.
  • the invention discloses a transformer circuit and a method for reducing no-load power consumption, which can reduce the voltage drop on the components of the auxiliary winding when the voltage of the auxiliary winding output is high, thereby reducing the no-load power consumption. The details are described below separately.
  • FIG. 1 is a schematic structural diagram of a transformer circuit disclosed in the present invention.
  • the transformer circuit includes a transformer 30 and an auxiliary winding circuit 10 for supplying power to the chip 20.
  • the transformer 30 includes a core 34, a primary winding 32, a secondary winding 33, and an auxiliary winding 31.
  • the winding circuit 10 is connected to the auxiliary winding 31 of the transformer 30.
  • the auxiliary winding circuit 10 includes a first power supply circuit 11 and a second power supply circuit 12.
  • the auxiliary winding 31 includes a first end 1, a second end 2, and a first end. Tap 3 between 1 and second end 2, where:
  • the first end 1 of the auxiliary winding 31 is connected to the input end 111 of the first power supply circuit 11, the tap 3 of the auxiliary winding 31 is connected to the input end 121 of the second power supply circuit 12, and the output end 112 of the first power supply circuit 11 is connected to the second power supply circuit 12.
  • the output end 122 and the power supply end 21 of the chip 20, the second end 2 of the auxiliary winding 31 is grounded; the input voltage of the second power supply circuit 12 is smaller than the input voltage of the first power supply circuit 11; the first power supply circuit 11 is a voltage stabilizing circuit.
  • the second power supply circuit 12 is a step-down circuit;
  • the auxiliary winding 31 supplies power to the chip 20 through the second power supply circuit 12; when the output of the second power supply circuit 12 is output When the voltage is lower than the output voltage of the first power supply circuit 11, the second power supply circuit 12 is turned off, and the auxiliary winding pass 31 supplies power to the chip 20 through the first power supply circuit 11.
  • the input voltage of the first power supply circuit 11 is supplied from the first terminal 1 of the auxiliary winding 31, and the input voltage of the second power supply circuit 12 is supplied from the tap 3 of the auxiliary winding 31.
  • the input voltage of the first power supply circuit 11 It is larger than the input voltage of the second power supply circuit 12. Since the first power supply circuit 11 is a voltage stabilization circuit, regardless of the input voltage of the first power supply circuit 11, the voltage output by the first power supply circuit 11 is a fixed voltage value, and when the voltage at the output end of the second power supply circuit 12 is greater than a fixed value At the voltage value, the first power supply circuit 11 is disconnected, and the first power supply circuit 11 stops supplying power to the chip 20, at which time the chip 20 is powered by the second power supply circuit 12.
  • the voltage output by the first power supply circuit 11 is a fixed voltage value. Since the second power supply circuit 12 is a step-down circuit, it is obvious that the second power supply circuit 12 The output voltage is smaller than the output voltage of the first power supply circuit 11. At this time, the second power supply circuit 12 is turned off, and the auxiliary winding 31 supplies power to the chip 20 through the first power supply circuit 11.
  • the output voltage of the second power supply circuit 12 is still less than the fixed voltage value, The output voltage of the two power supply circuits 12 is smaller than the output voltage of the first power supply circuit 11.
  • the second power supply circuit 12 is turned off, and the auxiliary winding 31 supplies power to the chip 20 through the first power supply circuit 11.
  • the voltage output from the tap 3 of the auxiliary winding 31 is greater than the fixed voltage value, if the voltage drop on the second power supply circuit 12 is ignored, the output voltage of the second power supply circuit 12 is greater than the fixed voltage value, that is, the second power supply circuit.
  • the output voltage of 12 is greater than the output voltage of the first power supply circuit 11.
  • the first power supply circuit 11 is turned off, and the auxiliary winding 31 supplies power to the chip 20 through the second power supply circuit 12.
  • the first power supply circuit 11 is turned off, First power supply circuit 11 No current flows through the components in the components, and the voltage drop across the components in the first power supply circuit 11 is zero, so that the no-load power consumption on the components in the first power supply circuit 11 can be reduced.
  • a first capacitor C1 may be connected to an output end of the first power supply circuit 11 and an output end of the second power supply circuit 12 , and an anode of the first capacitor C1 is connected to an output end of the first power supply circuit 11 .
  • the negative pole of the first capacitor C1 is grounded, and the first capacitor C1 is used for filtering, which can prevent the voltage fluctuation of the output of the first power supply circuit 11 or the second power supply circuit 12 to the chip 20 to be large, and ensure The voltage output to the chip 20 is stable.
  • the first power supply circuit 11 can be turned off when the voltage outputted from the first output terminal of the auxiliary winding 31 is high, so that the voltage drop across the components in the first power supply circuit 11 is Zero, thereby reducing the no-load power consumption on the components in the first power supply circuit 11.
  • FIG. 2 is a schematic view showing the specific structure of a transformer circuit disclosed in the present invention.
  • the transformer circuit includes a transformer 30 and an auxiliary winding circuit 10 for supplying power to the chip 20.
  • the transformer 30 includes a core 34, a primary winding 32, a secondary winding 33, and an auxiliary winding 31.
  • the winding circuit 10 is connected to the auxiliary winding 31 of the transformer 30.
  • the auxiliary winding circuit 10 includes a first power supply circuit 11 and a second power supply circuit 12.
  • the auxiliary winding 31 includes a first end 1, a second end 2, and a first end 1 and a second Tap 3 between end 2, where:
  • the input end 1 of the auxiliary winding 31 is connected to the input end 111 of the first power supply circuit 11, the tap 3 of the auxiliary winding 31 is connected to the input end 121 of the second power supply circuit 12, and the output end 112 of the first power supply circuit 11 is connected to the second power supply circuit 12.
  • the output end 122 and the power supply end 21 of the chip 20 are connected to the output end 2 of the auxiliary winding 31; the input voltage of the second power supply circuit 12 is smaller than the input voltage of the first power supply circuit 11;
  • the first power supply circuit 11 When the output voltage of the second power supply circuit 12 is greater than the output voltage of the first power supply circuit 11, the first power supply circuit 11 is turned off, and the auxiliary winding 31 supplies power to the chip 20 through the second power supply circuit 12.
  • a first capacitor C1 may be connected to an output end of the first power supply circuit 11 and an output end of the second power supply circuit 12, and an anode of the first capacitor C1 is connected to an output end of the first power supply circuit 11. With the output of the second power supply circuit 12, the negative pole of the first capacitor C1 is grounded, and the first capacitor C1 is used for filtering.
  • the first power supply circuit 11 includes a first resistor R1, a first diode D1, a first transistor T1, a second diode D2, a second resistor R2, and a Zener diode. ZD and a second capacitor C2, wherein:
  • the first transistor R1 is an NPN-type transistor, the first end of the first resistor R1 is connected to the first end 1 of the auxiliary winding 31, and the second end of the first resistor R1 is connected to the anode of the first diode D1, the first two The anode of the pole D1 is connected to the collector of the first transistor T1, the first end of the second resistor R2 and the anode of the second capacitor C2, and the emitter of the first transistor T1 is connected to the anode of the second diode D2.
  • the cathode of the second diode D2 is connected to the power supply end of the chip 20.
  • the base of the first transistor T1 is connected to the second end of the second resistor R2 and the cathode of the Zener ZD, and the anode and the cathode of the Zener ZD
  • the negative pole of the second capacitor C2 is grounded.
  • the second power supply circuit 12 includes a third diode D3, the anode of the third diode D3 is connected to the tap 3 of the auxiliary winding 31, and the cathode of the third diode D3 is connected to the second.
  • the voltage supplied from the first power supply circuit 11 to the chip 20 is It is 14V.
  • the auxiliary winding 31 supplies power to the chip 21 through the first power supply circuit 11, ensuring that the power supply voltage of the chip 21 is maintained at about 14V.
  • the voltage at the output of the two power supply circuit 12 is also maintained at about 14V, since the voltage at the input of the second power supply circuit 12 is provided by the tap 3 of the auxiliary winding 31 (when the voltage of the tap 3 is obviously less than 14V), the third diode D3 The positive voltage is lower than the negative voltage, and the third diode D3 is turned off, so that the second power supply circuit 12 is turned off.
  • the voltage drop of the third diode D3 is 0.7V
  • the voltage drop across the first transistor T1 and the second diode D2 is 1V in total
  • the voltage regulation value of the Zener diode ZD is 15V.
  • the voltage outputted by the second power supply circuit 12 is greater than 14V, since the voltage output from the first power supply circuit 11 to the chip 20 is still maintained at 14V, resulting in the first power supply circuit 11
  • the voltage drop across the first transistor T1 and the second diode D2 is less than 1V, the first transistor T1 and the second diode D2 cannot be turned on, and the first power supply circuit 11 is disconnected, and the chip 20 is
  • the supply voltage is provided by the second power supply circuit 12, at this time, the components in the first power supply circuit 11 No current flows, and the voltage drop across the components in the first power supply circuit 11 is zero, so that the no-load power consumption on the components in the first power supply circuit 11 can be reduced.
  • the first power supply circuit 11 can be turned off when the voltage outputted from the first end 1 of the auxiliary winding 31 is high, so that the first triode T1 in the first power supply circuit 11 The voltage drop across is zero, thereby reducing the no-load power consumption on the components in the first power supply circuit 11.
  • FIG. 3 is a schematic structural diagram of another transformer circuit disclosed in the present invention.
  • the transformer circuit includes a transformer 30, an auxiliary winding circuit 10, a primary winding circuit 40, a secondary winding circuit 50, and a transformer.
  • 30 includes a core 34, a primary winding 32, a secondary winding 33, and an auxiliary winding 31.
  • the primary winding circuit 40 is connected to the primary winding 32
  • the secondary winding circuit 50 is connected to the secondary winding 33
  • the auxiliary winding circuit 10 is connected to the auxiliary winding 31, the primary winding. 32.
  • the secondary winding 33 and the auxiliary winding 31 are wound on the iron core 34, respectively.
  • the auxiliary winding 31 includes a first end 1, a second end 2, and a tap 3 between the first end 1 and the second end 2.
  • the primary winding circuit 40 includes a pulse width modulation PWM controller 41, a MOS transistor Q1, a third resistor R3, a fourth diode D4, a third capacitor C3, a fourth capacitor C4, and a Four resistors R4, where:
  • the first end 4 of the primary winding 32 is connected to the anode of the third capacitor C3, the anode of the fourth capacitor C4, and the first end of the fourth resistor R4, the cathode of the fourth capacitor C4 is grounded, the cathode of the third capacitor C3, and the fourth resistor
  • the second end of R4 is connected to the negative electrode of the fourth diode D4, the positive end of the fourth diode D4 is connected to the second end 5 of the primary winding 32 and the drain of the MOS transistor Q1, and the source of the MOS transistor Q1 is connected to the third resistor.
  • the first end of R3, the second end of the third resistor R3 is grounded, and the gate of the MOS transistor Q1 is connected to the control terminal 411 of the PWM controller 41.
  • the secondary winding circuit 50 includes a fifth diode D5, a sixth diode D6, a fifth capacitor C5, and a sixth capacitor C6, wherein:
  • the first end 6 of the secondary winding 33 is connected to the anode of the fifth diode D5 and the anode of the sixth diode D6, the cathode of the fifth diode D5 and the cathode of the sixth diode D6 are connected to the fifth capacitor C5.
  • the positive electrode and the positive electrode of the sixth capacitor C6, the negative electrode of the fifth capacitor C5 and the negative electrode of the sixth capacitor C6 are grounded, and the second end 7 of the secondary winding 33 is grounded.
  • the voltage of the primary winding input of the transformer can be controlled by the duty ratio of the PWM signal outputted by the PWM controller 41, thereby controlling the voltage outputted by the secondary winding of the transformer and the voltage outputted by the auxiliary winding.
  • FIG. 4 is a schematic flowchart of a method for reducing no-load power consumption according to the present disclosure. The method is applied to the transformer circuit shown in FIG. 1 to FIG. 3. The method for reducing no-load power consumption includes the following steps. .
  • the auxiliary winding supplies power to the chip through the second power supply circuit.
  • step 401 can include:
  • the first transistor in the first power supply circuit is turned off, and the first power supply circuit stops supplying power to the chip.
  • step 402 may include:
  • the second power supply circuit After the first power supply circuit stops supplying power to the chip, the second power supply circuit inputs the voltage through the tap of the auxiliary winding, and the voltage input by the tap is output to the chip through the diode in the second power supply circuit.

Abstract

一种变压器电路以及降低空载功耗的方法，该变压器电路包括变压器（30）、辅助绕组电路（10），变压器（30）包括铁芯（34）、初级绕组（32）、次级绕组（33）以及辅助绕组（31），辅助绕组电路（10）连接辅助绕组（31），辅助绕组电路（10）包括第一供电电路（11）以及第二供电电路（12），辅助绕组（31）包括第一端（1）、第二端（2）以及位于第一端（1）和第二端（2）之间的抽头（3）。本方法可以降低空载功耗。

Description

一种变压器电路以及降低空载功耗的方法 技术领域
本发明涉及电子技术领域，尤其涉及一种变压器电路以及降低空载功耗的方法。
背景技术
目前的变压器为了满足宽电压输出的要求，变压器的次级绕组的电压往往会在较大的区间内变化。对于有辅助绕组的变压器而言，由于辅助绕组输出的电压与变压器的次级绕组的电压成正比，当变压器输出的电压较低时，耦合到辅助绕组上的电压也较低，辅助绕组输出的电压较低。辅助绕组一般通过辅助绕组电路为芯片供电，辅助绕组电路中通常设置有二极管、三极管等半导体器件。当辅助绕组输出的电压较低时，芯片的供电电压较低，芯片的供电电流较大，会对芯片造成损害。因此，为了避免变压器输出电压较低时对芯片造成损害，现有技术中一般在辅助绕组电路中加入稳压二极管，以保证芯片的输入电压不低于稳压二极管的电压(例如，设置稳压二极管的稳压值为15V)。然而，当设置了稳压二极管之后，如果变压器的次级绕组输出的电压变高，相应的辅助绕组输出的电压也会上升，辅助绕组电路的输入电压会升高，由于设置了稳压二极管，辅助绕组电路的输出电压仍然保持在稳压二极管的电压，辅助绕组电路的输入电压和输出电压之间的压降增大，辅助绕组电路中的元器件(例如，二极管、三极管等半导体器件)上的压降也会相应的增加，导致空载功耗增加。
发明内容
本发明公开了一种变压器电路以及降低空载功耗的方法，可以降低空载功耗。
本发明第一方面公开一种变压器电路，包括变压器、辅助绕组电路，所述变压器包括铁芯、初级绕组、次级绕组以及辅助绕组，所述辅助绕组电路连接所述辅助绕组，所述初级绕组、所述次级绕组以及所述辅助绕组分别缠绕在所述铁芯上，所述辅助绕组电路用于为芯片供电，所述辅助绕组电路包括第一供 电电路以及第二供电电路，所述辅助绕组包括第一端、第二端以及位于所述第一端和第二端之间的抽头，其中：
所述辅助绕组的第一端连接所述第一供电电路的输入端，所述辅助绕组的抽头连接所述第二供电电路输入端，所述第一供电电路的输出端连接所述第二供电电路的输出端以及所述芯片的供电端，所述辅助绕组的第二端接地；所述第二供电电路的输入电压小于所述第一供电电路的输入电压；所述第一供电电路为稳压电路，所述第二供电电路为降压电路；
当所述第二供电电路的输出电压大于所述第一供电电路的输出电压时，所述第一供电电路断开，所述辅助绕组通过所述第二供电电路对所述芯片供电；当所述第二供电电路的输出电压小于所述第一供电电路的输出电压时，所述第二供电电路断开，所述辅助绕组通过所述第一供电电路对所述芯片供电。
本发明第二方面公开降低空载功耗的方法，应用于本发明第一方面公开的变压器电路，
所述方法包括：
当所述第二供电电路的输出电压大于所述第一供电电路的输出电压时，所述第一供电电路断开，所述第一供电电路停止为所述芯片供电；
所述辅助绕组通过所述第二供电电路对所述芯片供电。
本发明中的变压器电路包括变压器、辅助绕组电路，变压器包括铁芯、初级绕组、次级绕组以及辅助绕组，辅助绕组电路用于为芯片供电，辅助绕组电路连接变压器的辅助绕组，辅助绕组电路包括第一供电电路以及第二供电电路，辅助绕组包括第一端、第二端以及位于第一端和第二端之间的抽头，辅助绕组的第一端连接第一供电电路的输入端，辅助绕组的抽头连接第二供电电路输入端，第一供电电路的输出端连接第二供电电路的输出端以及芯片的供电端，辅助绕组的第二端接地；第二供电电路的输入电压小于第一供电电路的输入电压；当第二供电电路的输出电压大于第一供电电路的输出电压时，第一供电电路断开，辅助绕组通过第二供电电路对芯片供电。本发明中，第一供电电路的输入电压由辅组绕组的第一端和第二端之间的电压提供，即第一供电电路的输入电压由整个辅组绕组的输出电压提供，第二供电电路的输入电压由辅组绕组的抽头和第二端之间的电压提供，即第二供电电路的输入电压由部分辅组 绕组的输出电压提供，由于部分辅组绕组的匝数小于整个辅组绕组的匝数，所以第二供电电路的输入电压小于第一供电电路的输入电压。当整个辅助绕组输出的电压较低时，芯片由第一供电电路输出的电压进行供电，当整个辅助绕组输出的电压变高时，第一供电电路断开，停止工作，芯片由第二供电电路输出的电压进行供电，实施本发明，可以在整个辅助绕组输出的电压变高时，及时将第一供电电路断开，保证第一供电电路中的元器件(例如，三极管)上的没有电流流过，第一供电电路中的元器件上的压降为零，从而可以降低第一供电电路中的元器件上的空载功耗。
附图说明
为了更清楚地说明本发明中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明公开的一种变压器电路的结构示意图；
图2是本发明公开的另一种变压器电路的具体结构示意图；
图3是本发明公开的另一种变压器电路结构示意图；
图4是本发明公开的一种降低空载功耗的方法流程示意图。
具体实施方式
下面结合附图，对本发明的实施例进行描述。
本发明公开了一种变压器电路以及降低空载功耗的方法，可以在辅助绕组输出的电压较高时，降低辅助绕组的元器件上的压降，进而降低空载功耗。以下分别进行详细说明。
请参阅图1，图1是本发明公开的一种变压器电路的结构示意图。如图1所示，该变压器电路包括变压器30和辅助绕组电路10，辅助绕组电路10用于为芯片20供电，变压器30包括铁芯34、初级绕组32、次级绕组33以及辅助绕组31，辅助绕组电路10连接变压器30的辅助绕组31，辅助绕组电路10包括第一供电电路11以及第二供电电路12，辅助绕组31包括第一端1、第二端2以及位于第一端 1和第二端2之间的抽头3，其中：
辅助绕组31的第一端1连接第一供电电路11的输入端111，辅助绕组31的抽头3连接第二供电电路12输入端121，第一供电电路11的输出端112连接第二供电电路12的输出端122以及芯片20的供电端21，辅助绕组31的第二端2接地；第二供电电路12的输入电压小于第一供电电路11的输入电压；第一供电电路11为稳压电路，第二供电电路12为降压电路；
当第二供电电路12的输出电压大于第一供电电路11的输出电压时，第一供电电路11断开，辅助绕组31通过第二供电电路12对芯片20供电；当第二供电电路12的输出电压小于第一供电电路11的输出电压时，第二供电电路12断开，辅助绕组通31过第一供电电路11对芯片20供电。
本发明中，第一供电电路11的输入电压由辅助绕组31的第一端1提供，第二供电电路12的输入电压由辅助绕组31的抽头3提供，显然，第一供电电路11的输入电压大于第二供电电路12的输入电压。由于第一供电电路11为稳压电路，无论第一供电电路11的输入电压为多少，第一供电电路11输出的电压均为固定电压值，并且当第二供电电路12的输出端的电压大于固定电压值时，第一供电电路11断开连接，第一供电电路11停止为芯片20供电，此时芯片20由第二供电电路12供电。
当辅助绕组31的第一端1输出的电压小于固定电压值时，第一供电电路11输出的电压为固定电压值，由于第二供电电路12为降压电路，显然，第二供电电路12的输出电压小于第一供电电路11的输出电压，此时，第二供电电路12断开，辅助绕组31通过第一供电电路11对芯片20供电。当辅助绕组31的第一端1输出的电压大于固定电压值，并且辅助绕组31的抽头3输出的电压小于该固定电压值时，第二供电电路12的输出电压仍然小于该固定电压值，第二供电电路12的输出电压小于第一供电电路11的输出电压，此时，第二供电电路12断开，辅助绕组31通过第一供电电路11对芯片20供电。当辅助绕组31的抽头3输出的电压大于该固定电压值时，如果忽略第二供电电路12上的压降，此时第二供电电路12的输出电压大于该固定电压值，即第二供电电路12的输出电压大于第一供电电路11的输出电压，此时，第一供电电路11断开，辅助绕组31通过第二供电电路12对芯片20供电，显然，由于第一供电电路11断开，第一供电电路11 中的元器件上的没有电流流过，第一供电电路11中的元器件上的压降为零，从而可以降低第一供电电路11中的元器件上的空载功耗。
实施本发明所示的电路，可以在辅助绕组31的第一端输出的电压变高时，保证第一供电电路11中的元器件上的没有电流流过，第一供电电路11中的元器件上的压降为零，从而可以降低第一供电电路11中的元器件上的空载功耗。
可选的，如图1所示，可以在第一供电电路11的输出端与第二供电电路12的输出端连接第一电容C1，第一电容C1的正极连接第一供电电路11的输出端与第二供电电路12的输出端，第一电容C1的负极接地，第一电容C1用于滤波，可以防止第一供电电路11或第二供电电路12输出到芯片20的电压波动较大，保证输出到芯片20的电压稳定。
实施图1所示的电路，可以在辅助绕组31的第一输出端输出的电压较高时，将第一供电电路11关断，以使第一供电电路11中的元器件上的压降为零，从而降低第一供电电路11中的元器件上的空载功耗。
请参阅图2，图2是在图1的基础上进一步细化得到的。图2是本发明公开的一种变压器电路的具体结构示意图。如图2所示，该变压器电路包括变压器30和辅助绕组电路10，辅助绕组电路10用于为芯片20供电，变压器30包括铁芯34、初级绕组32、次级绕组33以及辅助绕组31，辅助绕组电路10连接变压器30的辅助绕组31，辅助绕组电路10包括第一供电电路11以及第二供电电路12，辅助绕组31包括第一端1、第二端2以及位于第一端1和第二端2之间的抽头3，其中：
辅助绕组31的输入端1连接第一供电电路11的输入端111，辅助绕组31的抽头3连接第二供电电路12输入端121，第一供电电路11的输出端112连接第二供电电路12的输出端122以及芯片20的供电端21辅助绕组31的输出端2接地；第二供电电路12的输入电压小于第一供电电路11的输入电压；
当第二供电电路12的输出电压大于第一供电电路11的输出电压时，第一供电电路11的断开，辅助绕组31通过第二供电电路12对芯片20供电。
可选的，如图2所示，可以在第一供电电路11的输出端与第二供电电路12的输出端连接第一电容C1，第一电容C1的正极连接第一供电电路11的输出端与第二供电电路12的输出端，第一电容C1的负极接地，第一电容C1用于滤波。
可选的，如图2所示，第一供电电路11包括第一电阻R1、第一二极管D1、第一三极管T1、第二二极管D2、第二电阻R2、稳压管ZD以及第二电容C2，其中：
第一三极管T1为NPN型三极管，第一电阻R1的第一端连接辅助绕组31的第一端1，第一电阻R1的第二端连接第一二极管D1的正极，第一二极管D1的负极连接第一三极管T1的集电极、第二电阻R2的第一端以及第二电容C2的正极，第一三极管T1的发射极连接第二二极管D2的正极，第二二极管D2的负极连接芯片20的供电端，第一三极管T1的基极连接第二电阻R2的第二端以及稳压管ZD的负极，稳压管ZD的正极和第二电容C2的负极接地。
可选的，如图2所示，第二供电电路12包括第三二极管D3，第三二极管D3的正极连接辅助绕组31的抽头3，第三二极管D3的负极连接第二二极管D2的负极。
本发明中，如果设置稳压管ZD的稳压值为15V，第一三极管T1和第二二极管D2上的压降总共为1V，则第一供电电路11输出到芯片20的电压为14V。当辅助绕组31的第一端1输出的电压较低(例如，小于14V)时，辅助绕组31通过第一供电电路11为芯片21供电，保证芯片21的供电电压维持在14V左右，此时第二供电电路12的输出端的电压也维持在14V左右，由于第二供电电路12的输入端的电压由辅助绕组31的抽头3(此时抽头3的电压显然小于14V)提供，第三二极管D3的正极电压小于其负极电压，第三二极管D3截止，故第二供电电路12断开。
假设第三二极管D3的压降为0.7V，第一三极管T1和第二二极管D2上的压降总共为1V，稳压管ZD的稳压值为15V。当辅助绕组31的抽头3输出的电压小于14.7V时，由于第一供电电路11输出到芯片20的电压维持在14V，第三二极管D3无法导通，第二供电电路12断开连接，芯片20的供电电压由第一供电电路11提供。当辅助绕组31的抽头3输出的电压大于14.7V时，第二供电电路12输出的电压大于14V，由于第一供电电路11输出到芯片20的电压仍然维持在14V，导致第一供电电路11中的第一三极管T1和第二二极管D2上的压降小于1V，第一三极管T1和第二二极管D2无法导通，第一供电电路11断开连接，芯片20的供电电压由第二供电电路12提供，此时，第一供电电路11中的元器件上 的没有电流流过，第一供电电路11中的元器件上的压降为零，从而可以降低第一供电电路11中的元器件上的空载功耗。
实施图2所示的电路，可以在辅助绕组31的第一端1上输出的电压较高时，将第一供电电路11关断，以使第一供电电路11中的第一三极管T1上的压降为零，从而降低第一供电电路11中的元器件上的空载功耗。
请参阅图3，图3是本发明公开的另一种变压器电路结构示意图，如图3所示，该变压器电路包括变压器30，辅助绕组电路10、初级绕组电路40、次级绕组电路50，变压器30包括铁芯34、初级绕组32、次级绕组33以及辅助绕组31，初级绕组电路40连接初级绕组32，次级绕组电路50连接次级绕组33，辅助绕组电路10连接辅助绕组31，初级绕组32、次级绕组33以及辅助绕组31分别缠绕在铁芯34上，辅助绕组31包括第一端1、第二端2以及位于第一端1和第二端2之间的抽头3。
可选的，如图3所示，初级绕组电路40包括脉冲宽度调制PWM控制器41、MOS管Q1、第三电阻R3、第四二极管D4、第三电容C3、第四电容C4以及第四电阻R4，其中：
初级绕组32的第一端4连接第三电容C3的正极、第四电容C4的正极以及第四电阻R4的第一端，第四电容C4的负极接地，第三电容C3的负极以及第四电阻R4的第二端连接第四二极管D4的负极，第四二极管D4的正极连接初级绕组32的第二端5以及MOS管Q1的漏极，MOS管Q1的源极连接第三电阻R3的第一端，第三电阻R3的第二端接地，MOS管Q1的栅极连接PWM控制器41的控制端411。
可选的，如图3所示，次级绕组电路50包括第五二极管D5、第六二极管D6、第五电容C5以及第六电容C6，其中：
次级绕组33的第一端6连接第五二极管D5的正极以及第六二极管D6的正极，第五二极管D5的负极以及第六二极管D6的负极连接第五电容C5的正极以及第六电容C6的正极，第五电容C5的负极以及第六电容C6的负极接地，次级绕组33的第二端7接地。
本发明中的变压器电路，可以通过PWM控制器41输出的PWM信号的占空比来控制变压器的初级绕组输入的电压，进而控制变压器的次级绕组输出的电压以及辅组绕组输出的电压。
请参阅图4，图4是本发明公开的一种降低空载功耗的方法流程示意图，该方法应用于图1-图3所示的变压器电路，该降低空载功耗的方法包括如下步骤。
401，当第二供电电路的输出电压大于第一供电电路的输出电压时，第一供电电路断开，第一供电电路停止为芯片供电。
402，辅助绕组通过第二供电电路对芯片供电。
可选的，步骤401可以包括：
当第二供电电路的输出电压大于第一供电电路的输出电压时，第一供电电路内的第一三极管截止，第一供电电路停止为芯片供电。
可选的，步骤402可以包括：
当第一供电电路停止为芯片供电之后，第二供电电路通过辅助绕组的抽头输入电压，抽头输入的电压经过第二供电电路中的二极管输出至芯片。
实施图4所示的方法，当第二供电电路的输出电压大于第一供电电路的输出电压时，第一供电电路断开，第一供电电路停止为芯片供电；辅助绕组通过第三二极管对芯片供电，可以在整个辅助绕组输出的电压变高时保证第一供电电路中的元器件上的没有电流流过，第一供电电路中的元器件上的压降为零，从而可以降低第一供电电路中的元器件上的空载功耗。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以所述权利要求的保护范围为准。

Claims (11)

  1. 一种变压器电路，其中，包括变压器、辅助绕组电路，所述变压器包括铁芯、初级绕组、次级绕组以及辅助绕组，所述辅助绕组电路连接所述辅助绕组，所述初级绕组、所述次级绕组以及所述辅助绕组分别缠绕在所述铁芯上，所述辅助绕组电路用于为芯片供电，所述辅助绕组电路包括第一供电电路以及第二供电电路，所述辅助绕组包括第一端、第二端以及位于所述第一端和第二端之间的抽头，其中：
    所述辅助绕组的第一端连接所述第一供电电路的输入端，所述辅助绕组的抽头连接所述第二供电电路的输入端，所述第一供电电路的输出端连接所述第二供电电路的输出端以及所述芯片的供电端，所述辅助绕组的第二端接地；所述第二供电电路的输入电压小于所述第一供电电路的输入电压；所述第一供电电路为稳压电路，所述第二供电电路为降压电路；
    当所述第二供电电路的输出电压大于所述第一供电电路的输出电压时，所述第一供电电路断开，所述辅助绕组通过所述第二供电电路对所述芯片供电；当所述第二供电电路的输出电压小于所述第一供电电路的输出电压时，所述第二供电电路断开，所述辅助绕组通过所述第一供电电路对所述芯片供电。
  2. 根据权利要求1所述的变压器电路，其中，所述第一供电电路包括第一电阻、第一二极管、第一三极管、第二二极管、第二电阻、稳压管以及第二电容，其中：
    所述第一电阻的第一端连接所述辅助绕组的第一端，所述第一电阻的第二端连接所述第一二极管的正极，所述第一二极管的负极连接所述第一三极管的集电极、所述第二电阻的第一端以及所述第二电容的正极，所述第一三极管的发射极连接所述第二二极管的正极，所述第二二极管的负极连接所述芯片的供电端，所述第一三极管的基极连接所述第二电阻的第二端以及所述稳压管的负极，所述稳压管的正极和所述第二电容的负极接地。
  3. 根据权利要求1所述的变压器电路，其中，所述第二供电电路包括第三 二极管，所述第三二极管的正极连接所述辅助绕组的抽头，所述第三二极管的负极连接所述芯片的供电端。
  4. 根据权利要求2所述的变压器电路，其中，所述第二供电电路包括第三二极管，所述第三二极管的正极连接所述辅助绕组的抽头，所述第三二极管的负极连接所述芯片的供电端。
  5. 根据权利要求1所述的变压器电路，其中，所述变压器电路还包括初级绕组电路、次级绕组电路，所述初级绕组电路连接所述初级绕组，所述次级绕组电路连接所述次级绕组；其中：
    所述初级绕组电路包括脉冲宽度调制PWM控制器、MOS管、第三电阻、第四二极管、第三电容、第四电容以及第四电阻，其中：
    所述初级绕组的第一端连接所述第三电容的正极、所述第四电容的正极以及所述第四电阻的第一端，所述第四电容的负极接地，所述第三电容的负极以及所述第四电阻的第二端连接所述第四二极管的负极，所述第四二极管的正极连接所述初级绕组的第二端以及所述MOS管的漏极，所述MOS管的源极通过所述第三电阻接地，所述MOS管的栅极连接所述PWM控制器的控制端。
  6. 根据权利要求2所述的变压器电路，其中，所述变压器电路还包括初级绕组电路、次级绕组电路，所述初级绕组电路连接所述初级绕组，所述次级绕组电路连接所述次级绕组；其中：
    所述初级绕组电路包括脉冲宽度调制PWM控制器、MOS管、第三电阻、第四二极管、第三电容、第四电容以及第四电阻，其中：
    所述初级绕组的第一端连接所述第三电容的正极、所述第四电容的正极以及所述第四电阻的第一端，所述第四电容的负极接地，所述第三电容的负极以及所述第四电阻的第二端连接所述第四二极管的负极，所述第四二极管的正极连接所述初级绕组的第二端以及所述MOS管的漏极，所述MOS管的源极通过所述第三电阻接地，所述MOS管的栅极连接所述PWM控制器的控制端。
  7. 根据权利要求5所述的变压器电路，其中，所述次级绕组电路包括第五二极管、第六二极管、第五电容以及第六电容，其中：
    所述次级绕组的第一端连接所述第五二极管的正极以及所述第六二极管的正极，所述第五二极管的负极以及所述第六二极管的负极连接所述第五电容的正极以及第六电容的正极，所述第五电容的负极以及第六电容的负极接地，所述次级绕组的第二端接地。
  8. 根据权利要求6所述的变压器电路，其中，所述次级绕组电路包括第五二极管、第六二极管、第五电容以及第六电容，其中：
    所述次级绕组的第一端连接所述第五二极管的正极以及所述第六二极管的正极，所述第五二极管的负极以及所述第六二极管的负极连接所述第五电容的正极以及第六电容的正极，所述第五电容的负极以及第六电容的负极接地，所述次级绕组的第二端接地。
  9. 根据权利要求1所述的变压器电路，其中，所述变压器电路还包括第一电容，所述第一电容的正极连接所述第一供电电路的输出端，所述第一电容的负极接地。
  10. 一种降低空载功耗的方法，应用于权利要求1-9任一项所述的变压器电路，其中，所述方法包括：
    当所述第二供电电路的输出电压大于所述第一供电电路的输出电压时，所述第一供电电路断开，所述第一供电电路停止为所述芯片供电；
    所述辅助绕组通过所述第二供电电路对所述芯片供电。
  11. 根据权利要求10所述的方法，其中，
    当所述第二供电电路的输出电压大于所述第一供电电路的输出电压时，所述第一供电电路断开，所述第一供电电路停止为所述芯片供电具体可以为：
    当所述第二供电电路的输出电压大于所述第一供电电路的输出电压时，所述第一供电电路内的第一三极管截止，所述第一供电电路停止为所述芯片供电；
    所述辅助绕组通过所述第二供电电路对所述芯片供电具体可以为：当所述第一供电电路停止为所述芯片供电之后，所述第二供电电路通过所述辅助绕组的抽头输入电压，所述抽头输入的电压经过所述第二供电电路中的二极管输出至所述芯片。
PCT/CN2017/082631 2017-04-11 2017-04-28 一种变压器电路以及降低空载功耗的方法 WO2018188132A1 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US15/552,744 US10199857B2 (en) 2017-04-11 2017-04-28 Transformer circuit and method of reducing idling power consumption
EP17905526.4A EP3611819A4 (en) 2017-04-11 2017-04-28 TRANSFORMER CIRCUIT AND PROCESS INTENDED TO DECREASE ENERGY CONSUMPTION WITHOUT LOAD
JP2019555651A JP6886527B2 (ja) 2017-04-11 2017-04-28 トランス回路及び無負荷電力消費低減方法
KR1020197033284A KR102282142B1 (ko) 2017-04-11 2017-04-28 변압기 회로 및 무부하 전력 소비를 감소시키는 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710232828.3 2017-04-11
CN201710232828.3A CN106849339B (zh) 2017-04-11 2017-04-11 一种变压器电路以及降低空载功耗的方法

Publications (1)

Publication Number Publication Date
WO2018188132A1 true WO2018188132A1 (zh) 2018-10-18

Family

ID=59146617

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/082631 WO2018188132A1 (zh) 2017-04-11 2017-04-28 一种变压器电路以及降低空载功耗的方法

Country Status (5)

Country Link
EP (1) EP3611819A4 (zh)
JP (1) JP6886527B2 (zh)
KR (1) KR102282142B1 (zh)
CN (1) CN106849339B (zh)
WO (1) WO2018188132A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114864240A (zh) * 2022-05-25 2022-08-05 东科半导体(安徽)股份有限公司 一种采用辅助绕组干扰对消法抑制共模干扰的平面变压器

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109995252A (zh) * 2019-04-22 2019-07-09 合肥惠科金扬科技有限公司 一种稳压电路及开关电源电路
CN110572021B (zh) * 2019-10-18 2021-04-02 广州视源电子科技股份有限公司 过压保护电路、方法和用电设备
CN114244077A (zh) * 2022-02-24 2022-03-25 深圳市暗能量电源有限公司 一种适应宽电压输出的供电电路及供电方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5880942A (en) * 1997-03-17 1999-03-09 Acer Peripherals Inc. Power supply device with low power dissipation
CN202231914U (zh) * 2011-09-09 2012-05-23 深圳市澳磁电源科技有限公司 一种启动电路、led驱动电源及led照明装置
US20140239829A1 (en) * 2013-02-27 2014-08-28 Delta Electronics, Inc. Led driver
CN204408206U (zh) * 2015-02-10 2015-06-17 广州金升阳科技有限公司 一种开关电源的自供电电路
CN204578876U (zh) * 2015-05-27 2015-08-19 长沙晖特光电科技有限公司 一种交直流两用的电源驱动电路
CN204993067U (zh) * 2015-08-07 2016-01-20 深圳市创芯技术有限公司 一种5w无y电容的高能效开关电源
CN205960752U (zh) * 2016-07-12 2017-02-15 耐思电气(嘉兴)有限公司 一种交流宽电压输入小功率自适应充电器

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH077943A (ja) * 1993-06-18 1995-01-10 Murata Mfg Co Ltd スイッチング電源装置
JPH11235027A (ja) * 1998-02-12 1999-08-27 Hitachi Metals Ltd スイッチングレギュレータ
JP2000152626A (ja) * 1998-11-05 2000-05-30 Omron Corp 安定化電源
JP2010068638A (ja) * 2008-09-11 2010-03-25 Seiko Epson Corp Ａｃアダプタ
JP2011155773A (ja) * 2010-01-27 2011-08-11 Funai Electric Co Ltd スイッチング電源装置及びこれを備えた映像表示機器
KR102116705B1 (ko) * 2013-10-16 2020-06-05 온세미컨덕터코리아 주식회사 컨버터 및 그 구동 방법
CN104660022B (zh) * 2015-02-02 2017-06-13 昂宝电子（上海）有限公司 为电源变换器提供过流保护的系统和方法
JP6531424B2 (ja) * 2015-02-25 2019-06-19 ミツミ電機株式会社 電源制御用半導体装置
JP6479607B2 (ja) * 2015-08-21 2019-03-06 ニチコン株式会社 直流安定化電源装置
CN106655824B (zh) * 2016-11-07 2024-01-30 深圳欧陆通电子有限公司 开关电源控制电路及开关电源
CN106953533A (zh) * 2017-03-22 2017-07-14 合肥惠科金扬科技有限公司 反激式电源电路和用电设备

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5880942A (en) * 1997-03-17 1999-03-09 Acer Peripherals Inc. Power supply device with low power dissipation
CN202231914U (zh) * 2011-09-09 2012-05-23 深圳市澳磁电源科技有限公司 一种启动电路、led驱动电源及led照明装置
US20140239829A1 (en) * 2013-02-27 2014-08-28 Delta Electronics, Inc. Led driver
CN204408206U (zh) * 2015-02-10 2015-06-17 广州金升阳科技有限公司 一种开关电源的自供电电路
CN204578876U (zh) * 2015-05-27 2015-08-19 长沙晖特光电科技有限公司 一种交直流两用的电源驱动电路
CN204993067U (zh) * 2015-08-07 2016-01-20 深圳市创芯技术有限公司 一种5w无y电容的高能效开关电源
CN205960752U (zh) * 2016-07-12 2017-02-15 耐思电气(嘉兴)有限公司 一种交流宽电压输入小功率自适应充电器

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3611819A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114864240A (zh) * 2022-05-25 2022-08-05 东科半导体(安徽)股份有限公司 一种采用辅助绕组干扰对消法抑制共模干扰的平面变压器
CN114864240B (zh) * 2022-05-25 2023-10-17 东科半导体(安徽)股份有限公司 一种采用辅助绕组干扰对消法抑制共模干扰的平面变压器

Also Published As

Publication number Publication date
CN106849339A (zh) 2017-06-13
JP2020517223A (ja) 2020-06-11
KR20190134774A (ko) 2019-12-04
EP3611819A4 (en) 2021-01-20
JP6886527B2 (ja) 2021-06-16
KR102282142B1 (ko) 2021-07-26
CN106849339B (zh) 2020-02-18
EP3611819A1 (en) 2020-02-19

Similar Documents

Publication Publication Date Title
WO2018188132A1 (zh) 一种变压器电路以及降低空载功耗的方法
JP4748024B2 (ja) ２線式スイッチ装置
WO2018133136A1 (zh) 背光控制电路及电子装置
CN110661438B (zh) 具低功耗及低成本的电源转换装置
TW201728064A (zh) 電源供應器及電源供應方法
TWI501520B (zh) 關聯於直流電壓轉換且具有短路保護功能的電源供應裝置
US10199857B2 (en) Transformer circuit and method of reducing idling power consumption
KR20190109547A (ko) 보호 회로 및 led 구동 회로
CN103516218A (zh) 电源供应装置
US20230010170A1 (en) Method of standby power supply
JP4844151B2 (ja) スイッチング電源装置
JP2008289334A (ja) スイッチング電源装置および電源制御方法
TW201828582A (zh) 返馳式電源供應電路及其二次側控制電路
JP2003333841A (ja) スイッチング電源装置
CN109302052A (zh) 一种高压启动电路及开关电源
CN220570463U (zh) 一种负载可调电路、电源电路、电路板及电子设备
TWI837670B (zh) 電源供應器
CN217240311U (zh) 开关电源过功率保护调节电路
CN220291658U (zh) 一种无源输入保护电路
CN213547373U (zh) 交叉调整率调整电路及电子设备
CN211107280U (zh) 一种汽车安全电源及汽车系统
CN210780186U (zh) 一种高压电池充电器
CN107040151B (zh) 一种用于为控制电路供电的电源电路及开关电源
TWM654740U (zh) 用於電源供應裝置的回授電路
CN114698191A (zh) Led驱动电路及led照明装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15552744

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17905526

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2019555651

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

ENP Entry into the national phase

Ref document number: 20197033284

Country of ref document: KR

Kind code of ref document: A

ENP Entry into the national phase

Ref document number: 2017905526

Country of ref document: EP

Effective date: 20191111