WO2018154744A1 - 半導体装置、半導体装置の製造方法 - Google Patents
半導体装置、半導体装置の製造方法 Download PDFInfo
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- WO2018154744A1 WO2018154744A1 PCT/JP2017/007311 JP2017007311W WO2018154744A1 WO 2018154744 A1 WO2018154744 A1 WO 2018154744A1 JP 2017007311 W JP2017007311 W JP 2017007311W WO 2018154744 A1 WO2018154744 A1 WO 2018154744A1
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- Prior art keywords
- resin
- plunger
- semiconductor device
- lead frame
- pressure
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 116
- 238000000034 method Methods 0.000 title claims description 56
- 238000004519 manufacturing process Methods 0.000 title claims description 46
- 229920005989 resin Polymers 0.000 claims abstract description 223
- 239000011347 resin Substances 0.000 claims abstract description 223
- 230000017525 heat dissipation Effects 0.000 claims description 15
- 238000002347 injection Methods 0.000 claims description 15
- 239000007924 injection Substances 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 239000000377 silicon dioxide Substances 0.000 claims description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 238000002844 melting Methods 0.000 claims description 5
- 230000008018 melting Effects 0.000 claims description 5
- 238000003825 pressing Methods 0.000 claims description 5
- 230000005855 radiation Effects 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract description 6
- 230000008569 process Effects 0.000 description 31
- 238000010586 diagram Methods 0.000 description 7
- 238000009413 insulation Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 238000000465 moulding Methods 0.000 description 3
- 239000011800 void material Substances 0.000 description 3
- 230000006835 compression Effects 0.000 description 2
- 238000007906 compression Methods 0.000 description 2
- 238000001721 transfer moulding Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000002706 hydrostatic effect Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3737—Organic materials with or without a thermoconductive filler
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49586—Insulating layers on lead frames
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Definitions
- the present invention relates to a semiconductor device in which a semiconductor chip is sealed with a resin and a method for manufacturing the semiconductor device.
- Patent Document 1 discloses a technique for forming a mold resin on a workpiece. Specifically, after the pot resin is supplied into the pot, the cavity resin is supplied into the cavity recess. Next, by clamping the mold, the plunger is pressed so as to mix the molten pot resin and the cavity resin, and the cavity is filled with the molten resin. Next, the molten resin in the cavity recess is held at a predetermined resin pressure and cured by heating.
- the present invention has been made to solve the above-described problems, and an object thereof is to provide a low-cost and high-quality semiconductor device and a method for manufacturing the semiconductor device.
- a semiconductor device includes a lead frame, a semiconductor chip fixed to the upper surface of the lead frame, a first resin in contact with the lower surface of the lead frame, and a second resin provided on the first resin.
- the first resin has a higher thermal conductivity than the second resin, and the semiconductor chip is covered with the first resin and the second resin.
- a plunger chip is provided in a hole formed in a concave portion of a lower mold, a first resin is provided on the plunger chip, and the first resin is provided on the first resin.
- An upper mold was placed, a mold clamping step of clamping the semiconductor chip in a state provided by the lower mold and the upper mold, and the first resin and the second resin were melted
- an injection step of bringing the first resin into contact with the lower surface of the lead frame by raising the plunger tip to provide the second resin in the cavity and then providing the first resin; From the plunger tip, the first resin and the second tree Characterized in that and a pressure holding process of pressure holding exert pressure on.
- a plunger chip is provided in a hole formed in a recess of a lower mold, a resin providing step for providing resin on the plunger chip, and a semiconductor chip on a lower surface.
- a mounting step of placing the fixed lead frame on the upper surface of the recess, and a heat dissipation sheet having a higher thermal conductivity than the resin is sandwiched between the lead frame and the upper die, and placed on the lower die.
- Another method of manufacturing a semiconductor device includes: a resin providing step of providing a plunger chip in a hole formed in a lower mold having a plurality of recesses and providing a resin on the plunger chip; A mounting step of placing the fixed lead frame on the upper surface of the lower mold, an upper mold placed on the lower mold, a plurality of cavities formed by the plurality of recesses, and the plurality of cavities A mold clamping step of clamping in a state where a runner gate is formed, and after the resin is melted, the plunger tip is raised to a predetermined position, and the plurality of cavities and the runner gate And an injecting step for supplying the resin, and a pressure-holding step for applying pressure to the resin from the plunger tip to hold the resin, and the plunger tip is raised to the predetermined position.
- the movable block When the pressure that the resin in the runner gate exerts on the movable block in the runner gate is detected and the pressure is greater than a predetermined pressure, the movable block is retracted from the runner gate. When the pressure is smaller than a predetermined pressure, the movable block is moved in a direction to advance into the runner gate.
- the first resin having a high thermal conductivity is provided on the lower surface of the lead frame, and the second resin having a lower thermal conductivity than the first resin is provided on the lead frame.
- a high-quality semiconductor device can be provided.
- FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment.
- 3 is a flowchart showing a method for manufacturing the semiconductor device according to the first embodiment. It is sectional drawing, such as 1st resin and 2nd resin. It is sectional drawing, such as a lead frame. It is sectional drawing, such as a lower mold and an upper mold, which are clamped. It is sectional drawing which shows having raised the plunger tip. It is sectional drawing, such as a ball plunger. It is a top view, such as a ball plunger. It is a perspective view of a plurality of plunger rods.
- FIG. 10 is a cross-sectional view of a mold or the like corresponding to the plunger device of FIG. 9. FIG.
- FIG. 10 is a cross-sectional view showing the method for manufacturing the semiconductor device according to the second embodiment.
- 10 is a flowchart illustrating a method for manufacturing a semiconductor device according to a third embodiment. It is a block diagram of the apparatus used for manufacture of a semiconductor device. It is a figure which shows having supplied resin to the cavity and the runner gate. It is a figure which shows the structural example of a controller. It is a figure which shows another structural example of a controller.
- FIG. 10 is a diagram showing a method for manufacturing the semiconductor device according to the fourth embodiment. It is a figure which shows the manufacturing method of the semiconductor device which concerns on a comparative example.
- a semiconductor device and a method for manufacturing the semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
- the same or corresponding components are denoted by the same reference numerals, and repeated description may be omitted.
- FIG. 1 is a sectional view of a semiconductor device 10 according to the first embodiment of the present invention.
- the semiconductor device 10 includes a lead frame 12.
- a semiconductor chip 14 is fixed to the upper surface of the lead frame 12.
- the semiconductor chip 14 is a switching element made of, for example, Si or SiC.
- the first resin 20 is in contact with the lower surface of the lead frame 12.
- a second resin 22 is provided on the first resin 20.
- the semiconductor chip 14 is covered with the first resin 20 and the second resin 22.
- the first resin 20 and the second resin 22 function as a package.
- the first resin 20 has a higher thermal conductivity than the second resin 22. If this condition is satisfied, the materials of the first resin 20 and the second resin 22 are not particularly limited.
- the first resin 20 is, for example, alumina, and the second resin 22 is, for example, silica.
- the thermal conductivity of the first resin 20 is preferably 2 W / m ⁇ K or more.
- the lead frame 12 has a die pad portion for fixing the semiconductor chip 14, an inner lead portion provided in the resin, and an outer lead portion extending outside the resin.
- a control chip 24 that outputs a control signal to the semiconductor chip 14 is provided in the inner lead portion in the second resin 22.
- the semiconductor chip 14 and the inner lead part are connected by a wire 26.
- the semiconductor chip 14 and the control chip 24 are connected by a wire 28.
- the first resin 20 is provided only below the lower surface of the lead frame 12.
- the first resin 20 is in contact with the lower surface of the semiconductor chip 14 via the lead frame 12, and the second resin 22 is in contact with the side surface and the upper surface of the semiconductor chip 14.
- Most of the package is the second resin 22, and the volume of the first resin 20 in the entire package is small. Therefore, the volume of the second resin 22 is larger than that of the first resin 20.
- the first resin 20 is exposed below the semiconductor chip 14, and the second resin 22 is exposed above the semiconductor chip 14.
- FIG. 2 is a flowchart showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention. A method for manufacturing the semiconductor device 10 will be described with reference to this flowchart.
- step S1 the first resin and the second resin are provided on the plunger tip.
- FIG. 3 is a diagram showing the first resin 20a and the second resin 22a.
- the lower mold 30 has a recess 30A.
- a hole 30a is formed in the recess 30A.
- the portion where the hole 30a is formed is referred to as a pot 30B.
- a plunger tip 32 is provided in the hole 30a.
- the side surface of the plunger tip 32 is in contact with the pot 30B.
- the plunger tip 32 is supported by a plunger rod 34. When the plunger rod 34 moves in the y positive / negative direction, the plunger tip 32 also moves in the y positive / negative direction in conjunction therewith.
- the first resin 20a is provided on the plunger chip 32, and the second resin 22a having a lower thermal conductivity than the first resin 20a is provided on the first resin 20a.
- the first resin 20a and the second resin 22a are granular.
- the first resin 20a is granular alumina
- the second resin 22a is granular silica.
- the process of providing the resin on the plunger chip 32 is referred to as a resin providing process.
- FIG. 3 also shows the upper mold 40.
- the upper mold 40 has a recess 40A.
- a movable pin 42 penetrating the recess 40A is provided.
- the movable pin 42 can move in the y positive / negative direction through the recess 40A. Such movement can be realized by a motor.
- step S ⁇ b> 2 the lead frame 12 is placed on the lower mold 30.
- FIG. 4 shows the lead frame 12 placed on the lower mold 30.
- step S ⁇ b> 2 the lead frame 12 with the semiconductor chip 14 fixed on the upper surface is placed on the upper surface of the recess 30 ⁇ / b> A of the lower mold 30. This process is called a mounting process.
- step S ⁇ b> 3 the mold is clamped by the lower mold 30 and the upper mold 40.
- FIG. 5 is a view showing the lower mold 30 and the upper mold 40 which are clamped.
- the lower mold 30 and the upper mold 40 are accommodated in the mold clamping device, the upper mold 40 is placed on the lower mold 30, and a predetermined mold clamping force is applied thereto.
- the mold is clamped in a state where the semiconductor chip 14 is accommodated in the cavity 50 provided by the lower mold 30 and the upper mold 40. This process is called a mold clamping process.
- the movable pin 42 In the mold clamping process, the movable pin 42 is brought into contact with the upper surface of the lead frame 12.
- the movable pin 42 prevents the lead frame 12 from floating upward when resin is injected into the cavity 50 and when pressure is maintained.
- the plurality of movable pins 42 are preferably brought into contact with the upper surface of the lead frame 12.
- step S4 after the first resin 20a and the second resin 22a are melted, the plunger tip 32 is raised.
- FIG. 6 is a view showing that the plunger tip 32 is raised.
- the plunger tip 32 moves upward, first, the second resin 22a is provided in the cavity 50, and then the first resin 20a is provided. Therefore, the second resin 22 is provided above the cavity 50, and the first resin 20 is provided below the cavity 50.
- the height of the upper surface of the plunger tip 32 coincides with the height of the bottom surface of the recess 30A of the lower mold 30, the raising of the plunger tip 32 is stopped.
- the first resin 20 comes into contact with the lower surface of the lead frame 12. This process is called an injection process.
- step S5 pressure holding and curing are performed. Specifically, pressure is applied from the plunger tip 32 to the first resin 20 and the second resin 22 to hold the pressure. This process is called a pressure holding process.
- step S6 the plunger tip 32 is moved downward. By releasing the molded product, the semiconductor device 10 shown in FIG. 1 is completed.
- a package having the first resin 20 and the second resin 22 is molded by the compression method as described above. Therefore, the flow of the resin is small as compared with the transfer molding method in which the resin is provided to the cavity via a narrow runner. Therefore, significant mixing of the first resin 20 and the second resin 22 does not occur, and the state in which the first resin 20 and the second resin 22 are substantially separated can be maintained.
- the first resin 20 having a high thermal conductivity can be supplied only under the lead frame 12 by utilizing such a feature of the compression method.
- the heat generated in the semiconductor chip 14 is released to the outside mainly through the lead frame 12 and the first resin 20 having high thermal conductivity. Then, the cost of the semiconductor device can be reduced by adopting the second resin 22 whose thermal conductivity is lower than that of the first resin 20 in a portion that is not so important for improving heat dissipation.
- the first resin 20 has high electrical insulation. Therefore, when the first resin 20 is provided on the lower surface of the lead frame 12, the resin under the lead frame 12 can be made thinner than when the second resin made of silica is provided on the lower surface of the lead frame 12.
- the insulation performance when the 450 ⁇ m second resin is formed under the lead frame 12 is equivalent to the insulation performance when the 150 ⁇ m first resin 20 is formed under the lead frame 12. Therefore, the semiconductor device can be reduced in size and heat dissipation without impairing the insulation performance of the semiconductor device.
- the movable pin 42 is brought into contact with the upper surface of the lead frame 12 to prevent the lead frame 12 from being lifted. Thereby, generation
- the resin can be compression-molded using the same plunger tip 32 as the plunger tip used in the transfer molding method. Therefore, a common plunger mechanism can be used among the types.
- FIG. 7 is a cross-sectional view of the ball plunger 54 and the like that support the plunger rod 34.
- a support base 52 is fixed to the upper surface of the plunger block 51.
- the support base 52 has a recess, and the lower end of the plunger rod 34 is accommodated in the recess. The lower end of the plunger rod 34 may contact the support base 52, but is not fixed to the support base 52.
- a ball plunger 54 that can extend and contract in the lateral direction is attached to the support base 52.
- a ball or pin is provided at the tip 54A of the ball plunger 54.
- a main body 54B is connected to the tip 54A.
- a spring is built in the main body 54B.
- the plunger rod 34 is preferably provided with a narrow portion 34a, and the tip portion 54A of the ball plunger 54 is preferably brought into contact with the narrow portion 34a.
- FIG. 8 is a plan view of the plunger rod 34 and the ball plunger 54.
- Four ball plungers 54 are in contact with the side surfaces of the plunger rod 34.
- the ball plunger 54 contracts, and the position of the plunger rod 34 can be displaced accordingly. Therefore, the plunger rod 34 can move up and down, left and right in a plan view, and can rotate in a plan view.
- the plunger tip 32 moves in the hole 30a in the positive y / negative direction. At this time, it is preferable that the plunger tip 32 moves smoothly in the pot 30B without the plunger tip 32 exerting a strong force on the pot 30B. Therefore, as described with reference to FIGS. 7 and 8, the plunger rod 34 is supported by the ball plunger 54 so that the plunger rod 34 can be moved or rotated slightly. Thereby, the plunger tip 32 moves smoothly in the pot 30B without the plunger tip 32 exerting a strong force on the pot 30B. It is preferable to implement the semiconductor device manufacturing method using the plunger block 51, the support base 52, and the ball plunger 54 shown in FIG.
- FIG. 9 shows that one plunger block 60 is provided with a plurality of plunger rods 62.
- One plunger tip 64 is fixed to one plunger rod 62. It is preferable to hold the plunger rod 62 in a displaceable state using the ball plunger 54 described above.
- FIG. 10 is a cross-sectional view of a mold or the like corresponding to the plunger device of FIG.
- a plurality of recesses 70 ⁇ / b> A are formed in the lower mold 70.
- One hole 70a is formed in one recess 70A.
- the upper mold 72 has a plurality of recesses 72A.
- the injection process and the pressure holding process can be performed collectively for a plurality of cavities.
- resin can be provided from the plunger tip 64 for every cavity, it is not necessary to provide a cal runner part in a metal mold
- the lower mold 70 and the upper mold 72 can be reduced in size. Also, by making the area of the plunger tip 64 in plan view smaller than the area of the bottom surface of the recess 70A, it is possible to apply a greater hydrostatic pressure to the resin than when these areas are equivalent.
- the package is formed of two resins having different thermal conductivities without significant mixing.
- the semiconductor device and the manufacturing method of the semiconductor device according to the first embodiment can be modified as appropriate without departing from this feature.
- the amount of the first resin 20 may be increased and the first resin 20 may be provided above the lower surface of the die pad portion of the lead frame 12.
- an intermediate resin having an intermediate thermal conductivity between the first resin 20 and the second resin 22 may be provided on the first resin 20, and the second resin 22 may be provided on the intermediate resin.
- heat radiation in the left-right direction of the semiconductor device 10 can be promoted by the intermediate resin.
- the movable pin 42 may be omitted.
- the semiconductor chip 14 is not limited to a switching element.
- a diode may be employed as the semiconductor chip.
- a plurality of semiconductor chips may be accommodated in the package, and for example, an inverter circuit may be configured with them.
- the semiconductor device and the method for manufacturing the semiconductor device according to the following embodiment can be applied to the semiconductor device and the method for manufacturing the semiconductor device according to the following embodiment. It should be noted that the semiconductor device and the method for manufacturing the semiconductor device according to the following embodiment have many similarities to the first embodiment, and therefore, differences from the first embodiment will be mainly described.
- FIG. FIG. 11 is a cross-sectional view illustrating the method of manufacturing the semiconductor device according to the second embodiment.
- the resin 23 is provided on the plunger chip 32 in the resin providing step.
- the lead frame 12 having the semiconductor chip 14 fixed to the lower surface is placed on the upper surface of the recess 30A.
- the die pad portion of the lead frame 12 is above the semiconductor chip 14.
- the heat dissipation sheet 80 includes, for example, an insulating layer 80A and a heat sink 80B provided by being stacked on the insulating layer 80A.
- the insulating layer 80A is preferably made of a mold resin such as silica and epoxy resin or a similar material.
- the material of the heat sink 80B is, for example, copper.
- the configuration of the heat dissipation sheet 80 is not particularly limited as long as the thermal conductivity can be made higher than that of the resin.
- the upper surface of the heat dissipation sheet 80 comes into contact with the bottom surface of the recess 40 ⁇ / b> A of the upper mold 40, and the lower surface of the heat dissipation sheet 80 comes into contact with the upper surface of the lead frame 12.
- the plunger tip 32 is raised to provide the resin 23 in the cavity 50.
- the plunger tip 32 is raised until the upper surface of the plunger tip 32 becomes the same height as the bottom surface of the recess 30 ⁇ / b> A of the lower mold 30.
- pressure is applied from the plunger tip 32 to the resin 23 to hold the pressure.
- the heat dissipation of the apparatus can be improved.
- the heat radiating sheet 80 by providing the heat radiating sheet 80, the heat radiating property of the apparatus is improved as compared with the case where the first resin 20 is used. Since the heat dissipation of the device can be enhanced by the heat dissipation sheet 80, the resin 23 is not required to have high thermal conductivity. Therefore, for example, a material having a lower thermal conductivity than alumina such as silica can be used as the material of the resin 23.
- FIG. 12 is a flowchart showing a method for manufacturing a semiconductor device according to the third embodiment.
- the lower mold 90 is formed with at least two concave portions 90A and 90B.
- the plunger tip 32A is supported by the plunger rod 34A.
- the plunger tip 32B is supported by the plunger rod 34B.
- a motor 100 is connected to the plunger rods 34A, 34B.
- the plunger tip 32A, 32B is moved in the y positive / negative direction by the motor 100.
- the upper mold 92 has at least two concave portions 92A and 92B.
- a movable block 102 is provided between the recesses 92A and 92B.
- the movable block 102 is connected to a motor 106 via a spring 104.
- the movable block 102 can be moved in the positive and negative directions by the motor 106.
- the motors 100 and 106 are preferably servo motors.
- the motors 100 and 106 are connected to the controller 110.
- a resin providing step is performed in step S1.
- plunger chips 32A and 32B are provided in the holes formed in the lower mold 90 shown in FIG. 13, and the resin 23 is provided on the plunger chips 32A and 32B.
- a mounting process is performed in step S2.
- the lead frames 12 and 13 to which the semiconductor chip 14 shown in FIG. 13 is fixed are placed on the upper surface of the lower mold 90.
- the lead frame 13 is placed on both the recesses 90A and 90B.
- FIG. 13 is a cross-sectional view of a mold and the like after clamping.
- the cavity 50A is formed by the recesses 90A and 92A
- the cavity 50B is formed by the recesses 90B and 92B.
- the two cavities 50A and 50B are connected by a runner gate 50C.
- the volume of the runner gate 50 ⁇ / b> C depends on the position of the movable block 102. If the movable block 102 is below, the volume of the runner gate 50C is small, and if the movable block 102 is above, the volume of the runner gate 50C is large.
- step S4 an injection process is performed in step S4.
- the plunger chips 32A and 32B are raised to a predetermined position according to a command from the controller 110.
- the plunger tips 32A and 32B are raised until the top surfaces of the plunger tips 32A and 32B coincide with the bottom surfaces of the recesses 90A and 90B.
- the resin 23 is provided in the cavities 50A and 50B and the runner gate 50C.
- Such a plunger block can be provided in the motor 100.
- FIG. 14 is a diagram showing that the resin 23 is provided to the cavities 50A and 50B and the runner gate 50C.
- the pressure exerted on the movable block 102 by the resin 23 in the runner gate 50C is detected.
- This pressure can be detected by detecting the pressure exerted on the motor 106 by the movable block 102 via the spring 104, for example.
- a sensor is provided in the motor 106. Information on the detected pressure is notified to the controller 110.
- step S5 the controller 110 determines whether the pressure notified to the controller 110 is a predetermined pressure.
- the “predetermined pressure” can be an arbitrary pressure range.
- the controller 110 moves the movable block 102 in a direction to retract from the runner gate 50C. That is, the movable block 102 is moved upward. Thereby, the resin pressure in the cavities 50A and 50B is set to a predetermined pressure.
- the controller 110 moves the movable block 102 in a direction to advance into the runner gate 50C. That is, the movable block 102 is moved downward. Thereby, the resin pressure in the cavities 50A and 50B is set to a predetermined pressure.
- Step S6 is a step of adjusting the position of the movable block 102 in this way.
- the control of the resin thickness can be realized by feeding back the positions of the plunger tips 32A and 32B to the controller 110, and the controller 110 raises the plunger tips 32A and 32B to a predetermined position.
- step S5 If it is determined in step S5 that the detected pressure is a predetermined pressure, the process proceeds to step S7.
- step S7 a pressure holding process is performed. In the pressure holding step, pressure is applied to the resin 23 from the plunger tips 32A and 32B to hold the pressure. Finally, in step S8, the plunger tips 32A and 32B are moved downward.
- a product in which one lead frame 13 is provided in a plurality of packages is formed by one molding process.
- FIG. 15 is a diagram illustrating a configuration example of the controller 110.
- the controller 110 includes a receiving device 110A, a processing circuit 110B, and a transmitting device 110C. Information on the pressure exerted on the motor 106 by the movable block 102 via the spring 104 is transmitted to the receiving device 110A.
- Each function described above performed in the controller 110 is realized by the processing circuit 110B. That is, the processing circuit 110B determines whether or not the received pressure is a predetermined pressure, and calculates how much the movable block 102 is moved according to the determination result.
- the processing circuit 110B is dedicated hardware, a CPU that executes a program stored in a memory (Central Processing Unit, central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, DSP) It may be.
- the processing circuit is dedicated hardware, the processing circuit is, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination thereof.
- the determination of the pressure and the calculation of the movement amount of the movable block 102 may be realized by separate processing circuits, or may be realized by a single processing circuit.
- FIG. 16 shows a configuration example of the controller 110 when the processing circuit is a CPU.
- each function of the controller 110 is realized by software or a combination of software and firmware.
- Software or firmware is described as a program and stored in the memory 110E.
- the processor 110D implements each function by reading and executing a program stored in the memory 110E. That is, a memory 110E is provided for storing a program that will eventually execute steps S4 to S8 in FIG. These programs can be said to cause a computer to execute the procedures and methods of steps S4 to S8.
- the memory corresponds to, for example, a nonvolatile or volatile semiconductor memory such as RAM, ROM, flash memory, EPROM, or EEPROM, a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, or a DVD.
- the molding pressure and the pressure can be controlled by controlling the position of the movable block 102 according to the pressure of the resin 23 supplied to the cavities 50A and 50B and the runner gate 50C.
- the thickness of the resin can be made uniform. Therefore, it is possible to minimize the variation between products having insulation and heat dissipation from the outside.
- the semiconductor device manufacturing method according to the third embodiment can be variously modified without losing this characteristic.
- the number of cavities formed during mold clamping is not limited to two, and three or more cavities may be formed.
- FIG. 17 is a diagram illustrating the method of manufacturing the semiconductor device according to the fourth embodiment.
- FIG. 17 shows the plunger tip 32 and the like in the injection process. A sectional view is shown in the upper stage, and a plan view is shown in the lower stage. The lower plan view shows that the plunger tip 32 is circular in plan view.
- the outer circumference can be made shorter than a non-circular plunger tip having the same area. That is, the outer periphery of the circular plunger tip 32 is smaller than the outer periphery of any other shape of the plunger tip.
- the amount of resin burr that enters between the plunger tip 32 and the pot 30B can be suppressed. Thereby, the friction between the plunger tip 32 and the pot 30B can be minimized.
- the bottom surface 30C of the recess 30A is quadrangular in plan view.
- the area of the plunger tip 32 is smaller than the area of the bottom surface 30C of the recess 30A in plan view.
- the area of the plunger tip 32 in plan view is preferably less than or equal to half the area of the bottom surface 30C.
- a resin ring 33 is provided along the outer periphery of the plunger tip 32.
- the resin ring 33 mainly contacts the pot 30B, whereby the plunger tip 32 can be protected.
- FIG. 18 is a diagram illustrating a method for manufacturing a semiconductor device according to a comparative example.
- a sectional view is shown in the upper stage, and a plan view is shown in the lower stage.
- the plunger tip 32 of the comparative example is quadrangular in plan view. Further, the area of the plunger tip 32 in plan view is equal to the area of the bottom surface 30C of the recess 30A. Thus, when the area of the plunger tip 32 is large, the resin tends to accumulate between the plunger tip 32 and the pot 30B, and the lower mold 30 must be frequently cleaned.
- the area of the plunger chip 32 is made sufficiently smaller than the area of the bottom surface 30C of the recess 30A of the lower mold 30. Therefore, in the injection process, in addition to the flow of the resin 23 going upward, the flow of the resin 23 going left and right is generated. Therefore, the void directly above the die pad portion can be suppressed. Further, providing the plunger tip 32 at the center of the bottom surface 30C of the recess 30A also contributes to the resin 23 spreading to every corner of the cavity.
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Abstract
Description
図1は、本発明の実施の形態1に係る半導体装置10の断面図である。半導体装置10はリードフレーム12を備えている。リードフレーム12の上面に半導体チップ14が固定されている。半導体チップ14は例えばSi又はSiCで形成されたスイッチング素子である。リードフレーム12の下面に第1樹脂20が接触している。この第1樹脂20の上に第2樹脂22が設けられている。第1樹脂20と第2樹脂22で半導体チップ14が覆われている。第1樹脂20と第2樹脂22がパッケージとして機能する。第1樹脂20は第2樹脂22よりも熱伝導率が高い。この条件を満たせば第1樹脂20と第2樹脂22の材料は特に限定されない。第1樹脂20は例えばアルミナであり、第2樹脂22は例えばシリカである。第1樹脂20の熱伝導率は2W/m・K以上であることが好ましい。
図11は、実施の形態2に係る半導体装置の製造方法を示す断面図である。実施の形態2に係る半導体装置の製造方法では、まず、樹脂提供工程で、プランジャチップ32の上に樹脂23を提供する。次いで、搭載工程で、下面に半導体チップ14が固定されたリードフレーム12を、凹部30Aの上面にのせる。リードフレーム12のダイパッド部が半導体チップ14より上にある。
図12は、実施の形態3に係る半導体装置の製造方法を示すフローチャートである。図12に沿って半導体装置の製造方法を説明する前に、図13を参照して半導体装置の製造に使用する装置の構成を説明する。下金型90には少なくとも2つの凹部90A、90Bが形成されている。凹部90Aに設けられた穴にプランジャチップ32Aがある。プランジャチップ32Aはプランジャロッド34Aに支持されている。凹部90Bに設けられた穴にプランジャチップ32Bがある。プランジャチップ32Bはプランジャロッド34Bに支持されている。プランジャロッド34A、34Bにはモータ100が接続されている。モータ100によってプランジャチップ32A、32Bはy正負方向に移動させられる。
図17は、実施の形態4に係る半導体装置の製造方法を示す図である。図17は注入工程におけるプランジャチップ32等を示す図である。上段に断面図が示され、下段に平面図が示されている。下段の平面図には、プランジャチップ32は平面視で円形であることが示されている。プランジャチップ32を平面視で円形にすることで、同じ面積の非円形のプランジャチップよりも外周を短くできる。つまり、円形のプランジャチップ32の外周は他のどのような形状のプランジャチップの外周よりも小さい。プランジャチップ32の外周を小さくすることで、プランジャチップ32とポット30Bの間に入りこむ樹脂バリ量を抑制できる。これにより、プランジャチップ32とポット30Bの摩擦を最小にできる。
Claims (16)
- リードフレームと、
前記リードフレームの上面に固定された半導体チップと、
前記リードフレームの下面と接する第1樹脂と、
前記第1樹脂の上に設けられた第2樹脂と、を備え、
前記第1樹脂は前記第2樹脂よりも熱伝導率が高く、
前記第1樹脂と前記第2樹脂で前記半導体チップを覆うことを特徴とする半導体装置。 - 前記第1樹脂はアルミナであり、前記第2樹脂はシリカであることを特徴とする請求項1に記載の半導体装置。
- 前記半導体チップの下方では前記第1樹脂が露出し、前記半導体チップの上方では前記第2樹脂が露出したことを特徴とする請求項1又は2に記載の半導体装置。
- 前記第1樹脂は前記リードフレームの下面よりも下方にだけ設けられたことを特徴とする請求項1~3のいずれか1項に記載の半導体装置。
- 下金型の凹部に形成された穴にプランジャチップを設け、前記プランジャチップの上に第1樹脂を提供し、前記第1樹脂の上に前記第1樹脂よりも熱伝導率が低い第2樹脂を提供する樹脂提供工程と、
上面に半導体チップが固定されたリードフレームを、前記凹部の上面にのせる搭載工程と、
前記下金型の上に上金型を置き、前記下金型と前記上金型によって提供されたキャビティに前記半導体チップを収容した状態で型締めする型締め工程と、
前記第1樹脂と前記第2樹脂を溶融させた後、前記プランジャチップを上昇させて前記キャビティの中に前記第2樹脂を提供しその後前記第1樹脂を提供することで、前記リードフレームの下面に前記第1樹脂を接触させる注入工程と、
前記プランジャチップから前記第1樹脂と前記第2樹脂に圧力を及ぼし保圧する保圧工程と、を備えたことを特徴とする半導体装置の製造方法。 - 前記注入工程と前記保圧工程では、可動ピンを前記リードフレームの上面に接触させて前記リードフレームの浮き上がりを防止することを特徴とする請求項5に記載の半導体装置の製造方法。
- 前記第1樹脂はアルミナであり、前記第2樹脂はシリカであることを特徴とする請求項5又は6に記載の半導体装置の製造方法。
- 下金型の凹部に形成された穴にプランジャチップを設け、前記プランジャチップの上に樹脂を提供する樹脂提供工程と、
下面に半導体チップが固定されたリードフレームを、前記凹部の上面にのせる搭載工程と、
前記樹脂よりも熱伝導率が高い放熱シートを前記リードフレームと上金型の間に挟みつつ、前記下金型の上に前記上金型を置き、前記下金型と前記上金型によって提供されたキャビティに前記半導体チップを収容した状態で型締めする型締め工程と、
前記樹脂を溶融させた後、前記プランジャチップを上昇させて前記キャビティの中に前記樹脂を提供する注入工程と、
前記プランジャチップから前記樹脂に圧力を及ぼし保圧する保圧工程と、を備えたことを特徴とする半導体装置の製造方法。 - 前記放熱シートは、絶縁層と、前記絶縁層に積層して設けられたヒートシンクとを有することを特徴とする請求項8に記載の半導体装置の製造方法。
- 複数の凹部を有する下金型に形成された穴にプランジャチップを設け前記プランジャチップの上に樹脂を提供する樹脂提供工程と、
半導体チップが固定されたリードフレームを、前記下金型の上面にのせる搭載工程と、
前記下金型の上に上金型を置き、前記複数の凹部により形成された複数のキャビティと、前記複数のキャビティをつなぐランナーゲートとを形成した状態で型締めする型締め工程と、
前記樹脂を溶融させた後、前記プランジャチップを予め定められた位置まで上昇させて、前記複数のキャビティ及び前記ランナーゲートの中に前記樹脂を提供する注入工程と、
前記プランジャチップから前記樹脂に圧力を及ぼし保圧する保圧工程と、を備え、
前記プランジャチップが前記予め定められた位置まで上昇したとき、前記ランナーゲートの内の前記樹脂が前記ランナーゲートの中の可動ブロックに及ぼす圧力を検知し、前記圧力が予め定められた圧力より大きいときは前記可動ブロックを前記ランナーゲートから退避させる方向へ移動させ、前記圧力が予め定められた圧力より小さいときは前記可動ブロックを前記ランナーゲートの中へ進出させる方向へ移動させることを特徴とする半導体装置の製造方法。 - 平面視で前記プランジャチップの面積は前記凹部の底面の面積より小さいことを特徴とする請求項5~10のいずれか1項に記載の半導体装置の製造方法。
- 平面視で前記プランジャチップの面積は前記凹部の底面の面積の半分以下であることを特徴とする請求項5~10のいずれか1項に記載の半導体装置の製造方法。
- 平面視で前記プランジャチップは前記凹部の前記底面の中央にあることを特徴とする請求項11又は12に記載の半導体装置の製造方法。
- 前記プランジャチップは平面視で円形であることを特徴とする請求項5~13のいずれか1項に記載の半導体装置の製造方法。
- 前記プランジャチップはプランジャロッドに支持され、
前記プランジャロッドの側面にボールプランジャを接触させたことを特徴とする請求項5~14のいずれか1項に記載の半導体装置の製造方法。 - 前記注入工程と前記保圧工程を、複数のキャビティに対して一括して実施することを特徴とする請求項5~15のいずれか1項に記載の半導体装置の製造方法。
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US11107746B2 (en) * | 2016-02-09 | 2021-08-31 | Mitsubishi Electric Corporation | Power semiconductor apparatus and manufacturing method therefor |
JP2021184414A (ja) * | 2020-05-21 | 2021-12-02 | 三菱電機株式会社 | 半導体装置、電力変換装置、半導体装置の検査方法、半導体装置の製造方法、学習装置および推論装置 |
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US20190371625A1 (en) | 2019-12-05 |
KR102303894B1 (ko) | 2021-09-17 |
CN110326102B (zh) | 2023-06-09 |
CN110326102A (zh) | 2019-10-11 |
DE112017007135T5 (de) | 2019-11-07 |
JP6806232B2 (ja) | 2021-01-06 |
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