WO2018152686A1 - Procédé de formation de trou plaqué, procédé de fabrication de carte à circuit imprimé, et carte à circuit imprimé - Google Patents

Procédé de formation de trou plaqué, procédé de fabrication de carte à circuit imprimé, et carte à circuit imprimé Download PDF

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Publication number
WO2018152686A1
WO2018152686A1 PCT/CN2017/074363 CN2017074363W WO2018152686A1 WO 2018152686 A1 WO2018152686 A1 WO 2018152686A1 CN 2017074363 W CN2017074363 W CN 2017074363W WO 2018152686 A1 WO2018152686 A1 WO 2018152686A1
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WO
WIPO (PCT)
Prior art keywords
layer
hole
signal
inert
conductive film
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PCT/CN2017/074363
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English (en)
Chinese (zh)
Inventor
侯玲珑
李志海
周水平
陈文波
Original Assignee
华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201780012217.6A priority Critical patent/CN108738379B/zh
Priority to PCT/CN2017/074363 priority patent/WO2018152686A1/fr
Publication of WO2018152686A1 publication Critical patent/WO2018152686A1/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Definitions

  • a printed circuit board is a support for electronic components and a carrier for electrical connection between electronic components.
  • a plated through hole is generally used to realize electrical connection of different signal layers.
  • the signal layer 02 and the signal layer 03 in the PCB board 00 shown in FIG. 1 can be connected by the PTH 01.
  • a through hole is generally drilled directly on a PCB, and then chemical copper plating and electroplating are performed on the inner wall of the through hole to form a metal layer 010 for connecting the respective signal layers.
  • a back-drilling method to cut off a portion of the PTH 01 that is not used for signal transmission (also referred to as a stub or a stub). For example, in FIG.
  • a drilling device can be used to drill a back hole 011 of a preset depth at one end of the PTH 01 to dissipate the PTH 01. End 012 is removed.
  • the thickness of each PCB of the same batch may vary due to the processing accuracy.
  • the same batch of depth is used for back drilling of the same batch of PCB boards, for PCB boards with thickness less than the design thickness, the signal layer may be drilled through, and the PCB board cannot be used normally; and the thickness is larger than the design.
  • the stump 012 remains and the signal transmission loss is excessive.
  • the present application provides a method for forming a metallized hole, a method for manufacturing the circuit board, and a circuit board.
  • the technical solution is as follows:
  • a method of forming a metallized hole comprising:
  • a through hole is drilled in the PCB body, the PCB body includes a plurality of signal layers and at least one inert layer, wherein an insulating layer is formed between any two adjacent signal layers, and the first signal layer of the plurality of signal layers is away from the first One side of the two signal layers is formed with an inert layer, and the first signal layer and the second signal layer are two signal layers to be connected in the plurality of signal layers, and the inert layer is formed of an inert material; a conductive material forming a metal layer for connecting the first signal layer and the second signal layer in a first depositable region of the inner wall of the via, the first depositable region being capable of depositing a first conductive in the inner wall of the via A region of the material that does not include the region in which the inert layer is located.
  • the process of forming the metal layer in the first depositable region of the inner wall of the through hole by using the first conductive material may specifically include :
  • the first conductive material is deposited on the first depositable region of the inner wall of the via, and then the first conductive material deposited on the first depositable region is plated to form the metal layer. After the metallized hole is formed, no back drilling operation is required. It simplifies the processing process of the PCB board and improves the processing efficiency.
  • the process of forming a metal layer by using the first conductive material in the first depositionable region of the inner wall of the through hole may include:
  • first conductive film layer Forming a first conductive film layer on the second depositable region of the inner wall of the via hole by using a second conductive material, the second depositable region being a region capable of depositing a second conductive material, and the second depositable region including the inert layer a region in which a predetermined depth is drilled into the first end of the through hole, the first signal layer being adjacent to the first end of the through hole with respect to the second signal layer, the preset depth being greater than the target a distance between the interface and the target end surface, the target end surface is an end surface of the first end of the through hole, the target interface is a side of the first signal layer away from the inert layer; then the first conductive material may be used in the back drill a third depositable region on the inner wall of the hole forms a second conductive film layer, the third depositable region not including the region where the inert layer is located; finally, by plating the first conductive film layer and the second conductive film layer The metal layer can be formed.
  • the plurality of inert layers may be included in the PCB body, for the case where an inert layer is formed between the signal layers to be connected, two different conductive materials may be deposited to realize between any two signal layers in the PCB body. connection.
  • the process of forming a metal layer by using the first conductive material in the first depositable region of the inner wall of the through hole may further include:
  • first conductive film layer Forming a first conductive film layer on the second depositable region of the inner wall of the through hole by using a second conductive material, the second conductive material being capable of being deposited on a region of the inner wall of the through hole belonging to the inert layer; at the second end of the through hole Drilling into the back hole of the preset depth, the second signal layer is close to the second end of the through hole with respect to the first signal layer, the preset depth is smaller than the distance between the target interface and the target end face, and the target end face is An end surface of the second end of the through hole, the target interface is a side of the first signal layer away from the inert layer;
  • a corrosion-resistant conductive material may be used to form a corrosion-resistant conductive film layer on the inner wall of the back hole and the inner wall of the through hole, and then the first conductive film layer in the through hole is removed, and the first conductive film layer is attached to the first conductive film layer.
  • Corrosion-resistant conductive film layer further, forming a second conductive film layer on the first depositable region of the inner wall of the through hole by using the first conductive material, and finally plating the corrosion-resistant conductive film layer and the second conductive film layer This metal layer can be formed.
  • a microetching method when the first conductive film layer and the corrosion-resistant conductive film layer attached to the first conductive film layer are removed, a microetching method, a laser ablation method or a surface chemical reaction method may be employed.
  • the inert material may be polytetrafluoroethylene; the first conductive material may be a palladium-based copper sink material; the second conductive material may be a non-palladium-based copper sink material; the corrosion-resistant conductive material may include: carbon At least one of powder, graphite or a conductive polymer material.
  • the through hole may be pretreated, and the pretreatment may include a desmear treatment and/or a cleaning process, wherein the desmear treatment Specifically, the drill cuttings in the through holes are removed by using a potassium permanganate solution, and the cleaning process may specifically: cleaning the contaminants in the through holes by a plasma cleaning machine.
  • This pretreatment operation can provide a good bonding interface for the formation of subsequent metal layers.
  • a method of fabricating a circuit board comprising:
  • a plurality of signal layers and at least one inert layer are formed on the substrate to obtain a PCB body; then, a metallization hole can be formed on the PCB body by the method as shown in the first aspect.
  • An insulating layer is formed between any two adjacent signal layers in the PCB body; an inert layer is formed on a side of the plurality of signal layers away from the second signal layer, and the second signal layer and The first signal layer is two signal layers to be connected in the plurality of signal layers, and the inert layer is formed of an inert material.
  • a circuit board is provided which can be fabricated using the method as shown in the second aspect.
  • the present application provides a method for forming a metallized hole, a method for manufacturing a circuit board, and a circuit board.
  • the first conductive material may be used on the inner wall of the through hole.
  • the region belonging to the inert layer forms a metal layer for connecting the first signal layer and the second signal layer.
  • the PCB body includes a plurality of signal layers, and an inert layer is formed on a side of the plurality of signal layers away from the second signal layer, and the first signal layer and the second signal layer are the plurality of signals Two signal layers to be joined in the layer, the inert layer being formed of an inert material.
  • the inert layer is located on a side of the first signal layer away from the second signal layer, and the metal layer is not formed on the inert layer, metal stumps in the metallized hole can be effectively avoided, so after the metallized hole is formed No need to remove the stump by back drilling operation, which improves the processing efficiency and yield of the PCB.
  • FIG. 1 is a schematic structural view of forming a metallized hole on a PCB in the related art
  • 2-1 is a flow chart of a method for forming a metallized hole according to an embodiment of the present invention
  • FIG. 2-2 is a schematic diagram of drilling a through hole on a PCB body according to an embodiment of the present invention
  • 2-3 is a schematic view showing a metal layer formed on an inner wall of a through hole according to an embodiment of the present invention
  • FIG. 3 is a flow chart of a method for forming a metal layer according to an embodiment of the present invention.
  • 4-1 is a flow chart of another method for forming a metal layer according to an embodiment of the present invention.
  • 4-2 is a schematic view showing a first conductive film layer formed on an inner wall of a through hole according to an embodiment of the present invention
  • 4-3 is a schematic view of a back hole according to an embodiment of the present invention.
  • 4-4 is a schematic diagram of forming a second conductive film layer on the inner wall of the back hole according to an embodiment of the present invention
  • 5-1 is a flow chart of still another method for forming a metal layer according to an embodiment of the present invention.
  • 5-3 is a schematic diagram of forming a corrosion-resistant conductive film layer according to an embodiment of the present invention.
  • 5-4 is a schematic diagram of removing a first conductive film layer in a via hole according to an embodiment of the present invention
  • 5-5 are schematic views showing a second conductive film layer formed in a via hole according to an embodiment of the present invention.
  • FIG. 6 is a flow chart of a method of manufacturing a circuit board according to an embodiment of the present invention.
  • the method may include:
  • Step 101 Drill a through hole on the PCB body.
  • the PCB body may include multiple signal layers 01 and at least one inert layer 02, wherein multiple signals are included.
  • a layer refers to at least two signal layers.
  • An insulating layer 03 is formed between any two adjacent signal layers of the plurality of signal layers.
  • an inert layer is formed on a side of the first signal layer away from the second signal layer, and the first signal layer and the second signal layer are two signal layers to be connected in the plurality of signal layers.
  • the inert layer is formed of an inert material, which may be polytetrafluoroethylene (also known as Teflon).
  • the inert material is generally an insulating material, so the inert layer can also serve as an insulating layer between two adjacent signal layers.
  • the side of the signal layer 012 away from the signal layer 011 may be formed with an inert layer 021;
  • the signal layer 014 is to be connected, and the side of the signal layer 013 away from the signal layer 014 may be formed with an inert layer 022.
  • the through hole can be drilled in the PCB body by the drilling device according to the predetermined drilling position and the aperture size. For example, as shown in FIG. 2-2, a through hole 10 can be drilled on the PCB body by using a drilling device.
  • Step 102 Form a metal layer on the first depositable region of the inner wall of the through hole by using the first conductive material.
  • the first depositable region is a region in the inner wall of the via hole capable of depositing a first conductive material.
  • the first conductive material is a conductive material that cannot be deposited on the inert material
  • the first depositable layer The area does not include the area where the inert layer is located.
  • the metal layer can realize electrical connection between the first signal layer and the second signal layer.
  • the first conductive material may be a palladium-based copper sink material, and the palladium-based copper sink material refers to a copper sink solution containing materials such as colloidal palladium, copper sulfate, sulfuric acid, and chloride ions.
  • the conductive film layer may be formed on the inner wall of the through hole by surface chemical reaction, wetting, spraying, sputtering or adsorption, and then the conductive film layer is plated to form a metal layer.
  • the surface chemical reaction includes, but is not limited to, a process of plating a conductive film on a material such as chemical palladium copper and a conductive polymer.
  • the first conductive material may be used to form the metal layer 1a on the inner wall of the through hole 10. Since the first conductive material cannot be deposited on the inert material, as shown in FIG. 2-3.
  • the metal layer 1a is formed only on the first depositable region on the inner wall of the through hole 10. Through the metal layer 1a, the connection of the signal layer 011 and the signal layer 012 can be realized, and the connection of the signal layer 014 and the signal layer 013 can be realized.
  • the signal layer 012 is formed with an inert layer 021 away from the layer of the signal layer 011, an inert layer 022 is formed on the side of the signal layer 013 away from the signal layer 014, and the metal layer is not deposited on the two inert layers, so Effectively avoiding the occurrence of excess metal stumps in the metallized holes, ensuring the signal transmission quality between the signal layers.
  • the through hole needs to be pretreated, and the pretreatment may generally include de-drilling treatment and/or cleaning. deal with.
  • the de-staining treatment may be: removing the cuttings in the through-hole by the potassium permanganate solution
  • the cleaning treatment may be: cleaning the pollutants on the inner wall of the through-hole by using a plasma cleaning machine.
  • the first conductive material may be directly deposited on the first depositable region of the inner wall of the via.
  • the palladium-based copper-plated material may be deposited on the first depositable region of the inner wall of the through-hole by surface chemical reaction, infiltration, spraying, sputtering or adsorption, so that the inner wall of the through-hole forms a conductive film.
  • the layer can thus deposit the first conductive material directly on the first depositable region of the inner wall of the via 10 to form a conductive film. Since the first conductive material is generally a copper-clad material, the conductive film is a conductive copper film.
  • the conductive film may be plated to form a metal layer to obtain a metallization hole for connecting the first signal layer and the second signal layer.
  • electroplating refers to a process of plating a layer of metal or alloy on a conductive film by electrolysis.
  • the thickness of the copper layer of the hole wall can be increased by electroplating to prevent the copper layer from being destroyed by oxidation.
  • the metal layer 011 formed by electroplating the first conductive material adheres only to the first depositable region, and the region of the inner wall of the via hole 10 that belongs to the inert layer does not form a metal layer. . That is, the metal stump is not present in the metal layer for connecting the first signal layer and the second signal layer, and the metallized hole is formed without the need for back drilling operation, thereby effectively simplifying the processing process of the PCB board. Improve the processing efficiency and yield of the PCB.
  • the step 102 may specifically include:
  • the second depositable region forms a first conductive film layer to ensure an effective connection of the two signal layers.
  • the second depositable region is a region capable of depositing a second conductive material, and since the second conductive material can be deposited on the inert material, the second depositable region includes a region where the inert layer is located.
  • the second conductive material may be a non-palladium-based copper sink material.
  • the non-palladium-based copper-plated material refers to a copper-phosphorus solution containing no colloidal palladium, and may be, for example, a black hole liquid or a conductive polymer solution.
  • the black pore liquid is generally composed of fine graphite or carbon black powder, a liquid dispersion medium (for example, deionized water), and a surfactant.
  • the second conductive material may be first formed on the inner wall of the through hole 20.
  • a conductive film layer 1b is formed, and a first conductive film layer 1c is formed on the inner wall of the through hole 30.
  • the metal layer formed in the via hole 20 may be used to connect the signal layer 014 and the signal layer 015, and the metal layer formed in the via hole 30 may be used to connect the signal layer 011 and the signal layer 016.
  • the first signal layer is close to the first end of the through hole with respect to the second signal layer, the preset depth is greater than the target interface The distance between the target end faces.
  • the target end surface is an end surface of the first end of the through hole, and the target interface is a side of the first signal layer away from the inert layer. That is, when the through hole is back-drilled, it is necessary to drill through the first signal layer to be connected. It should be noted that the back hole and the through hole are concentric, and the diameter of the back hole is larger than the diameter of the through hole to ensure that only the resin in the PCB body is on the inner wall of the back hole after the through hole is drilled. A material such as a filler, a glass fiber, a signal layer, and an inert layer is formed, and the originally formed first conductive film layer is drilled.
  • the signal layer 015 can be determined as the first one of the two signal layers. Further, a port corresponding to a side of the first signal layer 015 away from the second signal layer 014 may be determined as a first end of the through hole 20, and a preset depth is drilled at the first end of the through hole 20. Back hole 201 of h1. As can be seen from FIG. 4-3, the predetermined depth h1 is greater than the distance h2 between the target interface 15a (ie, the side of the first signal layer 015 away from the inert layer 023) and the end surface of the first end of the via 20. That is, when the first end of the through hole 20 is back-drilled, the first signal layer 015 needs to be drilled through.
  • the signal layer 016 can be determined as the first signal layer of the two signal layers.
  • the port corresponding to the side of the first signal layer 016 away from the second signal layer 011 may be determined as the first end of the through hole 30, and The first end of the through hole 30 is drilled into the back hole 301 of a predetermined depth h3. As can be seen from FIG.
  • the predetermined depth h3 is greater than the distance h4 between the target interface 16a (ie, the side of the first signal layer 016 away from the inert layer 022) and the end surface of the first end of the via 30. That is, when the first end of the through hole 30 is back-drilled, the first signal layer 016 needs to be drilled.
  • a first conductive material may be used to form a second conductive film layer 10b in a third depositable region of the inner wall of the back hole 201, and a third depositionable region of the inner wall of the back hole 301 may be formed.
  • a second conductive film layer 10c is formed. Since the back hole drills through the first signal layer to be connected, the side of the first signal layer away from the second signal layer is further formed with an inert layer.
  • the first conductive material when the first conductive material is deposited on the inner wall of the back hole, the first conductive material can be deposited on the cross section of the first signal layer to achieve connection with the second signal layer, and the first conductive material does not Deposited on the inert layer, thus avoiding the appearance of excess metal stumps and ensuring the quality of signal transmission between the signal layers.
  • each of the via holes may include a via structure of two forms of a metallized hole and a non-metallized hole.
  • the step 102 may further include: referring to FIG. 5-1, whether the inert layer is formed between the first signal layer and the second signal layer.
  • the second signal layer is close to the second end of the through hole with respect to the first signal layer, the preset depth is smaller than the target interface The distance between the target end faces.
  • the target end surface is an end surface of the second end of the through hole, and the target interface is a side of the first signal layer away from the inert layer. That is, when the through hole is back-drilled, it is not necessary to drill through the first signal layer to be connected.
  • the signal layer to be connected is the signal layer 011 and the signal layer 016, since the inert layer 022 is formed on the side of the signal layer 016 away from the signal layer 011, the signal layer 016 can be determined. Is the first signal layer of the two signal layers.
  • a port corresponding to a side of the second signal layer 011 away from the first signal layer 016 may be determined as a second end of the through hole 30, and a preset depth is drilled at the second end of the through hole 30.
  • the predetermined depth h5 is smaller than the distance h6 between the target interface 16a (ie, the side of the first signal layer 016 away from the inert layer 022) and the end surface of the second end of the via 30. That is, when the second end of the through hole 30 is back-drilled, it is not necessary to drill through the first signal layer 016 to be connected.
  • a preset can be drilled at one end of the through hole 20.
  • the back hole 202 of the depth h7 is smaller than the distance h8 between the target interface 12a (ie, the side of the first signal layer 012 away from the inert layer 021) and the end surface of the through hole 20; for the signal layer 014 and the signal layer 013
  • a back hole 203 of a predetermined depth h9 may be drilled into the other end of the through hole 20, and the predetermined depth h9 is smaller than the target interface 13a (ie, the first signal layer 013 is away from the inert layer 022).
  • the distance between the one side and the end face of the through hole 20 is h0.
  • the corrosion-resistant conductive material may be deposited on the inert layer, and the corrosion-resistant conductive material may specifically include at least one of carbon powder, graphite, and conductive polymer material.
  • a corrosion-resistant conductive film layer may be formed on the inner wall of the back hole and the inner wall of the through hole by surface chemical reaction, infiltration, spraying, sputtering or adsorption.
  • a corrosion-resistant conductive film layer 3a may be formed on the back hole 302 and the inner wall of the through hole 30; an anti-corrosion may be formed on the inner walls of the back hole 202, the through hole 20, and the back hole 203.
  • the conductive film layer 2a is etched.
  • the corrosion-resistant conductive material has a low density and the particles are relatively loose, and the highly corrosive material (such as a sulfuric acid solution or a sodium persulfate solution) can penetrate the corrosion-resistant conductive material and the corrosion resistance.
  • the substrate to which the conductive material is attached is in contact. Therefore, when the substrate to which the corrosion-resistant conductive material is attached is a material having poor corrosion resistance (for example, a copper film), the highly corrosive material can etch the substrate and make the adhesion adhered to the substrate.
  • the corroded conductive material is detached; and when the substrate to which the anti-corrosive conductive material is attached is a material having good corrosion resistance (for example, a resin), the highly corrosive material does not affect the anti-corrosive conductive material.
  • a material having good corrosion resistance for example, a resin
  • the conductive copper film has poor corrosion resistance, so that a microetching method, a laser ablation method or a surface chemical reaction method can be used (the surface chemical reaction can be performed)
  • a displacement reaction for example, by replacing chemical copper with a chemical tin, and then removing tin by nitric acid to remove the first conductive film layer in the via hole and the corrosion-resistant conductive film layer attached to the first conductive film layer;
  • the insulating layer in the PCB body is generally composed of a resin with good corrosion resistance such as resin, filler and glass fiber, and the PTFE forming the inert layer has good corrosion resistance, so the above micro-etching method and laser ablation are performed.
  • the corrosion-resistant conductive film layer directly attached to the PCB substrate in the back hole remains.
  • a second conductive film layer is formed on the first depositable region of the inner wall of the through hole.
  • the first conductive material may be used to form the second conductive film layer 2b in the first depositable region of the inner wall of the through hole 20, and the second conductive region may be formed in the first depositable region of the inner wall of the through hole 30.
  • Film layer 3b is formed on the first depositable region of the inner wall of the through hole.
  • the first conductive material may be deposited directly in the via hole formed by the through hole and the back hole.
  • the second conductive film layer may be formed on the inner wall of the through hole.
  • the deposition area may also be attached to the corrosion-resistant conductive film layer on the inner wall of the back hole.
  • the second conductive film layer of the inner wall of the through hole and the corrosion-resistant conductive film layer of the inner wall of the back hole may be plated to form the metal layer for connecting the first signal layer and the second signal layer.
  • the signal layer in the PCB body is generally formed of a copper foil
  • the inner wall of the back-drilled hole may be attached to A portion of the corrosion-resistant conductive film layer on the signal layer is also removed, destroying the integrity of the corrosion-resistant conductive film layer on the inner wall of the back-drilled hole.
  • the subsequent plating operation can form a layer of metal or alloy on the corrosion-resistant conductive film layer and the cross section of the signal layer, The integrity of the metal layer ultimately formed on the inner wall of the back bore can be ensured, ensuring an effective connection between the signal layers.
  • the metal layer deposited in each via hole can form a plurality of metallized holes, each metallized hole. Electrical connections between different signal layers can be achieved.
  • the metal layer 10b in FIG. 4-4 can realize the connection between the signal layer 011 and the signal layer 012, and can also realize the electrical connection between the signal layer 014 and the signal layer 015 together with the first conductive film layer 1b;
  • the metal layer 2b can realize the connection of the signal layer 015 and the signal layer 016, and can also realize the connection of the signal layer 011 and the signal layer 012 with the metal layer 2a.
  • the method provided by the present application can effectively improve the flexibility of the via design in the PCB and improve the signal transmission capacity of each via in the PCB. Moreover, after the metallized hole is formed on the PCB body by using the method provided by the present application, the through-hole on the PCB body can press the connector at both ends, thereby effectively improving the design flexibility of the PCB board.
  • each of the via holes in the present application can realize connection of a plurality of signal layers, it can be avoided that in the related art, a plurality of signal layers need to be repeatedly set due to limitation of the processing technology, thereby effectively reducing the PCB board. Thickness and thickness to diameter ratio of metallized holes.
  • the back hole drilling and And the through hole is pre-processed.
  • the pre-processing refer to step 102 above, and details are not described herein again.
  • the present application provides a method for forming a metallized hole, which can form a metal layer in a region of the inner wall of the through hole that is not an inert layer by using the first conductive material, because the first to be connected in the PCB body In the signal layer and the second signal layer, an inert layer is formed on a side of the first signal layer away from the second signal layer. Therefore, after the metal layer is formed on the inner wall of the through hole by using the method, redundant portions in the metallized hole can be effectively avoided.
  • the metal stump ensures the signal transmission quality between the two signal layers to which the metal layer is connected, and the metallized hole forming method simplifies the process flow during PCB manufacturing, reduces the manufacturing difficulty of the PCB board, and is effective Improve the processing efficiency and yield of the PCB.
  • the present application also provides a method of manufacturing a circuit board.
  • the method may include:
  • Step 401 forming a plurality of signal layers and at least one inert layer on the substrate to obtain a PCB body, wherein an insulating layer is formed between any two adjacent signal layers; and the first signal layer of the plurality of signal layers is away from the second One side of the signal layer is formed with an inert layer, and the second signal layer and the first signal layer are two signal layers to be connected in the plurality of signal layers, the inert layer being formed of an inert material.
  • the substrate may be a plate material containing a resin, a filler, and a glass fiber.
  • the signal layer may be a copper foil, and the material of the insulating layer may be the same as the material of the substrate. The signal layer, the insulating layer and the inert layer can be pressed together The form is formed on the substrate.
  • Step 402 forming a metallization hole on the PCB body.
  • the metallization hole may be formed by the method shown in FIG. 2-1, and in the process of forming the metallization hole, specifically, as shown in FIG. 3, FIG. 4-1 or FIG.
  • the method shown in -1 forms a metal layer in the metallized hole.
  • the present application also provides a circuit board that can be fabricated using the method shown in FIG.

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  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

La présente invention se rapporte au domaine technique de la fabrication des cartes à circuit imprimé. L'invention concerne un procédé de formation d'un trou plaqué, un procédé de fabrication d'une carte à circuit imprimé et une carte à circuit imprimé. Le procédé comprend les étapes suivantes : perçage d'un trou traversant sur un corps de PCB, le corps de PCB comprenant une pluralité de couches de signal et au moins une couche inerte, la couche inerte étant formée sur un côté d'une première couche de signal distante d'une deuxième couche de signal dans la pluralité de couches de signal, la première couche de signal et la deuxième couche de signal étant deux couches de signal à connecter et la couche inerte étant constituée d'un matériau inerte ; puis formation d'une couche métallique sur une zone, qui n'appartient pas à la couche inerte, dans la paroi interne du trou traversant en utilisant un premier matériau conducteur. Comme la couche inerte se trouve sur le côté de la première couche de signal distante de la deuxième couche de signal et que la couche métallique constituée par le premier matériau conducteur n'est pas déposée sur la couche inerte, un talon métallique n'apparaît pas dans la couche métallique. Il n'y a donc aucun talon à retirer au moyen d'une opération de perçage par l'arrière après la formation du trou plaqué, ce qui permet d'améliorer l'efficacité de traitement et le taux de rendement d'une carte à circuit imprimé.
PCT/CN2017/074363 2017-02-22 2017-02-22 Procédé de formation de trou plaqué, procédé de fabrication de carte à circuit imprimé, et carte à circuit imprimé WO2018152686A1 (fr)

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CN201780012217.6A CN108738379B (zh) 2017-02-22 2017-02-22 金属化孔的形成方法、电路板的制造方法及电路板
PCT/CN2017/074363 WO2018152686A1 (fr) 2017-02-22 2017-02-22 Procédé de formation de trou plaqué, procédé de fabrication de carte à circuit imprimé, et carte à circuit imprimé

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PCT/CN2017/074363 WO2018152686A1 (fr) 2017-02-22 2017-02-22 Procédé de formation de trou plaqué, procédé de fabrication de carte à circuit imprimé, et carte à circuit imprimé

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