WO2018152686A1 - Method for forming plated hole, method for manufacturing circuit board, and circuit board - Google Patents

Method for forming plated hole, method for manufacturing circuit board, and circuit board Download PDF

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Publication number
WO2018152686A1
WO2018152686A1 PCT/CN2017/074363 CN2017074363W WO2018152686A1 WO 2018152686 A1 WO2018152686 A1 WO 2018152686A1 CN 2017074363 W CN2017074363 W CN 2017074363W WO 2018152686 A1 WO2018152686 A1 WO 2018152686A1
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WO
WIPO (PCT)
Prior art keywords
layer
hole
signal
inert
conductive film
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Application number
PCT/CN2017/074363
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French (fr)
Chinese (zh)
Inventor
侯玲珑
李志海
周水平
陈文波
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201780012217.6A priority Critical patent/CN108738379B/en
Priority to PCT/CN2017/074363 priority patent/WO2018152686A1/en
Publication of WO2018152686A1 publication Critical patent/WO2018152686A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections

Definitions

  • a printed circuit board is a support for electronic components and a carrier for electrical connection between electronic components.
  • a plated through hole is generally used to realize electrical connection of different signal layers.
  • the signal layer 02 and the signal layer 03 in the PCB board 00 shown in FIG. 1 can be connected by the PTH 01.
  • a through hole is generally drilled directly on a PCB, and then chemical copper plating and electroplating are performed on the inner wall of the through hole to form a metal layer 010 for connecting the respective signal layers.
  • a back-drilling method to cut off a portion of the PTH 01 that is not used for signal transmission (also referred to as a stub or a stub). For example, in FIG.
  • a drilling device can be used to drill a back hole 011 of a preset depth at one end of the PTH 01 to dissipate the PTH 01. End 012 is removed.
  • the thickness of each PCB of the same batch may vary due to the processing accuracy.
  • the same batch of depth is used for back drilling of the same batch of PCB boards, for PCB boards with thickness less than the design thickness, the signal layer may be drilled through, and the PCB board cannot be used normally; and the thickness is larger than the design.
  • the stump 012 remains and the signal transmission loss is excessive.
  • the present application provides a method for forming a metallized hole, a method for manufacturing the circuit board, and a circuit board.
  • the technical solution is as follows:
  • a method of forming a metallized hole comprising:
  • a through hole is drilled in the PCB body, the PCB body includes a plurality of signal layers and at least one inert layer, wherein an insulating layer is formed between any two adjacent signal layers, and the first signal layer of the plurality of signal layers is away from the first One side of the two signal layers is formed with an inert layer, and the first signal layer and the second signal layer are two signal layers to be connected in the plurality of signal layers, and the inert layer is formed of an inert material; a conductive material forming a metal layer for connecting the first signal layer and the second signal layer in a first depositable region of the inner wall of the via, the first depositable region being capable of depositing a first conductive in the inner wall of the via A region of the material that does not include the region in which the inert layer is located.
  • the process of forming the metal layer in the first depositable region of the inner wall of the through hole by using the first conductive material may specifically include :
  • the first conductive material is deposited on the first depositable region of the inner wall of the via, and then the first conductive material deposited on the first depositable region is plated to form the metal layer. After the metallized hole is formed, no back drilling operation is required. It simplifies the processing process of the PCB board and improves the processing efficiency.
  • the process of forming a metal layer by using the first conductive material in the first depositionable region of the inner wall of the through hole may include:
  • first conductive film layer Forming a first conductive film layer on the second depositable region of the inner wall of the via hole by using a second conductive material, the second depositable region being a region capable of depositing a second conductive material, and the second depositable region including the inert layer a region in which a predetermined depth is drilled into the first end of the through hole, the first signal layer being adjacent to the first end of the through hole with respect to the second signal layer, the preset depth being greater than the target a distance between the interface and the target end surface, the target end surface is an end surface of the first end of the through hole, the target interface is a side of the first signal layer away from the inert layer; then the first conductive material may be used in the back drill a third depositable region on the inner wall of the hole forms a second conductive film layer, the third depositable region not including the region where the inert layer is located; finally, by plating the first conductive film layer and the second conductive film layer The metal layer can be formed.
  • the plurality of inert layers may be included in the PCB body, for the case where an inert layer is formed between the signal layers to be connected, two different conductive materials may be deposited to realize between any two signal layers in the PCB body. connection.
  • the process of forming a metal layer by using the first conductive material in the first depositable region of the inner wall of the through hole may further include:
  • first conductive film layer Forming a first conductive film layer on the second depositable region of the inner wall of the through hole by using a second conductive material, the second conductive material being capable of being deposited on a region of the inner wall of the through hole belonging to the inert layer; at the second end of the through hole Drilling into the back hole of the preset depth, the second signal layer is close to the second end of the through hole with respect to the first signal layer, the preset depth is smaller than the distance between the target interface and the target end face, and the target end face is An end surface of the second end of the through hole, the target interface is a side of the first signal layer away from the inert layer;
  • a corrosion-resistant conductive material may be used to form a corrosion-resistant conductive film layer on the inner wall of the back hole and the inner wall of the through hole, and then the first conductive film layer in the through hole is removed, and the first conductive film layer is attached to the first conductive film layer.
  • Corrosion-resistant conductive film layer further, forming a second conductive film layer on the first depositable region of the inner wall of the through hole by using the first conductive material, and finally plating the corrosion-resistant conductive film layer and the second conductive film layer This metal layer can be formed.
  • a microetching method when the first conductive film layer and the corrosion-resistant conductive film layer attached to the first conductive film layer are removed, a microetching method, a laser ablation method or a surface chemical reaction method may be employed.
  • the inert material may be polytetrafluoroethylene; the first conductive material may be a palladium-based copper sink material; the second conductive material may be a non-palladium-based copper sink material; the corrosion-resistant conductive material may include: carbon At least one of powder, graphite or a conductive polymer material.
  • the through hole may be pretreated, and the pretreatment may include a desmear treatment and/or a cleaning process, wherein the desmear treatment Specifically, the drill cuttings in the through holes are removed by using a potassium permanganate solution, and the cleaning process may specifically: cleaning the contaminants in the through holes by a plasma cleaning machine.
  • This pretreatment operation can provide a good bonding interface for the formation of subsequent metal layers.
  • a method of fabricating a circuit board comprising:
  • a plurality of signal layers and at least one inert layer are formed on the substrate to obtain a PCB body; then, a metallization hole can be formed on the PCB body by the method as shown in the first aspect.
  • An insulating layer is formed between any two adjacent signal layers in the PCB body; an inert layer is formed on a side of the plurality of signal layers away from the second signal layer, and the second signal layer and The first signal layer is two signal layers to be connected in the plurality of signal layers, and the inert layer is formed of an inert material.
  • a circuit board is provided which can be fabricated using the method as shown in the second aspect.
  • the present application provides a method for forming a metallized hole, a method for manufacturing a circuit board, and a circuit board.
  • the first conductive material may be used on the inner wall of the through hole.
  • the region belonging to the inert layer forms a metal layer for connecting the first signal layer and the second signal layer.
  • the PCB body includes a plurality of signal layers, and an inert layer is formed on a side of the plurality of signal layers away from the second signal layer, and the first signal layer and the second signal layer are the plurality of signals Two signal layers to be joined in the layer, the inert layer being formed of an inert material.
  • the inert layer is located on a side of the first signal layer away from the second signal layer, and the metal layer is not formed on the inert layer, metal stumps in the metallized hole can be effectively avoided, so after the metallized hole is formed No need to remove the stump by back drilling operation, which improves the processing efficiency and yield of the PCB.
  • FIG. 1 is a schematic structural view of forming a metallized hole on a PCB in the related art
  • 2-1 is a flow chart of a method for forming a metallized hole according to an embodiment of the present invention
  • FIG. 2-2 is a schematic diagram of drilling a through hole on a PCB body according to an embodiment of the present invention
  • 2-3 is a schematic view showing a metal layer formed on an inner wall of a through hole according to an embodiment of the present invention
  • FIG. 3 is a flow chart of a method for forming a metal layer according to an embodiment of the present invention.
  • 4-1 is a flow chart of another method for forming a metal layer according to an embodiment of the present invention.
  • 4-2 is a schematic view showing a first conductive film layer formed on an inner wall of a through hole according to an embodiment of the present invention
  • 4-3 is a schematic view of a back hole according to an embodiment of the present invention.
  • 4-4 is a schematic diagram of forming a second conductive film layer on the inner wall of the back hole according to an embodiment of the present invention
  • 5-1 is a flow chart of still another method for forming a metal layer according to an embodiment of the present invention.
  • 5-3 is a schematic diagram of forming a corrosion-resistant conductive film layer according to an embodiment of the present invention.
  • 5-4 is a schematic diagram of removing a first conductive film layer in a via hole according to an embodiment of the present invention
  • 5-5 are schematic views showing a second conductive film layer formed in a via hole according to an embodiment of the present invention.
  • FIG. 6 is a flow chart of a method of manufacturing a circuit board according to an embodiment of the present invention.
  • the method may include:
  • Step 101 Drill a through hole on the PCB body.
  • the PCB body may include multiple signal layers 01 and at least one inert layer 02, wherein multiple signals are included.
  • a layer refers to at least two signal layers.
  • An insulating layer 03 is formed between any two adjacent signal layers of the plurality of signal layers.
  • an inert layer is formed on a side of the first signal layer away from the second signal layer, and the first signal layer and the second signal layer are two signal layers to be connected in the plurality of signal layers.
  • the inert layer is formed of an inert material, which may be polytetrafluoroethylene (also known as Teflon).
  • the inert material is generally an insulating material, so the inert layer can also serve as an insulating layer between two adjacent signal layers.
  • the side of the signal layer 012 away from the signal layer 011 may be formed with an inert layer 021;
  • the signal layer 014 is to be connected, and the side of the signal layer 013 away from the signal layer 014 may be formed with an inert layer 022.
  • the through hole can be drilled in the PCB body by the drilling device according to the predetermined drilling position and the aperture size. For example, as shown in FIG. 2-2, a through hole 10 can be drilled on the PCB body by using a drilling device.
  • Step 102 Form a metal layer on the first depositable region of the inner wall of the through hole by using the first conductive material.
  • the first depositable region is a region in the inner wall of the via hole capable of depositing a first conductive material.
  • the first conductive material is a conductive material that cannot be deposited on the inert material
  • the first depositable layer The area does not include the area where the inert layer is located.
  • the metal layer can realize electrical connection between the first signal layer and the second signal layer.
  • the first conductive material may be a palladium-based copper sink material, and the palladium-based copper sink material refers to a copper sink solution containing materials such as colloidal palladium, copper sulfate, sulfuric acid, and chloride ions.
  • the conductive film layer may be formed on the inner wall of the through hole by surface chemical reaction, wetting, spraying, sputtering or adsorption, and then the conductive film layer is plated to form a metal layer.
  • the surface chemical reaction includes, but is not limited to, a process of plating a conductive film on a material such as chemical palladium copper and a conductive polymer.
  • the first conductive material may be used to form the metal layer 1a on the inner wall of the through hole 10. Since the first conductive material cannot be deposited on the inert material, as shown in FIG. 2-3.
  • the metal layer 1a is formed only on the first depositable region on the inner wall of the through hole 10. Through the metal layer 1a, the connection of the signal layer 011 and the signal layer 012 can be realized, and the connection of the signal layer 014 and the signal layer 013 can be realized.
  • the signal layer 012 is formed with an inert layer 021 away from the layer of the signal layer 011, an inert layer 022 is formed on the side of the signal layer 013 away from the signal layer 014, and the metal layer is not deposited on the two inert layers, so Effectively avoiding the occurrence of excess metal stumps in the metallized holes, ensuring the signal transmission quality between the signal layers.
  • the through hole needs to be pretreated, and the pretreatment may generally include de-drilling treatment and/or cleaning. deal with.
  • the de-staining treatment may be: removing the cuttings in the through-hole by the potassium permanganate solution
  • the cleaning treatment may be: cleaning the pollutants on the inner wall of the through-hole by using a plasma cleaning machine.
  • the first conductive material may be directly deposited on the first depositable region of the inner wall of the via.
  • the palladium-based copper-plated material may be deposited on the first depositable region of the inner wall of the through-hole by surface chemical reaction, infiltration, spraying, sputtering or adsorption, so that the inner wall of the through-hole forms a conductive film.
  • the layer can thus deposit the first conductive material directly on the first depositable region of the inner wall of the via 10 to form a conductive film. Since the first conductive material is generally a copper-clad material, the conductive film is a conductive copper film.
  • the conductive film may be plated to form a metal layer to obtain a metallization hole for connecting the first signal layer and the second signal layer.
  • electroplating refers to a process of plating a layer of metal or alloy on a conductive film by electrolysis.
  • the thickness of the copper layer of the hole wall can be increased by electroplating to prevent the copper layer from being destroyed by oxidation.
  • the metal layer 011 formed by electroplating the first conductive material adheres only to the first depositable region, and the region of the inner wall of the via hole 10 that belongs to the inert layer does not form a metal layer. . That is, the metal stump is not present in the metal layer for connecting the first signal layer and the second signal layer, and the metallized hole is formed without the need for back drilling operation, thereby effectively simplifying the processing process of the PCB board. Improve the processing efficiency and yield of the PCB.
  • the step 102 may specifically include:
  • the second depositable region forms a first conductive film layer to ensure an effective connection of the two signal layers.
  • the second depositable region is a region capable of depositing a second conductive material, and since the second conductive material can be deposited on the inert material, the second depositable region includes a region where the inert layer is located.
  • the second conductive material may be a non-palladium-based copper sink material.
  • the non-palladium-based copper-plated material refers to a copper-phosphorus solution containing no colloidal palladium, and may be, for example, a black hole liquid or a conductive polymer solution.
  • the black pore liquid is generally composed of fine graphite or carbon black powder, a liquid dispersion medium (for example, deionized water), and a surfactant.
  • the second conductive material may be first formed on the inner wall of the through hole 20.
  • a conductive film layer 1b is formed, and a first conductive film layer 1c is formed on the inner wall of the through hole 30.
  • the metal layer formed in the via hole 20 may be used to connect the signal layer 014 and the signal layer 015, and the metal layer formed in the via hole 30 may be used to connect the signal layer 011 and the signal layer 016.
  • the first signal layer is close to the first end of the through hole with respect to the second signal layer, the preset depth is greater than the target interface The distance between the target end faces.
  • the target end surface is an end surface of the first end of the through hole, and the target interface is a side of the first signal layer away from the inert layer. That is, when the through hole is back-drilled, it is necessary to drill through the first signal layer to be connected. It should be noted that the back hole and the through hole are concentric, and the diameter of the back hole is larger than the diameter of the through hole to ensure that only the resin in the PCB body is on the inner wall of the back hole after the through hole is drilled. A material such as a filler, a glass fiber, a signal layer, and an inert layer is formed, and the originally formed first conductive film layer is drilled.
  • the signal layer 015 can be determined as the first one of the two signal layers. Further, a port corresponding to a side of the first signal layer 015 away from the second signal layer 014 may be determined as a first end of the through hole 20, and a preset depth is drilled at the first end of the through hole 20. Back hole 201 of h1. As can be seen from FIG. 4-3, the predetermined depth h1 is greater than the distance h2 between the target interface 15a (ie, the side of the first signal layer 015 away from the inert layer 023) and the end surface of the first end of the via 20. That is, when the first end of the through hole 20 is back-drilled, the first signal layer 015 needs to be drilled through.
  • the signal layer 016 can be determined as the first signal layer of the two signal layers.
  • the port corresponding to the side of the first signal layer 016 away from the second signal layer 011 may be determined as the first end of the through hole 30, and The first end of the through hole 30 is drilled into the back hole 301 of a predetermined depth h3. As can be seen from FIG.
  • the predetermined depth h3 is greater than the distance h4 between the target interface 16a (ie, the side of the first signal layer 016 away from the inert layer 022) and the end surface of the first end of the via 30. That is, when the first end of the through hole 30 is back-drilled, the first signal layer 016 needs to be drilled.
  • a first conductive material may be used to form a second conductive film layer 10b in a third depositable region of the inner wall of the back hole 201, and a third depositionable region of the inner wall of the back hole 301 may be formed.
  • a second conductive film layer 10c is formed. Since the back hole drills through the first signal layer to be connected, the side of the first signal layer away from the second signal layer is further formed with an inert layer.
  • the first conductive material when the first conductive material is deposited on the inner wall of the back hole, the first conductive material can be deposited on the cross section of the first signal layer to achieve connection with the second signal layer, and the first conductive material does not Deposited on the inert layer, thus avoiding the appearance of excess metal stumps and ensuring the quality of signal transmission between the signal layers.
  • each of the via holes may include a via structure of two forms of a metallized hole and a non-metallized hole.
  • the step 102 may further include: referring to FIG. 5-1, whether the inert layer is formed between the first signal layer and the second signal layer.
  • the second signal layer is close to the second end of the through hole with respect to the first signal layer, the preset depth is smaller than the target interface The distance between the target end faces.
  • the target end surface is an end surface of the second end of the through hole, and the target interface is a side of the first signal layer away from the inert layer. That is, when the through hole is back-drilled, it is not necessary to drill through the first signal layer to be connected.
  • the signal layer to be connected is the signal layer 011 and the signal layer 016, since the inert layer 022 is formed on the side of the signal layer 016 away from the signal layer 011, the signal layer 016 can be determined. Is the first signal layer of the two signal layers.
  • a port corresponding to a side of the second signal layer 011 away from the first signal layer 016 may be determined as a second end of the through hole 30, and a preset depth is drilled at the second end of the through hole 30.
  • the predetermined depth h5 is smaller than the distance h6 between the target interface 16a (ie, the side of the first signal layer 016 away from the inert layer 022) and the end surface of the second end of the via 30. That is, when the second end of the through hole 30 is back-drilled, it is not necessary to drill through the first signal layer 016 to be connected.
  • a preset can be drilled at one end of the through hole 20.
  • the back hole 202 of the depth h7 is smaller than the distance h8 between the target interface 12a (ie, the side of the first signal layer 012 away from the inert layer 021) and the end surface of the through hole 20; for the signal layer 014 and the signal layer 013
  • a back hole 203 of a predetermined depth h9 may be drilled into the other end of the through hole 20, and the predetermined depth h9 is smaller than the target interface 13a (ie, the first signal layer 013 is away from the inert layer 022).
  • the distance between the one side and the end face of the through hole 20 is h0.
  • the corrosion-resistant conductive material may be deposited on the inert layer, and the corrosion-resistant conductive material may specifically include at least one of carbon powder, graphite, and conductive polymer material.
  • a corrosion-resistant conductive film layer may be formed on the inner wall of the back hole and the inner wall of the through hole by surface chemical reaction, infiltration, spraying, sputtering or adsorption.
  • a corrosion-resistant conductive film layer 3a may be formed on the back hole 302 and the inner wall of the through hole 30; an anti-corrosion may be formed on the inner walls of the back hole 202, the through hole 20, and the back hole 203.
  • the conductive film layer 2a is etched.
  • the corrosion-resistant conductive material has a low density and the particles are relatively loose, and the highly corrosive material (such as a sulfuric acid solution or a sodium persulfate solution) can penetrate the corrosion-resistant conductive material and the corrosion resistance.
  • the substrate to which the conductive material is attached is in contact. Therefore, when the substrate to which the corrosion-resistant conductive material is attached is a material having poor corrosion resistance (for example, a copper film), the highly corrosive material can etch the substrate and make the adhesion adhered to the substrate.
  • the corroded conductive material is detached; and when the substrate to which the anti-corrosive conductive material is attached is a material having good corrosion resistance (for example, a resin), the highly corrosive material does not affect the anti-corrosive conductive material.
  • a material having good corrosion resistance for example, a resin
  • the conductive copper film has poor corrosion resistance, so that a microetching method, a laser ablation method or a surface chemical reaction method can be used (the surface chemical reaction can be performed)
  • a displacement reaction for example, by replacing chemical copper with a chemical tin, and then removing tin by nitric acid to remove the first conductive film layer in the via hole and the corrosion-resistant conductive film layer attached to the first conductive film layer;
  • the insulating layer in the PCB body is generally composed of a resin with good corrosion resistance such as resin, filler and glass fiber, and the PTFE forming the inert layer has good corrosion resistance, so the above micro-etching method and laser ablation are performed.
  • the corrosion-resistant conductive film layer directly attached to the PCB substrate in the back hole remains.
  • a second conductive film layer is formed on the first depositable region of the inner wall of the through hole.
  • the first conductive material may be used to form the second conductive film layer 2b in the first depositable region of the inner wall of the through hole 20, and the second conductive region may be formed in the first depositable region of the inner wall of the through hole 30.
  • Film layer 3b is formed on the first depositable region of the inner wall of the through hole.
  • the first conductive material may be deposited directly in the via hole formed by the through hole and the back hole.
  • the second conductive film layer may be formed on the inner wall of the through hole.
  • the deposition area may also be attached to the corrosion-resistant conductive film layer on the inner wall of the back hole.
  • the second conductive film layer of the inner wall of the through hole and the corrosion-resistant conductive film layer of the inner wall of the back hole may be plated to form the metal layer for connecting the first signal layer and the second signal layer.
  • the signal layer in the PCB body is generally formed of a copper foil
  • the inner wall of the back-drilled hole may be attached to A portion of the corrosion-resistant conductive film layer on the signal layer is also removed, destroying the integrity of the corrosion-resistant conductive film layer on the inner wall of the back-drilled hole.
  • the subsequent plating operation can form a layer of metal or alloy on the corrosion-resistant conductive film layer and the cross section of the signal layer, The integrity of the metal layer ultimately formed on the inner wall of the back bore can be ensured, ensuring an effective connection between the signal layers.
  • the metal layer deposited in each via hole can form a plurality of metallized holes, each metallized hole. Electrical connections between different signal layers can be achieved.
  • the metal layer 10b in FIG. 4-4 can realize the connection between the signal layer 011 and the signal layer 012, and can also realize the electrical connection between the signal layer 014 and the signal layer 015 together with the first conductive film layer 1b;
  • the metal layer 2b can realize the connection of the signal layer 015 and the signal layer 016, and can also realize the connection of the signal layer 011 and the signal layer 012 with the metal layer 2a.
  • the method provided by the present application can effectively improve the flexibility of the via design in the PCB and improve the signal transmission capacity of each via in the PCB. Moreover, after the metallized hole is formed on the PCB body by using the method provided by the present application, the through-hole on the PCB body can press the connector at both ends, thereby effectively improving the design flexibility of the PCB board.
  • each of the via holes in the present application can realize connection of a plurality of signal layers, it can be avoided that in the related art, a plurality of signal layers need to be repeatedly set due to limitation of the processing technology, thereby effectively reducing the PCB board. Thickness and thickness to diameter ratio of metallized holes.
  • the back hole drilling and And the through hole is pre-processed.
  • the pre-processing refer to step 102 above, and details are not described herein again.
  • the present application provides a method for forming a metallized hole, which can form a metal layer in a region of the inner wall of the through hole that is not an inert layer by using the first conductive material, because the first to be connected in the PCB body In the signal layer and the second signal layer, an inert layer is formed on a side of the first signal layer away from the second signal layer. Therefore, after the metal layer is formed on the inner wall of the through hole by using the method, redundant portions in the metallized hole can be effectively avoided.
  • the metal stump ensures the signal transmission quality between the two signal layers to which the metal layer is connected, and the metallized hole forming method simplifies the process flow during PCB manufacturing, reduces the manufacturing difficulty of the PCB board, and is effective Improve the processing efficiency and yield of the PCB.
  • the present application also provides a method of manufacturing a circuit board.
  • the method may include:
  • Step 401 forming a plurality of signal layers and at least one inert layer on the substrate to obtain a PCB body, wherein an insulating layer is formed between any two adjacent signal layers; and the first signal layer of the plurality of signal layers is away from the second One side of the signal layer is formed with an inert layer, and the second signal layer and the first signal layer are two signal layers to be connected in the plurality of signal layers, the inert layer being formed of an inert material.
  • the substrate may be a plate material containing a resin, a filler, and a glass fiber.
  • the signal layer may be a copper foil, and the material of the insulating layer may be the same as the material of the substrate. The signal layer, the insulating layer and the inert layer can be pressed together The form is formed on the substrate.
  • Step 402 forming a metallization hole on the PCB body.
  • the metallization hole may be formed by the method shown in FIG. 2-1, and in the process of forming the metallization hole, specifically, as shown in FIG. 3, FIG. 4-1 or FIG.
  • the method shown in -1 forms a metal layer in the metallized hole.
  • the present application also provides a circuit board that can be fabricated using the method shown in FIG.

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  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

The present application relates to the technical field of circuit board manufacture. Disclosed are a method for forming a plated hole, a method for manufacturing a circuit board, and a circuit board. The method comprises: drilling a through hole on a PCB body, the PCB body comprising a plurality of signal layers and at least one inert layer, the inert layer being formed on one side of a first signal layer distant from a second signal layer in the plurality of signal layers, the first signal layer and the second signal layer being two signal layers to be connected, and the inert layer being formed of an inert material; and then forming a metal layer on an area, which does not belong to the inert layer, in the inner wall of the through hole by using a first conductive material. Since the inert layer is on the side of the first signal layer distant from the second signal layer, and the metal layer formed by the first conductive material would not be deposited on the inert layer, a metal stub would not appear in the metal layer. Thus, there is no stub to be removed by means of a back drilling operation after the plated hole is formed, thereby improving the processing efficiency and yield rate of a PCB.

Description

金属化孔的形成方法、电路板的制造方法及电路板Method for forming metallized holes, method for manufacturing circuit board, and circuit board 技术领域Technical field
本申请涉及电路板制造技术领域,特别涉及一种金属化孔的形成方法、电路板的制造方法及电路板。The present application relates to the field of circuit board manufacturing technology, and in particular, to a method for forming a metallized hole, a method for manufacturing the circuit board, and a circuit board.
背景技术Background technique
印制电路板(Printed Circuit Board,PCB)是电子元器件的支撑体,也是电子元器件之间电气连接的载体。在多层PCB板中,一般采用金属化孔(Plated through hole,PTH)实现不同信号层的电连接。例如图1所示的PCB板00中的信号层02和信号层03之间可以通过PTH 01进行连接。A printed circuit board (PCB) is a support for electronic components and a carrier for electrical connection between electronic components. In a multilayer PCB board, a plated through hole (PTH) is generally used to realize electrical connection of different signal layers. For example, the signal layer 02 and the signal layer 03 in the PCB board 00 shown in FIG. 1 can be connected by the PTH 01.
相关技术中,在形成PTH时,一般是直接在PCB板上钻通孔,然后在该通孔内壁进行化学沉铜和电镀,以形成用于连接各信号层的金属层010。进一步的,为了避免信号传输的损耗,还需要采用背钻的方法将该PTH 01中不用于信号传输的部分(也称为残端或者Stub)切除。例如图1中,假设信号层02和03均无需与信号层04连接,则可以采用钻孔设备在该PTH 01的一端钻入预设深度的背钻孔011,以将该PTH 01中的残端012切除。In the related art, when forming a PTH, a through hole is generally drilled directly on a PCB, and then chemical copper plating and electroplating are performed on the inner wall of the through hole to form a metal layer 010 for connecting the respective signal layers. Further, in order to avoid loss of signal transmission, it is also necessary to use a back-drilling method to cut off a portion of the PTH 01 that is not used for signal transmission (also referred to as a stub or a stub). For example, in FIG. 1, assuming that the signal layers 02 and 03 do not need to be connected to the signal layer 04, a drilling device can be used to drill a back hole 011 of a preset depth at one end of the PTH 01 to dissipate the PTH 01. End 012 is removed.
但是,在实际应用中,由于受到加工精度的影响,同一批次的各个PCB板的厚度也会存在差异。当采用同一预设深度对同一批次的各个PCB板进行背钻操作时,对于厚度小于设计厚度的PCB板,可能导致其中的信号层被钻穿,PCB板无法正常使用;而对于厚度大于设计厚度的PCB板,则可能出现残端012残留,信号传输损耗过大的问题。However, in practical applications, the thickness of each PCB of the same batch may vary due to the processing accuracy. When the same batch of depth is used for back drilling of the same batch of PCB boards, for PCB boards with thickness less than the design thickness, the signal layer may be drilled through, and the PCB board cannot be used normally; and the thickness is larger than the design. For the thickness of the PCB board, there may be a problem that the stump 012 remains and the signal transmission loss is excessive.
发明内容Summary of the invention
为了解决相关技术中在形成金属化孔时残端长度不易控制的问题,本申请提供了一种金属化孔的形成方法、电路板的制造方法及电路板。所述技术方案如下:In order to solve the problem that the length of the stump is difficult to control when forming the metallized hole in the related art, the present application provides a method for forming a metallized hole, a method for manufacturing the circuit board, and a circuit board. The technical solution is as follows:
第一方面,提供了一种金属化孔的形成方法,该方法包括:In a first aspect, a method of forming a metallized hole is provided, the method comprising:
在PCB本体上钻通孔,该PCB本体包括多个信号层和至少一个惰性层,其中任意两个相邻的信号层之间形成有绝缘层,该多个信号层中第一信号层远离第二信号层的一侧形成有惰性层,该第一信号层和该第二信号层为该多个信号层中待连接的两个信号层,该惰性层由惰性材料形成;之后,可以采用第一导电材料在该通孔内壁的第一可沉积区域形成用于连接该第一信号层和该第二信号层的金属层,该第一可沉积区域为该通孔内壁中能够沉积第一导电材料的区域,该第一可沉积区域不包括该惰性层所在的区域。A through hole is drilled in the PCB body, the PCB body includes a plurality of signal layers and at least one inert layer, wherein an insulating layer is formed between any two adjacent signal layers, and the first signal layer of the plurality of signal layers is away from the first One side of the two signal layers is formed with an inert layer, and the first signal layer and the second signal layer are two signal layers to be connected in the plurality of signal layers, and the inert layer is formed of an inert material; a conductive material forming a metal layer for connecting the first signal layer and the second signal layer in a first depositable region of the inner wall of the via, the first depositable region being capable of depositing a first conductive in the inner wall of the via A region of the material that does not include the region in which the inert layer is located.
由于该惰性层位于该第一信号层远离第二信号层的一侧,且该金属层未形成在该惰性层上,因此可以避免该金属化孔中出现金属残端,保证信号层之间的信号传输质量。Since the inert layer is located on a side of the first signal layer away from the second signal layer, and the metal layer is not formed on the inert layer, metal stumps in the metallized hole can be avoided, and the signal layer is ensured. Signal transmission quality.
可选的,若该待连接的第一信号层和第二信号层之间未形成惰性层,则采用第一导电材料在该通孔内壁的第一可沉积区域形成金属层的过程具体可以包括:Optionally, if the inert layer is not formed between the first signal layer and the second signal layer to be connected, the process of forming the metal layer in the first depositable region of the inner wall of the through hole by using the first conductive material may specifically include :
将该第一导电材料沉积在该通孔内壁的第一可沉积区域,然后对沉积在该第一可沉积区域的第一导电材料进行电镀,以形成该金属层。该金属化孔形成后无需再进行背钻操作, 简化了PCB板的加工工艺流程,提高了加工效率。The first conductive material is deposited on the first depositable region of the inner wall of the via, and then the first conductive material deposited on the first depositable region is plated to form the metal layer. After the metallized hole is formed, no back drilling operation is required. It simplifies the processing process of the PCB board and improves the processing efficiency.
可选的,若该第一信号层和该第二信号层之间形成有惰性层,该采用第一导电材料在该通孔内壁的第一可沉积区域形成金属层的过程具体可以包括:Optionally, if an inert layer is formed between the first signal layer and the second signal layer, the process of forming a metal layer by using the first conductive material in the first depositionable region of the inner wall of the through hole may include:
采用第二导电材料在该通孔内壁的第二可沉积区域形成第一导电膜层,该第二可沉积区域为能沉积第二导电材料的区域,且该第二可沉积区域包括该惰性层所在的区域;然后在该通孔的第一端钻入预设深度的背钻孔,该第一信号层相对于该第二信号层靠近该通孔的第一端,该预设深度大于目标界面与目标端面之间的距离,该目标端面为该通孔的第一端的端面,该目标界面为该第一信号层远离该惰性层的一面;之后可以采用第一导电材料在该背钻孔内壁上的第三可沉积区域形成第二导电膜层,该第三可沉积区域不包括该惰性层所在的区域;最后通过对该第一导电膜层和该第二导电膜层进行电镀即可形成该金属层。Forming a first conductive film layer on the second depositable region of the inner wall of the via hole by using a second conductive material, the second depositable region being a region capable of depositing a second conductive material, and the second depositable region including the inert layer a region in which a predetermined depth is drilled into the first end of the through hole, the first signal layer being adjacent to the first end of the through hole with respect to the second signal layer, the preset depth being greater than the target a distance between the interface and the target end surface, the target end surface is an end surface of the first end of the through hole, the target interface is a side of the first signal layer away from the inert layer; then the first conductive material may be used in the back drill a third depositable region on the inner wall of the hole forms a second conductive film layer, the third depositable region not including the region where the inert layer is located; finally, by plating the first conductive film layer and the second conductive film layer The metal layer can be formed.
由于该PCB本体中可以包括多个惰性层,对于待连接的信号层之间形成有惰性层的情况,可以通过沉积两种不同的导电材料,实现该PCB本体中任意两个信号层之间的连接。Since the plurality of inert layers may be included in the PCB body, for the case where an inert layer is formed between the signal layers to be connected, two different conductive materials may be deposited to realize between any two signal layers in the PCB body. connection.
可选的,若该第一信号层和该第二信号层之间形成有惰性层,该采用第一导电材料在该通孔内壁的第一可沉积区域形成金属层的过程还可包括:Optionally, if an inert layer is formed between the first signal layer and the second signal layer, the process of forming a metal layer by using the first conductive material in the first depositable region of the inner wall of the through hole may further include:
采用第二导电材料在该通孔内壁的第二可沉积区域形成第一导电膜层,该第二导电材料能够沉积在该通孔内壁中属于惰性层的区域;在该通孔的第二端钻入预设深度的背钻孔,该第二信号层相对于该第一信号层靠近该通孔的第二端,该预设深度小于目标界面与目标端面之间的距离,该目标端面为该通孔的第二端的端面,该目标界面为该第一信号层远离该惰性层的一面;Forming a first conductive film layer on the second depositable region of the inner wall of the through hole by using a second conductive material, the second conductive material being capable of being deposited on a region of the inner wall of the through hole belonging to the inert layer; at the second end of the through hole Drilling into the back hole of the preset depth, the second signal layer is close to the second end of the through hole with respect to the first signal layer, the preset depth is smaller than the distance between the target interface and the target end face, and the target end face is An end surface of the second end of the through hole, the target interface is a side of the first signal layer away from the inert layer;
之后,可以采用抗腐蚀导电材料在该背钻孔内壁和该通孔内壁形成抗腐蚀导电膜层,然后去除该通孔中的第一导电膜层,以及附着在该第一导电膜层上的抗腐蚀导电膜层;进一步的,再采用第一导电材料在该通孔内壁的第一可沉积区域形成第二导电膜层,最后对该抗腐蚀导电膜层和该第二导电膜层进行电镀即可形成该金属层。Thereafter, a corrosion-resistant conductive material may be used to form a corrosion-resistant conductive film layer on the inner wall of the back hole and the inner wall of the through hole, and then the first conductive film layer in the through hole is removed, and the first conductive film layer is attached to the first conductive film layer. Corrosion-resistant conductive film layer; further, forming a second conductive film layer on the first depositable region of the inner wall of the through hole by using the first conductive material, and finally plating the corrosion-resistant conductive film layer and the second conductive film layer This metal layer can be formed.
其中,去除第一导电膜层,以及附着在该第一导电膜层上的抗腐蚀导电膜层时,可以采用微蚀法、激光烧蚀法或者表面化学反应的方法。Wherein, when the first conductive film layer and the corrosion-resistant conductive film layer attached to the first conductive film layer are removed, a microetching method, a laser ablation method or a surface chemical reaction method may be employed.
可选的,该惰性材料可以为聚四氟乙烯;该第一导电材料可以为钯系沉铜材料;该第二导电材料可以为非钯系沉铜材料;该抗腐蚀导电材料可以包括:碳粉、石墨或者导电高分子材料中的至少一种。Optionally, the inert material may be polytetrafluoroethylene; the first conductive material may be a palladium-based copper sink material; the second conductive material may be a non-palladium-based copper sink material; the corrosion-resistant conductive material may include: carbon At least one of powder, graphite or a conductive polymer material.
可选的,在采用第一导电材料在该通孔内壁形成金属层之前,还可以对该通孔进行预处理,该预处理可以包括去钻污处理和/或清洗处理,其中去钻污处理具体可以为:通过高锰酸钾溶液去除通孔内的钻屑,该清洗处理具体可以为:通过等离子清洗机对通孔内的污染物进行清洗。通过该预处理操作可以为后续金属层的形成提供一个良好的粘结界面。Optionally, before the metal layer is formed on the inner wall of the through hole by using the first conductive material, the through hole may be pretreated, and the pretreatment may include a desmear treatment and/or a cleaning process, wherein the desmear treatment Specifically, the drill cuttings in the through holes are removed by using a potassium permanganate solution, and the cleaning process may specifically: cleaning the contaminants in the through holes by a plasma cleaning machine. This pretreatment operation can provide a good bonding interface for the formation of subsequent metal layers.
第二方面,提供了一种电路板的制造方法,该方法可以包括:In a second aspect, a method of fabricating a circuit board is provided, the method comprising:
在基板上形成多个信号层和至少一个惰性层,得到PCB本体;然后即可采用如第一方面所示的方法在该PCB本体上形成金属化孔。A plurality of signal layers and at least one inert layer are formed on the substrate to obtain a PCB body; then, a metallization hole can be formed on the PCB body by the method as shown in the first aspect.
其中,该PCB本体中任意两个相邻的信号层之间形成有绝缘层;该多个信号层中第一信号层远离第二信号层的一侧形成有惰性层,该第二信号层和该第一信号层为该多个信号层中待连接的两个信号层,该惰性层由惰性材料形成。An insulating layer is formed between any two adjacent signal layers in the PCB body; an inert layer is formed on a side of the plurality of signal layers away from the second signal layer, and the second signal layer and The first signal layer is two signal layers to be connected in the plurality of signal layers, and the inert layer is formed of an inert material.
第三方面,提供了一种电路板,该电路板可以采用如第二方面所示的方法制造形成。 In a third aspect, a circuit board is provided which can be fabricated using the method as shown in the second aspect.
综上所述,本申请提供了一种金属化孔的形成方法、电路板的制造方法及电路板,该方法在PCB本体上钻通孔后,可以采用第一导电材料在该通孔内壁不属于惰性层的区域形成用于连接第一信号层和第二信号层的金属层。其中,该PCB本体包括多个信号层,该多个信号层中第一信号层远离第二信号层的一侧形成有惰性层,该第一信号层和该第二信号层为该多个信号层中待连接的两个信号层,该惰性层由惰性材料形成。由于该惰性层位于第一信号层远离第二信号层的一侧,而该金属层未形成在惰性层上,因此可以有效避免该金属化孔中出现金属残端,故该金属化孔形成后无需再通过背钻操作去除残端,提高了PCB板的加工效率和良率。In summary, the present application provides a method for forming a metallized hole, a method for manufacturing a circuit board, and a circuit board. After the through hole is drilled in the PCB body, the first conductive material may be used on the inner wall of the through hole. The region belonging to the inert layer forms a metal layer for connecting the first signal layer and the second signal layer. The PCB body includes a plurality of signal layers, and an inert layer is formed on a side of the plurality of signal layers away from the second signal layer, and the first signal layer and the second signal layer are the plurality of signals Two signal layers to be joined in the layer, the inert layer being formed of an inert material. Since the inert layer is located on a side of the first signal layer away from the second signal layer, and the metal layer is not formed on the inert layer, metal stumps in the metallized hole can be effectively avoided, so after the metallized hole is formed No need to remove the stump by back drilling operation, which improves the processing efficiency and yield of the PCB.
附图说明DRAWINGS
图1是相关技术中在PCB上形成金属化孔的结构示意图;1 is a schematic structural view of forming a metallized hole on a PCB in the related art;
图2-1是本发明的一个实施例提供的一种金属化孔的形成方法的流程图;2-1 is a flow chart of a method for forming a metallized hole according to an embodiment of the present invention;
图2-2是本发明的一个实施例提供的一种在PCB本体上钻通孔的示意图;2-2 is a schematic diagram of drilling a through hole on a PCB body according to an embodiment of the present invention;
图2-3是本发明的一个实施例提供的一种在通孔内壁上形成金属层的示意图;2-3 is a schematic view showing a metal layer formed on an inner wall of a through hole according to an embodiment of the present invention;
图3是本发明的一个实施例提供的一种形成金属层的方法流程图;3 is a flow chart of a method for forming a metal layer according to an embodiment of the present invention;
图4-1是本发明的一个实施例提供的另一种形成金属层的方法流程图;4-1 is a flow chart of another method for forming a metal layer according to an embodiment of the present invention;
图4-2是本发明的一个实施例提供的一种在通孔内壁形成第一导电膜层的示意图;4-2 is a schematic view showing a first conductive film layer formed on an inner wall of a through hole according to an embodiment of the present invention;
图4-3是本发明的一个实施例提供的一种背钻孔的示意图;4-3 is a schematic view of a back hole according to an embodiment of the present invention;
图4-4是本发明的一个实施例提供的一种在背钻孔内壁形成第二导电膜层的示意图;4-4 is a schematic diagram of forming a second conductive film layer on the inner wall of the back hole according to an embodiment of the present invention;
图5-1是本发明的一个实施例提供的又一种形成金属层的方法流程图;5-1 is a flow chart of still another method for forming a metal layer according to an embodiment of the present invention;
图5-2是本发明的一个实施例提供的另一种背钻孔的示意图;5-2 is a schematic view of another back hole provided by an embodiment of the present invention;
图5-3是本发明的一个实施例提供的一种形成抗腐蚀导电膜层的示意图;5-3 is a schematic diagram of forming a corrosion-resistant conductive film layer according to an embodiment of the present invention;
图5-4是本发明的一个实施例提供的一种去除通孔内第一导电膜层的示意图;5-4 is a schematic diagram of removing a first conductive film layer in a via hole according to an embodiment of the present invention;
图5-5是本发明的一个实施例提供的一种在通孔内形成第二导电膜层的示意图;5-5 are schematic views showing a second conductive film layer formed in a via hole according to an embodiment of the present invention;
图6是本发明的一个实施例提供的一种电路板的制造方法的流程图。FIG. 6 is a flow chart of a method of manufacturing a circuit board according to an embodiment of the present invention.
具体实施方式detailed description
为使本申请的目的、技术方案和优点更加清楚,下面将结合附图对本申请实施方式作进一步地详细描述。In order to make the objects, technical solutions and advantages of the present application more clear, the embodiments of the present application will be further described in detail below with reference to the accompanying drawings.
图2-1是本发明的一个实施例提供的一种金属化孔的形成方法的流程图,参考图2-1,该方法可以包括:2-1 is a flowchart of a method for forming a metallized hole according to an embodiment of the present invention. Referring to FIG. 2-1, the method may include:
步骤101、在PCB本体上钻通孔。Step 101: Drill a through hole on the PCB body.
图2-2是本发明的一个实施例提供的一种PCB本体的结构示意图,参考图2-2可知,该PCB本体可以包括多个信号层01和至少一个惰性层02,其中,多个信号层是指至少两个信号层。该多个信号层中任意两个相邻的信号层之间形成有绝缘层03。该多个信号层中,第一信号层远离第二信号层的一侧形成有惰性层,该第一信号层和该第二信号层为该多个信号层中待连接的两个信号层。该惰性层由惰性材料形成,该惰性材料可以为聚四氟乙烯(也称为特氟龙)。并且,该惰性材料一般为绝缘材料,因此该惰性层也可以作为相邻两个信号层之间的绝缘层。 2-2 is a schematic structural diagram of a PCB body according to an embodiment of the present invention. Referring to FIG. 2-2, the PCB body may include multiple signal layers 01 and at least one inert layer 02, wherein multiple signals are included. A layer refers to at least two signal layers. An insulating layer 03 is formed between any two adjacent signal layers of the plurality of signal layers. In the plurality of signal layers, an inert layer is formed on a side of the first signal layer away from the second signal layer, and the first signal layer and the second signal layer are two signal layers to be connected in the plurality of signal layers. The inert layer is formed of an inert material, which may be polytetrafluoroethylene (also known as Teflon). Moreover, the inert material is generally an insulating material, so the inert layer can also serve as an insulating layer between two adjacent signal layers.
示例的,假设在图2-2所示的PCB本体中,信号层011和信号层012待连接,则该信号层012远离该信号层011的一侧可以形成有惰性层021;若信号层013与信号层014待连接,则该信号层013远离该信号层014的一侧可以形成有惰性层022。For example, if the signal layer 011 and the signal layer 012 are to be connected in the PCB body shown in FIG. 2-2, the side of the signal layer 012 away from the signal layer 011 may be formed with an inert layer 021; The signal layer 014 is to be connected, and the side of the signal layer 013 away from the signal layer 014 may be formed with an inert layer 022.
在本发明的一个实施例中,操作人员获取到PCB本体后,可以根据预先确定的钻孔位置和孔径大小,通过钻孔设备在该PCB本体上钻通孔。示例的,如图2-2所示,可以采用钻孔设备在该PCB本体上钻出通孔10。In an embodiment of the present invention, after the operator acquires the PCB body, the through hole can be drilled in the PCB body by the drilling device according to the predetermined drilling position and the aperture size. For example, as shown in FIG. 2-2, a through hole 10 can be drilled on the PCB body by using a drilling device.
步骤102、采用第一导电材料在该通孔内壁的第一可沉积区域形成金属层。Step 102: Form a metal layer on the first depositable region of the inner wall of the through hole by using the first conductive material.
该第一可沉积区域为该通孔内壁中能够沉积第一导电材料的区域,在本申请中,由于该第一导电材料为不能沉积在该惰性材料上的导电材料,因此该第一可沉积区域不包括该惰性层所在的区域。在该通孔内壁形成金属层后,该金属层可以实现该第一信号层和第二信号层的电连接。其中,该第一导电材料可以为钯系沉铜材料,该钯系沉铜材料是指含有胶体钯、硫酸铜、硫酸和氯离子等材料的沉铜溶液。在形成金属层时,可以先通过表面化学反应、浸润、喷涂、溅射或者吸附等方式在该通孔内壁形成导电膜层,然后再对该导电膜层进行电镀以形成金属层。其中,该表面化学反应包括但不限于化学钯沉铜以及导电高分子等材料镀导电膜的工艺。The first depositable region is a region in the inner wall of the via hole capable of depositing a first conductive material. In the present application, since the first conductive material is a conductive material that cannot be deposited on the inert material, the first depositable layer The area does not include the area where the inert layer is located. After the metal layer is formed on the inner wall of the through hole, the metal layer can realize electrical connection between the first signal layer and the second signal layer. The first conductive material may be a palladium-based copper sink material, and the palladium-based copper sink material refers to a copper sink solution containing materials such as colloidal palladium, copper sulfate, sulfuric acid, and chloride ions. When forming the metal layer, the conductive film layer may be formed on the inner wall of the through hole by surface chemical reaction, wetting, spraying, sputtering or adsorption, and then the conductive film layer is plated to form a metal layer. The surface chemical reaction includes, but is not limited to, a process of plating a conductive film on a material such as chemical palladium copper and a conductive polymer.
示例的,如图2-3所示,可以采用第一导电材料在该通孔10的内壁形成金属层1a,由于该第一导电材料无法沉积在惰性材料上,因此如图2-3所示,该金属层1a仅形成在该通孔10内壁上的第一可沉积区域。通过该金属层1a,可以实现对信号层011和信号层012的连接,并且可以实现对信号层014和信号层013的连接。由于信号层012远离该信号层011的一层形成有惰性层021,信号层013远离信号层014的一侧形成有惰性层022,该金属层不会沉积在该两个惰性层上,因此可以有效避免金属化孔中出现多余的金属残端,保证了信号层之间的信号传输质量。For example, as shown in FIG. 2-3, the first conductive material may be used to form the metal layer 1a on the inner wall of the through hole 10. Since the first conductive material cannot be deposited on the inert material, as shown in FIG. 2-3. The metal layer 1a is formed only on the first depositable region on the inner wall of the through hole 10. Through the metal layer 1a, the connection of the signal layer 011 and the signal layer 012 can be realized, and the connection of the signal layer 014 and the signal layer 013 can be realized. Since the signal layer 012 is formed with an inert layer 021 away from the layer of the signal layer 011, an inert layer 022 is formed on the side of the signal layer 013 away from the signal layer 014, and the metal layer is not deposited on the two inert layers, so Effectively avoiding the occurrence of excess metal stumps in the metallized holes, ensuring the signal transmission quality between the signal layers.
需要说明的是,在实际应用中,在采用第一导电材料在该通孔内壁形成金属层之前,还需要对该通孔进行预处理,该预处理一般可以包括去钻污处理和/或清洗处理。其中,该去钻污处理可以为:通过高锰酸钾溶液去除通孔内的钻屑,该清洗处理可以为:采用等离子清洗机对通孔内壁的污染物进行清洗。对通孔进行预处理后,可以为后续金属层的形成提供一个良好的粘结界面,保证金属化孔的质量。It should be noted that, in practical applications, before the metal layer is formed on the inner wall of the through hole by using the first conductive material, the through hole needs to be pretreated, and the pretreatment may generally include de-drilling treatment and/or cleaning. deal with. The de-staining treatment may be: removing the cuttings in the through-hole by the potassium permanganate solution, and the cleaning treatment may be: cleaning the pollutants on the inner wall of the through-hole by using a plasma cleaning machine. After the through hole is pretreated, a good bonding interface can be provided for the formation of the subsequent metal layer to ensure the quality of the metallized hole.
在本申请中,上述步骤102具体可以通过多种方式实现。一方面,当该第一信号层和该第二信号层之间未形成惰性层时,参考图3,上述步骤102具体可以包括:In the present application, the above step 102 can be implemented in various ways. On the one hand, when the inert layer is not formed between the first signal layer and the second signal layer, referring to FIG. 3, the foregoing step 102 may specifically include:
1021a、将第一导电材料沉积在该通孔内壁的第一可沉积区域。1021a, depositing a first conductive material on a first depositable region of the inner wall of the via.
若待连接的两个信号层之间未形成有惰性层,则可以直接将该第一导电材料沉积在该通孔内壁的第一可沉积区域。例如,可以采用表面化学反应、浸润、喷涂、溅射或者吸附等方式,将该钯系沉铜材料沉积在该通孔内壁的第一可沉积区域,使该通孔内壁形成导电薄膜。示例的,对于图2-2所示的PCB本体,由于待连接的信号层011和信号层012之间未形成有惰性层,待连接的信号层013和信号层014之间也未形成有惰性层,因此可以直接在该通孔10内壁的第一可沉积区域沉积该第一导电材料,以形成导电薄膜。由于该第一导电材料一般为沉铜材料,因此该导电薄膜即为导电铜膜。If no inert layer is formed between the two signal layers to be connected, the first conductive material may be directly deposited on the first depositable region of the inner wall of the via. For example, the palladium-based copper-plated material may be deposited on the first depositable region of the inner wall of the through-hole by surface chemical reaction, infiltration, spraying, sputtering or adsorption, so that the inner wall of the through-hole forms a conductive film. For example, for the PCB body shown in FIG. 2-2, since no inert layer is formed between the signal layer 011 to be connected and the signal layer 012, no inertness is formed between the signal layer 013 to be connected and the signal layer 014. The layer can thus deposit the first conductive material directly on the first depositable region of the inner wall of the via 10 to form a conductive film. Since the first conductive material is generally a copper-clad material, the conductive film is a conductive copper film.
1022a、对沉积在该第一可沉积区域的第一导电材料进行电镀,以形成该金属层。 1022a, plating a first conductive material deposited on the first depositable region to form the metal layer.
进一步的,可以对该导电薄膜进行电镀,以形成金属层,得到用于连接该第一信号层和第二信号层的金属化孔。其中,电镀是指利用电解原理在导电薄膜上镀上一层金属或合金的过程。通过电镀可以增加孔壁铜层的厚度,避免该铜层因氧化而被破坏。Further, the conductive film may be plated to form a metal layer to obtain a metallization hole for connecting the first signal layer and the second signal layer. Among them, electroplating refers to a process of plating a layer of metal or alloy on a conductive film by electrolysis. The thickness of the copper layer of the hole wall can be increased by electroplating to prevent the copper layer from being destroyed by oxidation.
示例的,如图2-3所示,对第一导电材料进行电镀后形成的金属层011仅附着在第一可沉积区域,而该通孔10内壁上属于惰性层的区域则未形成金属层。也即是,该用于连接第一信号层和第二信号层的金属层中不存在金属残端,该金属化孔形成后无需再进行背钻操作,有效简化了PCB板的加工工艺流程,提高了PCB板的加工效率和良率。For example, as shown in FIG. 2-3, the metal layer 011 formed by electroplating the first conductive material adheres only to the first depositable region, and the region of the inner wall of the via hole 10 that belongs to the inert layer does not form a metal layer. . That is, the metal stump is not present in the metal layer for connecting the first signal layer and the second signal layer, and the metallized hole is formed without the need for back drilling operation, thereby effectively simplifying the processing process of the PCB board. Improve the processing efficiency and yield of the PCB.
另一方面,若该第一信号层和该第二信号层之间形成有惰性层,则参考图4-1,上述步骤102具体可以包括:On the other hand, if an inert layer is formed between the first signal layer and the second signal layer, the step 102 may specifically include:
1021b、采用第二导电材料在通孔内壁的第二可沉积区域形成第一导电膜层。1021b. Forming a first conductive film layer on the second depositable region of the inner wall of the through hole by using the second conductive material.
若待连接的两个信号层之间形成有惰性层,则由于第一导电材料无法沉积在该惰性层上,因此需要先采用能够沉积在惰性层上的第二导电材料在该通孔内壁的第二可沉积区域形成第一导电膜层,以保证两个信号层的有效连接。该第二可沉积区域为能沉积第二导电材料的区域,由于该第二导电材料能够沉积在惰性材料上,因此该第二可沉积区域包括该惰性层所在的区域。其中该第二导电材料可以为非钯系沉铜材料。该非钯系沉铜材料是指不包含胶体钯的沉铜溶液,例如可以为黑孔液或者导电高分子溶液等。其中,黑孔液一般由精细的石墨或碳黑粉、液体分散介质(例如去离子水)和表面活性剂等材料组成。If an inert layer is formed between the two signal layers to be connected, since the first conductive material cannot be deposited on the inert layer, it is necessary to first use a second conductive material capable of being deposited on the inert layer on the inner wall of the through hole. The second depositable region forms a first conductive film layer to ensure an effective connection of the two signal layers. The second depositable region is a region capable of depositing a second conductive material, and since the second conductive material can be deposited on the inert material, the second depositable region includes a region where the inert layer is located. The second conductive material may be a non-palladium-based copper sink material. The non-palladium-based copper-plated material refers to a copper-phosphorus solution containing no colloidal palladium, and may be, for example, a black hole liquid or a conductive polymer solution. Among them, the black pore liquid is generally composed of fine graphite or carbon black powder, a liquid dispersion medium (for example, deionized water), and a surfactant.
示例的,如图4-2所示,若信号层011和信号层016待连接,信号层014和信号层015待连接,则由于该信号层011和信号层016之间形成有惰性层021和023,信号层014和信号层015之间形成有惰性层022,因此在该PCB本体上钻出通孔20和通孔30后,可以先采用第二导电材料在通孔20的内壁上形成第一导电膜层1b,并在通孔30的内壁上形成第一导电膜层1c。其中,通孔20中形成的金属层可以用于连接信号层014和信号层015,通孔30中形成的金属层可以用于连接信号层011和信号层016。For example, as shown in FIG. 4-2, if the signal layer 011 and the signal layer 016 are to be connected, and the signal layer 014 and the signal layer 015 are to be connected, an inert layer 021 is formed between the signal layer 011 and the signal layer 016. 023, an inert layer 022 is formed between the signal layer 014 and the signal layer 015. Therefore, after the through hole 20 and the through hole 30 are drilled in the PCB body, the second conductive material may be first formed on the inner wall of the through hole 20. A conductive film layer 1b is formed, and a first conductive film layer 1c is formed on the inner wall of the through hole 30. The metal layer formed in the via hole 20 may be used to connect the signal layer 014 and the signal layer 015, and the metal layer formed in the via hole 30 may be used to connect the signal layer 011 and the signal layer 016.
1022b、在该通孔的第一端,钻入预设深度的背钻孔,该第一信号层相对于该第二信号层靠近该通孔的第一端,该预设深度大于目标界面与目标端面之间的距离。1022b, at the first end of the through hole, drilling a back hole of a predetermined depth, the first signal layer is close to the first end of the through hole with respect to the second signal layer, the preset depth is greater than the target interface The distance between the target end faces.
其中,该目标端面为该通孔第一端的端面,该目标界面为该第一信号层远离该惰性层的一面。也即是,对该通孔进行背钻时,需要钻穿待连接的第一信号层。需要说明的是,该背钻孔和通孔同轴心,且背钻孔的直径大于通孔的直径,以保证通孔经过背钻后,背钻孔的内壁上只有PCB本体中的树脂、填料、玻璃纤维、信号层和惰性层等材料,而原来形成的第一导电膜层被钻除。The target end surface is an end surface of the first end of the through hole, and the target interface is a side of the first signal layer away from the inert layer. That is, when the through hole is back-drilled, it is necessary to drill through the first signal layer to be connected. It should be noted that the back hole and the through hole are concentric, and the diameter of the back hole is larger than the diameter of the through hole to ensure that only the resin in the PCB body is on the inner wall of the back hole after the through hole is drilled. A material such as a filler, a glass fiber, a signal layer, and an inert layer is formed, and the originally formed first conductive film layer is drilled.
示例的,如图4-3所示,由于信号层015远离信号层014的一侧形成有惰性层023,因此可以将信号层015确定为该两个信号层中的第一信号层。进一步的,可以将该第一信号层015远离第二信号层014的一侧所对应的端口确定为该通孔20的第一端,并在该通孔20的第一端钻入预设深度h1的背钻孔201。从图4-3中可以看出,该预设深度h1大于目标界面15a(即第一信号层015远离惰性层023的一面)与通孔20第一端的端面之间的距离h2。也即是,在对该通孔20的第一端进行背钻时,需要钻穿该第一信号层015。For example, as shown in FIG. 4-3, since the inert layer 023 is formed on the side of the signal layer 015 away from the signal layer 014, the signal layer 015 can be determined as the first one of the two signal layers. Further, a port corresponding to a side of the first signal layer 015 away from the second signal layer 014 may be determined as a first end of the through hole 20, and a preset depth is drilled at the first end of the through hole 20. Back hole 201 of h1. As can be seen from FIG. 4-3, the predetermined depth h1 is greater than the distance h2 between the target interface 15a (ie, the side of the first signal layer 015 away from the inert layer 023) and the end surface of the first end of the via 20. That is, when the first end of the through hole 20 is back-drilled, the first signal layer 015 needs to be drilled through.
相应的,对于通孔30,参考图4-3,由于信号层016远离信号层011的一侧形成有惰性层022,因此可以将信号层016确定为该两个信号层中的第一信号层。进一步的,可以将该第一信号层016远离第二信号层011的一侧所对应的端口确定为该通孔30的第一端,并在 该通孔30的第一端钻入预设深度h3的背钻孔301。从图4-3中可以看出,该预设深度h3大于目标界面16a(即第一信号层016远离惰性层022的一面)与通孔30第一端的端面之间的距离h4。也即是,在对该通孔30的第一端进行背钻时,需要钻穿该第一信号层016。Correspondingly, with respect to the through hole 30, referring to FIG. 4-3, since the inert layer 022 is formed on the side of the signal layer 016 away from the signal layer 011, the signal layer 016 can be determined as the first signal layer of the two signal layers. . Further, the port corresponding to the side of the first signal layer 016 away from the second signal layer 011 may be determined as the first end of the through hole 30, and The first end of the through hole 30 is drilled into the back hole 301 of a predetermined depth h3. As can be seen from FIG. 4-3, the predetermined depth h3 is greater than the distance h4 between the target interface 16a (ie, the side of the first signal layer 016 away from the inert layer 022) and the end surface of the first end of the via 30. That is, when the first end of the through hole 30 is back-drilled, the first signal layer 016 needs to be drilled.
1023b、采用第一导电材料在该背钻孔内壁上的第三可沉积区域形成第二导电膜层。1023b. Forming a second conductive film layer on the third depositable region on the inner wall of the back hole by using a first conductive material.
进一步的,可以采用第一导电材料在该背钻孔内壁上的第三可沉积区域形成第二导电膜层,由于该第一导电材料无法沉积在惰性材料上,因此该第三可沉积区域不包括惰性层所在的区域。并且,由于该背钻孔是对通孔进行背钻得到的,因此该背钻孔内壁上的第三可沉积区域在原通孔内壁的正投影位于该第一可沉积区域之内。Further, the second conductive film layer may be formed on the third depositable region on the inner wall of the back hole by using the first conductive material. Since the first conductive material cannot be deposited on the inert material, the third depositable region is not Includes the area where the inert layer is located. Moreover, since the back hole is obtained by back drilling the through hole, the orthographic projection of the third depositable region on the inner wall of the back hole in the inner wall of the original through hole is located in the first depositable region.
示例的,参考图4-4,可以采用第一导电材料在该背钻孔201内壁的第三可沉积区域形成第二导电膜层10b,并在该背钻孔301内壁的第三可沉积区域形成第二导电膜层10c。由于该背钻孔钻穿了待连接的第一信号层,而该第一信号层远离第二信号层的一侧又形成有惰性层。因此,在该背钻孔内壁沉积第一导电材料时,可以保证该第一导电材料能够沉积在第一信号层的截面上,实现与第二信号层的连接,且该第一导电材料不会沉积在惰性层上,因此即可避免出现多余的金属残端,保证了信号层之间的信号传输质量。For example, referring to FIG. 4-4, a first conductive material may be used to form a second conductive film layer 10b in a third depositable region of the inner wall of the back hole 201, and a third depositionable region of the inner wall of the back hole 301 may be formed. A second conductive film layer 10c is formed. Since the back hole drills through the first signal layer to be connected, the side of the first signal layer away from the second signal layer is further formed with an inert layer. Therefore, when the first conductive material is deposited on the inner wall of the back hole, the first conductive material can be deposited on the cross section of the first signal layer to achieve connection with the second signal layer, and the first conductive material does not Deposited on the inert layer, thus avoiding the appearance of excess metal stumps and ensuring the quality of signal transmission between the signal layers.
1024b、对该第一导电膜层和该第二导电膜层进行电镀以形成该金属层。1024b, plating the first conductive film layer and the second conductive film layer to form the metal layer.
最后,可以对该通孔内壁剩余的第一导电膜层,以及该背钻孔内壁的第二导电膜层进行电镀,以形成该用于连接第一信号层和第二信号层的金属层。此时,参考图4-4,每个过孔内可以包括金属化孔和非金属化孔两种形态的过孔结构。Finally, the remaining first conductive film layer on the inner wall of the through hole and the second conductive film layer on the inner wall of the back hole may be plated to form the metal layer for connecting the first signal layer and the second signal layer. At this time, referring to FIG. 4-4, each of the via holes may include a via structure of two forms of a metallized hole and a non-metallized hole.
再一方面,不论该第一信号层和该第二信号层之间是否形成有惰性层,参考图5-1,上述步骤102还可以包括:In another aspect, the step 102 may further include: referring to FIG. 5-1, whether the inert layer is formed between the first signal layer and the second signal layer.
1021c、采用第二导电材料在通孔内壁的第二可沉积区域形成第一导电膜层。1021c. Forming a first conductive film layer on the second depositable region of the inner wall of the through hole by using the second conductive material.
该形成第一导电膜层的具体过程可以参考上述步骤1021b,此处不再赘述。For the specific process of forming the first conductive film layer, reference may be made to the above step 1021b, and details are not described herein again.
1022c、在该通孔的第二端,钻入预设深度的背钻孔,该第二信号层相对于该第一信号层靠近该通孔的第二端,该预设深度小于目标界面与目标端面之间的距离。1022c, at the second end of the through hole, drilling a back hole of a predetermined depth, the second signal layer is close to the second end of the through hole with respect to the first signal layer, the preset depth is smaller than the target interface The distance between the target end faces.
该目标端面为该通孔第二端的端面,该目标界面为该第一信号层远离该惰性层的一面。也即是,对该通孔进行背钻时,不需要钻穿待连接的第一信号层。示例的,如图5-2所示,假设待连接的信号层为信号层011和信号层016,由于信号层016远离信号层011的一侧形成有惰性层022,因此可以将信号层016确定为该两个信号层中的第一信号层。进一步的,可以将该第二信号层011远离第一信号层016的一侧所对应的端口确定为该通孔30的第二端,并在该通孔30的第二端钻入预设深度h5的背钻孔302。从图5-2中可以看出,该预设深度h5小于目标界面16a(即第一信号层016远离惰性层022的一面)与通孔30第二端的端面之间的距离h6。也即是,在对该通孔30的第二端进行背钻时,不需要钻穿该待连接的第一信号层016。The target end surface is an end surface of the second end of the through hole, and the target interface is a side of the first signal layer away from the inert layer. That is, when the through hole is back-drilled, it is not necessary to drill through the first signal layer to be connected. For example, as shown in FIG. 5-2, assuming that the signal layer to be connected is the signal layer 011 and the signal layer 016, since the inert layer 022 is formed on the side of the signal layer 016 away from the signal layer 011, the signal layer 016 can be determined. Is the first signal layer of the two signal layers. Further, a port corresponding to a side of the second signal layer 011 away from the first signal layer 016 may be determined as a second end of the through hole 30, and a preset depth is drilled at the second end of the through hole 30. Back hole 302 of h5. As can be seen from FIG. 5-2, the predetermined depth h5 is smaller than the distance h6 between the target interface 16a (ie, the side of the first signal layer 016 away from the inert layer 022) and the end surface of the second end of the via 30. That is, when the second end of the through hole 30 is back-drilled, it is not necessary to drill through the first signal layer 016 to be connected.
继续参考图5-2,假设信号层011和信号层012待连接,信号层014和信号层013待连接,则对于该信号层011和信号层012,可以在通孔20的一端钻入预设深度h7的背钻孔202,该预设深度h7小于目标界面12a(即第一信号层012远离惰性层021的一面)与通孔20端面之间的距离h8;对于信号层014和信号层013,可以在通孔20的另一端钻入预设深度h9的背钻孔203,该预设深度h9小于目标界面13a(即第一信号层013远离惰性层022 的一面)与通孔20端面之间的距离h0。Continuing to refer to FIG. 5-2, assuming that the signal layer 011 and the signal layer 012 are to be connected, and the signal layer 014 and the signal layer 013 are to be connected, for the signal layer 011 and the signal layer 012, a preset can be drilled at one end of the through hole 20. The back hole 202 of the depth h7 is smaller than the distance h8 between the target interface 12a (ie, the side of the first signal layer 012 away from the inert layer 021) and the end surface of the through hole 20; for the signal layer 014 and the signal layer 013 A back hole 203 of a predetermined depth h9 may be drilled into the other end of the through hole 20, and the predetermined depth h9 is smaller than the target interface 13a (ie, the first signal layer 013 is away from the inert layer 022). The distance between the one side and the end face of the through hole 20 is h0.
1023c、采用抗腐蚀导电材料在该背钻孔内壁和该通孔内壁形成抗腐蚀导电膜层。1023c. Forming a corrosion-resistant conductive film layer on the inner wall of the back hole and the inner wall of the through hole by using a corrosion-resistant conductive material.
该抗腐蚀导电材料可以沉积在惰性层上,该抗腐蚀导电材料具体可以包括:碳粉、石墨和导电高分子材料中的至少一种。在实际应用中,可以采用表面化学反应、浸润、喷涂、溅射或者吸附等方式,在该背钻孔内壁和该通孔内壁形成抗腐蚀导电膜层。The corrosion-resistant conductive material may be deposited on the inert layer, and the corrosion-resistant conductive material may specifically include at least one of carbon powder, graphite, and conductive polymer material. In practical applications, a corrosion-resistant conductive film layer may be formed on the inner wall of the back hole and the inner wall of the through hole by surface chemical reaction, infiltration, spraying, sputtering or adsorption.
示例的,如图5-3所示,可以在背钻孔302以及通孔30的内壁形成抗腐蚀导电膜层3a;可以在背钻孔202、通孔20以及背钻孔203的内壁形成抗腐蚀导电膜层2a。For example, as shown in FIG. 5-3, a corrosion-resistant conductive film layer 3a may be formed on the back hole 302 and the inner wall of the through hole 30; an anti-corrosion may be formed on the inner walls of the back hole 202, the through hole 20, and the back hole 203. The conductive film layer 2a is etched.
需要说明的是,在本申请中,该抗腐蚀导电材料的密度较低,颗粒较为松散,强腐蚀性材料(例如硫酸溶液或者过硫酸钠溶液)能够透过该抗腐蚀导电材料与该抗腐蚀导电材料所附着的基材接触。因此,当该抗腐蚀导电材料所附着的基材为抗腐蚀性能较差的材料(例如铜膜)时,强腐蚀性材料能够将该基材腐蚀掉,并使得附着在该基材上的抗腐蚀导电材料脱落;而当该抗腐蚀导电材料所附着的基材为抗腐蚀性能较好的材料(例如树脂)时,该强腐蚀性材料则不会对该抗腐蚀导电材料造成影响。It should be noted that, in the present application, the corrosion-resistant conductive material has a low density and the particles are relatively loose, and the highly corrosive material (such as a sulfuric acid solution or a sodium persulfate solution) can penetrate the corrosion-resistant conductive material and the corrosion resistance. The substrate to which the conductive material is attached is in contact. Therefore, when the substrate to which the corrosion-resistant conductive material is attached is a material having poor corrosion resistance (for example, a copper film), the highly corrosive material can etch the substrate and make the adhesion adhered to the substrate. The corroded conductive material is detached; and when the substrate to which the anti-corrosive conductive material is attached is a material having good corrosion resistance (for example, a resin), the highly corrosive material does not affect the anti-corrosive conductive material.
1024c、去除该通孔中的第一导电膜层,以及附着在该第一导电膜层上的抗腐蚀导电膜层。1024c, removing the first conductive film layer in the via hole, and the corrosion-resistant conductive film layer attached to the first conductive film layer.
由于通孔内壁上的第一导电膜层一般为导电铜膜,该导电铜膜的抗腐蚀性能较差,因此可以采用微蚀法、激光烧蚀法或者表面化学反应方法(该表面化学反应可以是指置换反应,例如可以通过化学锡置换化学铜,再通过硝酸除锡)去除该通孔中的第一导电膜层,以及附着在该第一导电膜层上的抗腐蚀导电膜层;而PCB本体中的绝缘层一般由树脂、填料和玻璃纤维等抗腐蚀性能较好的材料组成,形成惰性层的聚四氟乙烯的抗腐蚀性能也较好,因此经过上述微蚀法、激光烧蚀法或者表面化学反应方法后,背钻孔内直接附着于PCB基材上的抗腐蚀导电膜层会保留下来。Since the first conductive film layer on the inner wall of the through hole is generally a conductive copper film, the conductive copper film has poor corrosion resistance, so that a microetching method, a laser ablation method or a surface chemical reaction method can be used (the surface chemical reaction can be performed) Refers to a displacement reaction, for example, by replacing chemical copper with a chemical tin, and then removing tin by nitric acid to remove the first conductive film layer in the via hole and the corrosion-resistant conductive film layer attached to the first conductive film layer; The insulating layer in the PCB body is generally composed of a resin with good corrosion resistance such as resin, filler and glass fiber, and the PTFE forming the inert layer has good corrosion resistance, so the above micro-etching method and laser ablation are performed. After the method or the surface chemical reaction method, the corrosion-resistant conductive film layer directly attached to the PCB substrate in the back hole remains.
示例的,参考图5-4,去除第一导电膜层后,通孔20两端的背钻孔202和背钻孔203的内壁上还保留有部分抗腐蚀导电膜层2a;同样的,通孔30一端的背钻孔302的内壁上保留有部分抗腐蚀导电膜层3a。For example, referring to FIG. 5-4, after removing the first conductive film layer, a portion of the back hole 202 and the back hole 203 at both ends of the through hole 20 still have a part of the corrosion-resistant conductive film layer 2a; similarly, the through hole A portion of the anti-corrosive conductive film layer 3a remains on the inner wall of the back hole 302 at one end.
1025c、采用第一导电材料在该通孔内壁的第一可沉积区域形成第二导电膜层。1025c. Form a second conductive film layer on the first depositable region of the inner wall of the through hole by using the first conductive material.
进一步的,可以参考上述步骤1023b所示的方法,在该通孔内壁的第一可沉积区域形成第二导电膜层。示例的,参考图5-5,可以采用第一导电材料在通孔20内壁的第一可沉积区域形成第二导电膜层2b,并在通孔30内壁的第一可沉积区域形成第二导电膜层3b。Further, referring to the method shown in the above step 1023b, a second conductive film layer is formed on the first depositable region of the inner wall of the through hole. For example, referring to FIG. 5-5, the first conductive material may be used to form the second conductive film layer 2b in the first depositable region of the inner wall of the through hole 20, and the second conductive region may be formed in the first depositable region of the inner wall of the through hole 30. Film layer 3b.
需要说明的是,在实际应用中,还可以直接在该通孔和背钻孔构成的过孔内沉积第一导电材料,此时该第二导电膜层除了形成在通孔内壁的第一可沉积区域,还可以附着在该背钻孔内壁的抗腐蚀导电膜层上。It should be noted that, in practical applications, the first conductive material may be deposited directly in the via hole formed by the through hole and the back hole. At this time, the second conductive film layer may be formed on the inner wall of the through hole. The deposition area may also be attached to the corrosion-resistant conductive film layer on the inner wall of the back hole.
1026c、对该抗腐蚀导电膜层和该第二导电膜层进行电镀以形成该金属层。1026c, plating the corrosion-resistant conductive film layer and the second conductive film layer to form the metal layer.
最后,可以对该通孔内壁的第二导电膜层,以及该背钻孔内壁的抗腐蚀导电膜层进行电镀,以形成该用于连接第一信号层和第二信号层的金属层。Finally, the second conductive film layer of the inner wall of the through hole and the corrosion-resistant conductive film layer of the inner wall of the back hole may be plated to form the metal layer for connecting the first signal layer and the second signal layer.
在本申请中,由于PCB本体中的信号层一般是由铜箔形成的,在上述步骤1024c中采用微蚀法等方法去除第一导电膜层时,可能会使得该背钻孔内壁上附着在该信号层上的部分抗腐蚀导电膜层也被去除,破坏该背钻孔内壁上的抗腐蚀导电膜层的完整性。但由于后续的电镀操作能够在该抗腐蚀导电膜层以及信号层的截面再形成一层金属或者合金,因此 可以保证最终形成在该背钻孔内壁上的金属层的完整性,保证信号层之间的有效连接。In the present application, since the signal layer in the PCB body is generally formed of a copper foil, when the first conductive film layer is removed by a micro-etching method or the like in the above step 1024c, the inner wall of the back-drilled hole may be attached to A portion of the corrosion-resistant conductive film layer on the signal layer is also removed, destroying the integrity of the corrosion-resistant conductive film layer on the inner wall of the back-drilled hole. However, since the subsequent plating operation can form a layer of metal or alloy on the corrosion-resistant conductive film layer and the cross section of the signal layer, The integrity of the metal layer ultimately formed on the inner wall of the back bore can be ensured, ensuring an effective connection between the signal layers.
在上述图4-1以及图5-1所示的方法中,虽然也存在背钻操作,但由于在图4-1所示的方法中,背钻深度只要大于目标界面与目标端面之间的距离即可,在图5-1所示的方法中,背钻深度只要小于目标界面与目标端面之间的距离即可,该方法对背钻深度的精度要求较低,因此PCB板的厚度差异对加工精度的影响也较小,故可以有效提高PCB板的加工良率。In the methods shown in FIG. 4-1 and FIG. 5-1 above, although there is also a back drilling operation, since the back drilling depth is larger than the target interface and the target end surface in the method shown in FIG. 4-1. The distance can be, in the method shown in Figure 5-1, the back drilling depth is only less than the distance between the target interface and the target end surface. This method requires less precision for the back drilling depth, so the thickness difference of the PCB board The influence on the processing accuracy is also small, so the processing yield of the PCB board can be effectively improved.
从图4-4和图5-5中还可以看出,采用本申请提供的方法形成金属化孔之后,每个过孔内沉积的金属层可以形成多个金属化孔,每个金属化孔可以实现不同信号层之间的电连接。例如图4-4中金属层10b可以实现信号层011与信号层012之间的连接,还可以与第一导电膜层1b共同实现信号层014与信号层015的电连接;图5-5中金属层2b可以实现信号层015与信号层016的连接,还可以与金属层2a实现信号层011和信号层012的连接。因此本申请提供的方法可以有效提高PCB板中过孔设计的灵活性,以及提高PCB板中每个过孔的信号传输容量。并且,采用本申请提供的方法在PCB本体上形成金属化孔后,该PCB本体上的过孔两端均可对压连接器,有效提高了PCB板的设计灵活性。It can also be seen from FIG. 4-4 and FIG. 5-5 that after the metallization holes are formed by the method provided by the present application, the metal layer deposited in each via hole can form a plurality of metallized holes, each metallized hole. Electrical connections between different signal layers can be achieved. For example, the metal layer 10b in FIG. 4-4 can realize the connection between the signal layer 011 and the signal layer 012, and can also realize the electrical connection between the signal layer 014 and the signal layer 015 together with the first conductive film layer 1b; The metal layer 2b can realize the connection of the signal layer 015 and the signal layer 016, and can also realize the connection of the signal layer 011 and the signal layer 012 with the metal layer 2a. Therefore, the method provided by the present application can effectively improve the flexibility of the via design in the PCB and improve the signal transmission capacity of each via in the PCB. Moreover, after the metallized hole is formed on the PCB body by using the method provided by the present application, the through-hole on the PCB body can press the connector at both ends, thereby effectively improving the design flexibility of the PCB board.
进一步的,由于本申请中每个过孔可以实现多个信号层的连接,因此可以避免出现相关技术中,由于加工工艺的限制需要重复设置多个信号层的情况,进而可以有效降低PCB板的厚度以及金属化孔的厚径比。Further, since each of the via holes in the present application can realize connection of a plurality of signal layers, it can be avoided that in the related art, a plurality of signal layers need to be repeatedly set due to limitation of the processing technology, thereby effectively reducing the PCB board. Thickness and thickness to diameter ratio of metallized holes.
需要说明的是,在实际应用中,在背钻孔内壁上形成第二导电膜层之前,以及在背钻孔内壁和通孔内壁形成抗腐蚀导电膜层之前,均需要对该背钻孔和/或通孔进行预处理,该预处理的具体内容可以参考上述步骤102,此处不再赘述。It should be noted that, in practical applications, before the formation of the second conductive film layer on the inner wall of the back hole, and before the formation of the corrosion-resistant conductive film layer on the inner wall of the back hole and the inner wall of the through hole, the back hole drilling and And the through hole is pre-processed. For details of the pre-processing, refer to step 102 above, and details are not described herein again.
还需说明的是,本申请提供的金属化孔的形成方法的步骤的先后顺序可以进行适当调整,步骤也可以根据情况进行相应增减。任何熟悉本技术领域的技术人员在本申请揭露的技术范围内,可轻易想到变化的方法,都应涵盖在本申请的保护范围之内,因此不再赘述。It should be noted that the sequence of the steps of the method for forming the metallized holes provided by the present application may be appropriately adjusted, and the steps may be correspondingly increased or decreased according to the situation. Any method that can be easily conceived by those skilled in the art within the technical scope of the present application is intended to be included in the scope of the present application and therefore will not be described again.
综上所述,本申请提供了一种金属化孔的形成方法,该方法可以采用第一导电材料在通孔内壁中不属于惰性层的区域形成金属层,由于PCB本体中待连接的第一信号层和第二信号层中,第一信号层远离第二信号层的一侧形成有惰性层,因此采用该方法在通孔内壁形成金属层后,可以有效避免该金属化孔中出现多余的金属残端,保证了该金属层所连接的两个信号层之间的信号传输质量,并且该金属化孔的形成方法简化了PCB板制造时的工艺流程,降低了PCB板的制造难度,有效提高了PCB板的加工效率和良率。In summary, the present application provides a method for forming a metallized hole, which can form a metal layer in a region of the inner wall of the through hole that is not an inert layer by using the first conductive material, because the first to be connected in the PCB body In the signal layer and the second signal layer, an inert layer is formed on a side of the first signal layer away from the second signal layer. Therefore, after the metal layer is formed on the inner wall of the through hole by using the method, redundant portions in the metallized hole can be effectively avoided. The metal stump ensures the signal transmission quality between the two signal layers to which the metal layer is connected, and the metallized hole forming method simplifies the process flow during PCB manufacturing, reduces the manufacturing difficulty of the PCB board, and is effective Improve the processing efficiency and yield of the PCB.
需要说明的是,本申请中术语“和/或”,仅仅是一种描述关联对象的关联关系,表示可以存在三种关系,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。It should be noted that the term “and/or” in the present application is merely an association relationship describing an associated object, indicating that there may be three relationships, for example, A and/or B, which may indicate that A exists separately and exists at the same time. A and B, there are three cases of B alone.
本申请还提供了一种电路板的制造方法,参考图6,该方法可以包括:The present application also provides a method of manufacturing a circuit board. Referring to FIG. 6, the method may include:
步骤401、在基板上形成多个信号层和至少一个惰性层,得到PCB本体,其中任意两个相邻的信号层之间形成有绝缘层;该多个信号层中第一信号层远离第二信号层的一侧形成有惰性层,该第二信号层和该第一信号层为该多个信号层中待连接的两个信号层,该惰性层由惰性材料形成。 Step 401, forming a plurality of signal layers and at least one inert layer on the substrate to obtain a PCB body, wherein an insulating layer is formed between any two adjacent signal layers; and the first signal layer of the plurality of signal layers is away from the second One side of the signal layer is formed with an inert layer, and the second signal layer and the first signal layer are two signal layers to be connected in the plurality of signal layers, the inert layer being formed of an inert material.
其中,该基板可以为含有树脂、填料和玻璃纤维等材料的板材,该信号层可以为铜箔,该绝缘层的材质可以与该基板的材质相同。该信号层、绝缘层以及惰性层可以以压合的方 式形成在基板上。The substrate may be a plate material containing a resin, a filler, and a glass fiber. The signal layer may be a copper foil, and the material of the insulating layer may be the same as the material of the substrate. The signal layer, the insulating layer and the inert layer can be pressed together The form is formed on the substrate.
步骤402、在该PCB本体上形成金属化孔。 Step 402, forming a metallization hole on the PCB body.
在本发明的一个实施例中,可以采用上述图2-1所示的方法形成该金属化孔,在形成该金属化孔的过程中,具体可以采用如图3、图4-1或者图5-1所示的方法形成该金属化孔中的金属层。In an embodiment of the present invention, the metallization hole may be formed by the method shown in FIG. 2-1, and in the process of forming the metallization hole, specifically, as shown in FIG. 3, FIG. 4-1 or FIG. The method shown in -1 forms a metal layer in the metallized hole.
本申请还提供了一种电路板,该电路板可以采用如图6所示的方法制造形成。The present application also provides a circuit board that can be fabricated using the method shown in FIG.
以上所述仅为本申请的可选实施例,并不用以限制本申请,凡在本申请的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本申请的保护范围之内。 The above description is only an optional embodiment of the present application, and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application are included in the protection of the present application. Within the scope.

Claims (11)

  1. 一种金属化孔的形成方法,其特征在于,所述方法包括:A method for forming a metallized hole, the method comprising:
    在印制电路板PCB本体上钻通孔,所述PCB本体包括多个信号层和至少一个惰性层,其中任意两个相邻的信号层之间形成有绝缘层,所述多个信号层中第一信号层远离第二信号层的一侧形成有惰性层,所述第一信号层和所述第二信号层为所述多个信号层中待连接的两个信号层,所述惰性层由惰性材料形成;A through hole is drilled in the PCB body of the printed circuit board, the PCB body includes a plurality of signal layers and at least one inert layer, wherein an insulating layer is formed between any two adjacent signal layers, among the plurality of signal layers An inert layer is formed on a side of the first signal layer away from the second signal layer, and the first signal layer and the second signal layer are two signal layers to be connected in the plurality of signal layers, the inert layer Formed from an inert material;
    采用第一导电材料在所述通孔内壁的第一可沉积区域形成金属层,所述金属层用于连接所述第一信号层和所述第二信号层,所述第一可沉积区域为能沉积所述第一导电材料的区域,所述第一可沉积区域不包括所述惰性层所在的区域。Forming a metal layer on the first depositable region of the inner wall of the via hole with a first conductive material for connecting the first signal layer and the second signal layer, the first depositable region being A region capable of depositing the first conductive material, the first depositable region not including a region where the inert layer is located.
  2. 根据权利要求1所述的方法,其特征在于,所述第一信号层和所述第二信号层之间未形成惰性层,所述采用第一导电材料在所述通孔内壁的第一可沉积区域形成金属层,包括:The method according to claim 1, wherein an inert layer is not formed between the first signal layer and the second signal layer, and the first conductive material is used in the first inner wall of the through hole. The deposition area forms a metal layer, including:
    将所述第一导电材料沉积在所述通孔内壁的所述第一可沉积区域;Depositing the first conductive material on the first depositable region of the inner wall of the through hole;
    对沉积在所述第一可沉积区域的所述第一导电材料进行电镀,以形成所述金属层。The first conductive material deposited on the first depositable region is plated to form the metal layer.
  3. 根据权利要求1所述的方法,其特征在于,所述第一信号层和所述第二信号层之间形成有惰性层,所述采用第一导电材料在所述通孔内壁的第一可沉积区域形成金属层,包括:The method according to claim 1, wherein an inert layer is formed between the first signal layer and the second signal layer, and the first conductive material is first on the inner wall of the through hole. The deposition area forms a metal layer, including:
    采用第二导电材料在所述通孔内壁的第二可沉积区域形成第一导电膜层,所述第二可沉积区域为能沉积所述第二导电材料的区域,所述第二可沉积区域包括所述惰性层所在的区域;Forming a first conductive film layer in a second depositable region of the inner wall of the via hole with a second conductive material, the second depositable region being a region capable of depositing the second conductive material, the second depositable region Including the region in which the inert layer is located;
    在所述通孔的第一端钻入预设深度的背钻孔,所述第一信号层相对于所述第二信号层靠近所述通孔的第一端,所述预设深度大于目标界面与目标端面之间的距离,所述目标端面为所述通孔的第一端的端面,所述目标界面为所述第一信号层远离所述惰性层的一面;Drilling a back hole of a predetermined depth at a first end of the through hole, the first signal layer being close to the first end of the through hole with respect to the second signal layer, the preset depth being greater than a target a distance between the interface and the target end surface, the target end surface is an end surface of the first end of the through hole, and the target interface is a side of the first signal layer away from the inert layer;
    采用所述第一导电材料在所述背钻孔内壁上的第三可沉积区域形成第二导电膜层,所述第三可沉积区域不包括所述惰性层所在的区域;Forming, by the first conductive material, a second conductive film layer on a third depositable region on the inner wall of the back hole, the third depositable region not including a region where the inert layer is located;
    对所述第一导电膜层和所述第二导电膜层进行电镀以形成所述金属层。The first conductive film layer and the second conductive film layer are plated to form the metal layer.
  4. 根据权利要求1所述的方法,其特征在于,所述采用第一导电材料在所述通孔内壁的第一可沉积区域形成金属层,包括:The method according to claim 1, wherein the forming a metal layer on the first depositable region of the inner wall of the through hole by using the first conductive material comprises:
    采用第二导电材料在所述通孔内壁的第二可沉积区域形成第一导电膜层,所述第二可沉积区域为能沉积所述第二导电材料的区域,所述第二可沉积区域包括所述惰性层所在的区域;Forming a first conductive film layer in a second depositable region of the inner wall of the via hole with a second conductive material, the second depositable region being a region capable of depositing the second conductive material, the second depositable region Including the region in which the inert layer is located;
    在所述通孔的第二端钻入预设深度的背钻孔,所述第二信号层相对于所述第一信号层靠近所述通孔的第二端,所述预设深度小于目标界面与目标端面之间的距离,所述目标端面为所述通孔的第二端的端面,所述目标界面为所述第一信号层远离所述惰性层的一面;Drilling a back hole of a predetermined depth at a second end of the through hole, the second signal layer being close to the second end of the through hole with respect to the first signal layer, the preset depth being smaller than a target a distance between the interface and the target end surface, the target end surface is an end surface of the second end of the through hole, and the target interface is a side of the first signal layer away from the inert layer;
    采用抗腐蚀导电材料在所述背钻孔内壁和所述通孔内壁形成抗腐蚀导电膜层;Forming a corrosion-resistant conductive film layer on the inner wall of the back hole and the inner wall of the through hole by using a corrosion-resistant conductive material;
    去除所述通孔中的所述第一导电膜层,以及附着在所述第一导电膜层上的所述抗腐蚀导电膜层;Removing the first conductive film layer in the via hole, and the anti-corrosion conductive film layer attached on the first conductive film layer;
    采用所述第一导电材料在所述通孔内壁的所述第一可沉积区域形成第二导电膜层;Forming a second conductive film layer on the first depositable region of the inner wall of the through hole by using the first conductive material;
    对所述抗腐蚀导电膜层和所述第二导电膜层进行电镀以形成所述金属层。 The corrosion-resistant conductive film layer and the second conductive film layer are plated to form the metal layer.
  5. 根据权利要求1至4任一所述的方法,其特征在于,A method according to any one of claims 1 to 4, characterized in that
    所述惰性材料为聚四氟乙烯;The inert material is polytetrafluoroethylene;
    所述第一导电材料为钯系沉铜材料。The first conductive material is a palladium-based copper sink material.
  6. 根据权利要求3或4所述的方法,其特征在于,Method according to claim 3 or 4, characterized in that
    所述第二导电材料为非钯系沉铜材料。The second conductive material is a non-palladium-based copper sink material.
  7. 根据权利要求4所述的方法,其特征在于,The method of claim 4 wherein:
    所述抗腐蚀导电材料包括:碳粉、石墨和导电高分子材料中的至少一种。The corrosion-resistant conductive material includes at least one of carbon powder, graphite, and a conductive high molecular material.
  8. 根据权利要求1至7任一所述的方法,其特征在于,在采用第一导电材料在所述通孔内壁形成金属层之前,所述方法还包括:The method according to any one of claims 1 to 7, wherein before the forming a metal layer on the inner wall of the through hole by using the first conductive material, the method further comprises:
    对所述通孔进行预处理,所述预处理包括去钻污处理和/或清洗处理。The through hole is pretreated, and the pretreatment includes a desmear treatment and/or a cleaning process.
  9. 根据权利要求4所述的方法,其特征在于,所述去除所述通孔中的第一导电膜层,以及附着在所述第一导电膜层上的抗腐蚀导电膜层,包括:The method according to claim 4, wherein the removing the first conductive film layer in the via hole and the corrosion-resistant conductive film layer attached to the first conductive film layer comprises:
    采用微蚀法、激光烧蚀法或者表面化学反应方法去除所述通孔中的第一导电膜层,以及附着在所述第一导电膜层上的抗腐蚀导电膜层。The first conductive film layer in the via hole and the corrosion-resistant conductive film layer attached to the first conductive film layer are removed by a microetching method, a laser ablation method, or a surface chemical reaction method.
  10. 一种电路板的制造方法,其特征在于,所述方法包括:A method of manufacturing a circuit board, the method comprising:
    在基板上形成多个信号层和至少一个惰性层,得到印制电路板PCB本体,其中任意两个相邻的信号层之间形成有绝缘层;所述多个信号层中第一信号层远离第二信号层的一侧形成有惰性层,所述第二信号层和所述第一信号层为所述多个信号层中待连接的两个信号层,所述惰性层由惰性材料形成;Forming a plurality of signal layers and at least one inert layer on the substrate to obtain a printed circuit board PCB body, wherein an insulating layer is formed between any two adjacent signal layers; wherein the first signal layer of the plurality of signal layers is away from One side of the second signal layer is formed with an inert layer, the second signal layer and the first signal layer are two signal layers to be connected in the plurality of signal layers, and the inert layer is formed of an inert material;
    采用如权利要求1至9任一所述的方法在所述PCB本体上形成金属化孔。A metallized hole is formed on the PCB body by the method according to any one of claims 1 to 9.
  11. 一种电路板,其特征在于,A circuit board characterized in that
    所述电路板采用如权利要求10所述的方法制造形成。 The circuit board is fabricated using the method of claim 10.
PCT/CN2017/074363 2017-02-22 2017-02-22 Method for forming plated hole, method for manufacturing circuit board, and circuit board WO2018152686A1 (en)

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