WO2018092550A1 - Substrat de boîtier en résine - Google Patents

Substrat de boîtier en résine Download PDF

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Publication number
WO2018092550A1
WO2018092550A1 PCT/JP2017/038940 JP2017038940W WO2018092550A1 WO 2018092550 A1 WO2018092550 A1 WO 2018092550A1 JP 2017038940 W JP2017038940 W JP 2017038940W WO 2018092550 A1 WO2018092550 A1 WO 2018092550A1
Authority
WO
WIPO (PCT)
Prior art keywords
package substrate
resin package
wiring board
recess
resin
Prior art date
Application number
PCT/JP2017/038940
Other languages
English (en)
Japanese (ja)
Inventor
純一 南條
成道 牧野
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2018092550A1 publication Critical patent/WO2018092550A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Definitions

  • the present invention relates to a resin package substrate including a substrate and a resin covering one surface of the substrate.
  • Patent Document 1 has a configuration in which a functional element mounted on at least one main surface of a wiring board is covered with a resin containing a filler.
  • an object of the present invention is to provide a structure that suppresses the occurrence of peeling and cracking in a resin-covered wiring board.
  • the resin package substrate of the present invention includes a wiring substrate and a sealing resin.
  • the wiring board has a first main surface.
  • the first main surface is covered with a sealing resin.
  • the wiring board has a recess recessed in the thickness direction of the wiring board at the corner of the first main surface of the wiring board.
  • the sealing resin is filled in the recess.
  • the resin package substrate of the present invention preferably has the following configuration.
  • angular of the 1st main surface of a wiring board is a shape over the 1st edge
  • the resin package substrate of the present invention preferably has the following configuration.
  • a recess is formed on the outer periphery of the first main surface.
  • the resin package substrate of the present invention preferably has the following configuration.
  • the inner wall surface of the recess formed in the wiring board has an uneven shape.
  • the resin package substrate of the present invention preferably has the following configuration.
  • the concave portion formed in the wiring board reaches the magnetic layer, which is smaller than the linear expansion coefficient of the layer.
  • the bending strength is improved, the end of the interface between the nonmagnetic layer and the magnetic layer is covered with the sealing resin, and the stress acting on the side surface of the nonmagnetic layer can be dispersed, and cracks can be generated. It is suppressed.
  • the resin package substrate of the present invention preferably has the following configuration.
  • the wiring board When viewed from the top surface, the wiring board has a structure in which the concave portion has a depth that does not reach the coil in the thickness direction of the wiring board.
  • the recess has a plurality of local recesses that are locally recessed in the thickness direction in a side view.
  • (A) And (B) is a figure explaining schematic structure of the resin package board
  • (A)-(C) are diagrams showing the first half of the process when manufacturing the resin package substrate of the present invention.
  • (A) And (B) is the figure which showed the latter half process at the time of manufacturing the resin package board
  • (A) And (B) is a figure explaining schematic structure of the resin package board
  • (A) And (B) is a figure explaining schematic structure of the resin package board
  • (A) And (B) is a figure explaining schematic structure of the resin package board
  • FIG. 1A is a side sectional view showing a schematic configuration of a resin package substrate according to the first embodiment of the present invention.
  • FIG. 1B is a cross-sectional view of FIG. 1A cut along a plane including the axis 80 and viewed from the top.
  • FIG. 2 is a diagram comparing the stress distribution diagrams of the resin package substrate of the present invention and the resin package substrate used in the comparative example.
  • FIG. 3 is a flowchart showing a process of manufacturing the resin package substrate of the present invention in FIGS. 4 (A), 4 (B), 4 (C), 5 (A), and 5 (B). is there.
  • FIG. 4A, FIG. 4B, FIG. 4C, FIG. 5A, and FIG. 5B are diagrams showing a process in manufacturing a resin package substrate.
  • the resin package substrate 10 includes a wiring substrate 20, a sealing resin 30, and mounting-type electronic components 51 and 52.
  • the wiring board 20 includes a first main surface 203 and a second main surface 204 that are orthogonal to the thickness direction and face each other. Furthermore, the wiring board 20 includes side surfaces 201, 202, 205, and 206 that connect the first main surface 203 and the second main surface 204.
  • the side surface 201 and the side surface 202 are parallel to the short side 70 of the wiring substrate 20 and face each other.
  • the side surface 205 and the side surface 206 are parallel to the long side 60 of the wiring board 20 and face each other.
  • the wiring board is rectangular, but is not limited to this. It may be a complicated shape such as a triangle or polygon other than a square, or an L shape.
  • the wiring board 20 is a ferrite board.
  • the wiring board 20 includes magnetic layers 21 and 22 and nonmagnetic layers 23, 24 and 25.
  • the nonmagnetic layer 23 can be omitted, but by providing it, the direct current superimposition characteristics of the coil described later can be improved.
  • the magnetic layers 21 and 22 correspond to the “magnetic layer” of the present invention, and the nonmagnetic layers 24 and 25 correspond to the “nonmagnetic layer” of the present invention.
  • the magnetic layer 21 and the magnetic layer 22 are laminated with the nonmagnetic layer 23 interposed therebetween.
  • the nonmagnetic layer 24 is in contact with the surface of the magnetic layer 21 opposite to the contact surface with the nonmagnetic layer 23.
  • the nonmagnetic layer 25 is in contact with the surface of the magnetic layer 22 opposite to the contact surface with the nonmagnetic layer 23.
  • the wiring board 20 is laminated in the order of the nonmagnetic layer 24, the magnetic layer 21, the nonmagnetic layer 23, the magnetic layer 22, and the nonmagnetic layer 25 along the thickness direction.
  • the outer surface (surface orthogonal to the thickness direction) of the wiring substrate 20 on the nonmagnetic layer 24 side is the first main surface 203 of the wiring substrate 20, and the outer surface of the wiring substrate 20 on the nonmagnetic layer 25 side. (A surface orthogonal to the thickness direction) is the second main surface 204 of the wiring board 20.
  • a coil 401 is formed on the magnetic layers 21 and 22 and the nonmagnetic layer 23.
  • the coil 401 is formed of a wound type, that is, an annular coil conductor having a part cut off on the circumference and an interlayer connection conductor.
  • the plurality of coil conductors are formed at different positions in the thickness direction of the magnetic layers 21 and 22 of the wiring board 20, and the plurality of coil conductors are formed on the magnetic layers 21 and 22 and the nonmagnetic layer 23.
  • the formed interlayer connection conductors (not shown) are connected to form one conductor. With this configuration, the coil 401 is realized as a spiral conductor having an opening in the center when the wiring board 20 is viewed in plan and having a thickness direction as a winding axis direction.
  • component mounting land conductors 441 and 442 wiring conductors 451 and 452, and interlayer connection conductors 461 and 462 are formed.
  • the component mounting land conductors 441 and 442 are formed on the surface of the nonmagnetic layer 24 opposite to the contact surface with the magnetic layer 21. That is, the component mounting land conductors 441 and 442 are formed on the first main surface 203 of the wiring board 20.
  • a mounting-type electronic component 51 is mounted on the component mounting land conductor 441.
  • a mounting-type electronic component 52 is mounted on the component mounting land conductor 442.
  • the wiring conductor 451 is formed at the interface between the nonmagnetic layer 24 and the magnetic layer 21. The vicinity of one end of the wiring conductor 451 is connected to the component mounting land conductor 441 via the interlayer connection conductor 461. The other end of the wiring conductor 451 is connected to the wiring conductor 421 via an interlayer connection conductor or the like (not shown).
  • the interlayer connection conductor passes between the coil 401 and the side surface 201, for example.
  • the wiring conductor 452 is formed at the interface between the nonmagnetic layer 24 and the magnetic layer 21. The vicinity of one end of the wiring conductor 452 is connected to the component mounting land conductor 442 via the interlayer connection conductor 462. The other end of the wiring conductor 452 is connected to the wiring conductor 422 via an interlayer connection conductor (not shown).
  • the interlayer connection conductor passes between the coil 401 and the side surface 202, for example.
  • Terminal conductors 411 and 412, wiring conductors 421 and 422, and interlayer connection conductors 431 and 432 are formed in the nonmagnetic layer 25.
  • the terminal conductors 411 and 412 are formed on the surface of the nonmagnetic material layer 25 opposite to the contact surface with the magnetic material layer 22. That is, the terminal conductors 411 and 412 are formed on the second main surface 204 of the wiring board 20.
  • the terminal conductors 411 and 412 are reference potential terminal conductors, for example, ground (ground) terminal conductors.
  • the wiring conductor 421 is formed at the interface between the nonmagnetic layer 25 and the magnetic layer 22. The vicinity of one end of the wiring conductor 421 is connected to the terminal conductor 411 through the interlayer connection conductor 431. Further, the wiring conductor 421 is connected to the wiring conductor 451 via the interlayer connection conductor (not shown) as described above.
  • the wiring conductor 422 is formed at the interface between the nonmagnetic layer 25 and the magnetic layer 22. The vicinity of one end of the wiring conductor 422 is connected to the terminal conductor 412 via the interlayer connection conductor 432. Further, the wiring conductor 422 is connected to the wiring conductor 452 via the interlayer connection conductor or the like (not shown) as described above. With these structures, a basic circuit function unit of the resin package substrate 10 is realized.
  • the sealing resin 30 covers the first main surface of the wiring board 20 and the mounted electronic components 51 and 52. More specifically, the wiring board 20 and the sealing resin 30 have the following shapes.
  • the wiring board 20 includes a plurality of recesses 210.
  • the plurality of recesses 210 are provided so that at least a part thereof includes each corner CR1, CR2, CR3, CR4 on the first main surface 203 side of the wiring board 20.
  • the first recess 210 has a shape extending from the side surface 202 to the side surface 205 including the corner portion CR ⁇ b> 1 where the side surface 202 and the side surface 205 are connected. And a shape recessed inward from the side surface 205.
  • the second concave portion 210 has a shape extending from the side surface 202 and the side surface 206 to the inside including the corner portion CR ⁇ b> 2 where the side surface 202 and the side surface 206 are connected.
  • the third concave portion 210 has a shape extending from the side surface 201 and the side surface 205 to the inner side, including the corner portion CR ⁇ b> 3 where the side surface 201 and the side surface 205 are connected.
  • the fourth recess 210 has a shape extending from the side surface 201 and the side surface 206 to the inner side, including the corner portion CR4 where the side surface 201 and the side surface 206 are connected.
  • the first, second, third, and fourth recesses 210 have a shape that is recessed from the first major surface 203, and the bottom surface of the magnetic layer 21 is more than the interface between the nonmagnetic layer 24 and the magnetic layer 21. The side position has been reached.
  • the sealing resin 30 is provided so as to cover the first main surface 203 of the wiring substrate 20 and to fill the plurality of recesses 210.
  • the occurrence of cracks can be suppressed by covering each corner CR1, CR2, CR3, CR4 with the sealing resin 30. Further, by covering the side surfaces 201, 202, 205, 206 in the vicinity of the corner portions CR1, CR2, CR3, CR4, the corner portions CR1, CR2, CR3, CR4 and the corner portions CR1, CR2, CR3, CR4 are covered. The occurrence of cracks from the side surfaces 201, 202, 205, 206 in the vicinity can be suppressed.
  • the edge of the interface between the nonmagnetic layer and the magnetic layer is covered with the sealing resin, the entire length in the thickness direction of the side surface of the nonmagnetic layer where cracks are likely to occur is covered, and the generation of cracks is further suppressed. Is done. Furthermore, the stress acting on the side surface of the nonmagnetic layer can be dispersed, and cracks are further effectively suppressed.
  • the wiring board 20 can realize a high bending strength. , Improve reliability. In this case, cracks in the nonmagnetic layer are likely to occur, but the occurrence of cracks is effectively suppressed by the above-described configuration.
  • the recess 210 is formed with a depth that does not overlap with the coiled coil conductor constituting the coil 401. Thereby, it can suppress that the center opening of the coil 401 becomes small, and can suppress that the width
  • FIG. 2 is a diagram comparing the stress distribution diagrams of the package substrate of the present invention and the resin package substrate used in the comparative example.
  • a conventional resin package substrate is compared with a resin package substrate according to an embodiment of the present invention.
  • a portion where the stress is the largest is “high stress” and a portion where the stress is the smallest is “small stress”.
  • a portion where a stress having a magnitude between “large stress” and “small stress” is applied is defined as “in stress”.
  • the “high stress” portion, the “under stress” portion, and the “stress low” portion have different hatchings.
  • the comparative example is a conventional resin package substrate, which is laminated in the order of sealing resin, magnetic body, and non-magnetic body, and does not have a recess and a sealing resin that fills the recess. That is, the sealing resin, the magnetic body, and the non-magnetic body are only in contact with each interface orthogonal to the thickness direction.
  • the stress is the largest around the side surface, particularly the side surface at the position of the interface between the sealing resin and the nonmagnetic material layer. Then, according to the distance from the center, a portion where the stress is large, the stress is small, and the stress is small is spread inside the wiring board.
  • the main stress point is the sealing resin-nonmagnetic layer interface
  • the maximum main stress is 376.1 MPa.
  • the structure of the present invention is laminated in the order of sealing resin, magnetic body, and non-magnetic body as in the comparative example.
  • a recess is formed on the side surface of the wiring board across the nonmagnetic material layer and the magnetic material layer, and the recess is filled with resin.
  • the side surface of the magnetic layer is in contact with the sealing resin
  • the side surface of the non-magnetic layer is in contact with the sealing resin.
  • the stress is most applied around the side surface of the sealing resin filled in the recess, but the size is smaller than that of the comparative example.
  • a portion with a small stress spreads inside the wiring board during the stress.
  • the main stress portion is the sealing resin-nonmagnetic layer interface, and the maximum main stress is 161.8 MPa.
  • the resin at the recesses formed at both ends of the wiring board is filled with the resin, so that the stress at the sealing resin-nonmagnetic layer interface, which is the main stress portion, is dispersed.
  • the maximum principal stress is substantially halved, and the generation of cracks is suppressed.
  • FIG. 3 is a flowchart showing a method for manufacturing a resin package substrate according to the first embodiment of the present invention.
  • 4 (A), 4 (B), 4 (C), 5 (A), and 5 (B) are side cross-sectional views showing the configuration of the manufacturing process.
  • conductor patterns are respectively formed on a plurality of magnetic sheets constituting the magnetic layers 21M and 22M and a plurality of nonmagnetic sheets constituting the nonmagnetic layers 24M and 25M. Is formed (S101).
  • the plurality of magnetic sheets constituting the magnetic layers 21M and 22M and the plurality of nonmagnetic sheets constituting the nonmagnetic layers 24M and 25M are sized so that the plurality of wiring boards 20 can be formed in a lump ( Mother sheet).
  • the conductor pattern is formed on the mother sheet so that a plurality of wiring boards are arranged as a final shape.
  • Coil conductors and interlayer connection conductors constituting the coil 401 are formed on the plurality of magnetic sheets constituting the magnetic layers 21M and 22M.
  • Component mounting land conductors 441 and 442, a wiring conductor 450, and interlayer connection conductors 461 and 462 are formed on a plurality of nonmagnetic sheets constituting the nonmagnetic layer 24M.
  • Terminal conductors 411 and 412, a wiring conductor 420, and interlayer connection conductors 431 and 432 are formed on a plurality of nonmagnetic sheets constituting the nonmagnetic layer 25 ⁇ / b> M.
  • a non-magnetic sheet constituting the layer 23M is laminated to form a mother laminate (S102).
  • a concave portion 210 having a shape in which the side surface of each element portion is recessed is formed (S103).
  • the element portion refers to a portion that finally becomes one resin package substrate.
  • the cylindrical recess 210 is formed so that the substantially center position of the adjacent coils 401 in the mother laminate 20M is the center of the cylinder.
  • the recess 210 is formed by a laser, a dicer or the like. At this time, the recess 210 is formed such that the bottom surface is disposed at a depth that penetrates the nonmagnetic layer 24M and does not reach the coil conductor pattern in the magnetic layer 21M.
  • the mother laminate 20M is fired (S104).
  • the mountable electronic components 51 and 52 are mounted on the first main surface of the fired mother laminate 20M.
  • the mounted electronic component 51 is mounted on the component mounting land conductor 441
  • the mounted electronic component 52 is mounted on the component mounting land conductor 442.
  • the sealing resin 30 is formed on the first main surface side of the mother laminate 20M (S106). At this time, the recess 210 is also filled with resin.
  • a groove GR that is divided into element units is formed in the mother stacked body 20M, and the mother stacked body 20M is separated into a plurality of element parts (S107).
  • the resin package substrate 10 having the above-described configuration can be manufactured.
  • FIG. 6A is a cross-sectional plan view of a resin package substrate according to the second embodiment of the present invention.
  • FIG. 6A is a cross-sectional view at the same position as FIG.
  • the resin package substrate 10A of the present embodiment is different from the resin package substrate 10 according to the first embodiment in the shape of the recess 210A.
  • the other configuration of the resin package substrate 10A is the same as that of the resin package substrate 10, and the description of the same parts is omitted.
  • the plurality of recesses 210A include corner portions CR1, CR2, CR3, and CR4, and are formed in a shape that extends only to the side surface 201 and the side surface 202 side. In other words, the plurality of recesses 210 ⁇ / b> A do not extend along the side surfaces 205 and 206.
  • the sealing resin 30 is filled in the plurality of recesses 210A.
  • FIG. 6B is a plan sectional view of the resin package substrate according to the third embodiment of the present invention.
  • FIG. 6B is a cross-sectional view at the same position as FIG.
  • the resin package substrate 10B according to the present embodiment is different from the resin package substrate 10 according to the first embodiment in the shape of the recess 210B.
  • the other configuration of the resin package substrate 10B is the same as that of the resin package substrate 10, and the description of the same parts is omitted.
  • the plurality of concave portions 210B include corner portions CR1, CR2, CR3, and CR4, and are formed in a shape surrounding the side surface 201, the side surface 202, the side surface 205, and the side surface 206. In other words, the recess 210B covers the entire outer periphery of the resin package substrate 10B.
  • the sealing resin 30 is filled in the recess 210B.
  • FIG. 7A is a plan sectional view of a resin package substrate according to the fourth embodiment of the present invention.
  • FIG. 7B is an enlarged view of a part (a portion surrounded by a broken-line circle) of the plan sectional view viewed from the side surface 206 side, which is divided by a plane including the shaft 85 in FIG. It is.
  • the concave portion is shown in an enlarged manner.
  • the resin package substrate 10C of the present embodiment differs from the resin package substrate 10 of the first embodiment in the shape of the recesses 210C.
  • the other configuration of the resin package substrate 10C is the same as that of the resin package substrate 10, and the description of the same parts is omitted.
  • the recess 210C has a shape having a plurality of local recesses 215C that are locally recessed in the thickness direction of the nonmagnetic layer 24 in a side view. It is preferable that the local recess 215C reaches the magnetic layer 21 in the thickness direction (depth direction of the recess 210C).
  • the sealing resin 30 is filled in the recesses 210C and the local recesses 215C.
  • the sealing resin 30, the magnetic layer 21, and the non-magnetic material have a configuration having a concave / convex shape including a circle in a top view rather than an inner wall surface of the concave portion configured by only a straight line.
  • the area in contact with the layer 24 becomes larger, and the adhesion becomes higher. Therefore, the generation of cracks can be further suppressed.
  • FIG. 8A is a side sectional view showing a schematic configuration of a resin package substrate according to the fifth embodiment of the present invention.
  • FIG. 8B is an enlarged view of a part centering on the recess 210D in the side cross-sectional view in FIG.
  • the resin package substrate 10D of the present embodiment is different from the resin package substrate 10 of the first embodiment in the shape of the recesses 210D.
  • the other configuration of the resin package substrate 10D is the same as that of the resin package substrate 10, and the description of the same parts is omitted.
  • the recess 210D has a fine and sharp tip. Even with such a configuration, cracks can be suppressed.
  • the recess 210D is formed by a laser.
  • a roughened surface larger than the ceramic particle diameter is formed on the inner wall surface of the recess 210D. Therefore, the anchor effect can be expected more on the surface formed by the laser than on the surface of the recess formed by the dicer or the like.
  • the surface of the recess may be roughened as in the configuration of the fifth embodiment.
  • the ferrite substrate described above may be a dielectric substrate.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

L'invention concerne une structure qui supprime l'apparition de pelage et de fissures dans une carte de câblage recouverte d'une résine. Un substrat de boîtier en résine (10) est pourvu d'une carte de câblage (20) ayant une première surface principale (203), et une résine d'étanchéité (30) recouvrant la première surface principale (203). La carte de câblage (20) comporte des sections évidées (210) au niveau des coins de la première surface principale (203), lesdites sections évidées étant évidées dans la direction de l'épaisseur de la carte de câblage (20). Les sections évidées (210) sont remplies par la résine d'étanchéité (30).
PCT/JP2017/038940 2016-11-21 2017-10-27 Substrat de boîtier en résine WO2018092550A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016225617 2016-11-21
JP2016-225617 2016-11-21

Publications (1)

Publication Number Publication Date
WO2018092550A1 true WO2018092550A1 (fr) 2018-05-24

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005159185A (ja) * 2003-11-27 2005-06-16 Kyocera Corp 電子装置
JP2013197921A (ja) * 2012-03-21 2013-09-30 Kyocera Corp 電子部品の製造方法及び電子部品
WO2015178061A1 (fr) * 2014-05-21 2015-11-26 株式会社 村田製作所 Module de circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005159185A (ja) * 2003-11-27 2005-06-16 Kyocera Corp 電子装置
JP2013197921A (ja) * 2012-03-21 2013-09-30 Kyocera Corp 電子部品の製造方法及び電子部品
WO2015178061A1 (fr) * 2014-05-21 2015-11-26 株式会社 村田製作所 Module de circuit

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