WO2018040490A1 - 一种双向扫描的栅极驱动电路、液晶显示面板 - Google Patents

一种双向扫描的栅极驱动电路、液晶显示面板 Download PDF

Info

Publication number
WO2018040490A1
WO2018040490A1 PCT/CN2017/071626 CN2017071626W WO2018040490A1 WO 2018040490 A1 WO2018040490 A1 WO 2018040490A1 CN 2017071626 W CN2017071626 W CN 2017071626W WO 2018040490 A1 WO2018040490 A1 WO 2018040490A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
array substrate
switching element
circuit
driving unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/071626
Other languages
English (en)
French (fr)
Inventor
曾勉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US15/500,150 priority Critical patent/US10699657B2/en
Publication of WO2018040490A1 publication Critical patent/WO2018040490A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0283—Arrangement of drivers for different directions of scanning
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Definitions

  • the present invention relates to the field of liquid crystal display manufacturing, and more particularly to a driving circuit capable of realizing bidirectional scanning by changing an access signal, and a liquid crystal display panel having the bidirectional scanning gate driving circuit.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the array substrate row driving is a technique of manufacturing a gate driving circuit row scanning driving signal circuit on an array substrate of a liquid crystal display panel to realize a driving method of progressively scanning the gate driving circuit, which is driven by the array substrate row.
  • a gate drive circuit integrated on an array substrate is referred to as an array substrate row drive (GOA) gate drive circuit or an array substrate row drive circuit.
  • the existing array substrate row driving circuit generally includes: a plurality of cascaded array substrate row driving units, and each stage array substrate row driving unit correspondingly drives a first level horizontal scanning line.
  • the main structure of the array substrate row driving unit includes: a pull-up part, a pull-up control part, a transfer part, a key pull-down part, and The pull-down holding part and the bootstrap capacitor responsible for the potential rise.
  • the pull-up circuit is mainly responsible for outputting the clock signal (Clock) as a gate signal; the pull-up control circuit is responsible for controlling the opening time of the pull-up circuit, and is generally connected to the downlink signal or the gate line driving signal transmitted from the front-stage array substrate row driving circuit. (referred to as: Gate signal); the pull-down circuit is responsible for pulling the gate line drive signal low to the low level at the first time, that is, turning off the gate line drive signal; the pull-down sustain circuit is responsible for the gate line drive signal output signal and the gate of the pull-up circuit.
  • the line drive signal (commonly referred to as the Q point) is held in the off state (ie, the negative potential) and usually has two pull-down dimensions.
  • the modules are alternately operated; the bootstrap capacitor (C boast) is responsible for the secondary rise of the Q point, which is beneficial to the G(N) output of the pull-up circuit.
  • FIG. 1 is a schematic view showing a row driving circuit of an array substrate in the prior art.
  • the connection relationship of the array substrate row driving circuit is: charging the display region N-th horizontal scanning line G(N) according to the N-th array substrate row driving unit control, and the N-th array substrate row driving unit includes: Pull-up control circuit 100, pull-up circuit 200, downlink circuit 300, bootstrap capacitor 400, pull-down circuit 500, first pull-down maintaining circuit 600 and second pull-down maintaining circuit 700;
  • the pull-up control circuit 100 includes: a thin film transistor T11 having a gate input with a downlink signal ST(N-1) from a row driving unit of the N-1th array substrate, and a drain and a source respectively connected to the N-1th stage The horizontal scanning line G(N-1) and the gate signal point Q(N).
  • the pull-up circuit 200 includes a thin film transistor T21 having a gate connected to the gate signal point Q(N), a drain and a source respectively inputting a clock signal CK and a n-th horizontal scanning line G(N).
  • the down circuit 300 includes a thin film transistor T22 having a gate connected to the gate signal point Q(N), a drain and a source inputting a clock signal CK and an output down signal ST(N), respectively.
  • the pull-down circuit 400 includes a thin film transistor T31 whose gate is connected to the N+1th horizontal scanning line G(N+1), and the drain and the source are respectively connected to the Nth horizontal scanning line G(N) and the input DC is low. Voltage VSS; thin film transistor T41 whose gate is connected to the N+1th horizontal scanning line G(N+1), the drain and the source are respectively connected to the gate signal point Q(N) and the DC low voltage VSS is input.
  • the pull-down sustain circuit includes: two mirrored pull-down sustain circuits, a first pull-down sustain circuit 600 and a second pull-down sustain circuit 700.
  • the frequencies of the first clock signal LC1 and the second clock signal LC2 are lower than the clock signal CK input to the pull-up circuit 200, and the first circuit point K(N) and the second circuit point P(N) are alternately placed.
  • the high potential allows the two pull-down sustain circuits to work in turn to mitigate the adverse effects of their transistors being in the DC Stress state for a long time.
  • the existing shift register can only scan in a certain direction (for example, sequentially driving the gate lines G(1) to G(N) in the forward scan mode), and cannot support other driving modes, the driving mode. Single, resulting in poor freedom of use of the LCD panel.
  • the present invention proposes a two-way scanning method in which the gate driving circuit of the prior art scans only in a specific direction and cannot support other driving modes, and the driving mode is single, which causes a defect in the degree of freedom of use of the liquid crystal display panel.
  • the gate drive circuit and the liquid crystal display panel are configured to support the driving mode in a specific direction and cannot support other driving modes, and the driving mode is single, which causes a defect in the degree of freedom of use of the liquid crystal display panel.
  • a bidirectionally scanned gate drive circuit comprising a plurality of cascaded cascades Column substrate row drive unit,
  • Each row of the array substrate driving unit corresponds to driving a horizontal scanning line.
  • the array substrate row driving unit includes an input circuit, a control circuit, and an output circuit.
  • the input circuit is configured to receive a downlink signal of the row driving unit of the N-1th array substrate, and receive a DC high potential signal during forward scanning, and receive a DC low potential signal during the reverse scanning, and output Gate drive signal;
  • the control circuit is configured to receive a gate driving signal and a clock signal, output a downlink signal of the Nth array substrate row driving unit, and drive the Nth horizontal scanning line;
  • the output circuit is configured to receive a gate driving signal and a downlink signal of the N+1th array substrate row driving unit that receives the input, and receive a DC low voltage signal during the forward scanning, in the reverse scanning
  • the DC high-potential signal is received to drive the N-th horizontal scanning line.
  • control circuit is further configured to maintain the Nth horizontal scanning line in a closed state.
  • the output circuit includes a switching element T41 and a switching element T31,
  • the switching element T41 is configured to receive a gate driving signal and an input downlink signal of the input N+1th array substrate row driving unit, and receive a DC low potential signal during the forward scanning, in the reverse scanning Receiving a DC high potential signal;
  • the switching element T31 is configured to receive another DC low potential signal to drive the Nth horizontal scanning line.
  • the pull-down circuit includes a switching element T41 and a switching element T31,
  • the switching element T41 is configured to receive a gate driving signal and a downlink signal of the N+1th array substrate row driving unit, and receive a DC low potential signal during forward scanning, and receive in a reverse scanning manner.
  • the switching element T31 is configured to receive another DC low potential signal to drive the Nth horizontal scanning line.
  • the downlink signal input end of the N+1th array substrate row driving unit is connected to the gate of the switching element T41, and the drain of the switching element T41 is connected to the gate driving signal output end of the pull-up control circuit.
  • a DC low voltage signal input end is connected to the source of the switching element T41, and in the reverse scan, the DC high voltage signal input end is connected to the source of the switching element T41,
  • the source of the switching element T31 is connected to another DC low voltage signal input terminal, and the gate of the switching element T31 is connected to the drain of the switching element T31 as an input terminal for driving the Nth horizontal scanning line.
  • the input circuit comprises a switching element T11,
  • the gate of the switching element T11 is connected to the input end of the down signal of the N-1th array substrate row driving unit, and the switch The source of the component T11 serves as the gate drive signal output end of the input circuit.
  • the drain of the switching element T11 is connected to the DC high-potential signal input terminal, and in the reverse scan, the drain of the switching element T11 is connected to a low DC line. Potential signal input.
  • the switching element T41 and the switching element T31 are both metal oxide semiconductor field effect transistors.
  • the switching element T11 is a metal oxide semiconductor field effect transistor.
  • liquid crystal display panel comprising the bidirectional shift register of any of the above preferred embodiments.
  • the bidirectionally scanned gate drive circuit is capable of implementing a forward scan mode and a reverse scan mode.
  • the signal direction of the bidirectional scanning gate driving circuit in the forward scanning mode is: a downlink signal of the N-1th array substrate row driving unit ⁇ a downlink signal of the Nth array substrate row driving unit ⁇ The downlink signal of the row driving unit of the N+1th array substrate.
  • the signal direction of the bidirectional scanning gate driving circuit in the reverse scanning mode is: a downlink signal of the N+1th array substrate row driving unit ⁇ a downlink signal of the Nth array substrate row driving unit ⁇ The downlink signal of the row drive unit of the N-1th array substrate row.
  • the bidirectional shift register and the liquid crystal display panel of the present invention can solve the problem that the gate driving circuit of the prior art scans only in a certain direction, and cannot support other driving modes, and the driving mode is single, resulting in a liquid crystal display.
  • the defect of the degree of freedom of use of the panel enables the liquid crystal display panel to operate normally in both the forward scanning mode and the reverse scanning mode, thereby providing an elastic driving mode for the liquid crystal display panel.
  • the invention has little modification to the existing circuit form, and only needs to change the connection manner of the two components, and by changing the input mode of the signal, the two scanning modes of the forward scanning and the reverse scanning can be realized, thereby increasing the panel.
  • the degree of freedom is used to provide an elastic drive for the liquid crystal display surface.
  • FIG. 1 shows a schematic diagram of a row driving circuit of an array substrate in the prior art
  • FIG. 2 is a schematic diagram showing the principle of a gate driving circuit for implementing forward scanning in the first embodiment
  • FIG. 3 is a schematic diagram showing the principle of a gate driving circuit for implementing reverse scanning in Embodiment 2;
  • Figure 4 shows the signal waveforms of the gate drive circuit during forward scanning.
  • Embodiment 1 is a diagrammatic representation of Embodiment 1:
  • FIG. 2 is a schematic diagram showing the principle of a gate drive circuit for forward scanning in the first embodiment.
  • the forward scanning gate driving circuit is used to provide a forward scanning driving mode for the liquid crystal display panel.
  • the forward scanning gate driving circuit acts on the liquid crystal display panel to enable the display panel to operate normally in the forward scanning mode.
  • the gate driving circuit of the forward scanning of the present embodiment includes a plurality of cascaded array row driving units. Each level of the array substrate row driving unit corresponds to driving the first level horizontal scanning line. In a preferred embodiment, the structure of each row of array substrate drive units in the forward scanning gate drive circuit is the same.
  • the array substrate row driving unit includes an input circuit 1, a control circuit 2, and an output circuit 3.
  • a preferred structure of the gate driving circuit will be described below with a gate driving circuit including the input circuit 1, the control circuit 2, and the output circuit 3.
  • the input signal 1 inputs the downlink signal of the N-1th array substrate row driving unit and the input DC high potential signal, and finally outputs the gate driving signal.
  • the gate drive signal output from the input circuit 1 enters the control circuit 2.
  • the downlink signal of the N-th array substrate row driving unit is output from the output terminal of the control circuit 2.
  • the structure of the control circuit 2 is an existing structural composition.
  • the control circuit 2 is composed of an existing pull-up circuit, a downlink circuit, a bootstrap capacitor, a pull-down circuit, a first pull-down sustain circuit, and a second pull-down sustain circuit.
  • the output circuit 3 is configured to receive the gate driving signal and receive the input downlink signal of the N+1th array substrate row driving unit, and receive a DC low voltage signal to drive the Nth horizontal scanning line.
  • the forward scanning mode causes the signal flow of the gate driving circuit to be: a downlink signal of the N-1th array substrate row driving unit ⁇ a downlink signal of the Nth array substrate row driving unit ⁇ an N+1th array substrate
  • the signal direction of the downlink signal of the row driving unit realizes the forward driving mode of the liquid crystal display panel.
  • the operation principle of the gate drive circuit of the forward scan of the present embodiment will be described below by taking a gate drive circuit including the forward scan of the input circuit 1, the control circuit 2, and the output circuit 3 as an example.
  • the gate drive circuit along the forward direction is the N-1
  • the signal direction of N+1) realizes the forward driving mode of the liquid crystal display panel. Therefore, the input circuit 1 is connected to the high potential signal.
  • the gate of the output circuit 3 is connected to the downlink signal of the row driving unit of the N+1th array substrate.
  • a low potential signal is applied to the source of the switching transistor T41 in the output circuit 3.
  • the gate and the drain of the switching transistor T31 are both connected to the Nth horizontal scanning line.
  • This signal flows along the DC high potential signal to the DC low potential signal.
  • the gate start signal STV is a signal that is activated for the entire gate drive circuit.
  • the XCK signal inverted from the clock signal CK is opposite to the waveform of the clock signal CK.
  • the gate drive circuit of the forward scan of this embodiment can bring the following beneficial effects:
  • the forward-scanning gate driving circuit of this embodiment is configured to display the driving of the liquid crystal display panel in a forward scanning manner, so that the liquid crystal display panel can normally display.
  • the embodiment can solve the defects that the gate driving circuit of the prior art scans only in a certain direction and cannot support other driving modes, and the driving mode is single, which causes a difference in the degree of freedom of use of the liquid crystal display panel, and makes the liquid crystal display panel
  • the liquid crystal display can operate normally in the forward scan mode.
  • this embodiment Compared with the existing circuit structure, this embodiment only needs to replace the connection relationship of the output circuit and change the input signal and the output signal, so that the signal flows to a low potential along the high potential, thereby realizing the forward driving of the liquid crystal display panel. Therefore, the present embodiment achieves the purpose of elastic driving while increasing the degree of freedom of use for the panel.
  • Embodiment 2 is a diagrammatic representation of Embodiment 1:
  • FIG. 3 is a schematic diagram showing the principle of the reverse driving gate driving circuit in the second embodiment.
  • the reverse scan gate drive circuit is used to provide a reverse scan driving mode for the liquid crystal display panel.
  • the reverse scanning gate driving circuit acts on the liquid crystal display panel to enable the display panel to operate normally in the reverse scanning mode.
  • the gate driving circuit of the reverse scanning of this embodiment includes a plurality of cascaded array row driving units.
  • Each level of the array substrate row driving unit corresponds to driving the first level horizontal scanning line.
  • the structure of each stage array substrate row drive unit in the reverse scan gate drive circuit is the same.
  • the array substrate row driving unit includes an input circuit 1, a control circuit 2, and an output circuit 3.
  • a preferred structure of the gate driving circuit will be described below with a gate driving circuit including the input circuit 1, the control circuit 2, and the output circuit 3.
  • the down signal and the DC low potential signal of the N-1th array substrate row driving unit are input to the input circuit 1, and finally the gate driving signal is output.
  • the gate drive signal output from the input circuit 1 enters the control circuit.
  • the downlink signal of the N-th array substrate row driving unit is output from the output terminal of the control circuit 2.
  • the structure of the control circuit 2 is composed of a conventional pull-up circuit, a downlink circuit, a bootstrap capacitor, a pull-down circuit, a first pull-down sustain circuit, and a second pull-down sustain circuit.
  • the output circuit 3 is configured to receive the gate driving signal and receive the input downlink signal of the N+1th array substrate row driving unit, and receive the DC high voltage signal to drive the Nth horizontal scanning line.
  • the reverse scan mode causes the signal flow direction of the gate driving circuit to be: a downlink signal of the row driving unit of the N+1th array substrate row ⁇ a downlink signal of the row driving unit of the Nth array substrate ⁇ an N-1th array substrate
  • the signal direction of the downlink signal of the row driving unit realizes the reverse driving mode of the liquid crystal display panel.
  • the operation principle of the gate driving circuit of the reverse scanning of the present embodiment will be described below by taking a gate driving circuit including the reverse scanning of the input circuit 1, the control circuit 2, and the output circuit 3 as an example.
  • the downlink signal SN(N+1) of the N+1th array substrate row driving unit is driven by the N+1th array substrate row driving unit SN(N) ⁇
  • the signal direction of the downlink signal SN(N-1) of the row driving unit of the N-1th array substrate realizes the reverse driving mode of the liquid crystal display panel. Therefore, the input circuit 1 is connected to the low potential signal.
  • the gate of the output circuit 3 is connected to the downlink signal of the row driving unit of the N+1th array substrate.
  • a DC high potential signal is connected to the source of the switching transistor T41 in the output circuit 3.
  • the gate and the drain of the switching transistor T31 are both connected to the Nth horizontal scanning line.
  • This signal flows along the DC high potential signal to the DC low potential signal.
  • the gate driving circuit of the reverse scanning of the embodiment can bring the following beneficial effects:
  • the reverse scanning gate driving circuit of this embodiment is configured to display the driving of the liquid crystal display panel in a reverse scanning manner, so that the liquid crystal display panel can normally display.
  • the embodiment can solve the defects that the gate driving circuit of the prior art scans only in a certain direction and cannot support other driving modes, and the driving mode is single, which causes a difference in the degree of freedom of use of the liquid crystal display panel, and makes the liquid crystal display panel The liquid crystal display can operate normally in the reverse scan mode.
  • this embodiment Compared with the existing circuit structure, this embodiment only needs to replace the connection relationship of the output circuit and change the input signal and the output signal, so that the signal high potential flows to a low potential, thereby realizing the reverse driving of the liquid crystal display panel. Therefore, the present embodiment achieves the purpose of elastic driving while increasing the degree of freedom of use for the panel.
  • Embodiment 3 is a diagrammatic representation of Embodiment 3
  • the liquid crystal display panel in this embodiment is implemented in the manner of the first embodiment or implemented in the second embodiment.
  • the circuit of the first embodiment or the circuit of the second embodiment can be used to provide a positive driving mode or a reverse driving mode for the liquid crystal display panel. Both driving modes are applied to the liquid crystal display panel to enable the display panel to display normally in the forward and reverse scan modes.
  • the liquid crystal display panel is widely used, and an electronic product realized by applying the liquid crystal display panel of the present embodiment will be described below.
  • the liquid crystal display panel can be applied to an electronic device having a display screen function, such as a tablet computer, a mobile phone, a car control panel, a temperature display panel, a monitor, a videophone, and the like. It can be seen that the application of the liquid crystal display panel is extensive.
  • liquid crystal display panel of the embodiment can bring the following beneficial effects:
  • the liquid crystal display panel of this embodiment has both forward and reverse driving modes.
  • the two driving modes enable the liquid crystal display panel to operate normally in both the forward scanning mode and the reverse scanning mode, so that the driving of the liquid crystal display panel is not single, thereby providing an elastic driving mode and increasing the degree of freedom of use of the panel. .

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种双向扫描的栅极驱动电路、液晶显示面板。栅极驱动电路包括：输入电路（1）、控制电路（2）和输出电路（3）；信号经过输入电路（1）进入控制电路（2）再回到输出电路（3）中或者信号经过输出电路（3）进入控制电路（2）再回到输入电路（1），实现对第N级水平扫描线的驱动，解决了现有技术的栅极驱动电路驱动模式单一的问题。

Description

一种双向扫描的栅极驱动电路、液晶显示面板
本申请要求享有2016年8月31日提交的名称为“一种双向扫描的栅极驱动电路、液晶显示面板”的中国专利申请CN201610794038.X的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及液晶显示器制造领域，尤其涉及一种通过变更接入信号可实现双向扫描的驱动电路，还涉及具有该双向扫描的栅极驱动电路的液晶显示面板。
背景技术
目前，作为现有技术中主要的平板显示器的TFT-LCD(Thin Film Transistor Liquid Crystal Display，薄膜晶体管液晶显示器)已经成为现代IT产品和视讯产品的重要显示平台。液晶显示器被广泛使用在各种电子产品的应用中。在制造液晶显示器过程中有一项非常重要的技术就是阵列基板行驱动(Gate Driver On Array，简称GOA)技术。阵列基板行驱动也就是将栅极驱动电路行扫描驱动信号电路制作在液晶显示面板的阵列基板上，实现对栅极驱动电路逐行扫描的驱动方式的一项技术，这种利用阵列基板行驱动技术，集成在阵列基板上的栅极驱动电路被称之为阵列基板行驱动(GOA)栅极驱动电路或者阵列基板行驱动电路。
现有的阵列基板行驱动电路，通常包括：级联的多个阵列基板行驱动单元，每一级阵列基板行驱动单元对应驱动一级水平扫描线。阵列基板行驱动单元的主要结构包括：上拉电路(Pull-up part)、上拉控制电路(Pull-up control part)、下传电路(Transfer Part)、下拉电路(Key Pull-down Part)和下拉维持电路(Pull-down Holding Part)，以及负责电位抬升的自举(Boast)电容。
上拉电路主要负责将时钟信号(Clock)输出为栅极信号；上拉控制电路负责控制上拉电路的打开时间，一般连接前面级阵列基板行驱动电路传递过来的下传信号或者栅线驱动信号(简称：Gate信号)；下拉电路负责在第一时间将栅线驱动信号拉低为低电位，即关闭栅线驱动信号；下拉维持电路则负责将栅线驱动信号输出信号和上拉电路的栅线驱动信号(通常称为Q点)维持(Holding)在关闭状态(即负电位)，通常有两个下拉维 持模块交替作用；自举电容(C boast)则负责Q点的二次抬升，这样有利于上拉电路的G(N)输出。
图1示出了现有技术中的阵列基板行驱动电路示意图。参照图1，阵列基板行驱动电路的连接关系为：按照第N级阵列基板行驱动单元控制对显示区域第N级水平扫描线G(N)充电，该第N级阵列基板行驱动单元包括：上拉控制电路100，上拉电路200，下传电路300，自举电容400，下拉电路500，第一下拉维持电路600和第二下拉维持电路700；
上拉控制电路100，包括：薄膜晶体管T11，其栅极输入来自第N-1级阵列基板行驱动单元的下传信号ST(N-1)，漏极和源极分别连接第N-1级水平扫描线G(N-1)和该栅极信号点Q(N)。上拉电路200，包括：薄膜晶体管T21，其栅极连接该栅极信号点Q(N)，漏极和源极分别输入时钟信号CK和连接第n级水平扫描线G(N)。下传电路300，包括：薄膜晶体管T22，其栅极连接栅极信号点Q(N)，漏极和源极分别输入时钟信号CK和输出下传信号ST(N)。下拉电路400，包括：薄膜晶体管T31，其栅极连接第N+1级水平扫描线G(N+1)，漏极和源极分别连接第N级水平扫描线G(N)和输入直流低电压VSS；薄膜晶体管T41，其栅极连接第N+1级水平扫描线G(N+1)，漏极和源极分别连接该栅极信号点Q(N)和输入该直流低电压VSS。
下拉维持电路，包括：两个镜像的下拉维持电路，第一下拉维持电路600和第二下拉维持电路700。
工作时，第一时钟信号LC1和第二时钟信号LC2的频率低于输入该上拉电路200的时钟信号CK，并且使第一电路点K(N)和第二电路点P(N)交替处于高电位，可以使得两个下拉维持电路轮流工作，以减轻其晶体管长期处于DC Stress状态时的不良影响。
然而，现有的移位寄存器仅能以某一特定方向进行扫描(例如以正向扫描方式依序驱动栅极线G(1)～G(N))，并无法支持其它驱动模式，驱动模式单一，导致液晶显示器面板使用的自由度差。
发明内容
针对上述现有技术的栅极驱动电路仅以某一特定方向进行扫描，并无法支持其它驱动模式，驱动模式单一，导致液晶显示器面板使用的自由度差的缺陷，本发明提出了一种双向扫描的栅极驱动电路及液晶显示面板。
根据本发明的一个方面，提供了一种双向扫描的栅极驱动电路，包括级联的多个级阵 列基板行驱动单元，
所述每一级阵列基板行驱动单元对应驱动一级水平扫描线，
阵列基板行驱动单元包括输入电路、控制电路和输出电路，
所述输入电路，用于接收第N-1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收直流高电位信号，于反向扫描时，接收一路直流低电位信号，输出栅极驱动信号；
所述控制电路，用于接收栅极驱动信号和时钟信号，输出第N级阵列基板行驱动单元的下传信号和驱动第N级水平扫描线；
所述输出电路，用于接收栅极驱动信号和接收输入的第N+1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收一路直流低电压信号，于反向扫描时，接收直流高电位信号，实现对第N级水平扫描线的驱动。
优选地，所述控制电路还用于实现将第N级水平扫描线维持在关闭状态。
优选地，所述输出电路包括开关元件T41和开关元件T31，
所述开关元件T41，用于接收栅极驱动信号和输入的第N+1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收一路直流低电位信号，于反向扫描时，接收直流高电位信号；
所述开关元件T31，用于接收另一路直流低电位信号，驱动第N级水平扫描线。
优选地，所述下拉电路包括开关元件T41和开关元件T31，
所述开关元件T41，用于接收栅极驱动信号和第N+1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收一路直流低电位信号，于反向扫描时，接收直流高电位信号；
所述开关元件T31，用于接收另一路直流低电位信号，驱动第N级水平扫描线。
优选地，第N+1级阵列基板行驱动单元的下传信号输入端连接开关元件T41的栅极，开关元件T41的漏极连接上拉控制电路的栅极驱动信号输出端，正向扫描时，一路直流低电压信号输入端连接开关元件T41的源极，反向扫描时，直流高电压信号输入端连接开关元件T41的源极，
开关元件T31的源极连接另一路直流低电压信号输入端，开关元件T31的栅极连接开关元件T31的漏极作为驱动第N级水平扫描线的输入端。
优选地，所述输入电路包括开关元件T11，
开关元件T11的栅极连接第N-1级阵列基板行驱动单元的下传信号的输入端，开关 元件T11的源极作为输入电路的栅极驱动信号输出端，正向扫描时，开关元件T11的漏极连接直流高电位信号输入端，反向扫描时，开关元件T11的漏极连接一路直流低电位信号输入端。
优选地，所述开关元件T41和开关元件T31均为金属氧化物半导体场效应晶体管。
优选地，所述开关元件T11为金属氧化物半导体场效应晶体管。
根据本发明的另一个方面，提供了一种液晶显示面板，包括上述优选地任一项所述的双向移位寄存器。
优选地，所述的双向扫描的栅极驱动电路能够实现正向扫描模式和反向扫描模式。
优选地，所述双向扫描的栅极驱动电路实现正向扫描模式时的信号走向为：第N-1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N+1级阵列基板行驱动单元的下传信号。
优选地，所述双向扫描的栅极驱动电路实现反向扫描模式时的信号走向为：第N+1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N-1级阵列基板行驱动单元的下传信号。
与现有技术相比，上述方案中的具有以下如下优点或者有益效果：
采用本发明所述的一种双向移位寄存器、液晶显示面板，能够解决现有技术的栅极驱动电路仅以某一特定方向进行扫描，并无法支持其它驱动模式，驱动模式单一，导致液晶显示器面板使用的自由度差的缺陷，使液晶显示面板在正向扫描模式和反向扫描模式两种模式下都能够正常运行，因而能提供给液晶显示面板弹性的驱动方式。
本发明对现有的电路形式改动性小，只需要变更两个元器件的连接方式，并且通过变更信号的输入方式，即可实现正向扫描和反向扫描两种扫描模式，从而增加面板的使用自由度，为液晶显示面提供弹性的驱动方式。
上述技术特征可以各种适合的方式组合或由等效的技术特征来替代，只要能够达到本发明的目的。
附图说明
在下文中将基于实施例并参考附图来对本发明进行更详细的描述。其中：
图1显示了现有技术中阵列基板行驱动电路示意图；
图2显示了实施例一中用于实现正向扫描的栅极驱动电路的原理示意图；
图3显示了实施例二中用于实现反向扫描的栅极驱动电路的原理示意图；
图4显示了栅极驱动电路正向扫描时的信号波形图。
具体实施方式
下面将结合附图对本发明作进一步说明。
实施例一：
图2显示了实施例一中正向扫描的栅极驱动电路的原理示意图。该正向扫描的栅极驱动电路用于为液晶显示面板提供正向扫描的驱动方式。正向扫描的栅极驱动电路作用于液晶显示面板，以使显示面板在正向扫描模式下正常运行。
参照图2，本实施例正向扫描的栅极驱动电路包括级联的多个级阵列基板行驱动单元。每一级阵列基板行驱动单元对应驱动一级水平扫描线。在一优选的实施例中，正向扫描的栅极驱动电路中的每一级阵列基板行驱动单元的结构都相同。
具体地，阵列基板行驱动单元包括输入电路1、控制电路2和输出电路3，
下面以包括输入电路1、控制电路2和输出电路3的栅极驱动电路来说明栅极驱动电路的优选结构。
其中，对输入电路1输入第N-1级阵列基板行驱动单元的下传信号和输入直流高电位信号，最终输出栅极驱动信号。
从输入电路1输出的栅极驱动信号进入控制电路2中。从控制电路2的输出端输出第N级阵列基板行驱动单元的下传信号。其中，控制电路2的结构均为现有的结构组成。控制电路2由现有的上拉电路、下传电路、自举电容、下拉电路、第一下拉维持电路和第二下拉维持电路组成。
输出电路3，用于接收栅极驱动信号和接收输入的第N+1级阵列基板行驱动单元的下传信号，并接收一路直流低电压信号，实现对第N级水平扫描线的驱动。
正向扫描模式使得栅极驱动电路的信号流向为：以第N-1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N+1级阵列基板行驱动单元的下传信号的信号走向实现对液晶显示面板的正向驱动方式。
下面以包括输入电路1、控制电路2和输出电路3的正向扫描的栅极驱动电路为例来说明本实施例正向扫描的栅极驱动电路的工作原理。
为了使液晶显示器以正向扫描的方式驱动。且沿着正向扫描的栅极驱动电路以第N-1 级阵列基板行驱动单元的下传信号SN(N-1)→第N级阵列基板行驱动单元的下传信号SN(N)→第N+1级阵列基板行驱动单元的下传信号SN(N+1)的信号走向实现对液晶显示面板的正向驱动方式。所以对输入电路1接入高电位信号。对输出电路3中的栅极接入第N+1级阵列基板行驱动单元的下传信号。对输出电路3中的开关管T41的源极接入低电位信号。并且使开关管T31的栅极与漏极均连接至第N级水平扫描线。这样信号就沿着直流高电位信号流向直流低电位信号。从而形成以第N-1级阵列基板行驱动单元的下传信号SN(N-1)→第N级阵列基板行驱动单元的下传信号SN(N)→第N+1级阵列基板行驱动单元的下传信号SN(N+1)的正向扫描方式。
以正向扫描的方式实现的栅极驱动电路，该电路的信号波形图，如图4所示。其中，栅的启动信号STV为给整个栅极驱动电路启动的信号。与时钟信号CK反向的XCK信号与时钟信号CK的波形相反。
基于上述分析，可见本实施例正向扫描的栅极驱动电路可带来如下有益效果：
本实施例的正向扫描的栅极驱动电路用于以正向扫描的方式显示对液晶显示面板的驱动，使液晶显示面板正常实现显示。本实施例能够解决现有技术的栅极驱动电路仅以某一特定方向进行扫描，并无法支持其它驱动模式，驱动模式单一，导致液晶显示器面板使用的自由度差的缺陷，使对液晶显示面板在正向扫描模式下使液晶显示器能够正常运行。
本实施例与现有电路结构相比，只需要更换输出电路的连接关系及改变输入信号和输出信号，使信号沿着高电位流向低电位，从而实现对液晶显示面板的正向驱动。因此本实施例在为面板增加使用自由度的同时，达到了一种弹性驱动的目的。
实施例二：
图3显示了实施例二中反向扫描的栅极驱动电路的原理示意图。该反向扫描的栅极驱动电路用于为液晶显示面板提供反向扫描的驱动方式。反向扫描的栅极驱动电路作用于液晶显示面板，以使显示面板在反向扫描模式下正常运行。
参照图3，本实施例反向扫描的栅极驱动电路包括级联的多个级阵列基板行驱动单元。每一级阵列基板行驱动单元对应驱动一级水平扫描线。在一优选的实施例中，反向扫描的栅极驱动电路中的每一级阵列基板行驱动单元的结构都相同。
具体地，阵列基板行驱动单元包括输入电路1、控制电路2和输出电路3，
下面以包括输入电路1、控制电路2和输出电路3的栅极驱动电路来说明栅极驱动电路的优选结构。
其中，对输入电路1输入第N-1级阵列基板行驱动单元的下传信号和直流低电位信号，最终输出栅极驱动信号。
从输入电路1输出的栅极驱动信号进入控制电路中。从控制电路2的输出端输出第N级阵列基板行驱动单元的下传信号。其中，控制电路2的结构均为现有的上拉电路、下传电路、自举电容、下拉电路、第一下拉维持电路和第二下拉维持电路的结构组成。
输出电路3，用于接收栅极驱动信号和接收输入的第N+1级阵列基板行驱动单元的下传信号，并接收直流高电压信号，实现对第N级水平扫描线的驱动。
反向扫描模式使得栅极驱动电路的信号流向为：以第N+1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N-1级阵列基板行驱动单元的下传信号的信号走向实现对液晶显示面板的反向驱动方式。
下面以包括输入电路1、控制电路2和输出电路3的反向扫描的栅极驱动电路为例来说明本实施例反向扫描的栅极驱动电路的工作原理。
为了使液晶显示器以反向扫描的方式驱动。且沿着反向扫描的栅极驱动电路以第N+1级阵列基板行驱动单元的下传信号SN(N+1)→第N级阵列基板行驱动单元的下传信号SN(N)→第N-1级阵列基板行驱动单元的下传信号SN(N-1)的信号走向实现对液晶显示面板的反向驱动方式。所以对输入电路1接入低电位信号。对输出电路3中的栅极接入第N+1级阵列基板行驱动单元的下传信号。对输出电路3中的开关管T41的源极接入直流高电位信号。并且使开关管T31的栅极与漏极均连接至第N级水平扫描线。这样信号就沿着直流高电位信号流向直流低电位信号。从而形成以第N+1级阵列基板行驱动单元的下传信号SN(N+1)→第N级阵列基板行驱动单元的下传信号SN(N)→第N-1级阵列基板行驱动单元的下传信号SN(N-1)的反向扫描方式。
基于上述分析，可见本实施例反向扫描的栅极驱动电路可带来如下有益效果：
本实施例的反向扫描的栅极驱动电路用于以反向扫描的方式显示对液晶显示面板的驱动，使液晶显示面板正常实现显示。本实施例能够解决现有技术的栅极驱动电路仅以某一特定方向进行扫描，并无法支持其它驱动模式，驱动模式单一，导致液晶显示器面板使用的自由度差的缺陷，使对液晶显示面板在反向扫描模式下使液晶显示器能够正常运行。
本实施例与现有电路结构相比，只需要更换输出电路的连接关系及改变输入信号和输出信号，使信号高电位流向低电位，从而实现对液晶显示面板的反向驱动。因此本实施例在为面板增加使用自由度的同时，达到了一种弹性驱动的目的。
实施例三：
本实施例中的液晶显示面板采用实施例一的方式实现或者采用实施例二的方式实现。利用实施例一的电路或者实施例二的电路均能够用于为液晶显示面板提供正向的驱动方式或者反向驱动的方式。两种驱动方式均作用于液晶显示面板，以使显示面板在正向和反向扫描模式下正常显示。
液晶显示面板的应用广泛，下面介绍下应用本实施例的液晶显示面板实现的电子产品。
液晶显示面板能够应用于平板电脑、手机、汽车操控面板、温度显示面板、监控器、可视电话等适用于有显示画面作用的电子设备中。可见，液晶显示面板的应用之广泛。
基于上述分析，可见本实施例液晶显示面板可带来如下有益效果：
本实施例的液晶显示面板具有正向和反向两种驱动方式。这两种驱动方式使得液晶显示面板在正向扫描模式和反向扫描模式下均能够正常运行，使得对液晶显示器面板的驱动不在单一，因而能提供弹性的驱动方式，增加了面板的使用自由度。
虽然在本文中参照了特定的实施方式来描述本发明，但是应该理解的是，这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是，可以对示例性的实施例进行许多修改，并且可以设计出其他的布置，只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是，可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是，结合单独实施例所描述的特征可以使用在其他所述实施例中。

Claims (20)

  1. 一种双向扫描的栅极驱动电路，包括级联的多个级阵列基板行驱动单元，
    所述每一级阵列基板行驱动单元对应驱动一级水平扫描线，
    阵列基板行驱动单元包括输入电路、控制电路和输出电路，
    所述输入电路，用于接收第N-1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收直流高电位信号，于反向扫描时，接收一路直流低电位信号，输出栅极驱动信号；
    所述控制电路，用于接收栅极驱动信号和时钟信号，输出第N级阵列基板行驱动单元的下传信号和驱动第N级水平扫描线；
    所述输出电路，用于接收栅极驱动信号和接收输入的第N+1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收一路直流低电压信号，于反向扫描时，接收直流高电位信号，实现对第N级水平扫描线的驱动。
  2. 根据权利要求1所述的一种双向扫描的栅极驱动电路，其中，所述控制电路还用于实现将第N级水平扫描线维持在关闭状态。
  3. 根据权利要求1所述的一种双向扫描的栅极驱动电路，其中，所述输出电路包括开关元件T41和开关元件T31，
    所述开关元件T41，用于接收栅极驱动信号和输入的第N+1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收一路直流低电位信号，于反向扫描时，接收直流高电位信号；
    所述开关元件T31，用于接收另一路直流低电位信号，驱动第N级水平扫描线。
  4. 根据权利要求3所述的一种双向扫描的栅极驱动电路，其中，
    第N+1级阵列基板行驱动单元的下传信号输入端连接开关元件T41的栅极，开关元件T41的漏极连接上拉控制电路的栅极驱动信号输出端，正向扫描时，一路直流低电压信号输入端连接开关元件T41的源极，反向扫描时，直流高电压信号输入端连接开关元件T41的源极，
    开关元件T31的源极连接另一路直流低电压信号输入端，开关元件T31的栅极连接开关元件T31的漏极作为驱动第N级水平扫描线的输入端。
  5. 根据权利要求1所述的一种双向扫描的栅极驱动电路，其中，输入电路包括开关元件T11，
    所述开关元件T11的栅极连接第N-1级阵列基板行驱动单元的下传信号输入端，开关元件T11的源极作为输入电路的栅极驱动信号输出端，正向扫描时，开关元件T11的漏极连接直流高电位信号输入端，反向扫描时，开关元件T11的漏极连接一路直流低电位信号输入端。
  6. 根据权利要求3所述的一种双向扫描的栅极驱动电路，其中，所述开关元件T41和开关元件T31均为金属氧化物半导体场效应晶体管。
  7. 根据权利要求4所述的一种双向扫描的栅极驱动电路，其中，所述开关元件T41和开关元件T31均为金属氧化物半导体场效应晶体管。
  8. 根据权利要求5所述的一种双向扫描的栅极驱动电路，其中，所述开关元件T11为金属氧化物半导体场效应晶体管。
  9. 液晶显示面板，包括双向扫描的栅极驱动电路；
    所述双向扫描的栅极驱动电路，包括级联的多个级阵列基板行驱动单元，
    所述每一级阵列基板行驱动单元对应驱动一级水平扫描线，
    阵列基板行驱动单元包括输入电路、控制电路和输出电路，
    所述输入电路，用于接收第N-1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收直流高电位信号，于反向扫描时，接收一路直流低电位信号，输出栅极驱动信号；
    所述控制电路，用于接收栅极驱动信号和时钟信号，输出第N级阵列基板行驱动单元的下传信号和驱动第N级水平扫描线；
    所述输出电路，用于接收栅极驱动信号和接收输入的第N+1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收一路直流低电压信号，于反向扫描时，接收直流高电位信号，实现对第N级水平扫描线的驱动。
  10. 根据权利要求9所述的液晶显示面板，其中，所述控制电路还用于实现将第N级水平扫描线维持在关闭状态。
  11. 根据权利要求9所述液晶显示面板，其中，所述输出电路包括开关元件T41和开关元件T31，
    所述开关元件T41，用于接收栅极驱动信号和输入的第N+1级阵列基板行驱动单元的下传信号，并于正向扫描时，接收一路直流低电位信号，于反向扫描时，接收直流高电位信号；
    所述开关元件T31，用于接收另一路直流低电位信号，驱动第N级水平扫描线。
  12. 根据权利要求11所述的液晶显示面板，其中，
    第N+1级阵列基板行驱动单元的下传信号输入端连接开关元件T41的栅极，开关元件T41的漏极连接上拉控制电路的栅极驱动信号输出端，正向扫描时，一路直流低电压信号输入端连接开关元件T41的源极，反向扫描时，直流高电压信号输入端连接开关元件T41的源极，
    开关元件T31的源极连接另一路直流低电压信号输入端，开关元件T31的栅极连接开关元件T31的漏极作为驱动第N级水平扫描线的输入端。
  13. 根据权利要求9所述的液晶显示面板，其中，输入电路包括开关元件T11，
    所述开关元件T11的栅极连接第N-1级阵列基板行驱动单元的下传信号输入端，开关元件T11的源极作为输入电路的栅极驱动信号输出端，正向扫描时，开关元件T11的漏极连接直流高电位信号输入端，反向扫描时，开关元件T11的漏极连接一路直流低电位信号输入端。
  14. 根据权利要求11所述的液晶显示面板，其中，所述开关元件T41和开关元件T31均为金属氧化物半导体场效应晶体管。
  15. 根据权利要求12所述的液晶显示面板，其中，所述开关元件T41和开关元件T31均为金属氧化物半导体场效应晶体管。
  16. 根据权利要求13所述的液晶显示面板，其中，所述开关元件T11为金属氧化物半导体场效应晶体管。
  17. 根据权利要求9所述的液晶显示面板，其中，所述的双向扫描的栅极驱动电路能够实现正向扫描模式和反向扫描模式；所述双向扫描的栅极驱动电路实现正向扫描模式时的信号走向为：第N-1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N+1级阵列基板行驱动单元的下传信号；所述双向扫描的栅极驱动电路实现反向扫描模式时的信号走向为：第N+1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N-1级阵列基板行驱动单元的下传信号。
  18. 根据权利要求10所述的液晶显示面板，其中，所述的双向扫描的栅极驱动电路能够实现正向扫描模式和反向扫描模式；所述双向扫描的栅极驱动电路实现正向扫描模式时的信号走向为：第N-1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N+1级阵列基板行驱动单元的下传信号；所述双向扫描的栅极驱动电路实现反向扫描模式时的信号走向为：第N+1级阵列基板行驱动单元的下传信号→第N 级阵列基板行驱动单元的下传信号→第N-1级阵列基板行驱动单元的下传信号。
  19. 根据权利要求11所述的液晶显示面板，其中，所述的双向扫描的栅极驱动电路能够实现正向扫描模式和反向扫描模式；所述双向扫描的栅极驱动电路实现正向扫描模式时的信号走向为：第N-1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N+1级阵列基板行驱动单元的下传信号；所述双向扫描的栅极驱动电路实现反向扫描模式时的信号走向为：第N+1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N-1级阵列基板行驱动单元的下传信号。
  20. 根据权利要求12所述的液晶显示面板，其中，所述的双向扫描的栅极驱动电路能够实现正向扫描模式和反向扫描模式；所述双向扫描的栅极驱动电路实现正向扫描模式时的信号走向为：第N-1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N+1级阵列基板行驱动单元的下传信号；所述双向扫描的栅极驱动电路实现反向扫描模式时的信号走向为：第N+1级阵列基板行驱动单元的下传信号→第N级阵列基板行驱动单元的下传信号→第N-1级阵列基板行驱动单元的下传信号。
PCT/CN2017/071626 2016-08-31 2017-01-19 一种双向扫描的栅极驱动电路、液晶显示面板 Ceased WO2018040490A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/500,150 US10699657B2 (en) 2016-08-31 2017-01-19 Bidirectional scanning gate drive circuit and liquid crystal display panel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610794038.XA CN106205539A (zh) 2016-08-31 2016-08-31 一种双向扫描的栅极驱动电路、液晶显示面板
CN201610794038.X 2016-08-31

Publications (1)

Publication Number Publication Date
WO2018040490A1 true WO2018040490A1 (zh) 2018-03-08

Family

ID=58086885

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/071626 Ceased WO2018040490A1 (zh) 2016-08-31 2017-01-19 一种双向扫描的栅极驱动电路、液晶显示面板

Country Status (3)

Country Link
US (1) US10699657B2 (zh)
CN (1) CN106205539A (zh)
WO (1) WO2018040490A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106205539A (zh) 2016-08-31 2016-12-07 深圳市华星光电技术有限公司 一种双向扫描的栅极驱动电路、液晶显示面板
CN106710546B (zh) * 2016-12-27 2019-05-07 武汉华星光电技术有限公司 栅极驱动电路及显示装置
CN107123405A (zh) 2017-06-01 2017-09-01 深圳市华星光电技术有限公司 双向移位寄存器单元、双向移位寄存器及显示面板
CN111754925A (zh) * 2020-07-13 2020-10-09 武汉华星光电技术有限公司 Goa电路以及显示面板

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080158204A1 (en) * 2006-12-29 2008-07-03 Cheertek Inc Gate driver structure of TFT-LCD display
CN203300196U (zh) * 2013-04-01 2013-11-20 合肥京东方光电科技有限公司 双向移位寄存器单元、双向移位寄存器及液晶面板
CN104269151A (zh) * 2014-10-22 2015-01-07 友达光电股份有限公司 一种可实现信号双向传输的栅极驱动电路
CN104318908A (zh) * 2014-10-22 2015-01-28 友达光电股份有限公司 一种可增强电路驱动能力的栅极驱动电路
CN104376824A (zh) * 2014-11-13 2015-02-25 深圳市华星光电技术有限公司 用于液晶显示的goa电路及液晶显示装置
CN104537991A (zh) * 2014-12-30 2015-04-22 深圳市华星光电技术有限公司 正反向扫描的栅极驱动电路
CN106205539A (zh) * 2016-08-31 2016-12-07 深圳市华星光电技术有限公司 一种双向扫描的栅极驱动电路、液晶显示面板

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4342045A (en) * 1980-04-28 1982-07-27 Advanced Micro Devices, Inc. Input protection device for integrated circuits
US4734752A (en) * 1985-09-27 1988-03-29 Advanced Micro Devices, Inc. Electrostatic discharge protection device for CMOS integrated circuit outputs
JP2570610B2 (ja) * 1993-12-24 1997-01-08 日本電気株式会社 半導体装置
JP4912023B2 (ja) * 2006-04-25 2012-04-04 三菱電機株式会社 シフトレジスタ回路
KR101296645B1 (ko) * 2007-03-12 2013-08-14 엘지디스플레이 주식회사 쉬프트 레지스터
US9373414B2 (en) * 2009-09-10 2016-06-21 Beijing Boe Optoelectronics Technology Co., Ltd. Shift register unit and gate drive device for liquid crystal display
JP5766499B2 (ja) * 2011-05-02 2015-08-19 株式会社ジャパンディスプレイ ゲート信号線駆動回路及び表示装置
TWI633556B (zh) * 2011-05-13 2018-08-21 Semiconductor Energy Laboratory Co., Ltd. 半導體裝置
CN103021318B (zh) * 2012-12-14 2016-02-17 京东方科技集团股份有限公司 移位寄存器及其工作方法、栅极驱动装置、显示装置
CN106104664B (zh) * 2014-03-10 2019-05-03 乐金显示有限公司 显示装置及其驱动方法
CN104299590B (zh) * 2014-10-30 2016-08-24 京东方科技集团股份有限公司 一种移位寄存器、其驱动方法、栅极驱动电路及显示装置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080158204A1 (en) * 2006-12-29 2008-07-03 Cheertek Inc Gate driver structure of TFT-LCD display
CN203300196U (zh) * 2013-04-01 2013-11-20 合肥京东方光电科技有限公司 双向移位寄存器单元、双向移位寄存器及液晶面板
CN104269151A (zh) * 2014-10-22 2015-01-07 友达光电股份有限公司 一种可实现信号双向传输的栅极驱动电路
CN104318908A (zh) * 2014-10-22 2015-01-28 友达光电股份有限公司 一种可增强电路驱动能力的栅极驱动电路
CN104376824A (zh) * 2014-11-13 2015-02-25 深圳市华星光电技术有限公司 用于液晶显示的goa电路及液晶显示装置
CN104537991A (zh) * 2014-12-30 2015-04-22 深圳市华星光电技术有限公司 正反向扫描的栅极驱动电路
CN106205539A (zh) * 2016-08-31 2016-12-07 深圳市华星光电技术有限公司 一种双向扫描的栅极驱动电路、液晶显示面板

Also Published As

Publication number Publication date
CN106205539A (zh) 2016-12-07
US20180218700A1 (en) 2018-08-02
US10699657B2 (en) 2020-06-30

Similar Documents

Publication Publication Date Title
WO2018040491A1 (zh) 一种双边阵列基板行驱动电路、液晶显示面板、驱动方法
US10127875B2 (en) Shift register unit, related gate driver and display apparatus, and method for driving the same
CN101326587B (zh) 移位寄存器电路以及显示驱动装置
US10043473B2 (en) GOA circuit
US9875709B2 (en) GOA circuit for LTPS-TFT
JP6691310B2 (ja) クロック信号の負荷を低減させるｃｍｏｓ ｇｏａ回路
WO2017121133A1 (zh) 移位寄存器单元、栅极驱动电路、显示面板及显示装置
WO2017107285A1 (zh) 用于窄边框液晶显示面板的goa电路
WO2017117851A1 (zh) Goa电路
WO2019080572A1 (zh) 移位寄存单元、其驱动方法、栅极驱动电路及显示装置
JP2011232730A (ja) ゲート駆動回路及びそれを有する表示装置
TW201301765A (zh) 移位暫存器
JPH1090650A (ja) マトリクス型画像表示装置
WO2019227807A1 (zh) Goa电路
US11257409B1 (en) Gate on array circuit
US10629150B2 (en) Amoled pixel driving circuit and pixel driving method
CN104934071B (zh) 一种移位寄存器、栅极驱动电路及显示装置
JP6555842B2 (ja) Ｇｏａ回路及びその駆動方法、液晶ディスプレイ
WO2020024409A1 (zh) 显示面板goa电路
CN106710564A (zh) 移位寄存器单元、移位寄存器电路及其驱动方法、显示面板
WO2018129786A1 (zh) Cmos goa电路
WO2018040490A1 (zh) 一种双向扫描的栅极驱动电路、液晶显示面板
WO2016173105A1 (zh) Goa电路修复方法
WO2019100424A1 (zh) 一种goa电路
WO2019033492A1 (zh) Goa电路及液晶显示装置

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15500150

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17844801

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17844801

Country of ref document: EP

Kind code of ref document: A1