WO2018019100A1 - 一种三相半桥llc谐振变换器的控制方法及装置 - Google Patents

一种三相半桥llc谐振变换器的控制方法及装置 Download PDF

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Publication number
WO2018019100A1
WO2018019100A1 PCT/CN2017/091812 CN2017091812W WO2018019100A1 WO 2018019100 A1 WO2018019100 A1 WO 2018019100A1 CN 2017091812 W CN2017091812 W CN 2017091812W WO 2018019100 A1 WO2018019100 A1 WO 2018019100A1
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Prior art keywords
bridge
phase half
resonant converter
llc resonant
gain value
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PCT/CN2017/091812
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English (en)
French (fr)
Inventor
王明金
鲍胜华
郭虎
李丹
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中兴通讯股份有限公司
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Publication of WO2018019100A1 publication Critical patent/WO2018019100A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/338—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement
    • H02M3/3381—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement using a single commutation path
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/338—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement
    • H02M3/3385—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the invention relates to the technical field of DC power conversion, in particular to a control method and device for a three-phase half-bridge LLC resonant converter.
  • the core part of the charging station is a charging pile, and the core unit of the charging pile is a charging pile rectifier (hereinafter simply referred to as a rectifier).
  • the role of the charging pile rectifier is to convert the alternating current into a direct current that can charge the electric vehicle.
  • the output voltage range of the charging pile rectifier is generally 200Vdc ⁇ 500Vdc or 200Vdc ⁇ 750Vdc.
  • the LLC resonant converter has been widely used in DC-DC converters due to its advantages of zero voltage switching (ZVS).
  • ZVS zero voltage switching
  • the three-phase half-bridge LLC is a new topology in the past two years. Its main transformer primary resonance circuit can improve the utilization of resonant current by star connection, and the secondary side can reduce the switching frequency by superimposing current. The current is pulsating, so that the number of electrolytic capacitors on the secondary side can be reduced. In view of this, the three-phase half-bridge LLC is particularly suitable for high-power charging pile rectifiers.
  • LLC variable frequency control
  • the higher the frequency the smaller the gain.
  • the switching frequency of the driver chip and the MOS transistor cannot be unrestrictedly high. Therefore, in addition to the variable frequency control, other control schemes are needed.
  • the common method at low gain is to adjust the control.
  • the switching transistor may not fully achieve zero voltage turn-on due to the small resonant current, and in some cases, it will be completely hard-on.
  • One of the two problems caused by hard turn-on is that hard turn-on will bring switching losses, and this loss will increase as the switching frequency rises.
  • the other is that hard switching will cause voltage spikes.
  • the hard-opening loss is large and may even cause thermal damage to the switch.
  • the range of variation of the LLC gain is due to the wide range of its output voltage. It will also be wide and the range of hard opening will be wide. Therefore, for a charging pile rectifier based on a three-phase half-bridge LLC topology, how to operate stably and reliably at low-voltage and light-load output is a difficult problem.
  • the object of the embodiments of the present invention is to provide a control method and device for a three-phase half-bridge LLC resonant converter, which is to solve the problem that the existing three-phase half-bridge LLC resonant converter is difficult to realize zero-voltage turn-on of the switch when the gain is low. It is easy to cause a problem that the hard turn-on is caused to cause a large increase in switching loss.
  • an embodiment of the present invention provides a method for controlling a three-phase half-bridge LLC resonant converter, including:
  • the current three-phase half-bridge LLC resonant converter is in the three-phase half-bridge operation mode, controlling the three-phase half-bridge LLC resonant converter by three-phase The half bridge working mode is switched to a full bridge working mode, wherein the three-phase half-bridge LLC resonant converter comprises three sets of metal oxide semiconductor field effect MOS transistors, and in the three-phase half-bridge working mode, the three The three sets of MOS transistors of the phase half bridge LLC resonant converter are all in an on state, and in the full bridge mode of operation, at least one set of MOS transistors is in an off state.
  • the step of performing a loop calculation on the sampling result to obtain a loop calculation result includes:
  • the error information value is loop-calculated by the loop compensation network, and the loop calculation result is output.
  • the three-phase half-bridge LLC resonant converter is controlled to switch from a three-phase half-bridge operating mode to a full-bridge operating mode according to the PWM signal.
  • the step of outputting the pulse width modulation PWM signal that controls the three-phase half-bridge LLC resonant converter in the full-bridge operation mode includes:
  • control method further includes:
  • the loop calculation result is less than or equal to the second preset gain value, controlling the three-phase half-bridge LLC resonant converter to be in a full bridge according to the relationship between the loop calculation result and the third preset gain value.
  • a group of MOS transistors of the three-phase half-bridge LLC resonant converter are in an off state, and in the off driving mode, three groups of the three-phase half-bridge LLC resonant converter The MOS tubes are all in the off state.
  • the three-phase half bridge is controlled according to the relationship between the loop calculation result and the third preset gain value.
  • the steps of the LLC resonant converter in the full bridge variable frequency operating mode, the full bridge fixed frequency phase shifting mode or the off driving mode include:
  • an embodiment of the present invention further provides a control device for a three-phase half-bridge LLC resonant converter, including:
  • a sampling module configured to sample an output voltage and an output current of the three-phase half-bridge LLC resonant converter to obtain a sampling result
  • a loop calculation module configured to perform loop calculation on the sampling result to obtain a loop calculation result
  • a first processing module configured to control the three-phase half-bridge if the loop calculation result is less than a first preset gain value, and the current three-phase half-bridge LLC resonant converter is in a three-phase half-bridge operation mode
  • the LLC resonant converter is switched from a three-phase half-bridge operating mode to a full-bridge operating mode, wherein the three-phase half-bridge LLC resonant converter includes three sets of metal oxide semiconductor field-effect MOS transistors, and the three-phase half-bridge In the working mode, the three sets of MOS transistors of the three-phase half-bridge LLC resonant converter are all in an on state, and in the full bridge operating mode, at least one set of MOS transistors is in an off state.
  • the loop calculation module includes:
  • the calibration processing sub-module is configured to perform calibration processing on the sampling result, and compare the sampling result after the calibration processing with a preset reference value to obtain an error information value;
  • the loop calculation submodule is configured to perform loop calculation on the error information value through a loop compensation network, and output a loop calculation result.
  • the first processing module includes:
  • the output submodule is configured to output a pulse width modulation PWM signal that controls the three-phase half-bridge LLC resonant converter in a full-bridge operation mode if the loop calculation result is less than the first preset gain value;
  • the control submodule is configured to control the three-phase half-bridge LLC resonant converter to switch from a three-phase half-bridge operating mode to a full-bridge operating mode according to the PWM signal.
  • the output submodule includes:
  • a first output unit configured to output a PWM register value of the three-phase half-bridge LLC resonant converter in a full-bridge operation mode if the loop calculation result is less than the first preset gain value
  • the second output unit is configured to output a corresponding PWM signal according to the PWM register value.
  • the control device of the three-phase half-bridge LLC resonant converter further includes:
  • a second processing module configured to: if the loop calculation result is greater than the second preset gain value, control the three-phase half-bridge LLC resonant converter to switch from a full-bridge operation mode to a three-phase half-bridge operation mode, where The second preset gain value is greater than the first preset gain value;
  • a third processing module configured to control the three-phase half bridge according to a relationship between the loop calculation result and a third preset gain value, if the loop calculation result is less than or equal to the second preset gain value
  • the LLC resonant converter is in a full bridge variable frequency operating mode, a full bridge fixed frequency phase shifting mode or an off driving mode, wherein the third preset gain value is less than the second preset gain value and is in full bridge frequency conversion a working mode and the full bridge fixed frequency phase shifting mode, wherein a set of MOS transistors of the three-phase half-bridge LLC resonant converter are in an off state, and in the off driving mode, the three-phase half bridge
  • the three sets of MOS transistors of the LLC resonant converter are all in the off state.
  • the third processing module includes:
  • the first processing submodule is configured to control the three-phase half-bridge LLC resonant converter to be in a full-bridge frequency conversion mode if the loop calculation result is greater than the third preset gain value;
  • the second processing submodule is configured to control the three-phase half-bridge LLC resonant converter to be fully bridged if the loop calculation result is less than the third preset gain value and greater than the fourth preset gain value Frequency shift phase mode of operation;
  • the third processing submodule is configured to control the three-phase half-bridge LLC resonant converter to be in a driving operation if the loop calculation result is less than the third preset gain value and less than the fourth preset gain value mode.
  • a storage medium is also provided.
  • the storage medium is arranged to store program code for performing the following steps:
  • the three-phase half-bridge LLC resonant converter includes three sets of metal oxide semiconductor field effect MOS transistors, and in the three-phase half-bridge operation mode, three sets of MOS transistors of the three-phase half-bridge LLC resonant converter All are in an on state, and at least one set of MOS transistors is in an off state in the full bridge operation mode.
  • the storage medium is further arranged to store program code for performing the following steps:
  • the storage medium is further arranged to store program code for performing the following steps:
  • the three-phase half-bridge LLC resonant converter is controlled to switch from a three-phase half-bridge operating mode to a full-bridge operating mode according to the PWM signal.
  • the storage medium is further arranged to store program code for performing the following steps:
  • the storage medium is further arranged to store program code for performing the following steps:
  • controlling the three-phase half-bridge LLC resonant converter is controlled by After the step of switching the three-phase half-bridge operation mode to the full-bridge operation mode, if the loop calculation result is greater than the second preset gain value, controlling the three-phase half-bridge LLC resonant converter to be switched from the full-bridge operation mode to a three-phase half-bridge operation mode, wherein the second preset gain value is greater than the first preset gain value; if the loop calculation result is less than or equal to the second preset gain value, according to the The relationship between the loop calculation result and the third preset gain value controls the three-phase half-bridge LLC resonant converter to be in a full-bridge variable frequency operation mode, a full-bridge fixed-frequency phase shifting operation mode, or an off-drive operating mode, wherein the The third preset gain value is smaller than the second preset gain value, and
  • the storage medium is further arranged to store program code for performing the following steps:
  • the steps of the full bridge variable frequency working mode, the full bridge fixed frequency phase shifting mode or the off driving mode include:
  • the loop calculation result is greater than the third preset gain value, controlling the three-phase half-bridge LLC resonant converter to be in a full-bridge variable frequency operation mode; if the loop calculation result is less than the third preset a gain value, and greater than a fourth preset gain value, controlling the three-phase half-bridge LLC resonant converter to be in a full-bridge fixed-frequency phase shifting mode; if the loop calculation result is less than the third preset gain value And less than the fourth preset gain value, controlling the three-phase half-bridge LLC resonant converter to be in the off-drive operating mode.
  • the above technical solution of the embodiment of the present invention samples the output voltage and the output current of the three-phase half-bridge LLC resonant converter to obtain a sampling result, and performs loop calculation on the sampling result to obtain a loop calculation result;
  • the loop calculation result is smaller than the first preset gain value, and the current three-phase half-bridge LLC resonant converter is in the three-phase half-bridge working mode, and the three-phase half-bridge LLC resonant converter is controlled to be operated by the three-phase half-bridge
  • the mode is switched to a full bridge operation mode, wherein the three-phase half-bridge LLC resonant converter comprises three sets of MOS tubes, and in the three-phase half-bridge operation mode, three of the three-phase half-bridge LLC resonant converters
  • the group MOS tubes are all in an on state.
  • At least one group of MOS tubes is in an off state, so that the three-phase half-bridge LLC resonant converter can realize zero voltage of the MOS tube when the gain is low.
  • the opening has greatly expanded the range of zero-voltage turn-on of the MOS transistor in the three-phase half-bridge LLC resonant converter, and reduced the switching loss.
  • FIG. 1 is a schematic structural view of a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention
  • FIG. 2 is a first working flowchart of a method for controlling a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention
  • FIG. 3 is a second working flowchart of a method for controlling a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention
  • FIG. 4 is a 6-channel PWM timing diagram of a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention
  • FIG. 5 is a flowchart of a wave control according to an embodiment of the present invention.
  • FIG. 6 is a 6-channel PWM timing diagram of a three-phase half-bridge LLC resonant converter operating in a full-bridge mode according to an embodiment of the present invention
  • FIG. 7 is a three-phase half-bridge working mode of a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention. Schematic diagram of switching hysteresis between the mode and the full bridge mode of operation;
  • FIG. 8 is a circuit structural diagram of a DC-DC portion of a charging pile rectifier based on a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention
  • FIG. 9 is a first structural block diagram of a control device for a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention.
  • FIG. 10 is a second structural block diagram of a control apparatus for a three-phase half-bridge LLC resonant converter according to an embodiment of the present invention.
  • the embodiment of the invention provides a charging pile rectifier and a control method, which solves the problem that the existing three-phase half-bridge LLC resonant converter is difficult to realize zero voltage opening of the switching tube when the gain is low, and it is easy to generate hard opening and thus lead to switching loss. A greatly increased problem.
  • the three-phase half-bridge LLC resonant converter includes: a group of metal oxide semiconductor field effect MOS transistors connected in parallel; a first capacitor C1, a first inductor L1, a first magnetizing inductor TX1 and a second capacitor C2, a second inductor L2, a second magnetizing inductor TX2, and a third capacitor C3,
  • the three-inductor L3 and the third magnetizing inductance TX3 three-way series resonant circuit form a three-phase half-bridge LLC resonant circuit through a star connection; the first rectifying diode D1, the second rectifying diode D2, the third rectifying diode D3, and the fourth rectifying diode
  • the first group of MOS transistors includes: a first metal oxide semiconductor field effect transistor Q1 and a second metal oxide semiconductor field effect transistor Q2; and the second group of MOS transistors includes: a third metal oxide semiconductor field effect transistor Q3, The fourth metal oxide semiconductor field effect transistor Q4; the third group of MOS transistors includes: a fifth metal oxide semiconductor field effect transistor Q5 and a sixth metal oxide semiconductor field effect transistor Q6.
  • Q1 is connected in series with Q2, the drain of Q2 is connected to the anode of the DC voltage source V1, the source of Q2 is connected to the drain of Q1, and the source of Q1 is connected to the cathode of the DC voltage source V1;
  • Q3 is connected in series with Q4. Specifically, the drain of Q4 is connected to the anode of the DC voltage source V1, the source of Q4 is connected to the drain of Q3, and the source of Q3 is connected to the cathode of the DC voltage source V1.
  • Q5 is connected in series with Q6. Specifically, the drain of Q6 is connected to the anode of DC voltage source V1, the source of Q6 is connected to the drain of Q5, and the source of Q5 is connected to the cathode of DC voltage source V1.
  • one end of C1 is connected to the source of Q2, the other end of C1 is connected to one end of L1, and the other end of L1 is connected to the main transformer P1 of TX1;
  • One end of C2 is connected to the source of Q4, the other end of C2 is connected to one end of L2, and the other end of L2 is connected to main change side P1 of TX2;
  • One end of C3 is connected to the source of Q6, the other end of C3 is connected to one end of L3, and the other end of L3 is connected to the main transformer P1 of TX3.
  • D1 is connected in series with D2. Specifically, the positive electrode of D1 is respectively connected to the negative electrode of D2 and the main transformer secondary side S1 of TX1;
  • D3 is connected in series with D4. Specifically, the positive pole of D3 is respectively connected to the negative pole of D4 and the main transformer secondary side S1 of TX2;
  • D3 is connected in series with D4. Specifically, the positive electrode of D3 is connected to the negative electrode of D4 and the main transformer secondary side S1 of TX3, respectively.
  • an embodiment of the present invention provides a control method for a three-phase half-bridge LLC resonant converter. As shown in FIG. 2, the control method includes:
  • Step 11 Sampling the output voltage and output current of the three-phase half-bridge LLC resonant converter to obtain sampling results.
  • the output voltage and the output current of the three-phase half-bridge LLC resonant converter are sampled by a voltage sampling circuit and a current sampling circuit to obtain the sampling result.
  • Step 12 Perform loop calculation on the sampling result to obtain a loop calculation result.
  • the sampling result is subjected to calibration processing, and the sampling result of the calibration processing is performed. If the comparison with the preset reference value is performed, the error information value is obtained; the error compensation value is loop-calculated by the loop compensation network, and the loop calculation result is output.
  • Step 13 If the loop calculation result is less than the first preset gain value, and the current three-phase half-bridge LLC resonant converter is in the three-phase half-bridge working mode, control the three-phase half-bridge LLC resonant converter Switching from a three-phase half-bridge operation mode to a full-bridge operation mode, wherein the three-phase half-bridge LLC resonant converter includes three sets of metal oxide semiconductor field effect MOS transistors, and in the three-phase half-bridge operation mode, The three sets of MOS transistors of the three-phase half-bridge LLC resonant converter are all in an on state, and in the full bridge mode of operation, at least one set of MOS transistors are in an off state.
  • the step of outputting the pulse width modulation PWM signal that controls the three-phase half-bridge LLC resonant converter in the full-bridge operation mode includes: if the ring The circuit calculation result is less than the first preset gain value, and the output controls the PWM register value of the three-phase half-bridge LLC resonant converter in the full-bridge operation mode; according to the PWM register value, the corresponding PWM signal is output.
  • the control method of the three-phase half-bridge LLC resonant converter samples the output voltage and the output current of the three-phase half-bridge LLC resonant converter to obtain a sampling result, and performs loop calculation on the sampling result to obtain a loop calculation result.
  • the three-phase half-bridge LLC resonant converter includes three sets of MOS transistors, and in the three-phase half-bridge operating mode, the three sets of MOS transistors of the three-phase half-bridge LLC resonant converter are all in an on state, In the full-bridge operation mode, at least one group of MOS transistors is in an off state, so that the three-phase half-bridge LLC resonant converter can realize zero voltage turn-on of the MOS transistor when the gain is low, and the three-phase half-bridge LLC is greatly expanded.
  • the range of zero voltage turn-on of the MOS transistor in the resonant converter reduces switching losses.
  • the three-phase half-bridge LLC resonant converter of the embodiment of the present invention may further include:
  • Step 14 If the loop calculation result is greater than the second preset gain value, control the three-phase half-bridge LLC resonant converter to switch from a full-bridge operation mode to a three-phase half-bridge operation mode, wherein the second The preset gain value is greater than the first preset gain value;
  • Step 15 If the loop calculation result is less than or equal to the second preset gain value, control the three-phase half-bridge LLC resonant converter according to the relationship between the loop calculation result and the third preset gain value.
  • the full bridge frequency conversion working mode the full bridge fixed frequency phase shifting working mode or the off driving working mode, wherein the third preset gain value is smaller than the second preset gain value, and the full bridge frequency conversion working mode and the In the full bridge fixed frequency phase shifting mode, a set of MOS transistors of the three-phase half-bridge LLC resonant converter are in an off state, and in the off driving mode, the three-phase half-bridge LLC resonant converter The three sets of MOS tubes are all in the off state.
  • the three-phase half-bridge LLC resonant converter when the loop calculation result is lower than the first preset gain value, the three-phase half-bridge LLC resonant converter is controlled to be switched from the three-phase half-bridge operation mode to Full-bridge frequency conversion mode, and according to the relationship between the loop calculation result and the third preset gain value, the three-phase half-bridge LLC resonant converter is controlled in a full-bridge frequency conversion mode, a full-bridge fixed-frequency phase shift mode or a closed drive
  • the working mode effectively prevents the hard opening of the switch tube and reduces the switching loss; when the loop calculation result is greater than the second preset gain value, the three-phase half-bridge LLC resonant converter is switched from the full bridge working mode to the three-phase half
  • the bridge working mode effectively ensures the stable operation of the three-phase half-bridge LLC resonant converter.
  • FIG. 4 it is a six-way PWM wave timing diagram of a three-phase half-bridge LLC according to an embodiment of the present invention.
  • PWM3 corresponds to PWM1
  • PWM5 corresponds to PWM3, and phase shift is 120 degrees respectively
  • PWM4 and PWM3 are respectively 180 degrees complementary.
  • an output voltage and an output current of a three-phase half-bridge LLC resonant converter are sampled to obtain a sampling result; a loop calculation is performed on the sampling result to obtain a loop calculation result;
  • the calculation result of the road is subjected to wave control. Specifically, as shown in FIG. 5, it is judged whether the PI value is greater than V0. If the PI value is greater than V0, the three-phase half-bridge LLC circuit operates in the three-phase half-bridge frequency conversion mode, and is calculated according to the PI value. Get the new cycle register value of 6 PWM waves. When the PI value is less than V0, according to the PWM mode flag of the last algorithm cycle, the flag selection circuit operates in the current algorithm cycle.
  • the PI value is less than the V0 circuit working mode as follows: to determine whether the Flag value is 0, the Flag value is 0, and the PI value is greater than V1 (here, V1 is less than V0), the control circuit operates in the three-phase half-bridge fixed-frequency widening mode. At this time, the frequency of the 6-way PWM wave will be fixed at the maximum frequency Fmax, and the duty ratio of the 6-channel PWM is calculated according to the PI value; when the Flag value is 0, and the PI value is less than V1, the PWM will be generated at this time.
  • the mode flag Flag is switched to 1, and in the next algorithm cycle, the circuit will operate in full bridge mode.
  • the circuit When the PI value is less than V0 and the Flag value is 1, it is judged whether the PI value is greater than V2. If the PI value is greater than V2, the PWM mode flag Flag is switched to 0. At this time, the circuit will switch back to three in the next algorithm cycle. Phase half bridge mode. When the Flag value is 1, and the PI value is less than V2 and greater than V3, the circuit works in the full-bridge frequency conversion mode. At this time, the duty ratio of the 4-way PWM is fixed, the phase shift angle is zero, and the 4-channel PWM is calculated according to the PI value.
  • Period register value when the Flag value is 1, and the PI value is less than V3 and greater than V4, then the frequency of the 4-way PWM will be fixed at the maximum frequency Fmax, and the full-bridge lag arm will be calculated according to the PI value (implementation of the present invention)
  • PWM5, PWM6 phase shift register value when the Flag value is 1, and the PI value is less than V4, the circuit will turn off all 6 PWM drivers, and the output blocks the full-bridge PWM until the next When the PI value is greater than V4 at a time. Where V4 is less than V3 and V3 is less than V2.
  • the three-phase half-bridge LLC circuit switches hysteresis in the three-phase half-bridge and full-bridge mode as shown in Fig. 7.
  • the circuit works in the three-phase half-bridge mode, that is, when the Flag value is 0, if the PI value is less than V1, then the circuit switches to the full-bridge mode; when the circuit operates in the full-bridge mode, that is, the Flag value is 1, if When the PI value is greater than V2, the circuit is switched to the three-phase half-bridge mode.
  • the value of V2 is greater than the value of V1.
  • the LLC gains of the circuits before and after switching are not much different.
  • the operating frequency F1 is less than Fmax after switching from the three-phase half-bridge mode to the full-bridge mode.
  • the circuit when the loop calculation output PI value is less than a specific threshold value V1, the circuit is switched from a three-phase half-bridge mode in which six MOS transistors are turned on to a full-bridge mode in which four MOS transistors are turned on.
  • the loop calculation output PI value is greater than a certain threshold V2
  • the circuit is switched from a full-bridge MOS that is turned on by four MOS transistors to a three-phase half-bridge mode in which six MOS transistors are turned on.
  • the control method can greatly expand the range in which the MOS transistor realizes zero voltage turn-on in the three-phase half-bridge LLC resonant converter, and the switching loss is greatly reduced even if the circuit is operated in a hard-on state.
  • the DC-DC part of the charging pile rectifier based on the three-phase half-bridge LLC resonant converter adopts two three-phase half-bridge LLC resonant converters, and the structure of the PFC is corrected according to the power factor of the charging stage rectifier front stage, DC.
  • the DC section can be divided into a +BUS section and a -BUS section, each section being a three-phase half-bridge LLC resonant converter, as shown in FIG.
  • the charging pile rectifier requires 12 PWMs (PWM1 ⁇ PWM12) to drive 12 MOS transistors (Q1 ⁇ Q12).
  • PWM7 ⁇ PWM12 have a fixed angle phase shift with respect to PWM1 ⁇ 6.
  • the phase shift angle can be based on actual conditions. to make sure.
  • the phase shift angle in the embodiment of the present invention is selected to be 120 degrees.
  • the +BUS and -BUS two-part wave control flow of the charging pile rectifier is basically similar.
  • the two BUS circuits work in the three-phase half-bridge mode, that is, when the Flag value is 0, if the PI value is less than V1, then the working mode of the two BUS circuits is simultaneously switched to the full-bridge mode; when the two BUS circuits work In the full bridge mode, that is, when the Flag value is 1, if the PI value is greater than V2, the operating modes of the two BUS circuits are simultaneously switched to the three-phase half-bridge mode.
  • the control method of the three-phase half-bridge LLC resonant converter of the embodiment of the invention when the three-phase half-bridge LLC resonant converter operates at low voltage and light load, and needs to reduce the LLC gain, the working mode of the circuit is switched by the three-phase half-bridge mode To the full-bridge mode, the three-phase half-bridge LLC resonant converter can realize zero-voltage turn-on of the MOS transistor when the gain is low, and greatly expand the range of zero-voltage turn-on of the MOS transistor in the three-phase half-bridge LLC resonant converter. , reducing switching losses.
  • switching from three-phase half-bridge mode to full-bridge mode does not turn off PWM3 and PWM4, but PWM1, PWM2 or PWM5, PWM6; for example, before switching from three-phase half-bridge mode to full-bridge mode, LLC is not working.
  • the fixed-frequency widening mode it works in the variable frequency mode or the variable frequency widening mode; for example, after switching, the LLC does not work in the variable frequency mode, but operates in the widening mode or the phase shifting mode and the like.
  • the operation mode is switched from the three-phase half-bridge mode to the full-bridge mode, which is within the protection scope of the present invention.
  • An embodiment of the present invention further provides a control device for a three-phase half-bridge LLC resonant converter, as shown in FIG. 9, comprising:
  • the sampling module 91 is configured to sample the output voltage and the output current of the three-phase half-bridge LLC resonant converter to obtain a sampling result
  • the loop calculation module 92 is configured to perform loop calculation on the sampling result to obtain a loop calculation result.
  • the first processing module 93 is configured to control the three-phase half if the loop calculation result is less than the first preset gain value, and the current three-phase half-bridge LLC resonant converter is in the three-phase half-bridge working mode.
  • the bridge LLC resonant converter is switched from a three-phase half-bridge operating mode to a full-bridge operating mode, wherein the three-phase half-bridge LLC resonant converter comprises three sets of metal oxide semiconductor field effect MOS transistors, and in the three-phase half
  • the three-phase half-bridge LLC resonant converter in bridge operating mode The three sets of MOS tubes are all in an on state, and in the full bridge mode of operation, at least one group of MOS tubes is in an off state.
  • the control device of the three-phase half-bridge LLC resonant converter of the embodiment of the present invention includes:
  • the calibration processing sub-module 921 is configured to perform calibration processing on the sampling result, and compare the sampling result of the calibration processing with a preset reference value to obtain an error information value;
  • the loop calculation sub-module 922 is configured to perform loop calculation on the error information value through a loop compensation network, and output a loop calculation result.
  • the control device of the three-phase half-bridge LLC resonant converter of the embodiment of the present invention includes:
  • the output sub-module 931 is configured to output a pulse width modulated PWM signal that controls the three-phase half-bridge LLC resonant converter in a full-bridge operation mode if the loop calculation result is less than the first preset gain value;
  • the control sub-module 932 is configured to control the three-phase half-bridge LLC resonant converter to be switched from a three-phase half-bridge operating mode to a full-bridge operating mode according to the PWM signal.
  • the output sub-module 931 includes:
  • the first output unit 9311 is configured to output a PWM register value that controls the three-phase half-bridge LLC resonant converter to be in a full-bridge operation mode if the loop calculation result is less than the first preset gain value;
  • the second output unit 9312 is configured to output a corresponding PWM signal according to the PWM register value.
  • the second processing module 94 is configured to control the three-phase half-bridge LLC resonant converter to be switched from a full-bridge operation mode to a three-phase half-bridge operation mode, if the loop calculation result is greater than a second preset gain value, where The second preset gain value is greater than the first preset gain value;
  • the third processing module 95 is configured to control the three-phase half according to the relationship between the loop calculation result and the third preset gain value, if the loop calculation result is less than or equal to the second preset gain value
  • the bridge LLC resonant converter is in a full bridge variable frequency operation mode, a full bridge fixed frequency phase shifting mode or an off driving mode, wherein the third preset gain value is smaller than the second preset gain value, and is at the full bridge a frequency conversion mode of operation and the full bridge fixed frequency phase shift mode of operation, wherein a set of MOS transistors of the three-phase half-bridge LLC resonant converter are in an off state, and in the off-drive operating mode, the three-phase half
  • the three sets of MOS transistors of the bridge LLC resonant converter are all in an off state.
  • the third processing module 95 includes:
  • the first processing sub-module 951 is configured to control the three-phase half-bridge LLC resonant converter to be in a full-bridge frequency conversion mode if the loop calculation result is greater than the third preset gain value;
  • the second processing sub-module 952 is configured to control the three-phase half-bridge LLC resonant converter to be in a full bridge if the loop calculation result is less than the third preset gain value and greater than the fourth preset gain value.
  • the third processing sub-module 953 is configured to control the three-phase half-bridge LLC resonant converter to be off if the loop calculation result is less than the third preset gain value and less than the fourth preset gain value. Operating mode.
  • the control device of the three-phase half-bridge LLC resonant converter of the embodiment of the present invention may be specifically a digital signal processor DSP.
  • the DSP may specifically include: an analog-to-digital conversion ADC sampling module, sampling calibration, and error.
  • the calculation module, the loop calculation module, the wave control calculation module, and the PWM module may specifically include: an analog-to-digital conversion ADC sampling module, sampling calibration, and error.
  • the analog-to-digital conversion ADC sampling module is used to sample the output voltage, the output current, and other analog quantities; in the DSP, the software performs loop calculation and converts the loop calculation result into a PWM signal; DSP PWM The PWM signal from the pin is amplified to control the turn-on and turn-off of the switch.
  • the sampling module may specifically include the sampling module 91, and the sampling calibration and error calculation module may specifically include the scaling processing sub-module 921, and the loop computing module may specifically include the loop computing sub-module 922, the wave control
  • the calculation module can have The first processing module 93, the second processing module 94, and the third processing module 95 are included, and the PWM module may specifically include an output submodule 931.
  • the device and the DSP are the devices and the DSP corresponding to the foregoing method embodiments. All the implementation manners in the foregoing method embodiments are applicable to the device and the DSP embodiment, and the same technical effects can be achieved.
  • the control method and device for the three-phase half-bridge LLC resonant converter realizes mutual conversion between the three-phase half-bridge LLC and the full-bridge LLC by turning on or off the MOS tube on one of the phase bridge arms.
  • the three-phase half-bridge LLC can work stably over a wide range of output voltages and loads, and can achieve zero voltage turn-on in most of the output range; in addition, when the circuit operates at low voltage Light load, that is, when the LLC gain is extremely low, when the circuit works in the LLC full-bridge phase shift mode, the full-arm super forearm may appear hard-switching, but the lag arm can realize ZVS, so its hard-switching loss is relative to the three-phase.
  • Half-bridge LLC is greatly reduced, only one-third of it, which in turn greatly reduces switching losses.
  • the above technical solution of the embodiment of the present invention samples the output voltage and the output current of the three-phase half-bridge LLC resonant converter to obtain a sampling result, and performs loop calculation on the sampling result to obtain a loop calculation result;
  • the loop calculation result is smaller than the first preset gain value, and the current three-phase half-bridge LLC resonant converter is in the three-phase half-bridge working mode, and the three-phase half-bridge LLC resonant converter is controlled to be operated by the three-phase half-bridge
  • the mode is switched to a full bridge operation mode, wherein the three-phase half-bridge LLC resonant converter comprises three sets of MOS tubes, and in the three-phase half-bridge operation mode, three of the three-phase half-bridge LLC resonant converters
  • the group MOS tubes are all in an on state.
  • At least one group of MOS tubes is in an off state, so that the three-phase half-bridge LLC resonant converter can realize zero voltage of the MOS tube when the gain is low.

Abstract

一种三相半桥LLC谐振变换器的控制方法及装置，解决现有三相半桥LLC谐振变换器在增益较低时，难以实现开关管的零电压开通，导致开关损耗增加的问题。该方法包括：对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果（11）；对采样结果进行环路计算，得到环路计算结果（12）；若环路计算结果小于第一预设增益值，且当前三相半桥LLC谐振变换器处于三相半桥工作模式，则控制三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，三相半桥LLC谐振变换器包括三组MOS管，在三相半桥工作模式时，三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在全桥工作模式时，至少一组MOS管处于关断状态（13）。

Description

一种三相半桥LLC谐振变换器的控制方法及装置 技术领域
本发明涉及直流电源变换的技术领域，特别是指一种三相半桥LLC谐振变换器的控制方法及装置。
背景技术
由于能源危机的持续加剧以及人们对于环境保护问题越来越重视，电动汽车在市场上逐渐得到普及。为了给电动汽车充电，世界各地都在新建充电站。充电站的核心部分是充电桩，而充电桩的核心单元是充电桩整流器(后面简称为整流器)。充电桩整流器的作用是将交流电转换为能够给电动汽车充电的直流电。根据适用于不同类型的电动汽车，充电桩整流器的输出电压范围一般为200Vdc～500Vdc或者200Vdc～750Vdc。
LLC谐振变换器由于具有开关管零电压开通(Zero Voltage Switch，ZVS)的优点，在直流-直流变换器中得到了广泛的应用。三相半桥LLC是近两年来新出来的一种拓扑结构，它的主变原边谐振电路通过星形连接方式可以提高谐振电流的利用率，副边通过电流的叠加作用可以减少开关频率的电流脉动，从而可以达到降低副边电解电容数量的目的。鉴于此，三相半桥LLC特别适用于大功率的充电桩整流器。
LLC与之前拓扑不同之处是它是变频控制，频率越高增益越小。然而，受硬件限制，驱动芯片和MOS管的开关频率不可能无限制的高。因此除变频控制外，还需要其它控制方案。目前，对于三相半桥LLC来说，在低增益时常用的方法是调宽控制。然而，当增益较小时，特别是工作在调宽模式时，由于谐振电流较小，开关管可能无法完全实现零电压开通，某些情况下会完全硬开通。硬开通带来的两个问题一个是硬开通会带来开关损耗，并且这个损耗会随着开关频率的上升而加大，另一个是硬开关会造成电压尖峰。硬开通的损耗很大，甚至会造成开关管的热损坏。对于充电桩整流器而言，由于其输出电压的范围很宽，因此LLC增益的变化范围 也会很宽，硬开通的范围也会很宽。因此，对基于三相半桥LLC拓扑的充电桩整流器来言，在低压轻载输出时如何稳定可靠地工作是一个难点问题。
发明内容
本发明实施例的目的在于提供一种三相半桥LLC谐振变换器的控制方法及装置，用以解决现有三相半桥LLC谐振变换器在增益较低时，难以实现开关管的零电压开通，容易产生硬开通进而导致开关损耗大大增加的问题。
为了实现上述目的，本发明实施例提供了一种三相半桥LLC谐振变换器的控制方法，包括：
对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果；
对所述采样结果进行环路计算，得到环路计算结果；
若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组金属氧化物半导体场效应MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态。
其中，所述对所述采样结果进行环路计算，得到环路计算结果的步骤包括：
对所述采样结果进行定标处理，并将经过定标处理的采样结果与预设参考值进行比较，得出误差信息值；
通过环路补偿网络对所述误差信息值进行环路计算，输出环路计算结果。
其中，若所述环路计算结果小于第一预设增益值，则控制所述三相半 桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式的步骤包括：
若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号；
根据所述PWM信号控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式。
其中，所述若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号的步骤包括：
若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的PWM寄存器值；
根据所述PWM寄存器值，输出相应的PWM信号。
其中，所述若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式的步骤之后，所述控制方法还包括：
若所述环路计算结果大于第二预设增益值，则控制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，其中，所述第二预设增益值大于所述第一预设增益值；
若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，其中，所述第三预设增益值小于所述第二预设增益值，且在全桥变频工作模式和所述全桥定频移相工作模式时，所述三相半桥LLC谐振变换器的一组MOS管处于关断状态，在所述关驱动工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于关断状态。
其中，所述若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥 LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式的步骤包括：
若所述环路计算结果大于所述第三预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥变频工作模式；
若所述环路计算结果小于所述第三预设增益值，且大于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥定频移相工作模式；
若所述环路计算结果小于所述第三预设增益值，且小于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于关驱动工作模式。
为实现上述目的，本发明的实施例还提供了一种三相半桥LLC谐振变换器的控制装置，包括：
采样模块，设置为对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果；
环路计算模块，设置为对所述采样结果进行环路计算，得到环路计算结果；
第一处理模块，设置为若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组金属氧化物半导体场效应MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态。
其中，所述环路计算模块包括：
定标处理子模块，设置为对所述采样结果进行定标处理，并将经过定标处理的采样结果与预设参考值进行比较，得出误差信息值；
环路计算子模块，设置为通过环路补偿网络对所述误差信息值进行环路计算，输出环路计算结果。
其中，所述第一处理模块包括：
输出子模块，设置为若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号；
控制子模块，设置为根据所述PWM信号控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式。
其中，所述输出子模块包括：
第一输出单元，设置为若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的PWM寄存器值；
第二输出单元，设置为根据所述PWM寄存器值，输出相应的PWM信号。
其中，上述三相半桥LLC谐振变换器的控制装置，还包括：
第二处理模块，设置为若所述环路计算结果大于第二预设增益值，则控制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，其中，所述第二预设增益值大于所述第一预设增益值；
第三处理模块，设置为若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，其中，所述第三预设增益值小于所述第二预设增益值，且在全桥变频工作模式和所述全桥定频移相工作模式时，所述三相半桥LLC谐振变换器的一组MOS管处于关断状态，在所述关驱动工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于关断状态。
其中，所述第三处理模块包括：
第一处理子模块，设置为若所述环路计算结果大于所述第三预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥变频工作模式；
第二处理子模块，设置为若所述环路计算结果小于所述第三预设增益值，且大于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥定频移相工作模式；
第三处理子模块，设置为若所述环路计算结果小于所述第三预设增益值，且小于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于关驱动工作模式。
根据本发明的又一个实施例，还提供了一种存储介质。该存储介质设置为存储用于执行以下步骤的程序代码：
对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果；对所述采样结果进行环路计算，得到环路计算结果；若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组金属氧化物半导体场效应MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态。
可选地，存储介质还设置为存储用于执行以下步骤的程序代码：
对所述采样结果进行定标处理，并将经过定标处理的采样结果与预设参考值进行比较，得出误差信息值；通过环路补偿网络对所述误差信息值进行环路计算，输出环路计算结果。
可选地，存储介质还设置为存储用于执行以下步骤的程序代码：
若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号；
根据所述PWM信号控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式。
可选地，存储介质还设置为存储用于执行以下步骤的程序代码：
若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的PWM寄存器值；根据所述PWM寄存器值，输出相应的PWM信号。
可选地，存储介质还设置为存储用于执行以下步骤的程序代码：
所述若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式的步骤之后，若所述环路计算结果大于第二预设增益值，则控制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，其中，所述第二预设增益值大于所述第一预设增益值；若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，其中，所述第三预设增益值小于所述第二预设增益值，且在全桥变频工作模式和所述全桥定频移相工作模式时，所述三相半桥LLC谐振变换器的一组MOS管处于关断状态，在所述关驱动工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于关断状态。
可选地，存储介质还设置为存储用于执行以下步骤的程序代码：
所述若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式的步骤包括：
若所述环路计算结果大于所述第三预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥变频工作模式；若所述环路计算结果小于所述第三预设增益值，且大于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥定频移相工作模式；若所述环路计算结果小于所述第三预设增益值，且小于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于关驱动工作模式。
本发明实施例具有以下有益效果：
本发明实施例的上述技术方案，对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果，对所述采样结果进行环路计算，得到环路计算结果；若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态，使得三相半桥LLC谐振变换器在增益较低时也能实现MOS管的零电压开通，大幅度地扩大了三相半桥LLC谐振变换器中MOS管零电压开通的范围，降低了开关损耗。
附图说明
此处所说明的附图用来提供对本发明的进一步理解，构成本申请的一部分，本发明的示意性实施例及其说明用于解释本发明，并不构成对本发明的不当限定。在附图中：
图1为本发明实施例中三相半桥LLC谐振变换器的结构示意图；
图2为本发明实施例的三相半桥LLC谐振变换器的控制方法的第一工作流程图；
图3为本发明实施例的三相半桥LLC谐振变换器的控制方法的第二工作流程图；
图4为本发明实施例的三相半桥LLC谐振变换器的6路PWM时序图；
图5为本发明实施例的发波控制流程图；
图6为本发明实施例的三相半桥LLC谐振变换器工作在全桥模式时的6路PWM时序图；
图7为本发明实施例的三相半桥LLC谐振变换器的三相半桥工作模 式与全桥工作模式的切换滞环示意图；
图8为本发明实施例中基于三相半桥LLC谐振变换器的充电桩整流器直流-直流部分的电路结构图；
图9为本发明实施例的三相半桥LLC谐振变换器的控制装置的第一结构框图；
图10为本发明实施例的三相半桥LLC谐振变换器的控制装置的第二结构框图。
具体实施方式
为使本发明要解决的技术问题、技术方案和优点更加清楚，下面将结合具体实施例及附图进行详细描述。
本发明的实施例提供了一种充电桩整流器及控制方法，解决了现有三相半桥LLC谐振变换器在增益较低时，难以实现开关管的零电压开通，容易产生硬开通进而导致开关损耗大大增加的问题。
为使本领域的技术人员能够更好地理解本发明的技术方案，首先说明一下三相半桥LLC谐振变换器的结构，如图1所示，该三相半桥LLC谐振变换器包括：三组并联的金属氧化物半导体场效应MOS管；第一电容C1、第一电感L1、第一励磁电感TX1和第二电容C2、第二电感L2、第二励磁电感TX2以及第三电容C3、第三电感L3、第三励磁电感TX3三路串联谐振电路通过星形连接组成三相半桥LLC的谐振电路；第一整流二极管D1、第二整流二极管D2、第三整流二极管D3、第四整流二极管D4、第五整流二极管D5和第六整流二极管D6构成的三相整流电路。
其中，第一组MOS管包括：第一金属氧化物半导体场效应管Q1、第二金属氧化物半导体场效应管Q2；第二组MOS管包括：第三金属氧化物半导体场效应管Q3、第四金属氧化物半导体场效应管Q4；第三组MOS管包括：第五金属氧化物半导体场效应管Q5和第六金属氧化物半导体场效应管Q6。
进一步地，Q1与Q2串联，Q2的漏极与直流电压源V1的正极连接、Q2的源极与Q1的漏极连接，Q1的源极与直流电压源V1的负极连接；
Q3与Q4串联，具体的，Q4的漏极与直流电压源V1的正极连接、Q4的源极与Q3的漏极连接，Q3的源极与直流电压源V1的负极连接；
Q5与Q6串联，具体的，Q6的漏极与直流电压源V1的正极连接、Q6的源极与Q5的漏极连接，Q5的源极与直流电压源V1的负极连接。
进一步地，C1的一端与Q2的源极连接，C1的另一端与L1的一端连接，L1的另一端与TX1的主变原边P1连接；
C2的一端与Q4的源极连接，C2的另一端与L2的一端连接，L2的另一端与TX2的主变原边P1连接；
C3的一端与Q6的源极连接，C3的另一端与L3的一端连接，L3的另一端与TX3的主变原边P1连接。
进一步地，D1与D2串联，具体的，D1的正极分别与D2的负极和TX1的主变副边S1连接；
D3与D4串联，具体的，D3的正极分别与D4的负极和TX2的主变副边S1连接；
D3与D4串联，具体的，D3的正极分别与D4的负极和TX3的主变副边S1连接。
基于上述三相半桥LLC谐振变换器，本发明的实施例提供了一种三相半桥LLC谐振变换器的控制方法，如图2所示，该控制方法包括：
步骤11：对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果。
具体的，通过电压采样电路及电流采样电路对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到上述采样结果。
步骤12：对所述采样结果进行环路计算，得到环路计算结果。
具体的，对所述采样结果进行定标处理，并将经过定标处理的采样结 果与预设参考值进行比较，得出误差信息值；通过环路补偿网络对所述误差信息值进行环路计算，输出环路计算结果。
步骤13：若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组金属氧化物半导体场效应MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态。
这里，若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号；根据所述PWM信号控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式。
进一步地，若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号的步骤包括：若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的PWM寄存器值；根据所述PWM寄存器值，输出相应的PWM信号。
本发明实施例的三相半桥LLC谐振变换器的控制方法，对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果，对所述采样结果进行环路计算，得到环路计算结果；若所述环路计算结果小于第一预设增益值，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态，使得三相半桥LLC谐振变换器在增益较低时也能实现MOS管的零电压开通，大幅度地扩大了三相半桥LLC谐振变换器中MOS管零电压开通的范围，降低了开关损耗。
进一步地，上述步骤13之后，如图3所示，本发明实施例的三相半桥LLC谐振变换器还可包括：
步骤14：若所述环路计算结果大于第二预设增益值，则控制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，其中，所述第二预设增益值大于所述第一预设增益值；
步骤15：若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，其中，所述第三预设增益值小于所述第二预设增益值，且在全桥变频工作模式和所述全桥定频移相工作模式时，所述三相半桥LLC谐振变换器的一组MOS管处于关断状态，在所述关驱动工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于关断状态。
具体的，若所述环路计算结果大于所述第三预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥变频工作模式；
若所述环路计算结果小于所述第三预设增益值，且大于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥定频移相工作模式；
若所述环路计算结果小于所述第三预设增益值，且小于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于关驱动工作模式。
本发明实施例的三相半桥LLC谐振变换器的控制方法，在环路计算结果低于第一预设增益值时，控制三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥变频工作模式，并根据环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，有效防止开关管的硬开通，减少开关损耗；在环路计算结果大于第二预设增益值时，制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，有效保证了三相半桥LLC谐振变换器的稳定工作。
下面具体说明本发明实施例的实现过程。
如图4所示，为本发明实施例的三相半桥LLC的6路PWM波时序图。6路PWM中，PWM3对应PWM1、PWM5对应PWM3分别移相120度；PWM2与PWM1、PWM4与PWM3、PWM6与PWM5分别成180度互补。
在本发明的具体实施例中，对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果；对所述采样结果进行环路计算，得到环路计算结果；接着根据环路计算结果进行发波控制，具体的，如图5所示，判断PI值是否大于V0，若PI值大于V0，则三相半桥LLC电路工作在三相半桥变频模式，根据PI值计算得到6路PWM波新的周期寄存器值。当PI值小于V0时，根据上个算法周期的PWM模式标志Flag选择电路在当前算法周期的工作模式，当Flag值为0时，说明电路工作在三相半桥模式；当Flag值为1时，说明电路工作在全桥模式；全桥模式的PWM时序图如图6所示，PWM3和PWM4一直为低电平，相应的MOS也不会被驱动。
PI值小于V0电路工作模式具体如下：判断Flag值是否为0，Flag值为0，并且PI值大于V1(这里，V1小于V0)时，控制电路工作在三相半桥定频调宽工作模式，此时6路PWM波的频率会固定在最大频率Fmax处，根据PI值计算6路PWM的占空比大小；当Flag值为0时，并且PI值小于V1时，此时，会将PWM模式标志Flag切换为1，在下个算法周期，电路会工作在全桥模式。
当PI值小于V0，并且Flag值为1时，判断PI值是否大于V2，如果PI值大于V2时，会将PWM模式标志Flag切换为0，这时，在下个算法周期，电路会切换回三相半桥模式。当Flag值为1时，并且PI值小于V2并且大于V3时，电路工作在全桥变频模式，这时4路PWM的占空比固定，移相角为零，会根据PI值计算4路PWM周期寄存器值；当Flag值为1时，并且PI值小于V3并且大于V4时，这时4路PWM的频率会固定在最大频率Fmax处，会根据PI值来计算全桥滞后臂(本发明实施例中指PWM5、PWM6)移相寄存器值；当Flag值为1时，并且PI值小于V4时，电路会将6路PWM的驱动全部关掉，输出封锁全桥PWM，直到下 一时刻PI值大于V4时。其中，V4小于V3，V3小于V2。
三相半桥LLC电路在三相半桥与全桥模式切换滞环如图7所示。当电路工作在三相半桥模式时，即Flag值为0时，若PI值小于V1，这时电路切换为全桥模式；当电路工作在全桥模式时，即Flag值为1时，若PI值大于V2时，电路切换为三相半桥模式。一般地，V2值要大于V1值。另外，为保证切换前后电路工作正常，切换前后电路的LLC增益相差不大。通常，由三相半桥模式切换为全桥模式后工作频率F1要小于Fmax。
本发明的具体实施例中，当环路计算输出量PI值小于一个特定阈值V1时，电路会由6个MOS管导通的三相半桥模式切换为4个MOS管导通的全桥模式；当环路计算输出量PI值大于一个特定阈值V2时，电路会由4个MOS管导通的全桥MOS切换为6个MOS管导通的三相半桥模式。该控制方法可以大幅度地扩大三相半桥LLC谐振变换器中MOS管实现零电压开通的范围，且即使电路是工作在硬开通状态，开关损耗也大大减小。
需要说明的是，基于三相半桥LLC谐振变换器的充电桩整流器的直流-直流部分采用两个上述三相半桥LLC谐振变换器，根据充电桩整流器前级功率因素校正PFC的结构，直流-直流部分可以分为+BUS部分和-BUS部分，每部分为一个三相半桥LLC谐振变换器，如图8所示。充电桩整流器需要12路PWM(PWM1～PWM12)来驱动12路MOS管(Q1～Q12)，其中，PWM7～PWM12相对于PWM1～6存在一个固定角度的移相，此移相角可以根据实际情况来确定。优选的，本发明实施例中的移相角选为120度。
充电桩整流器的+BUS和-BUS两部分发波控制流程基本相似。当两路BUS电路工作在三相半桥模式时，即Flag值为0时，如果PI值小于V1时，这时两路BUS电路的工作模式同时切换为全桥模式；当两路BUS电路工作在全桥模式时，即Flag值为1时，如果PI值大于V2时，两路BUS电路的工作模式同时切换为三相半桥模式。
由上可知，三相半桥LLC谐振器由三相半桥模式切换为全桥模式时 关掉的是对应120度移相角的PWM3和PWM4，而-BUS部分对应+BUS部分有一个固定的120度移相角，那么-BUS由三相半桥模式切换为全桥模式时，此时关掉PWM7和PWM8最容易实现。
本发明实施例的三相半桥LLC谐振变换器的控制方法，当三相半桥LLC谐振变换器工作在低压轻载，需要降低LLC增益时，将电路的工作模式由三相半桥模式切换到全桥模式，使得三相半桥LLC谐振变换器在增益较低时也能实现MOS管的零电压开通，大幅度地扩大了三相半桥LLC谐振变换器中MOS管零电压开通的范围，降低了开关损耗。
另外，需要说明的是，上述仅仅是本发明实施例的优选实施例，并不用以限制本发明，其他相关内容也在本发明专利的保护范围之内。如，由三相半桥模式切换到全桥模式，不是关掉PWM3和PWM4，而是PWM1、PWM2或者PWM5、PWM6；又比如，由三相半桥模式切换到全桥模式前，LLC不是工作在定频调宽模式，而是工作在变频模式或者变频调宽模式；还比如，切换后，LLC不是工作在变频模式，而是工作在调宽模式或者移相模式等等。凡是涉及到三相半桥LLC电路在工作中，工作模式由三相半桥模式切换到全桥模式，都在本发明的保护范围之内。
本发明的实施例还提供了一种三相半桥LLC谐振变换器的控制装置，如图9所示，包括：
采样模块91，设置为对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果；
环路计算模块92，设置为对所述采样结果进行环路计算，得到环路计算结果；
第一处理模块93，设置为若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组金属氧化物半导体场效应MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器 的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态。
本发明实施例的三相半桥LLC谐振变换器的控制装置，所述环路计算模块92包括：
定标处理子模块921，设置为对所述采样结果进行定标处理，并将经过定标处理的采样结果与预设参考值进行比较，得出误差信息值；
环路计算子模块922，设置为通过环路补偿网络对所述误差信息值进行环路计算，输出环路计算结果。
本发明实施例的三相半桥LLC谐振变换器的控制装置，所述第一处理模块93包括：
输出子模块931，设置为若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号；
控制子模块932，设置为根据所述PWM信号控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式。
本发明实施例的三相半桥LLC谐振变换器的控制装置，所述输出子模块931包括：
第一输出单元9311，设置为若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的PWM寄存器值；
第二输出单元9312，设置为根据所述PWM寄存器值，输出相应的PWM信号。
本发明实施例的三相半桥LLC谐振变换器的控制装置，还包括：
第二处理模块94，设置为若所述环路计算结果大于第二预设增益值，则控制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，其中，所述第二预设增益值大于所述第一预设增益值；
第三处理模块95，设置为若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，其中，所述第三预设增益值小于所述第二预设增益值，且在全桥变频工作模式和所述全桥定频移相工作模式时，所述三相半桥LLC谐振变换器的一组MOS管处于关断状态，在所述关驱动工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于关断状态。
本发明实施例的三相半桥LLC谐振变换器的控制装置，所述第三处理模块95包括：
第一处理子模块951，设置为若所述环路计算结果大于所述第三预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥变频工作模式；
第二处理子模块952，设置为若所述环路计算结果小于所述第三预设增益值，且大于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥定频移相工作模式；
第三处理子模块953，设置为若所述环路计算结果小于所述第三预设增益值，且小于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于关驱动工作模式。
本发明实施例的三相半桥LLC谐振变换器的控制装置可具体为数字信号处理器DSP，如图10所示，该DSP可具体包括：模拟-数字转换ADC采样模块、采样定标及误差计算模块、环路计算模块、发波控制计算模块及PWM模块。
其中，模拟-数字转换ADC采样模块用于将输出电压、输出电流及其它的模拟量采样进去；在DSP内部，软件进行环路计算，并将环路计算的结果转换为PWM信号；DSP的PWM引脚发出的PWM信号经过放大后用来控制开关管的开通关断。该采样模块可具体包括上述采样模块91，该采样定标及误差计算模块可具体包括上述定标处理子模块921，该环路计算模块可具体包括上述环路计算子模块922，该发波控制计算模块可具 体包括上述第一处理模块93、第二处理模块94及第三处理模块95，该PWM模块可具体包括输出子模块931。
需要说明的是，该装置及DSP是与上述方法实施例对应的装置和DSP，上述方法实施例中所有实现方式均适用于该装置及DSP的实施例中，也能达到相同的技术效果。
本发明实施例的三相半桥LLC谐振变换器的控制方法及装置，通过开通或者关掉其中一相桥臂上的MOS管，实现三相半桥LLC与全桥LLC互相转换。采用该控制装置和控制方法，三相半桥LLC能够在很宽的输出电压和负载范围内稳定工作，并且在大部分的输出范围内都能够实现零电压开通；另外，当电路工作在低压很轻载，即LLC增益极低时，这时电路工作在LLC全桥移相模式，全桥的超前臂可能会出现硬开关，但滞后臂能够实现ZVS，因此其硬开关的损耗相对于三相半桥LLC大大降低，只有其三分之一，进而很大程度上降低了开关损耗。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。
工业实用性
本发明实施例的上述技术方案，对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果，对所述采样结果进行环路计算，得到环路计算结果；若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态，使得三相半桥LLC谐振变换器在增益较低时也能实现MOS管的零电压开通，大幅度地扩大了三相半桥LLC谐振变换器中MOS管零电压开通的范围，降低了开关损 耗。

Claims (12)

  1. 一种三相半桥LLC谐振变换器的控制方法，包括：
    对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果；
    对所述采样结果进行环路计算，得到环路计算结果；
    若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组金属氧化物半导体场效应MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态。
  2. 根据权利要求1所述的三相半桥LLC谐振变换器的控制方法，其中，所述对所述采样结果进行环路计算，得到环路计算结果的步骤包括：
    对所述采样结果进行定标处理，并将经过定标处理的采样结果与预设参考值进行比较，得出误差信息值；
    通过环路补偿网络对所述误差信息值进行环路计算，输出环路计算结果。
  3. 根据权利要求1所述的三相半桥LLC谐振变换器的控制方法，其中，若所述环路计算结果小于第一预设增益值，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式的步骤包括：
    若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号；
    根据所述PWM信号控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式。
  4. 根据权利要求3所述的三相半桥LLC谐振变换器的控制方法，其中，所述若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号的步骤包括：
    若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的PWM寄存器值；
    根据所述PWM寄存器值，输出相应的PWM信号。
  5. 根据权利要求1所述的三相半桥LLC谐振变换器的控制方法，其中，所述若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式的步骤之后，所述控制方法还包括：
    若所述环路计算结果大于第二预设增益值，则控制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，其中，所述第二预设增益值大于所述第一预设增益值；
    若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，其中，所述第三预设增益值小于所述第二预设增益值，且在全桥变频工作模式和所述全桥定频移相工作模式时，所述三相半桥LLC谐振变换器的一组MOS管处于关断状态，在所述关驱动工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于关断状态。
  6. 根据权利要求5所述的三相半桥LLC谐振变换器的控制方法，其中，所述若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式的步骤包括：
    若所述环路计算结果大于所述第三预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥变频工作模式；
    若所述环路计算结果小于所述第三预设增益值，且大于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥定频移相工作模式；
    若所述环路计算结果小于所述第三预设增益值，且小于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于关驱动工作模式。
  7. 一种三相半桥LLC谐振变换器的控制装置，包括：
    采样模块，设置为对三相半桥LLC谐振变换器的输出电压和输出电流进行采样，得到采样结果；
    环路计算模块，设置为对所述采样结果进行环路计算，得到环路计算结果；
    第一处理模块，设置为若所述环路计算结果小于第一预设增益值，且当前所述三相半桥LLC谐振变换器处于三相半桥工作模式，则控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式，其中，所述三相半桥LLC谐振变换器包括三组金属氧化物半导体场效应MOS管，且在所述三相半桥工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于导通状态，在所述全桥工作模式时，至少一组MOS管处于关断状态。
  8. 根据权利要求7所述的三相半桥LLC谐振变换器的控制装置，其中，所述环路计算模块包括：
    定标处理子模块，设置为对所述采样结果进行定标处理，并将经过定标处理的采样结果与预设参考值进行比较，得出误差信息值；
    环路计算子模块，设置为通过环路补偿网络对所述误差信息值进行环路计算，输出环路计算结果。
  9. 根据权利要求7所述的三相半桥LLC谐振变换器的控制装置，其中，所述第一处理模块包括：
    输出子模块，设置为若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的脉冲宽度调制PWM信号；
    控制子模块，设置为根据所述PWM信号控制所述三相半桥LLC谐振变换器由三相半桥工作模式切换为全桥工作模式。
  10. 根据权利要求9所述的三相半桥LLC谐振变换器的控制装置，其中，所述输出子模块包括：
    第一输出单元，设置为若所述环路计算结果小于第一预设增益值，则输出控制所述三相半桥LLC谐振变换器处于全桥工作模式的PWM寄存器值；
    第二输出单元，设置为根据所述PWM寄存器值，输出相应的PWM信号。
  11. 根据权利要求7所述的三相半桥LLC谐振变换器的控制装置，其中，还包括：
    第二处理模块，设置为若所述环路计算结果大于第二预设增益值， 则控制所述三相半桥LLC谐振变换器由全桥工作模式切换为三相半桥工作模式，其中，所述第二预设增益值大于所述第一预设增益值；
    第三处理模块，设置为若所述环路计算结果小于或者等于所述第二预设增益值，则根据所述环路计算结果与第三预设增益值的关系控制所述三相半桥LLC谐振变换器处于全桥变频工作模式、全桥定频移相工作模式或关驱动工作模式，其中，所述第三预设增益值小于所述第二预设增益值，且在全桥变频工作模式和所述全桥定频移相工作模式时，所述三相半桥LLC谐振变换器的一组MOS管处于关断状态，在所述关驱动工作模式时，所述三相半桥LLC谐振变换器的三组MOS管均处于关断状态。
  12. 根据权利要求11所述的三相半桥LLC谐振变换器的控制装置，其中，所述第三处理模块包括：
    第一处理子模块，设置为若所述环路计算结果大于所述第三预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥变频工作模式；
    第二处理子模块，设置为若所述环路计算结果小于所述第三预设增益值，且大于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于全桥定频移相工作模式；
    第三处理子模块，设置为若所述环路计算结果小于所述第三预设增益值，且小于第四预设增益值，则控制所述三相半桥LLC谐振变换器处于关驱动工作模式。
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