WO2017206264A1 - 一种tft基板以及液晶显示面板 - Google Patents

一种tft基板以及液晶显示面板 Download PDF

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Publication number
WO2017206264A1
WO2017206264A1 PCT/CN2016/088497 CN2016088497W WO2017206264A1 WO 2017206264 A1 WO2017206264 A1 WO 2017206264A1 CN 2016088497 W CN2016088497 W CN 2016088497W WO 2017206264 A1 WO2017206264 A1 WO 2017206264A1
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Prior art keywords
electrode
common electrode
tft substrate
liquid crystal
substrate
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English (en)
French (fr)
Inventor
郝思坤
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/117,199 priority Critical patent/US10353249B2/en
Publication of WO2017206264A1 publication Critical patent/WO2017206264A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • the present invention relates to the field of liquid crystal display technologies, and in particular, to a TFT substrate and a liquid crystal display panel.
  • the liquid crystal display has become a display terminal for mobile communication devices, PCs, TVs, etc. due to its high display quality, low price, and convenient carrying.
  • Currently used liquid crystal displays usually have an upper and lower substrate and an intermediate liquid crystal layer, and the substrate is composed of glass and electrodes. If the upper and lower substrates have electrodes, a vertical electric field mode display such as TN (Twist) can be formed. Nematic) mode, VA (Vertical Alignment) mode, and MVA (Multidomain Vertical) developed to solve narrow viewing angles Alignment).
  • the electrode is only located on one side of the substrate, forming a display of a transverse electric field mode, such as IPS (In-plane) Switching mode, FFS (Fringe Field Switching) mode, etc.
  • IPS In-plane
  • FFS Frringe Field Switching
  • the VA mode thin film transistor display is adopted for large-size panels such as liquid crystal TVs with its high opening, high resolution, wide viewing angle, etc., but in small-sized high-resolution panels, pixel liquid crystals designed using conventional methods are inefficient, VA mode. Not universally adopted.
  • FIG. 1 is a pixel structure of an existing VA mode display
  • FIG. 2 is a cross-sectional view taken along line AA of FIG. 1.
  • the main working principle is as shown in FIG. 1 and FIG. 2: the upper substrate is a common electrode substrate, and the lower substrate is a substrate on which pixel electrodes are distributed.
  • a pixel electrode pattern is formed on the ITO substrate, and a curved fringe electric field is generated at the edge of the pixel by the electrode pattern which is inconsistent between the upper and lower substrates, and the orientation of the liquid crystal molecules in the cell is controlled by the fringe electric field to achieve the display purpose.
  • this technology omits the manufacture of expensive raised structures and has high contrast and viewing angle symmetry.
  • the cross-shaped ITO common electrode existing between the pixel electrode and the pixel electrode is patterned by the ITO layer of the same layer. Limited by the process, the pixel electrode and the common electrode and the common electrode itself must maintain a certain width, the presence of the width causes the pixel to produce a dark line, reducing the liquid crystal efficiency and transmittance;
  • the same layer of ITO has the pixel electrode and the common electrode in the same layer, and the two electrodes are easily short-circuited, resulting in poor display;
  • the technical problem to be solved by the present invention is to provide a TFT substrate and a liquid crystal display panel, which can enhance the control force of the electric field on the liquid crystal, reduce the width of the dark line in the pixel, improve the liquid crystal efficiency, increase the transmittance, and do not need to increase the via hole to avoid Short circuit.
  • the present invention provides a TFT substrate, wherein the TFT substrate includes a substrate and a first common electrode and a pixel electrode laminated on the substrate and insulated from each other, wherein the pixel electrode overlaps with the first common electrode
  • the position is provided with a hollow structure having a shape corresponding to the first common electrode
  • the first common electrode includes a first electrode branch and a second electrode branch disposed at an intersection, and an angle between the first electrode branch and the second electrode branch intersecting each other is between 0 degrees and 180 degrees;
  • the width of the hollow structure is less than or equal to the width of the first common electrode.
  • the present invention provides a TFT substrate including a substrate and a first common electrode and a pixel electrode laminated on the substrate and insulated from each other, wherein the pixel electrode overlaps with the first common electrode
  • the position is provided with a hollow structure having a shape corresponding to the first common electrode.
  • the first common electrode includes a first electrode branch and a second electrode branch which are disposed at an intersection, and an angle between the first electrode branch and the second electrode branch intersecting each other is between 0 degrees and 180 degrees.
  • the angle between the first electrode branch and the second electrode branch intersecting each other is 90 degrees.
  • the width of the hollow structure is less than or equal to the width of the first common electrode.
  • first common electrode and the pixel electrode are used to provide a fringe electric field required for vertical alignment.
  • the TFT substrate further includes scan lines and data lines which are disposed on the substrate and are spaced apart from each other and insulated, wherein the first common electrode is disposed in the same layer as one of the scan lines and the data lines.
  • the first common electrode and one of the scan line and the data line are formed by the same metal layer through the same patterning process.
  • the TFT substrate further includes a thin film transistor formed at an intersection of the scan line and the data line, the thin film transistor including a gate, a gate insulating layer, a semiconductor layer, a source, a drain, and an interlayer insulating layer, a gate and a scan line Electrically connected, the gate insulating layer is disposed above the gate of the thin film transistor, the semiconductor layer is disposed above the gate insulating layer, and the data line and the source and the drain are disposed at two sides of the semiconductor layer and electrically connected to the semiconductor layer respectively.
  • the source is electrically connected to the data line.
  • the interlayer insulating layer is disposed above the data line and the source and the drain and is provided with a via hole.
  • the pixel electrode is disposed on the interlayer insulating layer and electrically connected to the drain through the via.
  • the present invention further provides a liquid crystal display panel comprising a TFT substrate, the TFT substrate comprising a substrate and a first common electrode and a pixel electrode laminated on the substrate and insulated from each other, wherein the pixel electrode A position overlapping the first common electrode is provided with a hollow structure having a shape corresponding to the first common electrode.
  • the first common electrode includes a first electrode branch and a second electrode branch which are disposed at an intersection, and an angle between the first electrode branch and the second electrode branch intersecting each other is between 0 degrees and 180 degrees.
  • the angle between the first electrode branch and the second electrode branch intersecting each other is 90 degrees.
  • the width of the hollow structure is less than or equal to the width of the first common electrode.
  • first common electrode and the pixel electrode are used to provide a fringe electric field required for vertical alignment.
  • the TFT substrate further includes scan lines and data lines which are disposed on the substrate and which are spaced apart from each other and are insulated from each other, wherein the first common electrode is disposed in the same layer as one of the scan lines and the data lines.
  • the first common electrode and one of the scan line and the data line are formed by the same metal layer through the same patterning process.
  • the TFT substrate further includes a thin film transistor formed at an intersection of the scan line and the data line, the thin film transistor including a gate, a gate insulating layer, a semiconductor layer, a source, a drain, and an interlayer insulating layer, a gate and a scan line Electrically connected, the gate insulating layer is disposed above the gate of the thin film transistor, the semiconductor layer is disposed above the gate insulating layer, and the data line and the source and the drain are disposed at two sides of the semiconductor layer and electrically connected to the semiconductor layer respectively.
  • the source is electrically connected to the data line.
  • the interlayer insulating layer is disposed above the data line and the source and the drain and is provided with a via hole.
  • the pixel electrode is disposed on the interlayer insulating layer and electrically connected to the drain through the via.
  • the liquid crystal display panel further includes a CF substrate spaced apart from the TFT substrate, and the CF substrate is provided with a second common electrode.
  • the invention has the beneficial effects that the TFT substrate and the liquid crystal display of the present invention are overlapped by the pixel electrode and the first common electrode, and overlapped with the first common electrode of the pixel electrode.
  • the hollow structure corresponding to the first common electrode is arranged to enhance the control force of the electric field on the liquid crystal, reduce the width of the dark line in the pixel, improve the liquid crystal efficiency, increase the transmittance, and do not need to increase the via hole to avoid the short circuit.
  • Figure 1 is a pixel structure of an existing VA mode display
  • Figure 2 is a cross-sectional view taken along line A-A of Figure 1;
  • FIG. 3 is a schematic structural view of a first embodiment of a TFT substrate of the present invention.
  • Figure 4 is a cross-sectional view taken along line B-B of Figure 3;
  • Figure 5 is a first common electrode formation process diagram
  • Figure 6 is a schematic view showing the structure of a first embodiment of a liquid crystal display panel of the present invention.
  • the liquid crystal display panel includes a color filter substrate disposed at a relatively interval (Color Filter Substrate, referred to as CF substrate, also known as color filter substrate) and array substrate (Thin Film Transistor) Substrate, referred to as a TFT substrate, also referred to as a thin film transistor substrate or an Array substrate, and a liquid crystal (liquid crystal molecule) filled between the two substrates, the liquid crystal is located in a liquid crystal cell formed by stacking the array substrate and the color filter substrate.
  • the TFT array substrate generally includes a glass substrate, a common electrode, a gate, a gate insulating layer, a semiconductor layer, an active semiconductor layer, a source electrode, a drain electrode, a passivation layer, and a pixel electrode.
  • FIG. 3 is a schematic structural view of a first embodiment of a TFT substrate 1 of the present invention
  • FIG. 4 is a cross-sectional view taken along line B-B of FIG.
  • the TFT substrate 1 includes a substrate 11 and a first common electrode 12 and a pixel electrode 13 which are stacked on the substrate 11 and are insulated from each other, wherein a position where the pixel electrode 13 overlaps with the first common electrode 12 is provided.
  • a hollow structure having a shape corresponding to the first common electrode 12.
  • the substrate 11 is disposed on the scan line 14 and the data line 15 which are spaced apart from each other and are insulated from each other.
  • the first common electrode 12 is disposed in the same layer as the scan line 14 (not shown in FIG. 4) and the data line 15. Alternatively, the first common electrode 12 and the scan line 14 are disposed on the same layer.
  • FIG. 5 it is a process diagram of forming a first common electrode 12, wherein the first common electrode 12 and one of the scan line 14 and the data line 15 are formed by the same metal layer through the same patterning process, optionally, the first common electrode 12 and the scan line 14 are formed by the same metal layer through the same patterning process.
  • the TFT substrate 1 is provided with a thin film transistor 16 at a crossing position of the scanning line 14 and the data line 15, and the thin film transistor 16 includes a gate electrode 161, a gate insulating layer 162 (not shown in FIG. 3), and a semiconductor layer 163 (not shown in FIG.
  • the source 164, the drain 165, and the interlayer insulating layer 166 (not shown in FIG. 3) the gate 161 is electrically connected to the scan line 14, and the gate insulating layer 162 is disposed above the gate 161 of the thin film transistor.
  • the semiconductor layer 163 is disposed above the gate insulating layer 162.
  • the data line 15 and the source 164 and the drain 165 are spaced apart from each other on both sides of the semiconductor layer 163 and electrically connected to the semiconductor layer 163, respectively.
  • the source 164 and the data line 15 are electrically connected.
  • the interlayer insulating layer 166 is disposed above the data line 15 and the source 164 and the drain 165 and is provided with a via 167.
  • the pixel electrode is disposed on the interlayer insulating layer 166 and electrically connected to the drain 165 through the via 167.
  • the pixel electrode 11 and the first common electrode 12 are not disposed on the same layer.
  • the first common electrode 12 is formed using the first layer of metal, and the first common electrode 12 and the upper layer are
  • the hollow structure of the pixel electrode 11 forms a fringe field, which enhances the control force of the electric field on the liquid crystal, reduces the width of the dark line in the pixel, improves the liquid crystal efficiency, and increases the transmittance.
  • the pixel removes the cross-shaped ITO common electrode in the middle of the original pixel, it is not necessary to increase the via connection to the cross-shaped ITO common electrode and the external common electrode lead, thereby solving the problem that the common electrode is connected to the external common electrode.
  • the first common electrode 12 includes a first electrode branch 121 and a second electrode branch 122 which are disposed at intersections, and the first electrode branch 121 and the second electrode branch 122 The angle at which the branches cross each other is between 0 and 180 degrees.
  • the angle between the first electrode branch 121 and the second electrode branch 122 intersecting each other is 90 degrees.
  • the width of the hollow structure is less than or equal to the width of the first common electrode 12.
  • the first common electrode 12 and the pixel electrode 13 are used to provide a fringe electric field required for vertical alignment.
  • FIG. 6 is a schematic structural view of a first embodiment of a liquid crystal display panel according to the present invention.
  • the present invention further provides a liquid crystal display panel comprising a TFT substrate 1 , the specific structure of which is the TFT substrate of the present invention. A detailed description has been made in an embodiment, and details are not described herein again.
  • the liquid crystal display panel further includes a CF substrate 2 spaced apart from the TFT substrate 1.
  • the CF substrate 2 is provided with a second common electrode 21, and the liquid crystal 3 is further included between the TFT substrate 1 and the CF substrate.
  • the pixel electrode 11 and the first common electrode 12 are not disposed on the same layer.
  • the first common electrode 12 is formed using the first layer of metal, and the first common electrode 12 and the upper layer are
  • the hollow structure of the pixel electrode 11 forms a fringe field, which enhances the control force of the electric field on the liquid crystal, reduces the width of the dark line in the pixel, improves the liquid crystal efficiency, and increases the transmittance.
  • the pixel removes the cross-shaped ITO common electrode in the middle of the original pixel, it is not necessary to increase the via connection to the cross-shaped ITO common electrode and the external common electrode lead, thereby solving the problem that the common electrode is connected to the external common electrode.

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  • Chemical & Material Sciences (AREA)
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  • General Physics & Mathematics (AREA)
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Abstract

一种TFT基板（1）以及液晶显示器，该TFT基板（1）包括基板（11）以及层叠设置于基板（11）上且彼此绝缘间隔的第一公共电极（12）和像素电极（13），其中像素电极（13）的与第一公共电极（12）重叠的位置设置有形状与第一公共电极（12）对应的镂空结构，通过设置像素电极（13）和第一公共电极（12）部分重叠，且在像素电极（13）上和第一公共电极（12）的重叠部分为镂空结构，增强电场对液晶的控制力，减少像素中暗线的宽度，提升液晶效率，增加穿透率，不需要增加过孔，避免短路。

Description

一种TFT基板以及液晶显示面板
【技术领域】
本发明涉及液晶显示技术领域，尤其涉及一种TFT基板以及液晶显示面板。
【背景技术】
液晶显示器以其高显示品质、价格低廉、携带方便等优点，成为在移动通讯设备、PC、TV等的显示终端。目前普遍采用的液晶显示器，通常有上下衬底和中间液晶层组成，衬底有玻璃和电极等组成。如果上下衬底都有电极，可以形成纵向电场模式的显示器，如TN（Twist Nematic）模式，VA（Vertical Alignment）模式，以及为了解决视角过窄开发的MVA（Multidomain Vertical Alignment）。另外一类与上述显示器不同，电极只位于衬底的一侧，形成横向电场模式的显示器，如IPS（In-plane switching）模式、FFS（Fringe Field Switching）模式等。
VA模式薄膜晶体管显示器，以其高开口、高分辨率、广视角等特点为液晶电视等大尺寸面板采用，但在小尺寸高分辨率面板中，使用传统方法设计的像素液晶效率低，VA模式没有被普遍采用。
图1为已有VA模式显示器的像素结构，图2为图1的A-A剖视图，其主要工作原理如图1和图2所示：上基板为公用电极基板，下基板为分布有像素电极的基板，在ITO基板上制作出像素电极图形，利用上下基板间不一致的电极图形在像素边缘处产生弯曲的边缘电场，通过边缘电场控制盒内液晶分子的取向，达到显示的目的。与传统的MVA相比，该技术略去制造昂贵的凸起结构,并且有很高的对比度与视角对称性。
该像素结构存在的问题：
像素电极以及像素电极中间存在的十字交叉状的ITO公共电极是由同一层的ITO层图案化形成。受限于制程，像素电极与公共电极之间以及公共电极本身都要维持一定的宽度，该宽度的存在使像素产生暗线，降低液晶效率和穿透率；
同一像素的同一层别ITO存在像素电极和公共电极，两个电极容易短路，造成显示不良；
在该像素外部需要增加过孔，使公共电极和外部的公共电极导线相连。
【发明内容】
本发明主要解决的技术问题是提供一种TFT基板以及液晶显示面板，能够增强电场对液晶的控制力，减少像素中暗线的宽度，提升液晶效率，增加穿透率，不需要增加过孔，避免短路。
为了解决上述问题，本发明提供了一种TFT基板，其中，TFT基板包括基板以及层叠设置于基板上且彼此绝缘间隔的第一公共电极和像素电极，其中像素电极的与第一公共电极重叠的位置设置有形状与第一公共电极对应的镂空结构；
其中，第一公共电极包括交叉设置的第一电极分支和第二电极分支，且第一电极分支和第二电极分支相互交叉的夹角在0度到180度之间；
其中，镂空结构的宽度小于或者等于第一公共电极的宽度。
为了解决上述技术问题，本发明提供了一种TFT基板，该TFT基板包括基板以及层叠设置于基板上且彼此绝缘间隔的第一公共电极和像素电极，其中像素电极的与第一公共电极重叠的位置设置有形状与第一公共电极对应的镂空结构。
其中，第一公共电极包括交叉设置的第一电极分支和第二电极分支，且第一电极分支和第二电极分支相互交叉的夹角在0度到180度之间。
其中，第一电极分支和第二电极分支相互交叉的夹角呈90度。
其中，镂空结构的宽度小于或者等于第一公共电极的宽度。
其中，第一公共电极和像素电极用于提供垂直配向所需的边缘电场。
其中，TFT基板进一步包括设置于基板上的彼此交叉且绝缘间隔的扫描线和数据线，其中第一公共电极与扫描线和数据线中的一个同层设置。
其中，第一公共电极与所述扫描线和数据线中的一个由同一金属层通过同道构图工艺形成。
其中，TFT基板进一步包括形成于扫描线和数据线的交叉位置的薄膜晶体管，薄膜晶体管包括栅极、栅极绝缘层、半导体层、源极、漏极以及层间绝缘层，栅极与扫描线电连接，栅极绝缘层设置于薄膜晶体管的栅极上方，半导体层设置于栅极绝缘层上方，数据线以及源极和漏极间隔设置于半导体层的两侧且分别与半导体层电连接，源极与数据线电连接，层间绝缘层设置于数据线以及源极和漏极上方且设置有过孔，像素电极设置于层间绝缘层上且通过过孔与漏极电连接。
为了解决上述问题，本发明还提供了一种液晶显示面板，液晶显示面板包括TFT基板，TFT基板包括基板以及层叠设置于基板上且彼此绝缘间隔的第一公共电极和像素电极，其中像素电极的与第一公共电极重叠的位置设置有形状与第一公共电极对应的镂空结构。
其中，第一公共电极包括交叉设置的第一电极分支和第二电极分支，且第一电极分支和第二电极分支相互交叉的夹角在0度到180度之间。
其中，第一电极分支和第二电极分支相互交叉的夹角呈90度。
其中，镂空结构的宽度小于或者等于第一公共电极的宽度。
其中，第一公共电极和像素电极用于提供垂直配向所需的边缘电场。
其中，TFT基板进一步包括设置于所基板上的彼此交叉且绝缘间隔的扫描线和数据线，其中第一公共电极与扫描线和数据线中的一个同层设置。
其中，第一公共电极与扫描线和数据线中的一个由同一金属层通过同道构图工艺形成。
其中，TFT基板进一步包括形成于扫描线和数据线的交叉位置的薄膜晶体管，薄膜晶体管包括栅极、栅极绝缘层、半导体层、源极、漏极以及层间绝缘层，栅极与扫描线电连接，栅极绝缘层设置于薄膜晶体管的栅极上方，半导体层设置于栅极绝缘层上方，数据线以及源极和漏极间隔设置于半导体层的两侧且分别与半导体层电连接，源极与数据线电连接，层间绝缘层设置于数据线以及源极和漏极上方且设置有过孔，像素电极设置于层间绝缘层上且通过过孔与漏极电连接。
其中，液晶显示面板进一步包括与TFT基板间隔设置的CF基板，CF基板上设置有第二公共电极。
本发明的有益效果是：区别于现有技术的情况，本发明一种TFT基板以及液晶显示器，通过设置像素电极和第一公共电极部分重叠，且在像素电极的与第一公共电极重叠的位置设置有形状与第一公共电极对应的镂空结构，增强电场对液晶的控制力，减少像素中暗线的宽度，提升液晶效率，增加穿透率，不需要增加过孔，避免短路。
【附图说明】
图1是已有VA模式显示器的像素结构；
图2为图1的A-A剖视图；
图3是本发明TFT基板第一实施例的结构示意图；
图4是是图3的B-B剖视图；
图5是第一公共电极形成工艺图；
图6是本发明一种液晶显示面板第一实施例的结构示意图。
【具体实施方式】
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的实施例及其附图进行详细描述。
液晶显示面板包括相对间隔设置的彩膜基板(Color Filter Substrate，简称CF基板，又称彩色滤光片基板)和阵列基板(Thin Film Transistor Substrate，简称TFT基板，又称薄膜晶体管基板或Array基板)以及填充于两基板之间的液晶(液晶分子)，液晶位于阵列基板和彩膜基板叠加形成的液晶盒内。其中，TFT阵列基板通常包括玻璃基板、公共电极、栅极、栅绝缘层、半导体层、有源半导体层、源电极、漏电极、钝化层及像素电极。
参照图3，图3是本发明TFT基板1第一实施例的结构示意图，参照图4，是图3的B-B剖视图，
在该实施例中，TFT基板1包括：基板11以及层叠设置于基板11上且彼此绝缘间隔的第一公共电极12和像素电极13，其中像素电极13与第一公共电极12重叠的位置设置有形状与第一公共电极12对应的镂空结构。
基板11上设置于有彼此交叉且绝缘间隔的扫描线14和数据线15，其中第一公共电极12与扫描线14（图4中未绘出）和数据线15中的一个同层设置，可选的，第一公共电极12和扫描线14设置于同一层上。
参照图5，是第一公共电极12形成工艺图，其中，第一公共电极12与扫描线14和数据线15中的一个由同一金属层通过同道构图工艺形成，可选的，第一公共电极12与扫描线14由同一金属层通过同道构图工艺形成。
TFT基板1在扫描线14和数据线15的交叉位置设置有薄膜晶体管16，薄膜晶体管16包括栅极161、栅极绝缘层162（图3中未示出）、半导体层163（图3中未示出）、源极164、漏极165以及层间绝缘层166（图3中未示出），栅极161与扫描线14电连接，栅极绝缘层162设置于薄膜晶体管的栅极161上方，半导体层163设置于栅极绝缘层162上方，数据线15以及源极164和漏极165间隔设置于半导体层163的两侧且分别与半导体层163电连接，源极164与数据线15电连接，层间绝缘层166设置于数据线15以及源极164和漏极165上方且设置有过孔167，像素电极设置于层间绝缘层166上且通过过孔167与漏极165电连接。
该实施例中，像素电极11和第一公共电极12并不设置在同一层面上，在像素电极11镂空结构下方，使用第一层金属形成第一公共电极12，第一公共电极12与上层的像素电极11镂空结构形成边缘场，增强了电场对液晶的控制力，减小像素中暗线的宽度，提升液晶效率，增加了穿透率。另外，由于该像素去掉了原像素中间的十字交叉状ITO公共电极，不需要增加过孔连接十字交叉状ITO公共电极和外部公共电极引线，解决了公共电极连接到外部的公共电极导线问题。
在本发明TFT基板第一实施例一可选的应用情景中，第一公共电极12包括交叉设置的第一电极分支121和第二电极分支122，且第一电极分支121和第二电极分122支相互交叉的夹角在0度到180度之间。
可选的，第一电极分支121和第二电极分支122相互交叉的夹角呈90度。
可选的，镂空结构的宽度小于或者等于第一公共电极12的宽度。
第一公共电极12和像素电极13用于提供垂直配向所需的边缘电场。
参照图6，是本发明一种液晶显示面板第一实施例的结构示意图，为了解决上述问题，本发明还提供了一种液晶显示面板，包括TFT基板1，其具体结构在本发明TFT基板第一实施例中已经做了详细描述，在此不再赘述。液晶显示面板还包括与TFT基板1间隔设置的CF基板2， CF基板2上设置有第二公共电极21，TFT基板1和CF基板之间还包含了液晶3。
该实施例中，像素电极11和第一公共电极12并不设置在同一层面上，在像素电极11镂空结构下方，使用第一层金属形成第一公共电极12，第一公共电极12与上层的像素电极11镂空结构形成边缘场，增强了电场对液晶的控制力，减小像素中暗线的宽度，提升液晶效率，增加了穿透率。另外，由于该像素去掉了原像素中间的十字交叉状ITO公共电极，不需要增加过孔连接十字交叉状ITO公共电极和外部公共电极引线，解决了公共电极连接到外部的公共电极导线问题。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (18)

  1. 一种TFT基板，其中，所述TFT基板包括基板以及层叠设置于所述基板上且彼此绝缘间隔的第一公共电极和像素电极，其中所述像素电极的与所述第一公共电极重叠的位置设置有形状与所述第一公共电极对应的镂空结构；
    其中，所述第一公共电极包括交叉设置的第一电极分支和第二电极分支，且所述第一电极分支和第二电极分支相互交叉的夹角在0度到180度之间；
    其中，所述镂空结构的宽度小于或者等于所述第一公共电极的宽度。
  2. 一种TFT基板，其中，所述TFT基板包括基板以及层叠设置于所述基板上且彼此绝缘间隔的第一公共电极和像素电极，其中所述像素电极的与所述第一公共电极重叠的位置设置有形状与所述第一公共电极对应的镂空结构。
  3. 根据权利要求2所述的TFT基板，其中，
    所述第一公共电极包括交叉设置的第一电极分支和第二电极分支，且所述第一电极分支和第二电极分支相互交叉的夹角在0度到180度之间。
  4. 根据权利要求3所述的TFT基板，其中，
    所述第一电极分支和第二电极分支相互交叉的夹角呈90度。
  5. 根据权利要求2所述的TFT基板，其中，
    所述镂空结构的宽度小于或者等于所述第一公共电极的宽度。
  6. 根据权利要求2所述的TFT基板，其中，所述第一公共电极和所述像素电极用于提供垂直配向所需的边缘电场。
  7. 根据权利要求2所述的TFT基板，其中，所述TFT基板进一步包括设置于所述基板上的彼此交叉且绝缘间隔的扫描线和数据线，其中所述第一公共电极与所述扫描线和所述数据线中的一个同层设置。
  8. 根据权利要求7所述的TFT基板，其中，所述第一公共电极与所述扫描线和所述数据线中的所述一个由同一金属层通过同道构图工艺形成。
  9. 根据权利要求6所述的TFT基板，其中，所述TFT基板进一步包括形成于所述扫描线和数据线的交叉位置的薄膜晶体管，所述薄膜晶体管包括栅极、栅极绝缘层、半导体层、源极、漏极以及层间绝缘层，所述栅极与所述扫描线电连接，所述栅极绝缘层设置于所述薄膜晶体管的栅极上方，所述半导体层设置于所述栅极绝缘层上方，所述数据线以及所述源极和漏极间隔设置于所述半导体层的两侧且分别与所述半导体层电连接，所述源极与所述数据线电连接，所述层间绝缘层设置于所述数据线以及所述源极和漏极上方且设置有过孔，所述像素电极设置于所述层间绝缘层上且通过所述过孔与所述漏极电连接。
  10. 一种液晶显示面板，其中，所述液晶显示面板包括TFT基板，所述TFT基板包括基板以及层叠设置于所述基板上且彼此绝缘间隔的第一公共电极和像素电极，其中所述像素电极的与所述第一公共电极重叠的位置设置有形状与所述第一公共电极对应的镂空结构。
  11. 根据权利要求10所述的液晶显示面板，其中，
    所述第一公共电极包括交叉设置的第一电极分支和第二电极分支，且所述第一电极分支和第二电极分支相互交叉的夹角在0度到180度之间。
  12. 根据权利要求11所述的液晶显示面板，其中，
    所述第一电极分支和第二电极分支相互交叉的夹角呈90度。
  13. 根据权利要求10所述的液晶显示面板，其中，
    所述镂空结构的宽度小于或者等于所述第一公共电极的宽度。
  14. 根据权利要求10所述的液晶显示面板，其中，所述第一公共电极和所述像素电极用于提供垂直配向所需的边缘电场。
  15. 根据权利要求10所述的液晶显示面板，其中，所述TFT基板进一步包括设置于所述基板上的彼此交叉且绝缘间隔的扫描线和数据线，其中所述第一公共电极与所述扫描线和所述数据线中的一个同层设置。
  16. 根据权利要求15所述的液晶显示面板，其中，所述第一公共电极与所述扫描线和所述数据线中的所述一个由同一金属层通过同道构图工艺形成。
  17. 根据权利要求14所述的液晶显示面板，其中，所述TFT基板进一步包括形成于所述扫描线和数据线的交叉位置的薄膜晶体管，所述薄膜晶体管包括栅极、栅极绝缘层、半导体层、源极、漏极以及层间绝缘层，所述栅极与所述扫描线电连接，所述栅极绝缘层设置于所述薄膜晶体管的栅极上方，所述半导体层设置于所述栅极绝缘层上方，所述数据线以及所述源极和漏极间隔设置于所述半导体层的两侧且分别与所述半导体层电连接，所述源极与所述数据线电连接，所述层间绝缘层设置于所述数据线以及所述源极和漏极上方且设置有过孔，所述像素电极设置于所述层间绝缘层上且通过所述过孔与所述漏极电连接。
  18. 根据权利要求10所述的液晶显示面板，其中，所述液晶显示面板进一步包括与所述TFT基板间隔设置的CF基板，所述CF基板上设置有第二公共电极。
PCT/CN2016/088497 2016-06-01 2016-07-05 一种tft基板以及液晶显示面板 Ceased WO2017206264A1 (zh)

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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106054485B (zh) * 2016-08-22 2019-05-31 深圳市华星光电技术有限公司 液晶显示面板及其制作方法
JP6409920B2 (ja) * 2016-10-28 2018-10-24 Jnc株式会社 液晶表示素子、表示装置
CN109471288B (zh) * 2018-07-02 2021-10-29 惠科股份有限公司 显示面板及液晶显示面板的制造方法
CN109270751B (zh) * 2018-10-23 2020-10-30 深圳市华星光电技术有限公司 阵列基板及液晶显示面板
CN110068968A (zh) * 2019-04-23 2019-07-30 昆山龙腾光电有限公司 显示面板及显示装置
TWI706204B (zh) 2019-08-12 2020-10-01 友達光電股份有限公司 畫素結構
CN110618564B (zh) * 2019-10-30 2022-06-24 京东方科技集团股份有限公司 电极结构、阵列基板及显示装置
CN112904633B (zh) * 2021-01-22 2022-09-20 昆山龙腾光电股份有限公司 显示面板及显示装置
CN115877622B (zh) * 2023-03-08 2023-05-26 惠科股份有限公司 阵列基板及显示面板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050134780A1 (en) * 2003-12-23 2005-06-23 Innolux Display Corp. In-plane switching mode thin film transistor liquid crystal display device with two domains
CN202177761U (zh) * 2011-05-23 2012-03-28 北京京东方光电科技有限公司 一种液晶显示面板及液晶显示器件
CN103488004A (zh) * 2013-09-26 2014-01-01 京东方科技集团股份有限公司 一种阵列基板、液晶面板及显示装置
CN104267546A (zh) * 2014-09-19 2015-01-07 京东方科技集团股份有限公司 一种阵列基板和显示装置
CN105487316A (zh) * 2016-01-19 2016-04-13 深圳市华星光电技术有限公司 液晶显示面板及液晶显示装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3060261B2 (ja) 1991-03-19 2000-07-10 株式会社半導体エネルギー研究所 半導体装置の製造方法
JP2000238447A (ja) 1999-02-18 2000-09-05 Canon Inc 印刷凹版、印刷凹版の製造方法及び記憶媒体
JP4724339B2 (ja) * 1999-09-07 2011-07-13 株式会社日立製作所 液晶表示装置
KR100348288B1 (ko) * 2000-08-11 2002-08-09 엘지.필립스 엘시디 주식회사 횡전계방식 액정표시장치
TW588171B (en) * 2001-10-12 2004-05-21 Fujitsu Display Tech Liquid crystal display device
TWI282030B (en) * 2002-03-19 2007-06-01 Semiconductor Energy Lab Liquid crystal display device and method of driving the same
CN100419545C (zh) * 2003-06-23 2008-09-17 鸿富锦精密工业（深圳）有限公司 有源矩阵型液晶显示器
CN101458443A (zh) 2007-12-13 2009-06-17 中芯国际集成电路制造(上海)有限公司 光掩模版及其制作方法、图形化的方法
CN201974610U (zh) * 2011-02-19 2011-09-14 福州华映视讯有限公司 显示面板
CN103439840B (zh) * 2013-08-30 2017-06-06 京东方科技集团股份有限公司 一种阵列基板、显示装置及阵列基板的制造方法
KR20150030526A (ko) * 2013-09-12 2015-03-20 삼성디스플레이 주식회사 액정 표시 장치
WO2015122457A1 (ja) * 2014-02-14 2015-08-20 Dic株式会社 液晶表示素子
JP6424521B2 (ja) 2014-09-03 2018-11-21 大日本印刷株式会社 蒸着マスク、フレーム付き蒸着マスク、及び有機半導体素子の製造方法
CN104503203A (zh) 2015-01-15 2015-04-08 京东方科技集团股份有限公司 掩膜板及其制备方法和显示面板中封框胶的固化方法
CN104865789A (zh) 2015-06-08 2015-08-26 中国科学院微电子研究所 掩模版和光刻方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050134780A1 (en) * 2003-12-23 2005-06-23 Innolux Display Corp. In-plane switching mode thin film transistor liquid crystal display device with two domains
CN202177761U (zh) * 2011-05-23 2012-03-28 北京京东方光电科技有限公司 一种液晶显示面板及液晶显示器件
CN103488004A (zh) * 2013-09-26 2014-01-01 京东方科技集团股份有限公司 一种阵列基板、液晶面板及显示装置
CN104267546A (zh) * 2014-09-19 2015-01-07 京东方科技集团股份有限公司 一种阵列基板和显示装置
CN105487316A (zh) * 2016-01-19 2016-04-13 深圳市华星光电技术有限公司 液晶显示面板及液晶显示装置

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